1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown-unknown   -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-SSE
3; RUN: llc < %s -mtriple=i686-unknown-unknown   -mattr=+mmx,+avx2 | FileCheck %s --check-prefix=X86-AVX
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64-SSE
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx2 | FileCheck %s --check-prefix=X64-AVX
6
7define i32 @PR29222(i32) nounwind {
8; X86-SSE-LABEL: PR29222:
9; X86-SSE:       # %bb.0:
10; X86-SSE-NEXT:    pushl %ebp
11; X86-SSE-NEXT:    movl %esp, %ebp
12; X86-SSE-NEXT:    andl $-8, %esp
13; X86-SSE-NEXT:    subl $8, %esp
14; X86-SSE-NEXT:    movd 8(%ebp), %mm0
15; X86-SSE-NEXT:    pshufw $68, %mm0, %mm0 # mm0 = mm0[0,1,0,1]
16; X86-SSE-NEXT:    packsswb %mm0, %mm0
17; X86-SSE-NEXT:    movq %mm0, (%esp)
18; X86-SSE-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
19; X86-SSE-NEXT:    packsswb %xmm0, %xmm0
20; X86-SSE-NEXT:    movd %xmm0, %eax
21; X86-SSE-NEXT:    movl %ebp, %esp
22; X86-SSE-NEXT:    popl %ebp
23; X86-SSE-NEXT:    retl
24;
25; X86-AVX-LABEL: PR29222:
26; X86-AVX:       # %bb.0:
27; X86-AVX-NEXT:    pushl %ebp
28; X86-AVX-NEXT:    movl %esp, %ebp
29; X86-AVX-NEXT:    andl $-8, %esp
30; X86-AVX-NEXT:    subl $8, %esp
31; X86-AVX-NEXT:    movd 8(%ebp), %mm0
32; X86-AVX-NEXT:    pshufw $68, %mm0, %mm0 # mm0 = mm0[0,1,0,1]
33; X86-AVX-NEXT:    packsswb %mm0, %mm0
34; X86-AVX-NEXT:    movq %mm0, (%esp)
35; X86-AVX-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
36; X86-AVX-NEXT:    vpacksswb %xmm0, %xmm0, %xmm0
37; X86-AVX-NEXT:    vmovd %xmm0, %eax
38; X86-AVX-NEXT:    movl %ebp, %esp
39; X86-AVX-NEXT:    popl %ebp
40; X86-AVX-NEXT:    retl
41;
42; X64-SSE-LABEL: PR29222:
43; X64-SSE:       # %bb.0:
44; X64-SSE-NEXT:    movd %edi, %mm0
45; X64-SSE-NEXT:    pshufw $68, %mm0, %mm0 # mm0 = mm0[0,1,0,1]
46; X64-SSE-NEXT:    packsswb %mm0, %mm0
47; X64-SSE-NEXT:    movq2dq %mm0, %xmm0
48; X64-SSE-NEXT:    packsswb %xmm0, %xmm0
49; X64-SSE-NEXT:    movd %xmm0, %eax
50; X64-SSE-NEXT:    retq
51;
52; X64-AVX-LABEL: PR29222:
53; X64-AVX:       # %bb.0:
54; X64-AVX-NEXT:    movd %edi, %mm0
55; X64-AVX-NEXT:    pshufw $68, %mm0, %mm0 # mm0 = mm0[0,1,0,1]
56; X64-AVX-NEXT:    packsswb %mm0, %mm0
57; X64-AVX-NEXT:    movq2dq %mm0, %xmm0
58; X64-AVX-NEXT:    vpacksswb %xmm0, %xmm0, %xmm0
59; X64-AVX-NEXT:    vmovd %xmm0, %eax
60; X64-AVX-NEXT:    retq
61  %2 = insertelement <2 x i32> undef, i32 %0, i32 0
62  %3 = shufflevector <2 x i32> %2, <2 x i32> undef, <2 x i32> zeroinitializer
63  %4 = bitcast <2 x i32> %3 to x86_mmx
64  %5 = tail call x86_mmx @llvm.x86.mmx.packsswb(x86_mmx %4, x86_mmx %4)
65  %6 = bitcast x86_mmx %5 to i64
66  %7 = insertelement <2 x i64> undef, i64 %6, i32 0
67  %8 = bitcast <2 x i64> %7 to <8 x i16>
68  %9 = tail call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %8, <8 x i16> undef)
69  %10 = bitcast <16 x i8> %9 to <4 x i32>
70  %11 = extractelement <4 x i32> %10, i32 0
71  ret i32 %11
72}
73
74declare x86_mmx @llvm.x86.mmx.packsswb(x86_mmx, x86_mmx)
75declare <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16>, <8 x i16>)
76