1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+adx | FileCheck %s 4 5; PR34292 6@_ZL1c = external dso_local global i8 7define void @sum_unroll(i64* nocapture readonly, i64* nocapture) { 8; CHECK-LABEL: sum_unroll: 9; CHECK: # %bb.0: 10; CHECK-NEXT: movb _ZL1c(%rip), %al 11; CHECK-NEXT: movq (%rdi), %rcx 12; CHECK-NEXT: addb $-1, %al 13; CHECK-NEXT: adcq %rcx, (%rsi) 14; CHECK-NEXT: movq 8(%rdi), %rax 15; CHECK-NEXT: adcq %rax, 8(%rsi) 16; CHECK-NEXT: movq 16(%rdi), %rax 17; CHECK-NEXT: adcq %rax, 16(%rsi) 18; CHECK-NEXT: movq 24(%rdi), %rax 19; CHECK-NEXT: adcq %rax, 24(%rsi) 20; CHECK-NEXT: setb _ZL1c(%rip) 21; CHECK-NEXT: retq 22 %3 = load i8, i8* @_ZL1c, align 1 23 %4 = load i64, i64* %0, align 8 24 %5 = load i64, i64* %1, align 8 25 %6 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %3, i64 %4, i64 %5) 26 %7 = extractvalue { i8, i64 } %6, 1 27 store i64 %7, i64* %1, align 8 28 %8 = extractvalue { i8, i64 } %6, 0 29 %9 = getelementptr inbounds i64, i64* %0, i64 1 30 %10 = load i64, i64* %9, align 8 31 %11 = getelementptr inbounds i64, i64* %1, i64 1 32 %12 = load i64, i64* %11, align 8 33 %13 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %8, i64 %10, i64 %12) 34 %14 = extractvalue { i8, i64 } %13, 1 35 store i64 %14, i64* %11, align 8 36 %15 = extractvalue { i8, i64 } %13, 0 37 %16 = getelementptr inbounds i64, i64* %0, i64 2 38 %17 = load i64, i64* %16, align 8 39 %18 = getelementptr inbounds i64, i64* %1, i64 2 40 %19 = load i64, i64* %18, align 8 41 %20 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %15, i64 %17, i64 %19) 42 %21 = extractvalue { i8, i64 } %20, 1 43 store i64 %21, i64* %18, align 8 44 %22 = extractvalue { i8, i64 } %20, 0 45 %23 = getelementptr inbounds i64, i64* %0, i64 3 46 %24 = load i64, i64* %23, align 8 47 %25 = getelementptr inbounds i64, i64* %1, i64 3 48 %26 = load i64, i64* %25, align 8 49 %27 = tail call { i8, i64 } @llvm.x86.addcarry.64(i8 %22, i64 %24, i64 %26) 50 %28 = extractvalue { i8, i64 } %27, 1 51 store i64 %28, i64* %25, align 8 52 %29 = extractvalue { i8, i64 } %27, 0 53 store i8 %29, i8* @_ZL1c, align 1 54 ret void 55} 56 57declare { i8, i64 } @llvm.x86.addcarry.64(i8, i64, i64) 58