1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512VL
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512F
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512F
6
7define <8 x i16> @testv8i16(<8 x i16> %in) {
8; AVX256-LABEL: testv8i16:
9; AVX256:       # %bb.0:
10; AVX256-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
11; AVX256-NEXT:    vplzcntd %ymm0, %ymm0
12; AVX256-NEXT:    vpmovdw %ymm0, %xmm0
13; AVX256-NEXT:    vpsubw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
14; AVX256-NEXT:    vzeroupper
15; AVX256-NEXT:    retq
16;
17; AVX512VL-LABEL: testv8i16:
18; AVX512VL:       # %bb.0:
19; AVX512VL-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
20; AVX512VL-NEXT:    vplzcntd %ymm0, %ymm0
21; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
22; AVX512VL-NEXT:    vpsubw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
23; AVX512VL-NEXT:    vzeroupper
24; AVX512VL-NEXT:    retq
25;
26; AVX512F-LABEL: testv8i16:
27; AVX512F:       # %bb.0:
28; AVX512F-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
29; AVX512F-NEXT:    vplzcntd %zmm0, %zmm0
30; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
31; AVX512F-NEXT:    vpsubw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
32; AVX512F-NEXT:    vzeroupper
33; AVX512F-NEXT:    retq
34  %out = call <8 x i16> @llvm.ctlz.v8i16(<8 x i16> %in, i1 false)
35  ret <8 x i16> %out
36}
37
38define <16 x i8> @testv16i8(<16 x i8> %in) {
39; AVX256-LABEL: testv16i8:
40; AVX256:       # %bb.0:
41; AVX256-NEXT:    vmovdqa {{.*#+}} xmm1 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
42; AVX256-NEXT:    vpshufb %xmm0, %xmm1, %xmm2
43; AVX256-NEXT:    vpsrlw $4, %xmm0, %xmm0
44; AVX256-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
45; AVX256-NEXT:    vpxor %xmm3, %xmm3, %xmm3
46; AVX256-NEXT:    vpcmpeqb %xmm3, %xmm0, %xmm3
47; AVX256-NEXT:    vpand %xmm3, %xmm2, %xmm2
48; AVX256-NEXT:    vpshufb %xmm0, %xmm1, %xmm0
49; AVX256-NEXT:    vpaddb %xmm0, %xmm2, %xmm0
50; AVX256-NEXT:    retq
51;
52; AVX512-LABEL: testv16i8:
53; AVX512:       # %bb.0:
54; AVX512-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
55; AVX512-NEXT:    vplzcntd %zmm0, %zmm0
56; AVX512-NEXT:    vpmovdb %zmm0, %xmm0
57; AVX512-NEXT:    vpsubb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
58; AVX512-NEXT:    vzeroupper
59; AVX512-NEXT:    retq
60  %out = call <16 x i8> @llvm.ctlz.v16i8(<16 x i8> %in, i1 false)
61  ret <16 x i8> %out
62}
63
64define <16 x i16> @testv16i16(<16 x i16> %in) {
65; AVX256-LABEL: testv16i16:
66; AVX256:       # %bb.0:
67; AVX256-NEXT:    vextracti128 $1, %ymm0, %xmm1
68; AVX256-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
69; AVX256-NEXT:    vplzcntd %ymm1, %ymm1
70; AVX256-NEXT:    vpmovdw %ymm1, %xmm1
71; AVX256-NEXT:    vmovdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
72; AVX256-NEXT:    vpsubw %xmm2, %xmm1, %xmm1
73; AVX256-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
74; AVX256-NEXT:    vplzcntd %ymm0, %ymm0
75; AVX256-NEXT:    vpmovdw %ymm0, %xmm0
76; AVX256-NEXT:    vpsubw %xmm2, %xmm0, %xmm0
77; AVX256-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
78; AVX256-NEXT:    retq
79;
80; AVX512-LABEL: testv16i16:
81; AVX512:       # %bb.0:
82; AVX512-NEXT:    vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero
83; AVX512-NEXT:    vplzcntd %zmm0, %zmm0
84; AVX512-NEXT:    vpmovdw %zmm0, %ymm0
85; AVX512-NEXT:    vpsubw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
86; AVX512-NEXT:    retq
87  %out = call <16 x i16> @llvm.ctlz.v16i16(<16 x i16> %in, i1 false)
88  ret <16 x i16> %out
89}
90
91define <32 x i8> @testv32i8(<32 x i8> %in) {
92; AVX256-LABEL: testv32i8:
93; AVX256:       # %bb.0:
94; AVX256-NEXT:    vmovdqa {{.*#+}} ymm1 = [4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0,4,3,2,2,1,1,1,1,0,0,0,0,0,0,0,0]
95; AVX256-NEXT:    vpshufb %ymm0, %ymm1, %ymm2
96; AVX256-NEXT:    vpsrlw $4, %ymm0, %ymm0
97; AVX256-NEXT:    vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
98; AVX256-NEXT:    vpxor %xmm3, %xmm3, %xmm3
99; AVX256-NEXT:    vpcmpeqb %ymm3, %ymm0, %ymm3
100; AVX256-NEXT:    vpand %ymm3, %ymm2, %ymm2
101; AVX256-NEXT:    vpshufb %ymm0, %ymm1, %ymm0
102; AVX256-NEXT:    vpaddb %ymm0, %ymm2, %ymm0
103; AVX256-NEXT:    retq
104;
105; AVX512-LABEL: testv32i8:
106; AVX512:       # %bb.0:
107; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
108; AVX512-NEXT:    vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
109; AVX512-NEXT:    vplzcntd %zmm1, %zmm1
110; AVX512-NEXT:    vpmovdb %zmm1, %xmm1
111; AVX512-NEXT:    vmovdqa {{.*#+}} xmm2 = [24,24,24,24,24,24,24,24,24,24,24,24,24,24,24,24]
112; AVX512-NEXT:    vpsubb %xmm2, %xmm1, %xmm1
113; AVX512-NEXT:    vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
114; AVX512-NEXT:    vplzcntd %zmm0, %zmm0
115; AVX512-NEXT:    vpmovdb %zmm0, %xmm0
116; AVX512-NEXT:    vpsubb %xmm2, %xmm0, %xmm0
117; AVX512-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
118; AVX512-NEXT:    retq
119  %out = call <32 x i8> @llvm.ctlz.v32i8(<32 x i8> %in, i1 false)
120  ret <32 x i8> %out
121}
122
123declare <8 x i16> @llvm.ctlz.v8i16(<8 x i16>, i1)
124declare <16 x i8> @llvm.ctlz.v16i8(<16 x i8>, i1)
125declare <16 x i16> @llvm.ctlz.v16i16(<16 x i16>, i1)
126declare <32 x i8> @llvm.ctlz.v32i8(<32 x i8>, i1)
127