1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7     | FileCheck --check-prefix=SSE %s
2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefix=AVX %s
3
4; Every GPR should be saved - except r11
5define preserve_mostcc void @preserve_mostcc1() nounwind {
6entry:
7;SSE-LABEL: preserve_mostcc1
8;SSE:       pushq %r10
9;SSE-NEXT:  pushq %r9
10;SSE-NEXT:  pushq %r8
11;SSE-NEXT:  pushq %rdi
12;SSE-NEXT:  pushq %rsi
13;SSE-NEXT:  pushq %rdx
14;SSE-NEXT:  pushq %rcx
15;SSE-NEXT:  pushq %rax
16;SSE-NEXT:  pushq %rbp
17;SSE-NEXT:  pushq %r15
18;SSE-NEXT:  pushq %r14
19;SSE-NEXT:  pushq %r13
20;SSE-NEXT:  pushq %r12
21;SSE-NEXT:  pushq %rbx
22;AVX-LABEL: preserve_mostcc1
23;AVX:       pushq %r10
24;AVX-NEXT:  pushq %r9
25;AVX-NEXT:  pushq %r8
26;AVX-NEXT:  pushq %rdi
27;AVX-NEXT:  pushq %rsi
28;AVX-NEXT:  pushq %rdx
29;AVX-NEXT:  pushq %rcx
30;AVX-NEXT:  pushq %rax
31;AVX-NEXT:  pushq %rbp
32;AVX-NEXT:  pushq %r15
33;AVX-NEXT:  pushq %r14
34;AVX-NEXT:  pushq %r13
35;AVX-NEXT:  pushq %r12
36;AVX-NEXT:  pushq %rbx
37  call void asm sideeffect "", "~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15},~{rbp},~{xmm0},~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15}"()
38  ret void
39}
40
41; Make sure R11 and XMMs are saved before the call
42declare preserve_mostcc void @foo(i64, i64, double, double)
43define void @preserve_mostcc2() nounwind {
44entry:
45;SSE-LABEL: preserve_mostcc2
46;SSE:       movq %r11, [[REG:%[a-z0-9]+]]
47;SSE:       movaps %xmm2
48;SSE:       movaps %xmm3
49;SSE:       movaps %xmm4
50;SSE:       movaps %xmm5
51;SSE:       movaps %xmm6
52;SSE:       movaps %xmm7
53;SSE:       movaps %xmm8
54;SSE:       movaps %xmm9
55;SSE:       movaps %xmm10
56;SSE:       movaps %xmm11
57;SSE:       movaps %xmm12
58;SSE:       movaps %xmm13
59;SSE:       movaps %xmm14
60;SSE:       movaps %xmm15
61;SSE:       movq [[REG]], %r11
62  %a0 = call i64 asm sideeffect "", "={rax}"() nounwind
63  %a1 = call i64 asm sideeffect "", "={rcx}"() nounwind
64  %a2 = call i64 asm sideeffect "", "={rdx}"() nounwind
65  %a3 = call i64 asm sideeffect "", "={r8}"() nounwind
66  %a4 = call i64 asm sideeffect "", "={r9}"() nounwind
67  %a5 = call i64 asm sideeffect "", "={r10}"() nounwind
68  %a6 = call i64 asm sideeffect "", "={r11}"() nounwind
69  %a10 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind
70  %a11 = call <2 x double> asm sideeffect "", "={xmm3}"() nounwind
71  %a12 = call <2 x double> asm sideeffect "", "={xmm4}"() nounwind
72  %a13 = call <2 x double> asm sideeffect "", "={xmm5}"() nounwind
73  %a14 = call <2 x double> asm sideeffect "", "={xmm6}"() nounwind
74  %a15 = call <2 x double> asm sideeffect "", "={xmm7}"() nounwind
75  %a16 = call <2 x double> asm sideeffect "", "={xmm8}"() nounwind
76  %a17 = call <2 x double> asm sideeffect "", "={xmm9}"() nounwind
77  %a18 = call <2 x double> asm sideeffect "", "={xmm10}"() nounwind
78  %a19 = call <2 x double> asm sideeffect "", "={xmm11}"() nounwind
79  %a20 = call <2 x double> asm sideeffect "", "={xmm12}"() nounwind
80  %a21 = call <2 x double> asm sideeffect "", "={xmm13}"() nounwind
81  %a22 = call <2 x double> asm sideeffect "", "={xmm14}"() nounwind
82  %a23 = call <2 x double> asm sideeffect "", "={xmm15}"() nounwind
83  call preserve_mostcc void @foo(i64 1, i64 2, double 3.0, double 4.0)
84  call void asm sideeffect "", "{rax},{rcx},{rdx},{r8},{r9},{r10},{r11},{xmm2},{xmm3},{xmm4},{xmm5},{xmm6},{xmm7},{xmm8},{xmm9},{xmm10},{xmm11},{xmm12},{xmm13},{xmm14},{xmm15}"(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, <2 x double> %a10, <2 x double> %a11, <2 x double> %a12, <2 x double> %a13, <2 x double> %a14, <2 x double> %a15, <2 x double> %a16, <2 x double> %a17, <2 x double> %a18, <2 x double> %a19, <2 x double> %a20, <2 x double> %a21, <2 x double> %a22, <2 x double> %a23)
85  ret void
86}
87