1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC 3; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM 4; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON 5; RUN: llc < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU 6 7; PR5757 8%0 = type { i64, i32 } 9 10define i32 @test1(%0* %p, %0* %q, i1 %r) nounwind { 11; GENERIC-LABEL: test1: 12; GENERIC: ## %bb.0: 13; GENERIC-NEXT: testb $1, %dl 14; GENERIC-NEXT: cmoveq %rsi, %rdi 15; GENERIC-NEXT: movl 8(%rdi), %eax 16; GENERIC-NEXT: retq 17; 18; ATOM-LABEL: test1: 19; ATOM: ## %bb.0: 20; ATOM-NEXT: testb $1, %dl 21; ATOM-NEXT: cmoveq %rsi, %rdi 22; ATOM-NEXT: movl 8(%rdi), %eax 23; ATOM-NEXT: nop 24; ATOM-NEXT: nop 25; ATOM-NEXT: retq 26; 27; ATHLON-LABEL: test1: 28; ATHLON: ## %bb.0: 29; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 30; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 31; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 32; ATHLON-NEXT: cmovnel %eax, %ecx 33; ATHLON-NEXT: movl (%ecx), %eax 34; ATHLON-NEXT: movl 8(%eax), %eax 35; ATHLON-NEXT: retl 36; 37; MCU-LABEL: test1: 38; MCU: # %bb.0: 39; MCU-NEXT: testb $1, %cl 40; MCU-NEXT: jne .LBB0_2 41; MCU-NEXT: # %bb.1: 42; MCU-NEXT: movl %edx, %eax 43; MCU-NEXT: .LBB0_2: 44; MCU-NEXT: movl 8(%eax), %eax 45; MCU-NEXT: retl 46 %t0 = load %0, %0* %p 47 %t1 = load %0, %0* %q 48 %t4 = select i1 %r, %0 %t0, %0 %t1 49 %t5 = extractvalue %0 %t4, 1 50 ret i32 %t5 51} 52 53; PR2139 54define i32 @test2() nounwind { 55; GENERIC-LABEL: test2: 56; GENERIC: ## %bb.0: ## %entry 57; GENERIC-NEXT: pushq %rax 58; GENERIC-NEXT: callq _return_false 59; GENERIC-NEXT: xorl %ecx, %ecx 60; GENERIC-NEXT: testb $1, %al 61; GENERIC-NEXT: movl $-3840, %eax ## imm = 0xF100 62; GENERIC-NEXT: cmovnel %ecx, %eax 63; GENERIC-NEXT: cmpl $32768, %eax ## imm = 0x8000 64; GENERIC-NEXT: jge LBB1_1 65; GENERIC-NEXT: ## %bb.2: ## %bb91 66; GENERIC-NEXT: xorl %eax, %eax 67; GENERIC-NEXT: popq %rcx 68; GENERIC-NEXT: retq 69; GENERIC-NEXT: LBB1_1: ## %bb90 70; GENERIC-NEXT: ud2 71; 72; ATOM-LABEL: test2: 73; ATOM: ## %bb.0: ## %entry 74; ATOM-NEXT: pushq %rax 75; ATOM-NEXT: callq _return_false 76; ATOM-NEXT: xorl %ecx, %ecx 77; ATOM-NEXT: movl $-3840, %edx ## imm = 0xF100 78; ATOM-NEXT: testb $1, %al 79; ATOM-NEXT: cmovnel %ecx, %edx 80; ATOM-NEXT: cmpl $32768, %edx ## imm = 0x8000 81; ATOM-NEXT: jge LBB1_1 82; ATOM-NEXT: ## %bb.2: ## %bb91 83; ATOM-NEXT: xorl %eax, %eax 84; ATOM-NEXT: popq %rcx 85; ATOM-NEXT: retq 86; ATOM-NEXT: LBB1_1: ## %bb90 87; ATOM-NEXT: ud2 88; 89; ATHLON-LABEL: test2: 90; ATHLON: ## %bb.0: ## %entry 91; ATHLON-NEXT: subl $12, %esp 92; ATHLON-NEXT: calll _return_false 93; ATHLON-NEXT: xorl %ecx, %ecx 94; ATHLON-NEXT: testb $1, %al 95; ATHLON-NEXT: movl $-3840, %eax ## imm = 0xF100 96; ATHLON-NEXT: cmovnel %ecx, %eax 97; ATHLON-NEXT: cmpl $32768, %eax ## imm = 0x8000 98; ATHLON-NEXT: jge LBB1_1 99; ATHLON-NEXT: ## %bb.2: ## %bb91 100; ATHLON-NEXT: xorl %eax, %eax 101; ATHLON-NEXT: addl $12, %esp 102; ATHLON-NEXT: retl 103; ATHLON-NEXT: LBB1_1: ## %bb90 104; ATHLON-NEXT: ud2 105; 106; MCU-LABEL: test2: 107; MCU: # %bb.0: # %entry 108; MCU-NEXT: calll return_false@PLT 109; MCU-NEXT: xorl %ecx, %ecx 110; MCU-NEXT: testb $1, %al 111; MCU-NEXT: jne .LBB1_2 112; MCU-NEXT: # %bb.1: # %entry 113; MCU-NEXT: movl $-3840, %ecx # imm = 0xF100 114; MCU-NEXT: .LBB1_2: # %entry 115; MCU-NEXT: cmpl $32768, %ecx # imm = 0x8000 116; MCU-NEXT: jge .LBB1_3 117; MCU-NEXT: # %bb.4: # %bb91 118; MCU-NEXT: xorl %eax, %eax 119; MCU-NEXT: retl 120; MCU-NEXT: .LBB1_3: # %bb90 121entry: 122 %tmp73 = tail call i1 @return_false() 123 %g.0 = select i1 %tmp73, i16 0, i16 -480 124 %tmp7778 = sext i16 %g.0 to i32 125 %tmp80 = shl i32 %tmp7778, 3 126 %tmp87 = icmp sgt i32 %tmp80, 32767 127 br i1 %tmp87, label %bb90, label %bb91 128bb90: 129 unreachable 130bb91: 131 ret i32 0 132} 133 134declare i1 @return_false() 135 136;; Select between two floating point constants. 137define float @test3(i32 %x) nounwind readnone { 138; GENERIC-LABEL: test3: 139; GENERIC: ## %bb.0: ## %entry 140; GENERIC-NEXT: xorl %eax, %eax 141; GENERIC-NEXT: testl %edi, %edi 142; GENERIC-NEXT: sete %al 143; GENERIC-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx 144; GENERIC-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 145; GENERIC-NEXT: retq 146; 147; ATOM-LABEL: test3: 148; ATOM: ## %bb.0: ## %entry 149; ATOM-NEXT: xorl %eax, %eax 150; ATOM-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx 151; ATOM-NEXT: testl %edi, %edi 152; ATOM-NEXT: sete %al 153; ATOM-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero 154; ATOM-NEXT: retq 155; 156; ATHLON-LABEL: test3: 157; ATHLON: ## %bb.0: ## %entry 158; ATHLON-NEXT: xorl %eax, %eax 159; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp) 160; ATHLON-NEXT: sete %al 161; ATHLON-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}(,%eax,4) 162; ATHLON-NEXT: retl 163; 164; MCU-LABEL: test3: 165; MCU: # %bb.0: # %entry 166; MCU-NEXT: xorl %ecx, %ecx 167; MCU-NEXT: testl %eax, %eax 168; MCU-NEXT: sete %cl 169; MCU-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}}(,%ecx,4) 170; MCU-NEXT: retl 171entry: 172 %0 = icmp eq i32 %x, 0 173 %iftmp.0.0 = select i1 %0, float 4.200000e+01, float 2.300000e+01 174 ret float %iftmp.0.0 175} 176 177define signext i8 @test4(i8* nocapture %P, double %F) nounwind readonly { 178; CHECK-LABEL: test4: 179; CHECK: ## %bb.0: ## %entry 180; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero 181; CHECK-NEXT: xorl %eax, %eax 182; CHECK-NEXT: ucomisd %xmm0, %xmm1 183; CHECK-NEXT: seta %al 184; CHECK-NEXT: movsbl (%rdi,%rax,4), %eax 185; CHECK-NEXT: retq 186; 187; ATHLON-LABEL: test4: 188; ATHLON: ## %bb.0: ## %entry 189; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 190; ATHLON-NEXT: fldl {{[0-9]+}}(%esp) 191; ATHLON-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}} 192; ATHLON-NEXT: xorl %ecx, %ecx 193; ATHLON-NEXT: fucompi %st(1), %st 194; ATHLON-NEXT: fstp %st(0) 195; ATHLON-NEXT: seta %cl 196; ATHLON-NEXT: movsbl (%eax,%ecx,4), %eax 197; ATHLON-NEXT: retl 198; 199; MCU-LABEL: test4: 200; MCU: # %bb.0: # %entry 201; MCU-NEXT: movl %eax, %ecx 202; MCU-NEXT: fldl {{[0-9]+}}(%esp) 203; MCU-NEXT: flds {{\.?LCPI[0-9]+_[0-9]+}} 204; MCU-NEXT: fucompp 205; MCU-NEXT: fnstsw %ax 206; MCU-NEXT: xorl %edx, %edx 207; MCU-NEXT: # kill: def $ah killed $ah killed $ax 208; MCU-NEXT: sahf 209; MCU-NEXT: seta %dl 210; MCU-NEXT: movb (%ecx,%edx,4), %al 211; MCU-NEXT: retl 212entry: 213 %0 = fcmp olt double %F, 4.200000e+01 214 %iftmp.0.0 = select i1 %0, i32 4, i32 0 215 %1 = getelementptr i8, i8* %P, i32 %iftmp.0.0 216 %2 = load i8, i8* %1, align 1 217 ret i8 %2 218} 219 220define void @test5(i1 %c, <2 x i16> %a, <2 x i16> %b, <2 x i16>* %p) nounwind { 221; GENERIC-LABEL: test5: 222; GENERIC: ## %bb.0: 223; GENERIC-NEXT: testb $1, %dil 224; GENERIC-NEXT: jne LBB4_2 225; GENERIC-NEXT: ## %bb.1: 226; GENERIC-NEXT: movaps %xmm1, %xmm0 227; GENERIC-NEXT: LBB4_2: 228; GENERIC-NEXT: movss %xmm0, (%rsi) 229; GENERIC-NEXT: retq 230; 231; ATOM-LABEL: test5: 232; ATOM: ## %bb.0: 233; ATOM-NEXT: testb $1, %dil 234; ATOM-NEXT: jne LBB4_2 235; ATOM-NEXT: ## %bb.1: 236; ATOM-NEXT: movaps %xmm1, %xmm0 237; ATOM-NEXT: LBB4_2: 238; ATOM-NEXT: movss %xmm0, (%rsi) 239; ATOM-NEXT: nop 240; ATOM-NEXT: nop 241; ATOM-NEXT: retq 242; 243; ATHLON-LABEL: test5: 244; ATHLON: ## %bb.0: 245; ATHLON-NEXT: pushl %esi 246; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 247; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 248; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 249; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 250; ATHLON-NEXT: cmovnel %ecx, %edx 251; ATHLON-NEXT: movzwl (%edx), %ecx 252; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 253; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi 254; ATHLON-NEXT: cmovnel %edx, %esi 255; ATHLON-NEXT: movzwl (%esi), %edx 256; ATHLON-NEXT: movw %dx, 2(%eax) 257; ATHLON-NEXT: movw %cx, (%eax) 258; ATHLON-NEXT: popl %esi 259; ATHLON-NEXT: retl 260; 261; MCU-LABEL: test5: 262; MCU: # %bb.0: 263; MCU-NEXT: pushl %esi 264; MCU-NEXT: movl {{[0-9]+}}(%esp), %esi 265; MCU-NEXT: testb $1, %al 266; MCU-NEXT: jne .LBB4_2 267; MCU-NEXT: # %bb.1: 268; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %ecx 269; MCU-NEXT: movzwl {{[0-9]+}}(%esp), %edx 270; MCU-NEXT: .LBB4_2: 271; MCU-NEXT: movw %cx, 2(%esi) 272; MCU-NEXT: movw %dx, (%esi) 273; MCU-NEXT: popl %esi 274; MCU-NEXT: retl 275 %x = select i1 %c, <2 x i16> %a, <2 x i16> %b 276 store <2 x i16> %x, <2 x i16>* %p 277 ret void 278} 279 280; Verify that the fmul gets sunk into the one part of the diamond where it is needed. 281define void @test6(i32 %C, <4 x float>* %A, <4 x float>* %B) nounwind { 282; CHECK-LABEL: test6: 283; CHECK: ## %bb.0: 284; CHECK-NEXT: testl %edi, %edi 285; CHECK-NEXT: je LBB5_1 286; CHECK-NEXT: ## %bb.2: 287; CHECK-NEXT: movaps (%rsi), %xmm0 288; CHECK-NEXT: movaps %xmm0, (%rsi) 289; CHECK-NEXT: retq 290; CHECK-NEXT: LBB5_1: 291; CHECK-NEXT: movaps (%rdx), %xmm0 292; CHECK-NEXT: mulps %xmm0, %xmm0 293; CHECK-NEXT: movaps %xmm0, (%rsi) 294; CHECK-NEXT: retq 295; 296; ATHLON-LABEL: test6: 297; ATHLON: ## %bb.0: 298; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 299; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 300; ATHLON-NEXT: flds 12(%ecx) 301; ATHLON-NEXT: flds 8(%ecx) 302; ATHLON-NEXT: flds 4(%ecx) 303; ATHLON-NEXT: flds (%ecx) 304; ATHLON-NEXT: flds (%eax) 305; ATHLON-NEXT: fmul %st, %st(0) 306; ATHLON-NEXT: cmpl $0, {{[0-9]+}}(%esp) 307; ATHLON-NEXT: fxch %st(1) 308; ATHLON-NEXT: fcmove %st(1), %st 309; ATHLON-NEXT: fstp %st(1) 310; ATHLON-NEXT: flds 4(%eax) 311; ATHLON-NEXT: fmul %st, %st(0) 312; ATHLON-NEXT: fxch %st(2) 313; ATHLON-NEXT: fcmove %st(2), %st 314; ATHLON-NEXT: fstp %st(2) 315; ATHLON-NEXT: flds 8(%eax) 316; ATHLON-NEXT: fmul %st, %st(0) 317; ATHLON-NEXT: fxch %st(3) 318; ATHLON-NEXT: fcmove %st(3), %st 319; ATHLON-NEXT: fstp %st(3) 320; ATHLON-NEXT: flds 12(%eax) 321; ATHLON-NEXT: fmul %st, %st(0) 322; ATHLON-NEXT: fxch %st(4) 323; ATHLON-NEXT: fcmove %st(4), %st 324; ATHLON-NEXT: fstp %st(4) 325; ATHLON-NEXT: fxch %st(3) 326; ATHLON-NEXT: fstps 12(%ecx) 327; ATHLON-NEXT: fxch %st(1) 328; ATHLON-NEXT: fstps 8(%ecx) 329; ATHLON-NEXT: fstps 4(%ecx) 330; ATHLON-NEXT: fstps (%ecx) 331; ATHLON-NEXT: retl 332; 333; MCU-LABEL: test6: 334; MCU: # %bb.0: 335; MCU-NEXT: pushl %eax 336; MCU-NEXT: flds 12(%edx) 337; MCU-NEXT: fstps (%esp) # 4-byte Folded Spill 338; MCU-NEXT: flds 8(%edx) 339; MCU-NEXT: flds 4(%edx) 340; MCU-NEXT: flds (%ecx) 341; MCU-NEXT: flds 4(%ecx) 342; MCU-NEXT: flds 8(%ecx) 343; MCU-NEXT: flds 12(%ecx) 344; MCU-NEXT: fmul %st, %st(0) 345; MCU-NEXT: fxch %st(1) 346; MCU-NEXT: fmul %st, %st(0) 347; MCU-NEXT: fxch %st(2) 348; MCU-NEXT: fmul %st, %st(0) 349; MCU-NEXT: fxch %st(3) 350; MCU-NEXT: fmul %st, %st(0) 351; MCU-NEXT: testl %eax, %eax 352; MCU-NEXT: flds (%edx) 353; MCU-NEXT: je .LBB5_2 354; MCU-NEXT: # %bb.1: 355; MCU-NEXT: fstp %st(1) 356; MCU-NEXT: fstp %st(3) 357; MCU-NEXT: fstp %st(1) 358; MCU-NEXT: fstp %st(0) 359; MCU-NEXT: flds (%esp) # 4-byte Folded Reload 360; MCU-NEXT: fldz 361; MCU-NEXT: fldz 362; MCU-NEXT: fldz 363; MCU-NEXT: fxch %st(1) 364; MCU-NEXT: fxch %st(6) 365; MCU-NEXT: fxch %st(1) 366; MCU-NEXT: fxch %st(5) 367; MCU-NEXT: fxch %st(4) 368; MCU-NEXT: fxch %st(1) 369; MCU-NEXT: fxch %st(3) 370; MCU-NEXT: fxch %st(2) 371; MCU-NEXT: .LBB5_2: 372; MCU-NEXT: fstp %st(0) 373; MCU-NEXT: fstp %st(5) 374; MCU-NEXT: fstp %st(3) 375; MCU-NEXT: fxch %st(2) 376; MCU-NEXT: fstps 12(%edx) 377; MCU-NEXT: fxch %st(1) 378; MCU-NEXT: fstps 8(%edx) 379; MCU-NEXT: fstps 4(%edx) 380; MCU-NEXT: fstps (%edx) 381; MCU-NEXT: popl %eax 382; MCU-NEXT: retl 383 %tmp = load <4 x float>, <4 x float>* %A 384 %tmp3 = load <4 x float>, <4 x float>* %B 385 %tmp9 = fmul <4 x float> %tmp3, %tmp3 386 %tmp.upgrd.1 = icmp eq i32 %C, 0 387 %iftmp.38.0 = select i1 %tmp.upgrd.1, <4 x float> %tmp9, <4 x float> %tmp 388 store <4 x float> %iftmp.38.0, <4 x float>* %A 389 ret void 390} 391 392; Select with fp80's 393define x86_fp80 @test7(i32 %tmp8) nounwind { 394; GENERIC-LABEL: test7: 395; GENERIC: ## %bb.0: 396; GENERIC-NEXT: xorl %eax, %eax 397; GENERIC-NEXT: testl %edi, %edi 398; GENERIC-NEXT: setns %al 399; GENERIC-NEXT: shlq $4, %rax 400; GENERIC-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx 401; GENERIC-NEXT: fldt (%rax,%rcx) 402; GENERIC-NEXT: retq 403; 404; ATOM-LABEL: test7: 405; ATOM: ## %bb.0: 406; ATOM-NEXT: xorl %eax, %eax 407; ATOM-NEXT: leaq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %rcx 408; ATOM-NEXT: testl %edi, %edi 409; ATOM-NEXT: setns %al 410; ATOM-NEXT: shlq $4, %rax 411; ATOM-NEXT: fldt (%rax,%rcx) 412; ATOM-NEXT: retq 413; 414; ATHLON-LABEL: test7: 415; ATHLON: ## %bb.0: 416; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 417; ATHLON-NEXT: notl %eax 418; ATHLON-NEXT: shrl $27, %eax 419; ATHLON-NEXT: andl $-16, %eax 420; ATHLON-NEXT: fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax) 421; ATHLON-NEXT: retl 422; 423; MCU-LABEL: test7: 424; MCU: # %bb.0: 425; MCU-NEXT: notl %eax 426; MCU-NEXT: shrl $27, %eax 427; MCU-NEXT: andl $-16, %eax 428; MCU-NEXT: fldt {{\.?LCPI[0-9]+_[0-9]+}}(%eax) 429; MCU-NEXT: retl 430 %tmp9 = icmp sgt i32 %tmp8, -1 431 %retval = select i1 %tmp9, x86_fp80 0xK4005B400000000000000, x86_fp80 0xK40078700000000000000 432 ret x86_fp80 %retval 433} 434 435; widening select v6i32 and then a sub 436define void @test8(i1 %c, <6 x i32>* %dst.addr, <6 x i32> %src1,<6 x i32> %src2) nounwind { 437; GENERIC-LABEL: test8: 438; GENERIC: ## %bb.0: 439; GENERIC-NEXT: testb $1, %dil 440; GENERIC-NEXT: jne LBB7_1 441; GENERIC-NEXT: ## %bb.2: 442; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 443; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 444; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 445; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 446; GENERIC-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 447; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 448; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 449; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 450; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 451; GENERIC-NEXT: jmp LBB7_3 452; GENERIC-NEXT: LBB7_1: 453; GENERIC-NEXT: movd %r9d, %xmm0 454; GENERIC-NEXT: movd %r8d, %xmm1 455; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 456; GENERIC-NEXT: movd %ecx, %xmm2 457; GENERIC-NEXT: movd %edx, %xmm0 458; GENERIC-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 459; GENERIC-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 460; GENERIC-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 461; GENERIC-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 462; GENERIC-NEXT: LBB7_3: 463; GENERIC-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 464; GENERIC-NEXT: pcmpeqd %xmm2, %xmm2 465; GENERIC-NEXT: paddd %xmm2, %xmm0 466; GENERIC-NEXT: paddd %xmm2, %xmm1 467; GENERIC-NEXT: movq %xmm1, 16(%rsi) 468; GENERIC-NEXT: movdqa %xmm0, (%rsi) 469; GENERIC-NEXT: retq 470; 471; ATOM-LABEL: test8: 472; ATOM: ## %bb.0: 473; ATOM-NEXT: testb $1, %dil 474; ATOM-NEXT: jne LBB7_1 475; ATOM-NEXT: ## %bb.2: 476; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 477; ATOM-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 478; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 479; ATOM-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 480; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 481; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 482; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 483; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 484; ATOM-NEXT: jmp LBB7_3 485; ATOM-NEXT: LBB7_1: 486; ATOM-NEXT: movd %r9d, %xmm1 487; ATOM-NEXT: movd %r8d, %xmm2 488; ATOM-NEXT: movd %ecx, %xmm3 489; ATOM-NEXT: movd %edx, %xmm0 490; ATOM-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 491; ATOM-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 492; ATOM-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 493; ATOM-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 494; ATOM-NEXT: LBB7_3: 495; ATOM-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 496; ATOM-NEXT: pcmpeqd %xmm2, %xmm2 497; ATOM-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 498; ATOM-NEXT: paddd %xmm2, %xmm0 499; ATOM-NEXT: paddd %xmm2, %xmm1 500; ATOM-NEXT: movq %xmm1, 16(%rsi) 501; ATOM-NEXT: movdqa %xmm0, (%rsi) 502; ATOM-NEXT: retq 503; 504; ATHLON-LABEL: test8: 505; ATHLON: ## %bb.0: 506; ATHLON-NEXT: pushl %ebp 507; ATHLON-NEXT: pushl %ebx 508; ATHLON-NEXT: pushl %edi 509; ATHLON-NEXT: pushl %esi 510; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 511; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 512; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 513; ATHLON-NEXT: cmovnel %eax, %ecx 514; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 515; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edx 516; ATHLON-NEXT: cmovnel %eax, %edx 517; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 518; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %esi 519; ATHLON-NEXT: cmovnel %eax, %esi 520; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 521; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %edi 522; ATHLON-NEXT: cmovnel %eax, %edi 523; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 524; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebx 525; ATHLON-NEXT: cmovnel %eax, %ebx 526; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 527; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ebp 528; ATHLON-NEXT: cmovnel %eax, %ebp 529; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 530; ATHLON-NEXT: movl (%ecx), %ecx 531; ATHLON-NEXT: movl (%edx), %edx 532; ATHLON-NEXT: movl (%esi), %esi 533; ATHLON-NEXT: movl (%edi), %edi 534; ATHLON-NEXT: movl (%ebx), %ebx 535; ATHLON-NEXT: movl (%ebp), %ebp 536; ATHLON-NEXT: decl %ecx 537; ATHLON-NEXT: movl %ecx, 20(%eax) 538; ATHLON-NEXT: decl %edx 539; ATHLON-NEXT: movl %edx, 16(%eax) 540; ATHLON-NEXT: decl %esi 541; ATHLON-NEXT: movl %esi, 12(%eax) 542; ATHLON-NEXT: decl %edi 543; ATHLON-NEXT: movl %edi, 8(%eax) 544; ATHLON-NEXT: decl %ebx 545; ATHLON-NEXT: movl %ebx, 4(%eax) 546; ATHLON-NEXT: decl %ebp 547; ATHLON-NEXT: movl %ebp, (%eax) 548; ATHLON-NEXT: popl %esi 549; ATHLON-NEXT: popl %edi 550; ATHLON-NEXT: popl %ebx 551; ATHLON-NEXT: popl %ebp 552; ATHLON-NEXT: retl 553; 554; MCU-LABEL: test8: 555; MCU: # %bb.0: 556; MCU-NEXT: pushl %ebp 557; MCU-NEXT: pushl %ebx 558; MCU-NEXT: pushl %edi 559; MCU-NEXT: pushl %esi 560; MCU-NEXT: testb $1, %al 561; MCU-NEXT: jne .LBB7_1 562; MCU-NEXT: # %bb.2: 563; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi 564; MCU-NEXT: je .LBB7_5 565; MCU-NEXT: .LBB7_4: 566; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx 567; MCU-NEXT: je .LBB7_8 568; MCU-NEXT: .LBB7_7: 569; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi 570; MCU-NEXT: je .LBB7_11 571; MCU-NEXT: .LBB7_10: 572; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 573; MCU-NEXT: je .LBB7_14 574; MCU-NEXT: .LBB7_13: 575; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax 576; MCU-NEXT: jmp .LBB7_15 577; MCU-NEXT: .LBB7_1: 578; MCU-NEXT: leal {{[0-9]+}}(%esp), %edi 579; MCU-NEXT: jne .LBB7_4 580; MCU-NEXT: .LBB7_5: 581; MCU-NEXT: leal {{[0-9]+}}(%esp), %ecx 582; MCU-NEXT: jne .LBB7_7 583; MCU-NEXT: .LBB7_8: 584; MCU-NEXT: leal {{[0-9]+}}(%esp), %esi 585; MCU-NEXT: jne .LBB7_10 586; MCU-NEXT: .LBB7_11: 587; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 588; MCU-NEXT: jne .LBB7_13 589; MCU-NEXT: .LBB7_14: 590; MCU-NEXT: leal {{[0-9]+}}(%esp), %eax 591; MCU-NEXT: .LBB7_15: 592; MCU-NEXT: movl (%edi), %ebx 593; MCU-NEXT: movl (%ecx), %edi 594; MCU-NEXT: movl (%esi), %esi 595; MCU-NEXT: movl (%ebp), %ecx 596; MCU-NEXT: movl (%eax), %eax 597; MCU-NEXT: jne .LBB7_16 598; MCU-NEXT: # %bb.17: 599; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 600; MCU-NEXT: jmp .LBB7_18 601; MCU-NEXT: .LBB7_16: 602; MCU-NEXT: leal {{[0-9]+}}(%esp), %ebp 603; MCU-NEXT: .LBB7_18: 604; MCU-NEXT: movl (%ebp), %ebp 605; MCU-NEXT: decl %ebp 606; MCU-NEXT: decl %eax 607; MCU-NEXT: decl %ecx 608; MCU-NEXT: decl %esi 609; MCU-NEXT: decl %edi 610; MCU-NEXT: decl %ebx 611; MCU-NEXT: movl %ebx, 20(%edx) 612; MCU-NEXT: movl %edi, 16(%edx) 613; MCU-NEXT: movl %esi, 12(%edx) 614; MCU-NEXT: movl %ecx, 8(%edx) 615; MCU-NEXT: movl %eax, 4(%edx) 616; MCU-NEXT: movl %ebp, (%edx) 617; MCU-NEXT: popl %esi 618; MCU-NEXT: popl %edi 619; MCU-NEXT: popl %ebx 620; MCU-NEXT: popl %ebp 621; MCU-NEXT: retl 622 %x = select i1 %c, <6 x i32> %src1, <6 x i32> %src2 623 %val = sub <6 x i32> %x, < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > 624 store <6 x i32> %val, <6 x i32>* %dst.addr 625 ret void 626} 627 628 629;; Test integer select between values and constants. 630 631define i64 @test9(i64 %x, i64 %y) nounwind readnone ssp noredzone { 632; CHECK-LABEL: test9: 633; CHECK: ## %bb.0: 634; CHECK-NEXT: xorl %eax, %eax 635; CHECK-NEXT: cmpq $1, %rdi 636; CHECK-NEXT: sbbq %rax, %rax 637; CHECK-NEXT: orq %rsi, %rax 638; CHECK-NEXT: retq 639; 640; ATHLON-LABEL: test9: 641; ATHLON: ## %bb.0: 642; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 643; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 644; ATHLON-NEXT: movl $-1, %eax 645; ATHLON-NEXT: movl $-1, %edx 646; ATHLON-NEXT: je LBB8_2 647; ATHLON-NEXT: ## %bb.1: 648; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 649; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 650; ATHLON-NEXT: LBB8_2: 651; ATHLON-NEXT: retl 652; 653; MCU-LABEL: test9: 654; MCU: # %bb.0: 655; MCU-NEXT: orl %edx, %eax 656; MCU-NEXT: jne .LBB8_1 657; MCU-NEXT: # %bb.2: 658; MCU-NEXT: movl $-1, %eax 659; MCU-NEXT: movl $-1, %edx 660; MCU-NEXT: retl 661; MCU-NEXT: .LBB8_1: 662; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 663; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 664; MCU-NEXT: retl 665 %cmp = icmp ne i64 %x, 0 666 %cond = select i1 %cmp, i64 %y, i64 -1 667 ret i64 %cond 668} 669 670;; Same as test9 671define i64 @test9a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 672; CHECK-LABEL: test9a: 673; CHECK: ## %bb.0: 674; CHECK-NEXT: xorl %eax, %eax 675; CHECK-NEXT: cmpq $1, %rdi 676; CHECK-NEXT: sbbq %rax, %rax 677; CHECK-NEXT: orq %rsi, %rax 678; CHECK-NEXT: retq 679; 680; ATHLON-LABEL: test9a: 681; ATHLON: ## %bb.0: 682; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 683; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 684; ATHLON-NEXT: movl $-1, %eax 685; ATHLON-NEXT: movl $-1, %edx 686; ATHLON-NEXT: je LBB9_2 687; ATHLON-NEXT: ## %bb.1: 688; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 689; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 690; ATHLON-NEXT: LBB9_2: 691; ATHLON-NEXT: retl 692; 693; MCU-LABEL: test9a: 694; MCU: # %bb.0: 695; MCU-NEXT: orl %edx, %eax 696; MCU-NEXT: movl $-1, %eax 697; MCU-NEXT: movl $-1, %edx 698; MCU-NEXT: je .LBB9_2 699; MCU-NEXT: # %bb.1: 700; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 701; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 702; MCU-NEXT: .LBB9_2: 703; MCU-NEXT: retl 704 %cmp = icmp eq i64 %x, 0 705 %cond = select i1 %cmp, i64 -1, i64 %y 706 ret i64 %cond 707} 708 709define i64 @test9b(i64 %x, i64 %y) nounwind readnone ssp noredzone { 710; GENERIC-LABEL: test9b: 711; GENERIC: ## %bb.0: 712; GENERIC-NEXT: cmpq $1, %rdi 713; GENERIC-NEXT: sbbq %rax, %rax 714; GENERIC-NEXT: orq %rsi, %rax 715; GENERIC-NEXT: retq 716; 717; ATOM-LABEL: test9b: 718; ATOM: ## %bb.0: 719; ATOM-NEXT: cmpq $1, %rdi 720; ATOM-NEXT: sbbq %rax, %rax 721; ATOM-NEXT: orq %rsi, %rax 722; ATOM-NEXT: nop 723; ATOM-NEXT: nop 724; ATOM-NEXT: retq 725; 726; ATHLON-LABEL: test9b: 727; ATHLON: ## %bb.0: 728; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 729; ATHLON-NEXT: xorl %edx, %edx 730; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 731; ATHLON-NEXT: sete %dl 732; ATHLON-NEXT: negl %edx 733; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 734; ATHLON-NEXT: orl %edx, %eax 735; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %edx 736; ATHLON-NEXT: retl 737; 738; MCU-LABEL: test9b: 739; MCU: # %bb.0: 740; MCU-NEXT: movl %edx, %ecx 741; MCU-NEXT: xorl %edx, %edx 742; MCU-NEXT: orl %ecx, %eax 743; MCU-NEXT: sete %dl 744; MCU-NEXT: negl %edx 745; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 746; MCU-NEXT: orl %edx, %eax 747; MCU-NEXT: orl {{[0-9]+}}(%esp), %edx 748; MCU-NEXT: retl 749 %cmp = icmp eq i64 %x, 0 750 %A = sext i1 %cmp to i64 751 %cond = or i64 %y, %A 752 ret i64 %cond 753} 754 755;; Select between -1 and 1. 756define i64 @test10(i64 %x, i64 %y) nounwind readnone ssp noredzone { 757; CHECK-LABEL: test10: 758; CHECK: ## %bb.0: 759; CHECK-NEXT: xorl %eax, %eax 760; CHECK-NEXT: testq %rdi, %rdi 761; CHECK-NEXT: setne %al 762; CHECK-NEXT: leaq -1(%rax,%rax), %rax 763; CHECK-NEXT: retq 764; 765; ATHLON-LABEL: test10: 766; ATHLON: ## %bb.0: 767; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 768; ATHLON-NEXT: xorl %edx, %edx 769; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 770; ATHLON-NEXT: movl $-1, %ecx 771; ATHLON-NEXT: movl $1, %eax 772; ATHLON-NEXT: cmovel %ecx, %eax 773; ATHLON-NEXT: cmovel %ecx, %edx 774; ATHLON-NEXT: retl 775; 776; MCU-LABEL: test10: 777; MCU: # %bb.0: 778; MCU-NEXT: orl %edx, %eax 779; MCU-NEXT: movl $-1, %eax 780; MCU-NEXT: movl $-1, %edx 781; MCU-NEXT: je .LBB11_2 782; MCU-NEXT: # %bb.1: 783; MCU-NEXT: xorl %edx, %edx 784; MCU-NEXT: movl $1, %eax 785; MCU-NEXT: .LBB11_2: 786; MCU-NEXT: retl 787 %cmp = icmp eq i64 %x, 0 788 %cond = select i1 %cmp, i64 -1, i64 1 789 ret i64 %cond 790} 791 792define i64 @test11(i64 %x, i64 %y) nounwind readnone ssp noredzone { 793; CHECK-LABEL: test11: 794; CHECK: ## %bb.0: 795; CHECK-NEXT: xorl %eax, %eax 796; CHECK-NEXT: cmpq $1, %rdi 797; CHECK-NEXT: sbbq %rax, %rax 798; CHECK-NEXT: notq %rax 799; CHECK-NEXT: orq %rsi, %rax 800; CHECK-NEXT: retq 801; 802; ATHLON-LABEL: test11: 803; ATHLON: ## %bb.0: 804; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 805; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 806; ATHLON-NEXT: movl $-1, %eax 807; ATHLON-NEXT: movl $-1, %edx 808; ATHLON-NEXT: jne LBB12_2 809; ATHLON-NEXT: ## %bb.1: 810; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 811; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 812; ATHLON-NEXT: LBB12_2: 813; ATHLON-NEXT: retl 814; 815; MCU-LABEL: test11: 816; MCU: # %bb.0: 817; MCU-NEXT: orl %edx, %eax 818; MCU-NEXT: je .LBB12_1 819; MCU-NEXT: # %bb.2: 820; MCU-NEXT: movl $-1, %eax 821; MCU-NEXT: movl $-1, %edx 822; MCU-NEXT: retl 823; MCU-NEXT: .LBB12_1: 824; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 825; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 826; MCU-NEXT: retl 827 %cmp = icmp eq i64 %x, 0 828 %cond = select i1 %cmp, i64 %y, i64 -1 829 ret i64 %cond 830} 831 832define i64 @test11a(i64 %x, i64 %y) nounwind readnone ssp noredzone { 833; CHECK-LABEL: test11a: 834; CHECK: ## %bb.0: 835; CHECK-NEXT: xorl %eax, %eax 836; CHECK-NEXT: cmpq $1, %rdi 837; CHECK-NEXT: sbbq %rax, %rax 838; CHECK-NEXT: notq %rax 839; CHECK-NEXT: orq %rsi, %rax 840; CHECK-NEXT: retq 841; 842; ATHLON-LABEL: test11a: 843; ATHLON: ## %bb.0: 844; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 845; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %eax 846; ATHLON-NEXT: movl $-1, %eax 847; ATHLON-NEXT: movl $-1, %edx 848; ATHLON-NEXT: jne LBB13_2 849; ATHLON-NEXT: ## %bb.1: 850; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 851; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %edx 852; ATHLON-NEXT: LBB13_2: 853; ATHLON-NEXT: retl 854; 855; MCU-LABEL: test11a: 856; MCU: # %bb.0: 857; MCU-NEXT: orl %edx, %eax 858; MCU-NEXT: movl $-1, %eax 859; MCU-NEXT: movl $-1, %edx 860; MCU-NEXT: jne .LBB13_2 861; MCU-NEXT: # %bb.1: 862; MCU-NEXT: movl {{[0-9]+}}(%esp), %eax 863; MCU-NEXT: movl {{[0-9]+}}(%esp), %edx 864; MCU-NEXT: .LBB13_2: 865; MCU-NEXT: retl 866 %cmp = icmp ne i64 %x, 0 867 %cond = select i1 %cmp, i64 -1, i64 %y 868 ret i64 %cond 869} 870 871define i32 @test13(i32 %a, i32 %b) nounwind { 872; GENERIC-LABEL: test13: 873; GENERIC: ## %bb.0: 874; GENERIC-NEXT: cmpl %esi, %edi 875; GENERIC-NEXT: sbbl %eax, %eax 876; GENERIC-NEXT: retq 877; 878; ATOM-LABEL: test13: 879; ATOM: ## %bb.0: 880; ATOM-NEXT: cmpl %esi, %edi 881; ATOM-NEXT: sbbl %eax, %eax 882; ATOM-NEXT: nop 883; ATOM-NEXT: nop 884; ATOM-NEXT: nop 885; ATOM-NEXT: nop 886; ATOM-NEXT: retq 887; 888; ATHLON-LABEL: test13: 889; ATHLON: ## %bb.0: 890; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 891; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax 892; ATHLON-NEXT: sbbl %eax, %eax 893; ATHLON-NEXT: retl 894; 895; MCU-LABEL: test13: 896; MCU: # %bb.0: 897; MCU-NEXT: cmpl %edx, %eax 898; MCU-NEXT: sbbl %eax, %eax 899; MCU-NEXT: retl 900 %c = icmp ult i32 %a, %b 901 %d = sext i1 %c to i32 902 ret i32 %d 903} 904 905define i32 @test14(i32 %a, i32 %b) nounwind { 906; GENERIC-LABEL: test14: 907; GENERIC: ## %bb.0: 908; GENERIC-NEXT: xorl %eax, %eax 909; GENERIC-NEXT: cmpl %esi, %edi 910; GENERIC-NEXT: adcl $-1, %eax 911; GENERIC-NEXT: retq 912; 913; ATOM-LABEL: test14: 914; ATOM: ## %bb.0: 915; ATOM-NEXT: xorl %eax, %eax 916; ATOM-NEXT: cmpl %esi, %edi 917; ATOM-NEXT: adcl $-1, %eax 918; ATOM-NEXT: nop 919; ATOM-NEXT: nop 920; ATOM-NEXT: retq 921; 922; ATHLON-LABEL: test14: 923; ATHLON: ## %bb.0: 924; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 925; ATHLON-NEXT: xorl %eax, %eax 926; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %ecx 927; ATHLON-NEXT: adcl $-1, %eax 928; ATHLON-NEXT: retl 929; 930; MCU-LABEL: test14: 931; MCU: # %bb.0: 932; MCU-NEXT: xorl %ecx, %ecx 933; MCU-NEXT: cmpl %edx, %eax 934; MCU-NEXT: adcl $-1, %ecx 935; MCU-NEXT: movl %ecx, %eax 936; MCU-NEXT: retl 937 %c = icmp uge i32 %a, %b 938 %d = sext i1 %c to i32 939 ret i32 %d 940} 941 942; rdar://10961709 943define i32 @test15(i32 %x) nounwind { 944; GENERIC-LABEL: test15: 945; GENERIC: ## %bb.0: ## %entry 946; GENERIC-NEXT: negl %edi 947; GENERIC-NEXT: sbbl %eax, %eax 948; GENERIC-NEXT: retq 949; 950; ATOM-LABEL: test15: 951; ATOM: ## %bb.0: ## %entry 952; ATOM-NEXT: negl %edi 953; ATOM-NEXT: sbbl %eax, %eax 954; ATOM-NEXT: nop 955; ATOM-NEXT: nop 956; ATOM-NEXT: nop 957; ATOM-NEXT: nop 958; ATOM-NEXT: retq 959; 960; ATHLON-LABEL: test15: 961; ATHLON: ## %bb.0: ## %entry 962; ATHLON-NEXT: xorl %eax, %eax 963; ATHLON-NEXT: cmpl {{[0-9]+}}(%esp), %eax 964; ATHLON-NEXT: sbbl %eax, %eax 965; ATHLON-NEXT: retl 966; 967; MCU-LABEL: test15: 968; MCU: # %bb.0: # %entry 969; MCU-NEXT: negl %eax 970; MCU-NEXT: sbbl %eax, %eax 971; MCU-NEXT: retl 972entry: 973 %cmp = icmp ne i32 %x, 0 974 %sub = sext i1 %cmp to i32 975 ret i32 %sub 976} 977 978define i64 @test16(i64 %x) nounwind uwtable readnone ssp { 979; GENERIC-LABEL: test16: 980; GENERIC: ## %bb.0: ## %entry 981; GENERIC-NEXT: negq %rdi 982; GENERIC-NEXT: sbbq %rax, %rax 983; GENERIC-NEXT: retq 984; 985; ATOM-LABEL: test16: 986; ATOM: ## %bb.0: ## %entry 987; ATOM-NEXT: negq %rdi 988; ATOM-NEXT: sbbq %rax, %rax 989; ATOM-NEXT: nop 990; ATOM-NEXT: nop 991; ATOM-NEXT: nop 992; ATOM-NEXT: nop 993; ATOM-NEXT: retq 994; 995; ATHLON-LABEL: test16: 996; ATHLON: ## %bb.0: ## %entry 997; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 998; ATHLON-NEXT: xorl %eax, %eax 999; ATHLON-NEXT: orl {{[0-9]+}}(%esp), %ecx 1000; ATHLON-NEXT: setne %al 1001; ATHLON-NEXT: negl %eax 1002; ATHLON-NEXT: movl %eax, %edx 1003; ATHLON-NEXT: retl 1004; 1005; MCU-LABEL: test16: 1006; MCU: # %bb.0: # %entry 1007; MCU-NEXT: movl %eax, %ecx 1008; MCU-NEXT: xorl %eax, %eax 1009; MCU-NEXT: orl %edx, %ecx 1010; MCU-NEXT: setne %al 1011; MCU-NEXT: negl %eax 1012; MCU-NEXT: movl %eax, %edx 1013; MCU-NEXT: retl 1014entry: 1015 %cmp = icmp ne i64 %x, 0 1016 %conv1 = sext i1 %cmp to i64 1017 ret i64 %conv1 1018} 1019 1020define i16 @test17(i16 %x) nounwind { 1021; GENERIC-LABEL: test17: 1022; GENERIC: ## %bb.0: ## %entry 1023; GENERIC-NEXT: negw %di 1024; GENERIC-NEXT: sbbl %eax, %eax 1025; GENERIC-NEXT: ## kill: def $ax killed $ax killed $eax 1026; GENERIC-NEXT: retq 1027; 1028; ATOM-LABEL: test17: 1029; ATOM: ## %bb.0: ## %entry 1030; ATOM-NEXT: negw %di 1031; ATOM-NEXT: sbbl %eax, %eax 1032; ATOM-NEXT: ## kill: def $ax killed $ax killed $eax 1033; ATOM-NEXT: nop 1034; ATOM-NEXT: nop 1035; ATOM-NEXT: nop 1036; ATOM-NEXT: nop 1037; ATOM-NEXT: retq 1038; 1039; ATHLON-LABEL: test17: 1040; ATHLON: ## %bb.0: ## %entry 1041; ATHLON-NEXT: xorl %eax, %eax 1042; ATHLON-NEXT: cmpw {{[0-9]+}}(%esp), %ax 1043; ATHLON-NEXT: sbbl %eax, %eax 1044; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1045; ATHLON-NEXT: retl 1046; 1047; MCU-LABEL: test17: 1048; MCU: # %bb.0: # %entry 1049; MCU-NEXT: negw %ax 1050; MCU-NEXT: sbbl %eax, %eax 1051; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1052; MCU-NEXT: retl 1053entry: 1054 %cmp = icmp ne i16 %x, 0 1055 %sub = sext i1 %cmp to i16 1056 ret i16 %sub 1057} 1058 1059define i8 @test18(i32 %x, i8 zeroext %a, i8 zeroext %b) nounwind { 1060; GENERIC-LABEL: test18: 1061; GENERIC: ## %bb.0: 1062; GENERIC-NEXT: movl %esi, %eax 1063; GENERIC-NEXT: cmpl $15, %edi 1064; GENERIC-NEXT: cmovgel %edx, %eax 1065; GENERIC-NEXT: ## kill: def $al killed $al killed $eax 1066; GENERIC-NEXT: retq 1067; 1068; ATOM-LABEL: test18: 1069; ATOM: ## %bb.0: 1070; ATOM-NEXT: movl %esi, %eax 1071; ATOM-NEXT: cmpl $15, %edi 1072; ATOM-NEXT: cmovgel %edx, %eax 1073; ATOM-NEXT: ## kill: def $al killed $al killed $eax 1074; ATOM-NEXT: nop 1075; ATOM-NEXT: nop 1076; ATOM-NEXT: retq 1077; 1078; ATHLON-LABEL: test18: 1079; ATHLON: ## %bb.0: 1080; ATHLON-NEXT: cmpl $15, {{[0-9]+}}(%esp) 1081; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %eax 1082; ATHLON-NEXT: leal {{[0-9]+}}(%esp), %ecx 1083; ATHLON-NEXT: cmovll %eax, %ecx 1084; ATHLON-NEXT: movb (%ecx), %al 1085; ATHLON-NEXT: retl 1086; 1087; MCU-LABEL: test18: 1088; MCU: # %bb.0: 1089; MCU-NEXT: cmpl $15, %eax 1090; MCU-NEXT: jl .LBB19_2 1091; MCU-NEXT: # %bb.1: 1092; MCU-NEXT: movl %ecx, %edx 1093; MCU-NEXT: .LBB19_2: 1094; MCU-NEXT: movl %edx, %eax 1095; MCU-NEXT: retl 1096 %cmp = icmp slt i32 %x, 15 1097 %sel = select i1 %cmp, i8 %a, i8 %b 1098 ret i8 %sel 1099} 1100 1101define i32 @trunc_select_miscompile(i32 %a, i1 zeroext %cc) { 1102; GENERIC-LABEL: trunc_select_miscompile: 1103; GENERIC: ## %bb.0: 1104; GENERIC-NEXT: ## kill: def $esi killed $esi def $rsi 1105; GENERIC-NEXT: movl %edi, %eax 1106; GENERIC-NEXT: leal 2(%rsi), %ecx 1107; GENERIC-NEXT: ## kill: def $cl killed $cl killed $ecx 1108; GENERIC-NEXT: shll %cl, %eax 1109; GENERIC-NEXT: retq 1110; 1111; ATOM-LABEL: trunc_select_miscompile: 1112; ATOM: ## %bb.0: 1113; ATOM-NEXT: ## kill: def $esi killed $esi def $rsi 1114; ATOM-NEXT: leal 2(%rsi), %ecx 1115; ATOM-NEXT: movl %edi, %eax 1116; ATOM-NEXT: ## kill: def $cl killed $cl killed $ecx 1117; ATOM-NEXT: shll %cl, %eax 1118; ATOM-NEXT: nop 1119; ATOM-NEXT: nop 1120; ATOM-NEXT: retq 1121; 1122; ATHLON-LABEL: trunc_select_miscompile: 1123; ATHLON: ## %bb.0: 1124; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1125; ATHLON-NEXT: movb {{[0-9]+}}(%esp), %cl 1126; ATHLON-NEXT: orb $2, %cl 1127; ATHLON-NEXT: shll %cl, %eax 1128; ATHLON-NEXT: retl 1129; 1130; MCU-LABEL: trunc_select_miscompile: 1131; MCU: # %bb.0: 1132; MCU-NEXT: movl %edx, %ecx 1133; MCU-NEXT: orb $2, %cl 1134; MCU-NEXT: # kill: def $cl killed $cl killed $ecx 1135; MCU-NEXT: shll %cl, %eax 1136; MCU-NEXT: retl 1137 %tmp1 = select i1 %cc, i32 3, i32 2 1138 %tmp2 = shl i32 %a, %tmp1 1139 ret i32 %tmp2 1140} 1141 1142; reproducer for pr29002 1143define void @clamp_i8(i32 %src, i8* %dst) { 1144; GENERIC-LABEL: clamp_i8: 1145; GENERIC: ## %bb.0: 1146; GENERIC-NEXT: cmpl $127, %edi 1147; GENERIC-NEXT: movl $127, %eax 1148; GENERIC-NEXT: cmovlel %edi, %eax 1149; GENERIC-NEXT: cmpl $-128, %eax 1150; GENERIC-NEXT: movl $128, %ecx 1151; GENERIC-NEXT: cmovgel %eax, %ecx 1152; GENERIC-NEXT: movb %cl, (%rsi) 1153; GENERIC-NEXT: retq 1154; 1155; ATOM-LABEL: clamp_i8: 1156; ATOM: ## %bb.0: 1157; ATOM-NEXT: cmpl $127, %edi 1158; ATOM-NEXT: movl $127, %eax 1159; ATOM-NEXT: movl $128, %ecx 1160; ATOM-NEXT: cmovlel %edi, %eax 1161; ATOM-NEXT: cmpl $-128, %eax 1162; ATOM-NEXT: cmovgel %eax, %ecx 1163; ATOM-NEXT: movb %cl, (%rsi) 1164; ATOM-NEXT: retq 1165; 1166; ATHLON-LABEL: clamp_i8: 1167; ATHLON: ## %bb.0: 1168; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1169; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1170; ATHLON-NEXT: cmpl $127, %ecx 1171; ATHLON-NEXT: movl $127, %edx 1172; ATHLON-NEXT: cmovlel %ecx, %edx 1173; ATHLON-NEXT: cmpl $-128, %edx 1174; ATHLON-NEXT: movl $128, %ecx 1175; ATHLON-NEXT: cmovgel %edx, %ecx 1176; ATHLON-NEXT: movb %cl, (%eax) 1177; ATHLON-NEXT: retl 1178; 1179; MCU-LABEL: clamp_i8: 1180; MCU: # %bb.0: 1181; MCU-NEXT: cmpl $127, %eax 1182; MCU-NEXT: movl $127, %ecx 1183; MCU-NEXT: jg .LBB21_2 1184; MCU-NEXT: # %bb.1: 1185; MCU-NEXT: movl %eax, %ecx 1186; MCU-NEXT: .LBB21_2: 1187; MCU-NEXT: cmpl $-128, %ecx 1188; MCU-NEXT: movb $-128, %al 1189; MCU-NEXT: jl .LBB21_4 1190; MCU-NEXT: # %bb.3: 1191; MCU-NEXT: movl %ecx, %eax 1192; MCU-NEXT: .LBB21_4: 1193; MCU-NEXT: movb %al, (%edx) 1194; MCU-NEXT: retl 1195 %cmp = icmp sgt i32 %src, 127 1196 %sel1 = select i1 %cmp, i32 127, i32 %src 1197 %cmp1 = icmp slt i32 %sel1, -128 1198 %sel2 = select i1 %cmp1, i32 -128, i32 %sel1 1199 %conv = trunc i32 %sel2 to i8 1200 store i8 %conv, i8* %dst, align 2 1201 ret void 1202} 1203 1204; reproducer for pr29002 1205define void @clamp(i32 %src, i16* %dst) { 1206; GENERIC-LABEL: clamp: 1207; GENERIC: ## %bb.0: 1208; GENERIC-NEXT: cmpl $32768, %edi ## imm = 0x8000 1209; GENERIC-NEXT: movl $32767, %eax ## imm = 0x7FFF 1210; GENERIC-NEXT: cmovll %edi, %eax 1211; GENERIC-NEXT: cmpl $-32768, %eax ## imm = 0x8000 1212; GENERIC-NEXT: movl $32768, %ecx ## imm = 0x8000 1213; GENERIC-NEXT: cmovgel %eax, %ecx 1214; GENERIC-NEXT: movw %cx, (%rsi) 1215; GENERIC-NEXT: retq 1216; 1217; ATOM-LABEL: clamp: 1218; ATOM: ## %bb.0: 1219; ATOM-NEXT: cmpl $32768, %edi ## imm = 0x8000 1220; ATOM-NEXT: movl $32767, %eax ## imm = 0x7FFF 1221; ATOM-NEXT: movl $32768, %ecx ## imm = 0x8000 1222; ATOM-NEXT: cmovll %edi, %eax 1223; ATOM-NEXT: cmpl $-32768, %eax ## imm = 0x8000 1224; ATOM-NEXT: cmovgel %eax, %ecx 1225; ATOM-NEXT: movw %cx, (%rsi) 1226; ATOM-NEXT: retq 1227; 1228; ATHLON-LABEL: clamp: 1229; ATHLON: ## %bb.0: 1230; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1231; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1232; ATHLON-NEXT: cmpl $32768, %ecx ## imm = 0x8000 1233; ATHLON-NEXT: movl $32767, %edx ## imm = 0x7FFF 1234; ATHLON-NEXT: cmovll %ecx, %edx 1235; ATHLON-NEXT: cmpl $-32768, %edx ## imm = 0x8000 1236; ATHLON-NEXT: movl $32768, %ecx ## imm = 0x8000 1237; ATHLON-NEXT: cmovgel %edx, %ecx 1238; ATHLON-NEXT: movw %cx, (%eax) 1239; ATHLON-NEXT: retl 1240; 1241; MCU-LABEL: clamp: 1242; MCU: # %bb.0: 1243; MCU-NEXT: cmpl $32768, %eax # imm = 0x8000 1244; MCU-NEXT: movl $32767, %ecx # imm = 0x7FFF 1245; MCU-NEXT: jge .LBB22_2 1246; MCU-NEXT: # %bb.1: 1247; MCU-NEXT: movl %eax, %ecx 1248; MCU-NEXT: .LBB22_2: 1249; MCU-NEXT: cmpl $-32768, %ecx # imm = 0x8000 1250; MCU-NEXT: movl $32768, %eax # imm = 0x8000 1251; MCU-NEXT: jl .LBB22_4 1252; MCU-NEXT: # %bb.3: 1253; MCU-NEXT: movl %ecx, %eax 1254; MCU-NEXT: .LBB22_4: 1255; MCU-NEXT: movw %ax, (%edx) 1256; MCU-NEXT: retl 1257 %cmp = icmp sgt i32 %src, 32767 1258 %sel1 = select i1 %cmp, i32 32767, i32 %src 1259 %cmp1 = icmp slt i32 %sel1, -32768 1260 %sel2 = select i1 %cmp1, i32 -32768, i32 %sel1 1261 %conv = trunc i32 %sel2 to i16 1262 store i16 %conv, i16* %dst, align 2 1263 ret void 1264} 1265 1266define i16 @select_xor_1(i16 %A, i8 %cond) { 1267; CHECK-LABEL: select_xor_1: 1268; CHECK: ## %bb.0: ## %entry 1269; CHECK-NEXT: movl %edi, %eax 1270; CHECK-NEXT: xorl $43, %eax 1271; CHECK-NEXT: testb $1, %sil 1272; CHECK-NEXT: cmovel %edi, %eax 1273; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 1274; CHECK-NEXT: retq 1275; 1276; ATHLON-LABEL: select_xor_1: 1277; ATHLON: ## %bb.0: ## %entry 1278; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1279; ATHLON-NEXT: movl %ecx, %eax 1280; ATHLON-NEXT: xorl $43, %eax 1281; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1282; ATHLON-NEXT: cmovel %ecx, %eax 1283; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1284; ATHLON-NEXT: retl 1285; 1286; MCU-LABEL: select_xor_1: 1287; MCU: # %bb.0: # %entry 1288; MCU-NEXT: andl $1, %edx 1289; MCU-NEXT: negl %edx 1290; MCU-NEXT: andl $43, %edx 1291; MCU-NEXT: xorl %edx, %eax 1292; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1293; MCU-NEXT: retl 1294entry: 1295 %and = and i8 %cond, 1 1296 %cmp10 = icmp eq i8 %and, 0 1297 %0 = xor i16 %A, 43 1298 %1 = select i1 %cmp10, i16 %A, i16 %0 1299 ret i16 %1 1300} 1301 1302; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1303; icmp eq (and %cond, 1), 0 1304define i16 @select_xor_1b(i16 %A, i8 %cond) { 1305; CHECK-LABEL: select_xor_1b: 1306; CHECK: ## %bb.0: ## %entry 1307; CHECK-NEXT: movl %edi, %eax 1308; CHECK-NEXT: xorl $43, %eax 1309; CHECK-NEXT: testb $1, %sil 1310; CHECK-NEXT: cmovel %edi, %eax 1311; CHECK-NEXT: ## kill: def $ax killed $ax killed $eax 1312; CHECK-NEXT: retq 1313; 1314; ATHLON-LABEL: select_xor_1b: 1315; ATHLON: ## %bb.0: ## %entry 1316; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1317; ATHLON-NEXT: movl %ecx, %eax 1318; ATHLON-NEXT: xorl $43, %eax 1319; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1320; ATHLON-NEXT: cmovel %ecx, %eax 1321; ATHLON-NEXT: ## kill: def $ax killed $ax killed $eax 1322; ATHLON-NEXT: retl 1323; 1324; MCU-LABEL: select_xor_1b: 1325; MCU: # %bb.0: # %entry 1326; MCU-NEXT: testb $1, %dl 1327; MCU-NEXT: je .LBB24_2 1328; MCU-NEXT: # %bb.1: 1329; MCU-NEXT: xorl $43, %eax 1330; MCU-NEXT: .LBB24_2: # %entry 1331; MCU-NEXT: # kill: def $ax killed $ax killed $eax 1332; MCU-NEXT: retl 1333entry: 1334 %and = and i8 %cond, 1 1335 %cmp10 = icmp ne i8 %and, 1 1336 %0 = xor i16 %A, 43 1337 %1 = select i1 %cmp10, i16 %A, i16 %0 1338 ret i16 %1 1339} 1340 1341define i32 @select_xor_2(i32 %A, i32 %B, i8 %cond) { 1342; CHECK-LABEL: select_xor_2: 1343; CHECK: ## %bb.0: ## %entry 1344; CHECK-NEXT: movl %esi, %eax 1345; CHECK-NEXT: xorl %edi, %eax 1346; CHECK-NEXT: testb $1, %dl 1347; CHECK-NEXT: cmovel %edi, %eax 1348; CHECK-NEXT: retq 1349; 1350; ATHLON-LABEL: select_xor_2: 1351; ATHLON: ## %bb.0: ## %entry 1352; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1353; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1354; ATHLON-NEXT: xorl %ecx, %eax 1355; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1356; ATHLON-NEXT: cmovel %ecx, %eax 1357; ATHLON-NEXT: retl 1358; 1359; MCU-LABEL: select_xor_2: 1360; MCU: # %bb.0: # %entry 1361; MCU-NEXT: andl $1, %ecx 1362; MCU-NEXT: negl %ecx 1363; MCU-NEXT: andl %edx, %ecx 1364; MCU-NEXT: xorl %ecx, %eax 1365; MCU-NEXT: retl 1366entry: 1367 %and = and i8 %cond, 1 1368 %cmp10 = icmp eq i8 %and, 0 1369 %0 = xor i32 %B, %A 1370 %1 = select i1 %cmp10, i32 %A, i32 %0 1371 ret i32 %1 1372} 1373 1374; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1375; icmp eq (and %cond, 1), 0 1376define i32 @select_xor_2b(i32 %A, i32 %B, i8 %cond) { 1377; CHECK-LABEL: select_xor_2b: 1378; CHECK: ## %bb.0: ## %entry 1379; CHECK-NEXT: movl %esi, %eax 1380; CHECK-NEXT: xorl %edi, %eax 1381; CHECK-NEXT: testb $1, %dl 1382; CHECK-NEXT: cmovel %edi, %eax 1383; CHECK-NEXT: retq 1384; 1385; ATHLON-LABEL: select_xor_2b: 1386; ATHLON: ## %bb.0: ## %entry 1387; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1388; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1389; ATHLON-NEXT: xorl %ecx, %eax 1390; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1391; ATHLON-NEXT: cmovel %ecx, %eax 1392; ATHLON-NEXT: retl 1393; 1394; MCU-LABEL: select_xor_2b: 1395; MCU: # %bb.0: # %entry 1396; MCU-NEXT: testb $1, %cl 1397; MCU-NEXT: je .LBB26_2 1398; MCU-NEXT: # %bb.1: 1399; MCU-NEXT: xorl %edx, %eax 1400; MCU-NEXT: .LBB26_2: # %entry 1401; MCU-NEXT: retl 1402entry: 1403 %and = and i8 %cond, 1 1404 %cmp10 = icmp ne i8 %and, 1 1405 %0 = xor i32 %B, %A 1406 %1 = select i1 %cmp10, i32 %A, i32 %0 1407 ret i32 %1 1408} 1409 1410define i32 @select_or(i32 %A, i32 %B, i8 %cond) { 1411; CHECK-LABEL: select_or: 1412; CHECK: ## %bb.0: ## %entry 1413; CHECK-NEXT: movl %esi, %eax 1414; CHECK-NEXT: orl %edi, %eax 1415; CHECK-NEXT: testb $1, %dl 1416; CHECK-NEXT: cmovel %edi, %eax 1417; CHECK-NEXT: retq 1418; 1419; ATHLON-LABEL: select_or: 1420; ATHLON: ## %bb.0: ## %entry 1421; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1422; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1423; ATHLON-NEXT: orl %ecx, %eax 1424; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1425; ATHLON-NEXT: cmovel %ecx, %eax 1426; ATHLON-NEXT: retl 1427; 1428; MCU-LABEL: select_or: 1429; MCU: # %bb.0: # %entry 1430; MCU-NEXT: andl $1, %ecx 1431; MCU-NEXT: negl %ecx 1432; MCU-NEXT: andl %edx, %ecx 1433; MCU-NEXT: orl %ecx, %eax 1434; MCU-NEXT: retl 1435entry: 1436 %and = and i8 %cond, 1 1437 %cmp10 = icmp eq i8 %and, 0 1438 %0 = or i32 %B, %A 1439 %1 = select i1 %cmp10, i32 %A, i32 %0 1440 ret i32 %1 1441} 1442 1443; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1444; icmp eq (and %cond, 1), 0 1445define i32 @select_or_b(i32 %A, i32 %B, i8 %cond) { 1446; CHECK-LABEL: select_or_b: 1447; CHECK: ## %bb.0: ## %entry 1448; CHECK-NEXT: movl %esi, %eax 1449; CHECK-NEXT: orl %edi, %eax 1450; CHECK-NEXT: testb $1, %dl 1451; CHECK-NEXT: cmovel %edi, %eax 1452; CHECK-NEXT: retq 1453; 1454; ATHLON-LABEL: select_or_b: 1455; ATHLON: ## %bb.0: ## %entry 1456; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1457; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1458; ATHLON-NEXT: orl %ecx, %eax 1459; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1460; ATHLON-NEXT: cmovel %ecx, %eax 1461; ATHLON-NEXT: retl 1462; 1463; MCU-LABEL: select_or_b: 1464; MCU: # %bb.0: # %entry 1465; MCU-NEXT: testb $1, %cl 1466; MCU-NEXT: je .LBB28_2 1467; MCU-NEXT: # %bb.1: 1468; MCU-NEXT: orl %edx, %eax 1469; MCU-NEXT: .LBB28_2: # %entry 1470; MCU-NEXT: retl 1471entry: 1472 %and = and i8 %cond, 1 1473 %cmp10 = icmp ne i8 %and, 1 1474 %0 = or i32 %B, %A 1475 %1 = select i1 %cmp10, i32 %A, i32 %0 1476 ret i32 %1 1477} 1478 1479define i32 @select_or_1(i32 %A, i32 %B, i32 %cond) { 1480; CHECK-LABEL: select_or_1: 1481; CHECK: ## %bb.0: ## %entry 1482; CHECK-NEXT: movl %esi, %eax 1483; CHECK-NEXT: orl %edi, %eax 1484; CHECK-NEXT: testb $1, %dl 1485; CHECK-NEXT: cmovel %edi, %eax 1486; CHECK-NEXT: retq 1487; 1488; ATHLON-LABEL: select_or_1: 1489; ATHLON: ## %bb.0: ## %entry 1490; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1491; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1492; ATHLON-NEXT: orl %ecx, %eax 1493; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1494; ATHLON-NEXT: cmovel %ecx, %eax 1495; ATHLON-NEXT: retl 1496; 1497; MCU-LABEL: select_or_1: 1498; MCU: # %bb.0: # %entry 1499; MCU-NEXT: andl $1, %ecx 1500; MCU-NEXT: negl %ecx 1501; MCU-NEXT: andl %edx, %ecx 1502; MCU-NEXT: orl %ecx, %eax 1503; MCU-NEXT: retl 1504entry: 1505 %and = and i32 %cond, 1 1506 %cmp10 = icmp eq i32 %and, 0 1507 %0 = or i32 %B, %A 1508 %1 = select i1 %cmp10, i32 %A, i32 %0 1509 ret i32 %1 1510} 1511 1512; Equivalent to above, but with icmp ne (and %cond, 1), 1 instead of 1513; icmp eq (and %cond, 1), 0 1514define i32 @select_or_1b(i32 %A, i32 %B, i32 %cond) { 1515; CHECK-LABEL: select_or_1b: 1516; CHECK: ## %bb.0: ## %entry 1517; CHECK-NEXT: movl %esi, %eax 1518; CHECK-NEXT: orl %edi, %eax 1519; CHECK-NEXT: testb $1, %dl 1520; CHECK-NEXT: cmovel %edi, %eax 1521; CHECK-NEXT: retq 1522; 1523; ATHLON-LABEL: select_or_1b: 1524; ATHLON: ## %bb.0: ## %entry 1525; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %ecx 1526; ATHLON-NEXT: movl {{[0-9]+}}(%esp), %eax 1527; ATHLON-NEXT: orl %ecx, %eax 1528; ATHLON-NEXT: testb $1, {{[0-9]+}}(%esp) 1529; ATHLON-NEXT: cmovel %ecx, %eax 1530; ATHLON-NEXT: retl 1531; 1532; MCU-LABEL: select_or_1b: 1533; MCU: # %bb.0: # %entry 1534; MCU-NEXT: testb $1, %cl 1535; MCU-NEXT: je .LBB30_2 1536; MCU-NEXT: # %bb.1: 1537; MCU-NEXT: orl %edx, %eax 1538; MCU-NEXT: .LBB30_2: # %entry 1539; MCU-NEXT: retl 1540entry: 1541 %and = and i32 %cond, 1 1542 %cmp10 = icmp ne i32 %and, 1 1543 %0 = or i32 %B, %A 1544 %1 = select i1 %cmp10, i32 %A, i32 %0 1545 ret i32 %1 1546} 1547