1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
3
4define i32 @f(i16* %p) {
5; CHECK-LABEL: f:
6; CHECK:       # %bb.0:
7; CHECK-NEXT:    testb $8, 1(%rdi)
8; CHECK-NEXT:    je .LBB0_1
9; CHECK-NEXT:  # %bb.2: # %B
10; CHECK-NEXT:    movl $20, %eax
11; CHECK-NEXT:    retq
12; CHECK-NEXT:  .LBB0_1: # %A
13; CHECK-NEXT:    movl $10, %eax
14; CHECK-NEXT:    retq
15  %v = load i16, i16* %p, align 2
16  %and = and i16 %v, 2048
17  %cond = icmp eq i16 %and, 0
18  %cond.fr = freeze i1 %cond
19  br i1 %cond.fr, label %A, label %B
20A:
21  ret i32 10
22B:
23  ret i32 20
24}
25
26define i32 @f_false(i16* %p) {
27; CHECK-LABEL: f_false:
28; CHECK:       # %bb.0:
29; CHECK-NEXT:    movb $1, %al
30; CHECK-NEXT:    testb %al, %al
31; CHECK-NEXT:    jne .LBB1_2
32; CHECK-NEXT:  # %bb.1: # %A
33; CHECK-NEXT:    movl $10, %eax
34; CHECK-NEXT:    retq
35; CHECK-NEXT:  .LBB1_2: # %B
36; CHECK-NEXT:    movl $20, %eax
37; CHECK-NEXT:    retq
38  %v = load i16, i16* %p, align 2
39  %and = and i16 %v, 2048
40  %cond = icmp ult i16 %and, 0
41  %cond.fr = freeze i1 %cond
42  br i1 %cond.fr, label %A, label %B
43A:
44  ret i32 10
45B:
46  ret i32 20
47}
48
49define i32 @f_false2(i16* %p) {
50; CHECK-LABEL: f_false2:
51; CHECK:       # %bb.0:
52; CHECK-NEXT:    movb $1, %al
53; CHECK-NEXT:    testb %al, %al
54; CHECK-NEXT:    jne .LBB2_2
55; CHECK-NEXT:  # %bb.1: # %A
56; CHECK-NEXT:    movl $10, %eax
57; CHECK-NEXT:    retq
58; CHECK-NEXT:  .LBB2_2: # %B
59; CHECK-NEXT:    movl $20, %eax
60; CHECK-NEXT:    retq
61  %v = load i16, i16* %p, align 2
62  %and = and i16 %v, 2048
63  %cond = icmp ult i16 65535, %and
64  %cond.fr = freeze i1 %cond
65  br i1 %cond.fr, label %A, label %B
66A:
67  ret i32 10
68B:
69  ret i32 20
70}
71
72define i32 @f_false3(i16* %p) {
73; CHECK-LABEL: f_false3:
74; CHECK:       # %bb.0:
75; CHECK-NEXT:    movb $1, %al
76; CHECK-NEXT:    testb %al, %al
77; CHECK-NEXT:    jne .LBB3_2
78; CHECK-NEXT:  # %bb.1: # %A
79; CHECK-NEXT:    movl $10, %eax
80; CHECK-NEXT:    retq
81; CHECK-NEXT:  .LBB3_2: # %B
82; CHECK-NEXT:    movl $20, %eax
83; CHECK-NEXT:    retq
84  %v = load i16, i16* %p, align 2
85  %and = and i16 %v, 2048
86  %cond = icmp slt i16 32767, %and
87  %cond.fr = freeze i1 %cond
88  br i1 %cond.fr, label %A, label %B
89A:
90  ret i32 10
91B:
92  ret i32 20
93}
94
95define i32 @f_false4(i16* %p) {
96; CHECK-LABEL: f_false4:
97; CHECK:       # %bb.0:
98; CHECK-NEXT:    movb $1, %al
99; CHECK-NEXT:    testb %al, %al
100; CHECK-NEXT:    jne .LBB4_2
101; CHECK-NEXT:  # %bb.1: # %A
102; CHECK-NEXT:    movl $10, %eax
103; CHECK-NEXT:    retq
104; CHECK-NEXT:  .LBB4_2: # %B
105; CHECK-NEXT:    movl $20, %eax
106; CHECK-NEXT:    retq
107  %v = load i16, i16* %p, align 2
108  %and = and i16 %v, 2048
109  %cond = icmp sgt i16 %and, 32767
110  %cond.fr = freeze i1 %cond
111  br i1 %cond.fr, label %A, label %B
112A:
113  ret i32 10
114B:
115  ret i32 20
116}
117
118define i32 @f_true(i16* %p) {
119; CHECK-LABEL: f_true:
120; CHECK:       # %bb.0:
121; CHECK-NEXT:    xorl %eax, %eax
122; CHECK-NEXT:    testb %al, %al
123; CHECK-NEXT:    jne .LBB5_2
124; CHECK-NEXT:  # %bb.1: # %A
125; CHECK-NEXT:    movl $10, %eax
126; CHECK-NEXT:    retq
127; CHECK-NEXT:  .LBB5_2: # %B
128; CHECK-NEXT:    movl $20, %eax
129; CHECK-NEXT:    retq
130  %v = load i16, i16* %p, align 2
131  %and = and i16 %v, 2048
132  %cond = icmp sge i16 %and, -32768
133  %cond.fr = freeze i1 %cond
134  br i1 %cond.fr, label %A, label %B
135A:
136  ret i32 10
137B:
138  ret i32 20
139}
140
141define i32 @f_true2(i16* %p) {
142; CHECK-LABEL: f_true2:
143; CHECK:       # %bb.0:
144; CHECK-NEXT:    xorl %eax, %eax
145; CHECK-NEXT:    testb %al, %al
146; CHECK-NEXT:    jne .LBB6_2
147; CHECK-NEXT:  # %bb.1: # %A
148; CHECK-NEXT:    movl $10, %eax
149; CHECK-NEXT:    retq
150; CHECK-NEXT:  .LBB6_2: # %B
151; CHECK-NEXT:    movl $20, %eax
152; CHECK-NEXT:    retq
153  %v = load i16, i16* %p, align 2
154  %and = and i16 %v, 2048
155  %cond = icmp uge i16 %and, 0
156  %cond.fr = freeze i1 %cond
157  br i1 %cond.fr, label %A, label %B
158A:
159  ret i32 10
160B:
161  ret i32 20
162}
163
164define i32 @f_true3(i16* %p) {
165; CHECK-LABEL: f_true3:
166; CHECK:       # %bb.0:
167; CHECK-NEXT:    xorl %eax, %eax
168; CHECK-NEXT:    testb %al, %al
169; CHECK-NEXT:    jne .LBB7_2
170; CHECK-NEXT:  # %bb.1: # %A
171; CHECK-NEXT:    movl $10, %eax
172; CHECK-NEXT:    retq
173; CHECK-NEXT:  .LBB7_2: # %B
174; CHECK-NEXT:    movl $20, %eax
175; CHECK-NEXT:    retq
176  %v = load i16, i16* %p, align 2
177  %and = and i16 %v, 2048
178  %cond = icmp ule i16 0, %and
179  %cond.fr = freeze i1 %cond
180  br i1 %cond.fr, label %A, label %B
181A:
182  ret i32 10
183B:
184  ret i32 20
185}
186
187define i32 @f_true4(i16* %p) {
188; CHECK-LABEL: f_true4:
189; CHECK:       # %bb.0:
190; CHECK-NEXT:    xorl %eax, %eax
191; CHECK-NEXT:    testb %al, %al
192; CHECK-NEXT:    jne .LBB8_2
193; CHECK-NEXT:  # %bb.1: # %A
194; CHECK-NEXT:    movl $10, %eax
195; CHECK-NEXT:    retq
196; CHECK-NEXT:  .LBB8_2: # %B
197; CHECK-NEXT:    movl $20, %eax
198; CHECK-NEXT:    retq
199  %v = load i16, i16* %p, align 2
200  %and = and i16 %v, 2048
201  %cond = icmp ule i16 %and, 65535
202  %cond.fr = freeze i1 %cond
203  br i1 %cond.fr, label %A, label %B
204A:
205  ret i32 10
206B:
207  ret i32 20
208}
209