1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -O1 -mtriple=x86_64-unknown-unknown -o - | FileCheck %s
3
4; We used to assert on widening the SMULFIX/UMULFIX/SMULFIXSAT node result,
5; so primiary goal with the test is to see that we support legalization for
6; such vectors.
7
8declare <4 x i16> @llvm.smul.fix.v4i16(<4 x i16>, <4 x i16>, i32 immarg)
9declare <4 x i16> @llvm.umul.fix.v4i16(<4 x i16>, <4 x i16>, i32 immarg)
10declare <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16>, <4 x i16>, i32 immarg)
11declare <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16>, <4 x i16>, i32 immarg)
12
13define <4 x i16> @smulfix(<4 x i16> %a) {
14; CHECK-LABEL: smulfix:
15; CHECK:       # %bb.0:
16; CHECK-NEXT:    movdqa {{.*#+}} xmm1 = <1,2,3,4,u,u,u,u>
17; CHECK-NEXT:    movdqa %xmm0, %xmm2
18; CHECK-NEXT:    pmullw %xmm1, %xmm2
19; CHECK-NEXT:    psrlw $15, %xmm2
20; CHECK-NEXT:    pmulhw %xmm1, %xmm0
21; CHECK-NEXT:    psllw $1, %xmm0
22; CHECK-NEXT:    por %xmm2, %xmm0
23; CHECK-NEXT:    retq
24  %t = call <4 x i16> @llvm.smul.fix.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
25  ret <4 x i16> %t
26}
27
28define <4 x i16> @umulfix(<4 x i16> %a) {
29; CHECK-LABEL: umulfix:
30; CHECK:       # %bb.0:
31; CHECK-NEXT:    movdqa {{.*#+}} xmm1 = <1,2,3,4,u,u,u,u>
32; CHECK-NEXT:    movdqa %xmm0, %xmm2
33; CHECK-NEXT:    pmullw %xmm1, %xmm2
34; CHECK-NEXT:    psrlw $15, %xmm2
35; CHECK-NEXT:    pmulhuw %xmm1, %xmm0
36; CHECK-NEXT:    psllw $1, %xmm0
37; CHECK-NEXT:    por %xmm2, %xmm0
38; CHECK-NEXT:    retq
39  %t = call <4 x i16> @llvm.umul.fix.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
40  ret <4 x i16> %t
41}
42
43define <4 x i16> @smulfixsat(<4 x i16> %a) {
44; CHECK-LABEL: smulfixsat:
45; CHECK:       # %bb.0:
46; CHECK-NEXT:    pextrw $2, %xmm0, %eax
47; CHECK-NEXT:    cwtl
48; CHECK-NEXT:    leal (%rax,%rax,2), %ecx
49; CHECK-NEXT:    movl %ecx, %edx
50; CHECK-NEXT:    shrl $16, %edx
51; CHECK-NEXT:    shldw $1, %cx, %dx
52; CHECK-NEXT:    sarl $16, %ecx
53; CHECK-NEXT:    cmpl $16384, %ecx # imm = 0x4000
54; CHECK-NEXT:    movl $32767, %r8d # imm = 0x7FFF
55; CHECK-NEXT:    cmovgel %r8d, %edx
56; CHECK-NEXT:    cmpl $-16384, %ecx # imm = 0xC000
57; CHECK-NEXT:    movl $32768, %ecx # imm = 0x8000
58; CHECK-NEXT:    cmovll %ecx, %edx
59; CHECK-NEXT:    pextrw $1, %xmm0, %esi
60; CHECK-NEXT:    movswl %si, %edi
61; CHECK-NEXT:    movl %edi, %eax
62; CHECK-NEXT:    shrl $16, %eax
63; CHECK-NEXT:    leal (%rdi,%rdi), %esi
64; CHECK-NEXT:    shrdw $15, %ax, %si
65; CHECK-NEXT:    sarl $15, %edi
66; CHECK-NEXT:    cmpl $16384, %edi # imm = 0x4000
67; CHECK-NEXT:    cmovgel %r8d, %esi
68; CHECK-NEXT:    cmpl $-16384, %edi # imm = 0xC000
69; CHECK-NEXT:    cmovll %ecx, %esi
70; CHECK-NEXT:    movd %xmm0, %eax
71; CHECK-NEXT:    cwtl
72; CHECK-NEXT:    movl %eax, %edi
73; CHECK-NEXT:    shrl $16, %edi
74; CHECK-NEXT:    shldw $1, %ax, %di
75; CHECK-NEXT:    sarl $16, %eax
76; CHECK-NEXT:    cmpl $16384, %eax # imm = 0x4000
77; CHECK-NEXT:    cmovgel %r8d, %edi
78; CHECK-NEXT:    cmpl $-16384, %eax # imm = 0xC000
79; CHECK-NEXT:    cmovll %ecx, %edi
80; CHECK-NEXT:    movzwl %di, %eax
81; CHECK-NEXT:    movd %eax, %xmm1
82; CHECK-NEXT:    pinsrw $1, %esi, %xmm1
83; CHECK-NEXT:    pinsrw $2, %edx, %xmm1
84; CHECK-NEXT:    pextrw $3, %xmm0, %eax
85; CHECK-NEXT:    cwtl
86; CHECK-NEXT:    movl %eax, %edx
87; CHECK-NEXT:    shrl $14, %edx
88; CHECK-NEXT:    leal (,%rax,4), %esi
89; CHECK-NEXT:    shrdw $15, %dx, %si
90; CHECK-NEXT:    sarl $14, %eax
91; CHECK-NEXT:    cmpl $16384, %eax # imm = 0x4000
92; CHECK-NEXT:    cmovgel %r8d, %esi
93; CHECK-NEXT:    cmpl $-16384, %eax # imm = 0xC000
94; CHECK-NEXT:    cmovll %ecx, %esi
95; CHECK-NEXT:    pinsrw $3, %esi, %xmm1
96; CHECK-NEXT:    movdqa %xmm1, %xmm0
97; CHECK-NEXT:    retq
98  %t = call <4 x i16> @llvm.smul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
99  ret <4 x i16> %t
100}
101
102
103define <4 x i16> @umulfixsat(<4 x i16> %a) {
104; CHECK-LABEL: umulfixsat:
105; CHECK:       # %bb.0:
106; CHECK-NEXT:    pextrw $2, %xmm0, %eax
107; CHECK-NEXT:    leal (%rax,%rax,2), %eax
108; CHECK-NEXT:    movl %eax, %edx
109; CHECK-NEXT:    shrl $16, %edx
110; CHECK-NEXT:    movl %edx, %ecx
111; CHECK-NEXT:    shldw $1, %ax, %cx
112; CHECK-NEXT:    cmpl $32768, %edx # imm = 0x8000
113; CHECK-NEXT:    movl $65535, %eax # imm = 0xFFFF
114; CHECK-NEXT:    cmovael %eax, %ecx
115; CHECK-NEXT:    pextrw $1, %xmm0, %edx
116; CHECK-NEXT:    addl %edx, %edx
117; CHECK-NEXT:    movl %edx, %esi
118; CHECK-NEXT:    shrl $16, %esi
119; CHECK-NEXT:    movl %esi, %edi
120; CHECK-NEXT:    shldw $1, %dx, %di
121; CHECK-NEXT:    cmpl $32768, %esi # imm = 0x8000
122; CHECK-NEXT:    cmovael %eax, %edi
123; CHECK-NEXT:    movd %xmm0, %edx
124; CHECK-NEXT:    xorl %esi, %esi
125; CHECK-NEXT:    shldw $1, %dx, %si
126; CHECK-NEXT:    movl $32768, %edx # imm = 0x8000
127; CHECK-NEXT:    negl %edx
128; CHECK-NEXT:    cmovael %eax, %esi
129; CHECK-NEXT:    movzwl %si, %edx
130; CHECK-NEXT:    movd %edx, %xmm1
131; CHECK-NEXT:    pinsrw $1, %edi, %xmm1
132; CHECK-NEXT:    pinsrw $2, %ecx, %xmm1
133; CHECK-NEXT:    pextrw $3, %xmm0, %ecx
134; CHECK-NEXT:    shll $2, %ecx
135; CHECK-NEXT:    movl %ecx, %edx
136; CHECK-NEXT:    shrl $16, %edx
137; CHECK-NEXT:    movl %edx, %esi
138; CHECK-NEXT:    shldw $1, %cx, %si
139; CHECK-NEXT:    cmpl $32768, %edx # imm = 0x8000
140; CHECK-NEXT:    cmovael %eax, %esi
141; CHECK-NEXT:    pinsrw $3, %esi, %xmm1
142; CHECK-NEXT:    movdqa %xmm1, %xmm0
143; CHECK-NEXT:    retq
144  %t = call <4 x i16> @llvm.umul.fix.sat.v4i16(<4 x i16> <i16 1, i16 2, i16 3, i16 4>, <4 x i16> %a, i32 15)
145  ret <4 x i16> %t
146}
147