1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
4
5; truncate v2i64 to v2i32
6
7define void @convert_v2i64_to_v2i32(<2 x i32>* %dst.addr, <2 x i64> %src) nounwind {
8; X86-LABEL: convert_v2i64_to_v2i32:
9; X86:       # %bb.0: # %entry
10; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
11; X86-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
12; X86-NEXT:    pcmpeqd %xmm1, %xmm1
13; X86-NEXT:    psubd %xmm1, %xmm0
14; X86-NEXT:    movq %xmm0, (%eax)
15; X86-NEXT:    retl
16;
17; X64-LABEL: convert_v2i64_to_v2i32:
18; X64:       # %bb.0: # %entry
19; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
20; X64-NEXT:    pcmpeqd %xmm1, %xmm1
21; X64-NEXT:    psubd %xmm1, %xmm0
22; X64-NEXT:    movq %xmm0, (%rdi)
23; X64-NEXT:    retq
24entry:
25	%val = trunc <2 x i64> %src to <2 x i32>
26	%add = add <2 x i32> %val, < i32 1, i32 1 >
27	store <2 x i32> %add, <2 x i32>* %dst.addr
28	ret void
29}
30
31; truncate v3i32 to v3i8
32
33define void @convert_v3i32_to_v3i8(<3 x i8>* %dst.addr, <3 x i32>* %src.addr) nounwind {
34; X86-LABEL: convert_v3i32_to_v3i8:
35; X86:       # %bb.0: # %entry
36; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
37; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
38; X86-NEXT:    movdqa (%ecx), %xmm0
39; X86-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
40; X86-NEXT:    pcmpeqd %xmm1, %xmm1
41; X86-NEXT:    psubb %xmm1, %xmm0
42; X86-NEXT:    pextrb $2, %xmm0, 2(%eax)
43; X86-NEXT:    pextrw $0, %xmm0, (%eax)
44; X86-NEXT:    retl
45;
46; X64-LABEL: convert_v3i32_to_v3i8:
47; X64:       # %bb.0: # %entry
48; X64-NEXT:    movdqa (%rsi), %xmm0
49; X64-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
50; X64-NEXT:    pcmpeqd %xmm1, %xmm1
51; X64-NEXT:    psubb %xmm1, %xmm0
52; X64-NEXT:    pextrb $2, %xmm0, 2(%rdi)
53; X64-NEXT:    pextrw $0, %xmm0, (%rdi)
54; X64-NEXT:    retq
55entry:
56	%load = load <3 x i32>, <3 x i32>* %src.addr
57	%val = trunc <3 x i32> %load to <3 x i8>
58	%add = add <3 x i8> %val, < i8 1, i8 1, i8 1 >
59	store <3 x i8> %add, <3 x i8>* %dst.addr
60	ret void
61}
62
63; truncate v5i16 to v5i8
64
65define void @convert_v5i16_to_v5i8(<5 x i8>* %dst.addr, <5 x i16>* %src.addr) nounwind {
66; X86-LABEL: convert_v5i16_to_v5i8:
67; X86:       # %bb.0: # %entry
68; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
69; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
70; X86-NEXT:    movdqa (%ecx), %xmm0
71; X86-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
72; X86-NEXT:    pcmpeqd %xmm1, %xmm1
73; X86-NEXT:    psubb %xmm1, %xmm0
74; X86-NEXT:    pextrb $4, %xmm0, 4(%eax)
75; X86-NEXT:    movd %xmm0, (%eax)
76; X86-NEXT:    retl
77;
78; X64-LABEL: convert_v5i16_to_v5i8:
79; X64:       # %bb.0: # %entry
80; X64-NEXT:    movdqa (%rsi), %xmm0
81; X64-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
82; X64-NEXT:    pcmpeqd %xmm1, %xmm1
83; X64-NEXT:    psubb %xmm1, %xmm0
84; X64-NEXT:    pextrb $4, %xmm0, 4(%rdi)
85; X64-NEXT:    movd %xmm0, (%rdi)
86; X64-NEXT:    retq
87entry:
88	%load = load <5 x i16>, <5 x i16>* %src.addr
89	%val = trunc <5 x i16> %load to <5 x i8>
90	%add = add <5 x i8> %val, < i8 1, i8 1, i8 1, i8 1, i8 1 >
91	store <5 x i8> %add, <5 x i8>* %dst.addr
92	ret void
93}
94