1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2; RUN: opt < %s -instsimplify -S | FileCheck %s 3 4define i1 @bool_true_or_false(i1 %cond) { 5; CHECK-LABEL: @bool_true_or_false( 6; CHECK-NEXT: ret i1 [[COND:%.*]] 7; 8 %s = select i1 %cond, i1 true, i1 false 9 ret i1 %s 10} 11 12define <2 x i1> @bool_true_or_false_vec(<2 x i1> %cond) { 13; CHECK-LABEL: @bool_true_or_false_vec( 14; CHECK-NEXT: ret <2 x i1> [[COND:%.*]] 15; 16 %s = select <2 x i1> %cond, <2 x i1> <i1 true, i1 true>, <2 x i1> zeroinitializer 17 ret <2 x i1> %s 18} 19 20define <2 x i1> @bool_true_or_false_vec_undef(<2 x i1> %cond) { 21; CHECK-LABEL: @bool_true_or_false_vec_undef( 22; CHECK-NEXT: ret <2 x i1> [[COND:%.*]] 23; 24 %s = select <2 x i1> %cond, <2 x i1> <i1 undef, i1 true>, <2 x i1> <i1 false, i1 undef> 25 ret <2 x i1> %s 26} 27 28define i32 @cond_is_false(i32 %A, i32 %B) { 29; CHECK-LABEL: @cond_is_false( 30; CHECK-NEXT: ret i32 [[B:%.*]] 31; 32 %C = select i1 false, i32 %A, i32 %B 33 ret i32 %C 34} 35 36define i32 @cond_is_true(i32 %A, i32 %B) { 37; CHECK-LABEL: @cond_is_true( 38; CHECK-NEXT: ret i32 [[A:%.*]] 39; 40 %C = select i1 true, i32 %A, i32 %B 41 ret i32 %C 42} 43 44define i32 @equal_arms(i1 %cond, i32 %x) { 45; CHECK-LABEL: @equal_arms( 46; CHECK-NEXT: ret i32 [[X:%.*]] 47; 48 %V = select i1 %cond, i32 %x, i32 %x 49 ret i32 %V 50} 51 52define <2 x i32> @equal_arms_vec(<2 x i1> %cond, <2 x i32> %x) { 53; CHECK-LABEL: @equal_arms_vec( 54; CHECK-NEXT: ret <2 x i32> [[X:%.*]] 55; 56 %V = select <2 x i1> %cond, <2 x i32> %x, <2 x i32> %x 57 ret <2 x i32> %V 58} 59 60define <2 x i32> @equal_arms_vec_undef(<2 x i1> %cond) { 61; CHECK-LABEL: @equal_arms_vec_undef( 62; CHECK-NEXT: ret <2 x i32> <i32 42, i32 42> 63; 64 %V = select <2 x i1> %cond, <2 x i32> <i32 42, i32 undef>, <2 x i32> <i32 undef, i32 42> 65 ret <2 x i32> %V 66} 67 68define <3 x float> @equal_arms_vec_less_undef(<3 x i1> %cond) { 69; CHECK-LABEL: @equal_arms_vec_less_undef( 70; CHECK-NEXT: ret <3 x float> <float 4.200000e+01, float 4.200000e+01, float 4.300000e+01> 71; 72 %V = select <3 x i1> %cond, <3 x float> <float 42.0, float undef, float 43.0>, <3 x float> <float 42.0, float 42.0, float 43.0> 73 ret <3 x float> %V 74} 75 76define <3 x float> @equal_arms_vec_more_undef(<3 x i1> %cond) { 77; CHECK-LABEL: @equal_arms_vec_more_undef( 78; CHECK-NEXT: ret <3 x float> <float 4.200000e+01, float undef, float 4.300000e+01> 79; 80 %V = select <3 x i1> %cond, <3 x float> <float 42.0, float undef, float undef>, <3 x float> <float undef, float undef, float 43.0> 81 ret <3 x float> %V 82} 83 84define <2 x i8> @vsel_tvec(<2 x i8> %x, <2 x i8> %y) { 85; CHECK-LABEL: @vsel_tvec( 86; CHECK-NEXT: ret <2 x i8> [[X:%.*]] 87; 88 %s = select <2 x i1><i1 true, i1 true>, <2 x i8> %x, <2 x i8> %y 89 ret <2 x i8> %s 90} 91 92define <2 x i8> @vsel_fvec(<2 x i8> %x, <2 x i8> %y) { 93; CHECK-LABEL: @vsel_fvec( 94; CHECK-NEXT: ret <2 x i8> [[Y:%.*]] 95; 96 %s = select <2 x i1><i1 false, i1 false>, <2 x i8> %x, <2 x i8> %y 97 ret <2 x i8> %s 98} 99 100define <2 x i8> @vsel_mixedvec() { 101; CHECK-LABEL: @vsel_mixedvec( 102; CHECK-NEXT: ret <2 x i8> <i8 0, i8 3> 103; 104 %s = select <2 x i1><i1 true, i1 false>, <2 x i8> <i8 0, i8 1>, <2 x i8> <i8 2, i8 3> 105 ret <2 x i8> %s 106} 107 108define <3 x i8> @vsel_undef_true_op(<3 x i8> %x, <3 x i8> %y) { 109; CHECK-LABEL: @vsel_undef_true_op( 110; CHECK-NEXT: ret <3 x i8> [[X:%.*]] 111; 112 %s = select <3 x i1><i1 1, i1 undef, i1 1>, <3 x i8> %x, <3 x i8> %y 113 ret <3 x i8> %s 114} 115 116define <3 x i4> @vsel_undef_false_op(<3 x i4> %x, <3 x i4> %y) { 117; CHECK-LABEL: @vsel_undef_false_op( 118; CHECK-NEXT: ret <3 x i4> [[Y:%.*]] 119; 120 %s = select <3 x i1><i1 0, i1 undef, i1 undef>, <3 x i4> %x, <3 x i4> %y 121 ret <3 x i4> %s 122} 123 124define i32 @test1(i32 %x) { 125; CHECK-LABEL: @test1( 126; CHECK-NEXT: ret i32 [[X:%.*]] 127; 128 %and = and i32 %x, 1 129 %cmp = icmp eq i32 %and, 0 130 %and1 = and i32 %x, -2 131 %and1.x = select i1 %cmp, i32 %and1, i32 %x 132 ret i32 %and1.x 133} 134 135define i32 @test2(i32 %x) { 136; CHECK-LABEL: @test2( 137; CHECK-NEXT: ret i32 [[X:%.*]] 138; 139 %and = and i32 %x, 1 140 %cmp = icmp ne i32 %and, 0 141 %and1 = and i32 %x, -2 142 %and1.x = select i1 %cmp, i32 %x, i32 %and1 143 ret i32 %and1.x 144} 145 146define i32 @test3(i32 %x) { 147; CHECK-LABEL: @test3( 148; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], -2 149; CHECK-NEXT: ret i32 [[AND1]] 150; 151 %and = and i32 %x, 1 152 %cmp = icmp ne i32 %and, 0 153 %and1 = and i32 %x, -2 154 %and1.x = select i1 %cmp, i32 %and1, i32 %x 155 ret i32 %and1.x 156} 157 158define i32 @test4(i32 %X) { 159; CHECK-LABEL: @test4( 160; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 161; CHECK-NEXT: ret i32 [[OR]] 162; 163 %cmp = icmp slt i32 %X, 0 164 %or = or i32 %X, -2147483648 165 %cond = select i1 %cmp, i32 %X, i32 %or 166 ret i32 %cond 167} 168 169; Same as above, but the compare isn't canonical 170define i32 @test4noncanon(i32 %X) { 171; CHECK-LABEL: @test4noncanon( 172; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 173; CHECK-NEXT: ret i32 [[OR]] 174; 175 %cmp = icmp sle i32 %X, -1 176 %or = or i32 %X, -2147483648 177 %cond = select i1 %cmp, i32 %X, i32 %or 178 ret i32 %cond 179} 180 181define i32 @test5(i32 %X) { 182; CHECK-LABEL: @test5( 183; CHECK-NEXT: ret i32 [[X:%.*]] 184; 185 %cmp = icmp slt i32 %X, 0 186 %or = or i32 %X, -2147483648 187 %cond = select i1 %cmp, i32 %or, i32 %X 188 ret i32 %cond 189} 190 191define i32 @test6(i32 %X) { 192; CHECK-LABEL: @test6( 193; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2147483647 194; CHECK-NEXT: ret i32 [[AND]] 195; 196 %cmp = icmp slt i32 %X, 0 197 %and = and i32 %X, 2147483647 198 %cond = select i1 %cmp, i32 %and, i32 %X 199 ret i32 %cond 200} 201 202define i32 @test7(i32 %X) { 203; CHECK-LABEL: @test7( 204; CHECK-NEXT: ret i32 [[X:%.*]] 205; 206 %cmp = icmp slt i32 %X, 0 207 %and = and i32 %X, 2147483647 208 %cond = select i1 %cmp, i32 %X, i32 %and 209 ret i32 %cond 210} 211 212define i32 @test8(i32 %X) { 213; CHECK-LABEL: @test8( 214; CHECK-NEXT: ret i32 [[X:%.*]] 215; 216 %cmp = icmp sgt i32 %X, -1 217 %or = or i32 %X, -2147483648 218 %cond = select i1 %cmp, i32 %X, i32 %or 219 ret i32 %cond 220} 221 222define i32 @test9(i32 %X) { 223; CHECK-LABEL: @test9( 224; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 225; CHECK-NEXT: ret i32 [[OR]] 226; 227 %cmp = icmp sgt i32 %X, -1 228 %or = or i32 %X, -2147483648 229 %cond = select i1 %cmp, i32 %or, i32 %X 230 ret i32 %cond 231} 232 233; Same as above, but the compare isn't canonical 234define i32 @test9noncanon(i32 %X) { 235; CHECK-LABEL: @test9noncanon( 236; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], -2147483648 237; CHECK-NEXT: ret i32 [[OR]] 238; 239 %cmp = icmp sge i32 %X, 0 240 %or = or i32 %X, -2147483648 241 %cond = select i1 %cmp, i32 %or, i32 %X 242 ret i32 %cond 243} 244 245define i32 @test10(i32 %X) { 246; CHECK-LABEL: @test10( 247; CHECK-NEXT: ret i32 [[X:%.*]] 248; 249 %cmp = icmp sgt i32 %X, -1 250 %and = and i32 %X, 2147483647 251 %cond = select i1 %cmp, i32 %and, i32 %X 252 ret i32 %cond 253} 254 255define i32 @test11(i32 %X) { 256; CHECK-LABEL: @test11( 257; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 2147483647 258; CHECK-NEXT: ret i32 [[AND]] 259; 260 %cmp = icmp sgt i32 %X, -1 261 %and = and i32 %X, 2147483647 262 %cond = select i1 %cmp, i32 %X, i32 %and 263 ret i32 %cond 264} 265 266define <2 x i8> @test11vec(<2 x i8> %X) { 267; CHECK-LABEL: @test11vec( 268; CHECK-NEXT: [[AND:%.*]] = and <2 x i8> [[X:%.*]], <i8 127, i8 127> 269; CHECK-NEXT: ret <2 x i8> [[AND]] 270; 271 %cmp = icmp sgt <2 x i8> %X, <i8 -1, i8 -1> 272 %and = and <2 x i8> %X, <i8 127, i8 127> 273 %sel = select <2 x i1> %cmp, <2 x i8> %X, <2 x i8> %and 274 ret <2 x i8> %sel 275} 276 277define i32 @test12(i32 %X) { 278; CHECK-LABEL: @test12( 279; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 3 280; CHECK-NEXT: ret i32 [[AND]] 281; 282 %cmp = icmp ult i32 %X, 4 283 %and = and i32 %X, 3 284 %cond = select i1 %cmp, i32 %X, i32 %and 285 ret i32 %cond 286} 287 288; Same as above, but the compare isn't canonical 289define i32 @test12noncanon(i32 %X) { 290; CHECK-LABEL: @test12noncanon( 291; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 3 292; CHECK-NEXT: ret i32 [[AND]] 293; 294 %cmp = icmp ule i32 %X, 3 295 %and = and i32 %X, 3 296 %cond = select i1 %cmp, i32 %X, i32 %and 297 ret i32 %cond 298} 299 300define i32 @test13(i32 %X) { 301; CHECK-LABEL: @test13( 302; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 3 303; CHECK-NEXT: ret i32 [[AND]] 304; 305 %cmp = icmp ugt i32 %X, 3 306 %and = and i32 %X, 3 307 %cond = select i1 %cmp, i32 %and, i32 %X 308 ret i32 %cond 309} 310 311; Same as above, but the compare isn't canonical 312define i32 @test13noncanon(i32 %X) { 313; CHECK-LABEL: @test13noncanon( 314; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 3 315; CHECK-NEXT: ret i32 [[AND]] 316; 317 %cmp = icmp uge i32 %X, 4 318 %and = and i32 %X, 3 319 %cond = select i1 %cmp, i32 %and, i32 %X 320 ret i32 %cond 321} 322 323define i32 @select_icmp_and_8_eq_0_or_8(i32 %x) { 324; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8( 325; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 8 326; CHECK-NEXT: ret i32 [[OR]] 327; 328 %and = and i32 %x, 8 329 %cmp = icmp eq i32 %and, 0 330 %or = or i32 %x, 8 331 %sel = select i1 %cmp, i32 %or, i32 %x 332 ret i32 %sel 333} 334 335define i32 @select_icmp_and_8_eq_0_or_8_alt(i32 %x) { 336; CHECK-LABEL: @select_icmp_and_8_eq_0_or_8_alt( 337; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 8 338; CHECK-NEXT: ret i32 [[OR]] 339; 340 %and = and i32 %x, 8 341 %cmp = icmp ne i32 %and, 0 342 %or = or i32 %x, 8 343 %sel = select i1 %cmp, i32 %x, i32 %or 344 ret i32 %sel 345} 346 347define i32 @select_icmp_and_8_ne_0_or_8(i32 %x) { 348; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8( 349; CHECK-NEXT: ret i32 [[X:%.*]] 350; 351 %and = and i32 %x, 8 352 %cmp = icmp ne i32 %and, 0 353 %or = or i32 %x, 8 354 %sel = select i1 %cmp, i32 %or, i32 %x 355 ret i32 %sel 356} 357 358define i32 @select_icmp_and_8_ne_0_or_8_alt(i32 %x) { 359; CHECK-LABEL: @select_icmp_and_8_ne_0_or_8_alt( 360; CHECK-NEXT: ret i32 [[X:%.*]] 361; 362 %and = and i32 %x, 8 363 %cmp = icmp eq i32 %and, 0 364 %or = or i32 %x, 8 365 %sel = select i1 %cmp, i32 %x, i32 %or 366 ret i32 %sel 367} 368 369define i32 @select_icmp_and_8_eq_0_and_not_8(i32 %x) { 370; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8( 371; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], -9 372; CHECK-NEXT: ret i32 [[AND1]] 373; 374 %and = and i32 %x, 8 375 %cmp = icmp eq i32 %and, 0 376 %and1 = and i32 %x, -9 377 %sel = select i1 %cmp, i32 %x, i32 %and1 378 ret i32 %sel 379} 380 381define i32 @select_icmp_and_8_eq_0_and_not_8_alt(i32 %x) { 382; CHECK-LABEL: @select_icmp_and_8_eq_0_and_not_8_alt( 383; CHECK-NEXT: [[AND1:%.*]] = and i32 [[X:%.*]], -9 384; CHECK-NEXT: ret i32 [[AND1]] 385; 386 %and = and i32 %x, 8 387 %cmp = icmp ne i32 %and, 0 388 %and1 = and i32 %x, -9 389 %sel = select i1 %cmp, i32 %and1, i32 %x 390 ret i32 %sel 391} 392 393define i32 @select_icmp_and_8_ne_0_and_not_8(i32 %x) { 394; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8( 395; CHECK-NEXT: ret i32 [[X:%.*]] 396; 397 %and = and i32 %x, 8 398 %cmp = icmp ne i32 %and, 0 399 %and1 = and i32 %x, -9 400 %sel = select i1 %cmp, i32 %x, i32 %and1 401 ret i32 %sel 402} 403 404define i32 @select_icmp_and_8_ne_0_and_not_8_alt(i32 %x) { 405; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8_alt( 406; CHECK-NEXT: ret i32 [[X:%.*]] 407; 408 %and = and i32 %x, 8 409 %cmp = icmp eq i32 %and, 0 410 %and1 = and i32 %x, -9 411 %sel = select i1 %cmp, i32 %and1, i32 %x 412 ret i32 %sel 413} 414 415; PR28466: https://llvm.org/bugs/show_bug.cgi?id=28466 416; Each of the previous 8 patterns has a variant that replaces the 417; 'and' with a 'trunc' and the icmp eq/ne with icmp slt/sgt. 418 419define i32 @select_icmp_trunc_8_ne_0_or_128(i32 %x) { 420; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128( 421; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 128 422; CHECK-NEXT: ret i32 [[OR]] 423; 424 %trunc = trunc i32 %x to i8 425 %cmp = icmp sgt i8 %trunc, -1 426 %or = or i32 %x, 128 427 %sel = select i1 %cmp, i32 %or, i32 %x 428 ret i32 %sel 429} 430 431define i32 @select_icmp_trunc_8_ne_0_or_128_alt(i32 %x) { 432; CHECK-LABEL: @select_icmp_trunc_8_ne_0_or_128_alt( 433; CHECK-NEXT: [[OR:%.*]] = or i32 [[X:%.*]], 128 434; CHECK-NEXT: ret i32 [[OR]] 435; 436 %trunc = trunc i32 %x to i8 437 %cmp = icmp slt i8 %trunc, 0 438 %or = or i32 %x, 128 439 %sel = select i1 %cmp, i32 %x, i32 %or 440 ret i32 %sel 441} 442 443define i32 @select_icmp_trunc_8_eq_0_or_128(i32 %x) { 444; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128( 445; CHECK-NEXT: ret i32 [[X:%.*]] 446; 447 %trunc = trunc i32 %x to i8 448 %cmp = icmp slt i8 %trunc, 0 449 %or = or i32 %x, 128 450 %sel = select i1 %cmp, i32 %or, i32 %x 451 ret i32 %sel 452} 453 454define i32 @select_icmp_trunc_8_eq_0_or_128_alt(i32 %x) { 455; CHECK-LABEL: @select_icmp_trunc_8_eq_0_or_128_alt( 456; CHECK-NEXT: ret i32 [[X:%.*]] 457; 458 %trunc = trunc i32 %x to i8 459 %cmp = icmp sgt i8 %trunc, -1 460 %or = or i32 %x, 128 461 %sel = select i1 %cmp, i32 %x, i32 %or 462 ret i32 %sel 463} 464 465define i32 @select_icmp_trunc_8_eq_0_and_not_8(i32 %x) { 466; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8( 467; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -9 468; CHECK-NEXT: ret i32 [[AND]] 469; 470 %trunc = trunc i32 %x to i4 471 %cmp = icmp sgt i4 %trunc, -1 472 %and = and i32 %x, -9 473 %sel = select i1 %cmp, i32 %x, i32 %and 474 ret i32 %sel 475} 476 477define i32 @select_icmp_trunc_8_eq_0_and_not_8_alt(i32 %x) { 478; CHECK-LABEL: @select_icmp_trunc_8_eq_0_and_not_8_alt( 479; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], -9 480; CHECK-NEXT: ret i32 [[AND]] 481; 482 %trunc = trunc i32 %x to i4 483 %cmp = icmp slt i4 %trunc, 0 484 %and = and i32 %x, -9 485 %sel = select i1 %cmp, i32 %and, i32 %x 486 ret i32 %sel 487} 488 489define i32 @select_icmp_trunc_8_ne_0_and_not_8(i32 %x) { 490; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8( 491; CHECK-NEXT: ret i32 [[X:%.*]] 492; 493 %trunc = trunc i32 %x to i4 494 %cmp = icmp slt i4 %trunc, 0 495 %and = and i32 %x, -9 496 %sel = select i1 %cmp, i32 %x, i32 %and 497 ret i32 %sel 498} 499 500define i32 @select_icmp_trunc_8_ne_0_and_not_8_alt(i32 %x) { 501; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8_alt( 502; CHECK-NEXT: ret i32 [[X:%.*]] 503; 504 %trunc = trunc i32 %x to i4 505 %cmp = icmp sgt i4 %trunc, -1 506 %and = and i32 %x, -9 507 %sel = select i1 %cmp, i32 %and, i32 %x 508 ret i32 %sel 509} 510 511; Make sure that at least a few of the same patterns are repeated with vector types. 512 513define <2 x i32> @select_icmp_and_8_ne_0_and_not_8_vec(<2 x i32> %x) { 514; CHECK-LABEL: @select_icmp_and_8_ne_0_and_not_8_vec( 515; CHECK-NEXT: ret <2 x i32> [[X:%.*]] 516; 517 %and = and <2 x i32> %x, <i32 8, i32 8> 518 %cmp = icmp ne <2 x i32> %and, zeroinitializer 519 %and1 = and <2 x i32> %x, <i32 -9, i32 -9> 520 %sel = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %and1 521 ret <2 x i32> %sel 522} 523 524define <2 x i32> @select_icmp_trunc_8_ne_0_and_not_8_alt_vec(<2 x i32> %x) { 525; CHECK-LABEL: @select_icmp_trunc_8_ne_0_and_not_8_alt_vec( 526; CHECK-NEXT: ret <2 x i32> [[X:%.*]] 527; 528 %trunc = trunc <2 x i32> %x to <2 x i4> 529 %cmp = icmp sgt <2 x i4> %trunc, <i4 -1, i4 -1> 530 %and = and <2 x i32> %x, <i32 -9, i32 -9> 531 %sel = select <2 x i1> %cmp, <2 x i32> %and, <2 x i32> %x 532 ret <2 x i32> %sel 533} 534 535; Insert a bit from x into y? This should be possible in InstCombine, but not InstSimplify? 536 537define i32 @select_icmp_x_and_8_eq_0_y_and_not_8(i32 %x, i32 %y) { 538; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y_and_not_8( 539; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 540; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 541; CHECK-NEXT: [[AND1:%.*]] = and i32 [[Y:%.*]], -9 542; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i32 [[Y]], i32 [[AND1]] 543; CHECK-NEXT: ret i32 [[Y_AND1]] 544; 545 %and = and i32 %x, 8 546 %cmp = icmp eq i32 %and, 0 547 %and1 = and i32 %y, -9 548 %y.and1 = select i1 %cmp, i32 %y, i32 %and1 549 ret i32 %y.and1 550} 551 552define i64 @select_icmp_x_and_8_eq_0_y64_and_not_8(i32 %x, i64 %y) { 553; CHECK-LABEL: @select_icmp_x_and_8_eq_0_y64_and_not_8( 554; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 555; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 556; CHECK-NEXT: [[AND1:%.*]] = and i64 [[Y:%.*]], -9 557; CHECK-NEXT: [[Y_AND1:%.*]] = select i1 [[CMP]], i64 [[Y]], i64 [[AND1]] 558; CHECK-NEXT: ret i64 [[Y_AND1]] 559; 560 %and = and i32 %x, 8 561 %cmp = icmp eq i32 %and, 0 562 %and1 = and i64 %y, -9 563 %y.and1 = select i1 %cmp, i64 %y, i64 %and1 564 ret i64 %y.and1 565} 566 567define i64 @select_icmp_x_and_8_ne_0_y64_and_not_8(i32 %x, i64 %y) { 568; CHECK-LABEL: @select_icmp_x_and_8_ne_0_y64_and_not_8( 569; CHECK-NEXT: [[AND:%.*]] = and i32 [[X:%.*]], 8 570; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0 571; CHECK-NEXT: [[AND1:%.*]] = and i64 [[Y:%.*]], -9 572; CHECK-NEXT: [[AND1_Y:%.*]] = select i1 [[CMP]], i64 [[AND1]], i64 [[Y]] 573; CHECK-NEXT: ret i64 [[AND1_Y]] 574; 575 %and = and i32 %x, 8 576 %cmp = icmp eq i32 %and, 0 577 %and1 = and i64 %y, -9 578 %and1.y = select i1 %cmp, i64 %and1, i64 %y 579 ret i64 %and1.y 580} 581 582; Don't crash on a pointer or aggregate type. 583 584define i32* @select_icmp_pointers(i32* %x, i32* %y) { 585; CHECK-LABEL: @select_icmp_pointers( 586; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32* [[X:%.*]], null 587; CHECK-NEXT: [[SEL:%.*]] = select i1 [[CMP]], i32* [[X]], i32* [[Y:%.*]] 588; CHECK-NEXT: ret i32* [[SEL]] 589; 590 %cmp = icmp slt i32* %x, null 591 %sel = select i1 %cmp, i32* %x, i32* %y 592 ret i32* %sel 593} 594 595; If the condition is known, we don't need to select, but we're not 596; doing this fold here to avoid compile-time cost. 597 598declare void @llvm.assume(i1) 599 600define i8 @assume_sel_cond(i1 %cond, i8 %x, i8 %y) { 601; CHECK-LABEL: @assume_sel_cond( 602; CHECK-NEXT: call void @llvm.assume(i1 [[COND:%.*]]) 603; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X:%.*]], i8 [[Y:%.*]] 604; CHECK-NEXT: ret i8 [[SEL]] 605; 606 call void @llvm.assume(i1 %cond) 607 %sel = select i1 %cond, i8 %x, i8 %y 608 ret i8 %sel 609} 610 611define i8 @do_not_assume_sel_cond(i1 %cond, i8 %x, i8 %y) { 612; CHECK-LABEL: @do_not_assume_sel_cond( 613; CHECK-NEXT: [[NOTCOND:%.*]] = icmp eq i1 [[COND:%.*]], false 614; CHECK-NEXT: call void @llvm.assume(i1 [[NOTCOND]]) 615; CHECK-NEXT: [[SEL:%.*]] = select i1 [[COND]], i8 [[X:%.*]], i8 [[Y:%.*]] 616; CHECK-NEXT: ret i8 [[SEL]] 617; 618 %notcond = icmp eq i1 %cond, false 619 call void @llvm.assume(i1 %notcond) 620 %sel = select i1 %cond, i8 %x, i8 %y 621 ret i8 %sel 622} 623 624define i32* @select_icmp_eq_0_gep_operand(i32* %base, i64 %n) { 625; CHECK-LABEL: @select_icmp_eq_0_gep_operand( 626; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[BASE:%.*]], i64 [[N:%.*]] 627; CHECK-NEXT: ret i32* [[GEP]] 628; 629 %cond = icmp eq i64 %n, 0 630 %gep = getelementptr i32, i32* %base, i64 %n 631 %r = select i1 %cond, i32* %base, i32* %gep 632 ret i32* %r 633} 634 635define i32* @select_icmp_ne_0_gep_operand(i32* %base, i64 %n) { 636; CHECK-LABEL: @select_icmp_ne_0_gep_operand( 637; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[BASE:%.*]], i64 [[N:%.*]] 638; CHECK-NEXT: ret i32* [[GEP]] 639; 640 %cond = icmp ne i64 %n, 0 641 %gep = getelementptr i32, i32* %base, i64 %n 642 %r = select i1 %cond, i32* %gep, i32* %base 643 ret i32* %r 644} 645 646define i1 @and_cmps(i32 %x) { 647; CHECK-LABEL: @and_cmps( 648; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X:%.*]], 92 649; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 11 650; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 false 651; CHECK-NEXT: ret i1 [[R]] 652; 653 %cmp1 = icmp slt i32 %x, 92 654 %cmp2 = icmp slt i32 %x, 11 655 %r = select i1 %cmp1, i1 %cmp2, i1 false 656 ret i1 %r 657} 658 659define <2 x i1> @and_cmps_vector(<2 x i32> %x) { 660; CHECK-LABEL: @and_cmps_vector( 661; CHECK-NEXT: [[CMP1:%.*]] = icmp slt <2 x i32> [[X:%.*]], <i32 92, i32 92> 662; CHECK-NEXT: [[CMP2:%.*]] = icmp slt <2 x i32> [[X]], <i32 11, i32 11> 663; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[CMP1]], <2 x i1> [[CMP2]], <2 x i1> zeroinitializer 664; CHECK-NEXT: ret <2 x i1> [[R]] 665; 666 %cmp1 = icmp slt <2 x i32> %x, <i32 92, i32 92> 667 %cmp2 = icmp slt <2 x i32> %x, <i32 11, i32 11> 668 %r = select <2 x i1> %cmp1, <2 x i1> %cmp2, <2 x i1> <i1 false, i1 false> 669 ret <2 x i1> %r 670} 671 672define i1 @or_cmps(float %x) { 673; CHECK-LABEL: @or_cmps( 674; CHECK-NEXT: [[CMP1:%.*]] = fcmp uno float [[X:%.*]], 4.200000e+01 675; CHECK-NEXT: [[CMP2:%.*]] = fcmp uno float [[X]], 5.200000e+01 676; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP2]] 677; CHECK-NEXT: ret i1 [[R]] 678; 679 %cmp1 = fcmp uno float %x, 42.0 680 %cmp2 = fcmp uno float %x, 52.0 681 %r = select i1 %cmp1, i1 true, i1 %cmp2 682 ret i1 %r 683} 684 685define <2 x i1> @or_logic_vector(<2 x i1> %x, <2 x i1> %y) { 686; CHECK-LABEL: @or_logic_vector( 687; CHECK-NEXT: [[A:%.*]] = and <2 x i1> [[X:%.*]], [[Y:%.*]] 688; CHECK-NEXT: [[R:%.*]] = select <2 x i1> [[X]], <2 x i1> <i1 true, i1 true>, <2 x i1> [[A]] 689; CHECK-NEXT: ret <2 x i1> [[R]] 690; 691 %a = and <2 x i1> %x, %y 692 %r = select <2 x i1> %x, <2 x i1> <i1 true, i1 true>, <2 x i1> %a 693 ret <2 x i1> %r 694} 695 696define i1 @and_not_cmps(i32 %x) { 697; CHECK-LABEL: @and_not_cmps( 698; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X:%.*]], 92 699; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 11 700; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP1]], i1 false, i1 [[CMP2]] 701; CHECK-NEXT: ret i1 [[R]] 702; 703 %cmp1 = icmp slt i32 %x, 92 704 %cmp2 = icmp slt i32 %x, 11 705 %r = select i1 %cmp1, i1 false, i1 %cmp2 706 ret i1 %r 707} 708 709define i1 @or_not_cmps(i32 %x) { 710; CHECK-LABEL: @or_not_cmps( 711; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X:%.*]], 92 712; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 11 713; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP1]], i1 [[CMP2]], i1 true 714; CHECK-NEXT: ret i1 [[R]] 715; 716 %cmp1 = icmp slt i32 %x, 92 717 %cmp2 = icmp slt i32 %x, 11 718 %r = select i1 %cmp1, i1 %cmp2, i1 true 719 ret i1 %r 720} 721 722define i8 @and_cmps_wrong_type(i32 %x) { 723; CHECK-LABEL: @and_cmps_wrong_type( 724; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[X:%.*]], 92 725; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[X]], 11 726; CHECK-NEXT: [[S:%.*]] = sext i1 [[CMP2]] to i8 727; CHECK-NEXT: [[R:%.*]] = select i1 [[CMP1]], i8 [[S]], i8 0 728; CHECK-NEXT: ret i8 [[R]] 729; 730 %cmp1 = icmp slt i32 %x, 92 731 %cmp2 = icmp slt i32 %x, 11 732 %s = sext i1 %cmp2 to i8 733 %r = select i1 %cmp1, i8 %s, i8 0 734 ret i8 %r 735} 736 737define i1 @y_might_be_poison(float %x, float %y) { 738; CHECK-LABEL: @y_might_be_poison( 739; CHECK-NEXT: [[C1:%.*]] = fcmp ord float 0.000000e+00, [[X:%.*]] 740; CHECK-NEXT: [[C2:%.*]] = fcmp ord float [[X]], [[Y:%.*]] 741; CHECK-NEXT: [[C3:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false 742; CHECK-NEXT: ret i1 [[C3]] 743; 744 %c1 = fcmp ord float 0.0, %x 745 %c2 = fcmp ord float %x, %y 746 %c3 = select i1 %c1, i1 %c2, i1 false 747 ret i1 %c3 748} 749 750; Negative tests to ensure we don't remove selects with undef true/false values. 751; See https://bugs.llvm.org/show_bug.cgi?id=31633 752; https://lists.llvm.org/pipermail/llvm-dev/2016-October/106182.html 753; https://reviews.llvm.org/D83360 754define i32 @false_undef(i1 %cond, i32 %x) { 755; CHECK-LABEL: @false_undef( 756; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], i32 [[X:%.*]], i32 undef 757; CHECK-NEXT: ret i32 [[S]] 758; 759 %s = select i1 %cond, i32 %x, i32 undef 760 ret i32 %s 761} 762 763define i32 @true_undef(i1 %cond, i32 %x) { 764; CHECK-LABEL: @true_undef( 765; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], i32 undef, i32 [[X:%.*]] 766; CHECK-NEXT: ret i32 [[S]] 767; 768 %s = select i1 %cond, i32 undef, i32 %x 769 ret i32 %s 770} 771 772define <2 x i32> @false_undef_vec(i1 %cond, <2 x i32> %x) { 773; CHECK-LABEL: @false_undef_vec( 774; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], <2 x i32> [[X:%.*]], <2 x i32> undef 775; CHECK-NEXT: ret <2 x i32> [[S]] 776; 777 %s = select i1 %cond, <2 x i32> %x, <2 x i32> undef 778 ret <2 x i32> %s 779} 780 781define <2 x i32> @true_undef_vec(i1 %cond, <2 x i32> %x) { 782; CHECK-LABEL: @true_undef_vec( 783; CHECK-NEXT: [[S:%.*]] = select i1 [[COND:%.*]], <2 x i32> undef, <2 x i32> [[X:%.*]] 784; CHECK-NEXT: ret <2 x i32> [[S]] 785; 786 %s = select i1 %cond, <2 x i32> undef, <2 x i32> %x 787 ret <2 x i32> %s 788} 789 790; These can be folded because the other value is guaranteed not to be poison. 791define i32 @false_undef_true_constant(i1 %cond) { 792; CHECK-LABEL: @false_undef_true_constant( 793; CHECK-NEXT: ret i32 10 794; 795 %s = select i1 %cond, i32 10, i32 undef 796 ret i32 %s 797} 798 799define i32 @true_undef_false_constant(i1 %cond) { 800; CHECK-LABEL: @true_undef_false_constant( 801; CHECK-NEXT: ret i32 20 802; 803 %s = select i1 %cond, i32 undef, i32 20 804 ret i32 %s 805} 806 807define <2 x i32> @false_undef_true_constant_vec(i1 %cond) { 808; CHECK-LABEL: @false_undef_true_constant_vec( 809; CHECK-NEXT: ret <2 x i32> <i32 42, i32 -42> 810; 811 %s = select i1 %cond, <2 x i32> <i32 42, i32 -42>, <2 x i32> undef 812 ret <2 x i32> %s 813} 814 815define <2 x i32> @true_undef_false_constant_vec(i1 %cond) { 816; CHECK-LABEL: @true_undef_false_constant_vec( 817; CHECK-NEXT: ret <2 x i32> <i32 -42, i32 42> 818; 819 %s = select i1 %cond, <2 x i32> undef, <2 x i32> <i32 -42, i32 42> 820 ret <2 x i32> %s 821} 822 823; If one input is undef and the other is freeze, we can fold it to the freeze. 824define i32 @false_undef_true_freeze(i1 %cond, i32 %x) { 825; CHECK-LABEL: @false_undef_true_freeze( 826; CHECK-NEXT: [[XF:%.*]] = freeze i32 [[X:%.*]] 827; CHECK-NEXT: ret i32 [[XF]] 828; 829 %xf = freeze i32 %x 830 %s = select i1 %cond, i32 %xf, i32 undef 831 ret i32 %s 832} 833 834define i32 @false_undef_false_freeze(i1 %cond, i32 %x) { 835; CHECK-LABEL: @false_undef_false_freeze( 836; CHECK-NEXT: [[XF:%.*]] = freeze i32 [[X:%.*]] 837; CHECK-NEXT: ret i32 [[XF]] 838; 839 %xf = freeze i32 %x 840 %s = select i1 %cond, i32 undef, i32 %xf 841 ret i32 %s 842} 843 844@g = external global i32, align 1 845 846define <2 x i32> @false_undef_true_constextpr_vec(i1 %cond) { 847; CHECK-LABEL: @false_undef_true_constextpr_vec( 848; CHECK-NEXT: ret <2 x i32> <i32 ptrtoint (i32* @g to i32), i32 ptrtoint (i32* @g to i32)> 849; 850 %s = select i1 %cond, <2 x i32> <i32 undef, i32 ptrtoint (i32* @g to i32)>, <2 x i32> <i32 ptrtoint (i32* @g to i32), i32 undef> 851 ret <2 x i32> %s 852} 853 854define i32 @all_constant_true_undef() { 855; CHECK-LABEL: @all_constant_true_undef( 856; CHECK-NEXT: ret i32 1 857; 858 %s = select i1 ptrtoint (i32 ()* @all_constant_true_undef to i1), i32 undef, i32 1 859 ret i32 %s 860} 861 862define float @all_constant_false_undef() { 863; CHECK-LABEL: @all_constant_false_undef( 864; CHECK-NEXT: ret float 1.000000e+00 865; 866 %s = select i1 ptrtoint (float ()* @all_constant_false_undef to i1), float undef, float 1.0 867 ret float %s 868} 869 870define <2 x i32> @all_constant_true_undef_vec() { 871; CHECK-LABEL: @all_constant_true_undef_vec( 872; CHECK-NEXT: ret <2 x i32> <i32 1, i32 -1> 873; 874 %s = select i1 ptrtoint (<2 x i32> ()* @all_constant_true_undef_vec to i1), <2 x i32> undef, <2 x i32> <i32 1, i32 -1> 875 ret <2 x i32> %s 876} 877 878define <2 x float> @all_constant_false_undef_vec() { 879; CHECK-LABEL: @all_constant_false_undef_vec( 880; CHECK-NEXT: ret <2 x float> <float 1.000000e+00, float -1.000000e+00> 881; 882 %s = select i1 ptrtoint (<2 x float> ()* @all_constant_false_undef_vec to i1), <2 x float> undef, <2 x float> <float 1.0, float -1.0> 883 ret <2 x float> %s 884} 885 886; Negative tests. Don't fold if the non-undef operand is a constexpr. 887define i32 @all_constant_false_undef_true_constexpr() { 888; CHECK-LABEL: @all_constant_false_undef_true_constexpr( 889; CHECK-NEXT: [[S:%.*]] = select i1 ptrtoint (i32 ()* @all_constant_false_undef_true_constexpr to i1), i32 ptrtoint (i32 ()* @all_constant_false_undef_true_constexpr to i32), i32 undef 890; CHECK-NEXT: ret i32 [[S]] 891; 892 %s = select i1 ptrtoint (i32 ()* @all_constant_false_undef_true_constexpr to i1), i32 ptrtoint (i32 ()* @all_constant_false_undef_true_constexpr to i32), i32 undef 893 ret i32 %s 894} 895 896define i32 @all_constant_true_undef_false_constexpr() { 897; CHECK-LABEL: @all_constant_true_undef_false_constexpr( 898; CHECK-NEXT: [[S:%.*]] = select i1 ptrtoint (i32 ()* @all_constant_true_undef_false_constexpr to i1), i32 undef, i32 ptrtoint (i32 ()* @all_constant_true_undef_false_constexpr to i32) 899; CHECK-NEXT: ret i32 [[S]] 900; 901 %s = select i1 ptrtoint (i32 ()* @all_constant_true_undef_false_constexpr to i1), i32 undef, i32 ptrtoint (i32 ()* @all_constant_true_undef_false_constexpr to i32) 902 ret i32 %s 903} 904 905; Negative tests. Don't fold if the non-undef operand is a vector containing a constexpr. 906define <2 x i32> @all_constant_false_undef_true_constexpr_vec() { 907; CHECK-LABEL: @all_constant_false_undef_true_constexpr_vec( 908; CHECK-NEXT: [[S:%.*]] = select i1 ptrtoint (<2 x i32> ()* @all_constant_false_undef_true_constexpr_vec to i1), <2 x i32> <i32 ptrtoint (<2 x i32> ()* @all_constant_false_undef_true_constexpr_vec to i32), i32 -1>, <2 x i32> undef 909; CHECK-NEXT: ret <2 x i32> [[S]] 910; 911 %s = select i1 ptrtoint (<2 x i32> ()* @all_constant_false_undef_true_constexpr_vec to i1), <2 x i32> <i32 ptrtoint (<2 x i32> ()* @all_constant_false_undef_true_constexpr_vec to i32), i32 -1>, <2 x i32> undef 912 ret <2 x i32> %s 913} 914 915define <2 x i32> @all_constant_true_undef_false_constexpr_vec() { 916; CHECK-LABEL: @all_constant_true_undef_false_constexpr_vec( 917; CHECK-NEXT: [[S:%.*]] = select i1 ptrtoint (<2 x i32> ()* @all_constant_true_undef_false_constexpr_vec to i1), <2 x i32> undef, <2 x i32> <i32 -1, i32 ptrtoint (<2 x i32> ()* @all_constant_true_undef_false_constexpr_vec to i32)> 918; CHECK-NEXT: ret <2 x i32> [[S]] 919; 920 %s = select i1 ptrtoint (<2 x i32> ()* @all_constant_true_undef_false_constexpr_vec to i1), <2 x i32> undef, <2 x i32><i32 -1, i32 ptrtoint (<2 x i32> ()* @all_constant_true_undef_false_constexpr_vec to i32)> 921 ret <2 x i32> %s 922} 923 924define i1 @expand_binop_undef(i32 %x, i32 %y) { 925; CHECK-LABEL: @expand_binop_undef( 926; CHECK-NEXT: [[CMP9_NOT_1:%.*]] = icmp eq i32 [[X:%.*]], [[Y:%.*]] 927; CHECK-NEXT: [[CMP15:%.*]] = icmp slt i32 [[X]], [[Y]] 928; CHECK-NEXT: [[SPEC_SELECT39:%.*]] = select i1 [[CMP9_NOT_1]], i1 undef, i1 [[CMP15]] 929; CHECK-NEXT: [[SPEC_SELECT40:%.*]] = xor i1 [[CMP9_NOT_1]], true 930; CHECK-NEXT: [[SPEC_SELECT:%.*]] = and i1 [[SPEC_SELECT39]], [[SPEC_SELECT40]] 931; CHECK-NEXT: ret i1 [[SPEC_SELECT]] 932; 933 %cmp9.not.1 = icmp eq i32 %x, %y 934 %cmp15 = icmp slt i32 %x, %y 935 %spec.select39 = select i1 %cmp9.not.1, i1 undef, i1 %cmp15 936 %spec.select40 = xor i1 %cmp9.not.1, 1 937 %spec.select = and i1 %spec.select39, %spec.select40 938 ret i1 %spec.select 939} 940 941define i32 @pr47322_more_poisonous_replacement(i32 %arg) { 942; CHECK-LABEL: @pr47322_more_poisonous_replacement( 943; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ARG:%.*]], 0 944; CHECK-NEXT: [[TRAILING:%.*]] = call i32 @llvm.cttz.i32(i32 [[ARG]], i1 immarg true) 945; CHECK-NEXT: [[SHIFTED:%.*]] = lshr i32 [[ARG]], [[TRAILING]] 946; CHECK-NEXT: [[R1_SROA_0_1:%.*]] = select i1 [[CMP]], i32 0, i32 [[SHIFTED]] 947; CHECK-NEXT: ret i32 [[R1_SROA_0_1]] 948; 949 %cmp = icmp eq i32 %arg, 0 950 %trailing = call i32 @llvm.cttz.i32(i32 %arg, i1 immarg true) 951 %shifted = lshr i32 %arg, %trailing 952 %r1.sroa.0.1 = select i1 %cmp, i32 0, i32 %shifted 953 ret i32 %r1.sroa.0.1 954} 955declare i32 @llvm.cttz.i32(i32, i1 immarg) 956 957; Partial undef scalable vectors should be ignored. 958define <vscale x 2 x i1> @ignore_scalable_undef(<vscale x 2 x i1> %cond) { 959; CHECK-LABEL: @ignore_scalable_undef( 960; CHECK-NEXT: [[S:%.*]] = select <vscale x 2 x i1> [[COND:%.*]], <vscale x 2 x i1> undef, <vscale x 2 x i1> insertelement (<vscale x 2 x i1> poison, i1 true, i32 0) 961; CHECK-NEXT: ret <vscale x 2 x i1> [[S]] 962; 963 %vec = insertelement <vscale x 2 x i1> poison, i1 true, i32 0 964 %s = select <vscale x 2 x i1> %cond, <vscale x 2 x i1> undef, <vscale x 2 x i1> %vec 965 ret <vscale x 2 x i1> %s 966} 967 968define i32 @poison(i32 %x, i32 %y) { 969; CHECK-LABEL: @poison( 970; CHECK-NEXT: ret i32 [[X:%.*]] 971; 972 %v = select i1 undef, i32 %x, i32 %y 973 ret i32 %v 974} 975 976define i32 @poison2(i1 %cond, i32 %x) { 977; CHECK-LABEL: @poison2( 978; CHECK-NEXT: ret i32 [[X:%.*]] 979; 980 %v = select i1 %cond, i32 poison, i32 %x 981 ret i32 %v 982} 983 984define i32 @poison3(i1 %cond, i32 %x) { 985; CHECK-LABEL: @poison3( 986; CHECK-NEXT: ret i32 [[X:%.*]] 987; 988 %v = select i1 %cond, i32 %x, i32 poison 989 ret i32 %v 990} 991 992define <2 x i32> @poison4(<2 x i1> %cond, <2 x i32> %x) { 993; CHECK-LABEL: @poison4( 994; CHECK-NEXT: ret <2 x i32> [[X:%.*]] 995; 996 %v = select <2 x i1> %cond, <2 x i32> %x, <2 x i32> poison 997 ret <2 x i32> %v 998} 999