1 //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the MipsAsmBackend class. 11 // 12 //===----------------------------------------------------------------------===// 13 // 14 15 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H 16 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H 17 18 #include "MCTargetDesc/MipsFixupKinds.h" 19 #include "llvm/ADT/Triple.h" 20 #include "llvm/MC/MCAsmBackend.h" 21 22 namespace llvm { 23 24 class MCAssembler; 25 struct MCFixupKindInfo; 26 class MCObjectWriter; 27 class MCRegisterInfo; 28 class MCSymbolELF; 29 class Target; 30 31 class MipsAsmBackend : public MCAsmBackend { 32 Triple TheTriple; 33 bool IsN32; 34 35 public: MipsAsmBackend(const Target & T,const MCRegisterInfo & MRI,const Triple & TT,StringRef CPU,bool N32)36 MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, 37 StringRef CPU, bool N32) 38 : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big), 39 TheTriple(TT), IsN32(N32) {} 40 41 std::unique_ptr<MCObjectTargetWriter> 42 createObjectTargetWriter() const override; 43 44 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 45 const MCValue &Target, MutableArrayRef<char> Data, 46 uint64_t Value, bool IsResolved, 47 const MCSubtargetInfo *STI) const override; 48 49 Optional<MCFixupKind> getFixupKind(StringRef Name) const override; 50 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override; 51 getNumFixupKinds()52 unsigned getNumFixupKinds() const override { 53 return Mips::NumTargetFixupKinds; 54 } 55 56 /// @name Target Relaxation Interfaces 57 /// @{ 58 59 /// MayNeedRelaxation - Check whether the given instruction may need 60 /// relaxation. 61 /// 62 /// \param Inst - The instruction to test. mayNeedRelaxation(const MCInst & Inst,const MCSubtargetInfo & STI)63 bool mayNeedRelaxation(const MCInst &Inst, 64 const MCSubtargetInfo &STI) const override { 65 return false; 66 } 67 68 /// fixupNeedsRelaxation - Target specific predicate for whether a given 69 /// fixup requires the associated instruction to be relaxed. fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout)70 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, 71 const MCRelaxableFragment *DF, 72 const MCAsmLayout &Layout) const override { 73 // FIXME. 74 llvm_unreachable("RelaxInstruction() unimplemented"); 75 return false; 76 } 77 78 /// RelaxInstruction - Relax the instruction in the given fragment 79 /// to the next wider instruction. 80 /// 81 /// \param Inst - The instruction to relax, which may be the same 82 /// as the output. 83 /// \param [out] Res On return, the relaxed instruction. relaxInstruction(const MCInst & Inst,const MCSubtargetInfo & STI,MCInst & Res)84 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, 85 MCInst &Res) const override {} 86 87 /// @} 88 89 bool writeNopData(raw_ostream &OS, uint64_t Count) const override; 90 91 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 92 const MCValue &Target) override; 93 94 bool isMicroMips(const MCSymbol *Sym) const override; 95 }; // class MipsAsmBackend 96 97 } // namespace 98 99 #endif 100