1; RUN: llc < %s -mtriple=armv8-linux-gnueabi -verify-machineinstrs \
2; RUN:     -asm-verbose=false | FileCheck %s
3
4%struct.uint16x4x2_t = type { <4 x i16>, <4 x i16> }
5%struct.uint16x4x3_t = type { <4 x i16>, <4 x i16>, <4 x i16> }
6%struct.uint16x4x4_t = type { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }
7
8%struct.uint32x2x2_t = type { <2 x i32>, <2 x i32> }
9%struct.uint32x2x3_t = type { <2 x i32>, <2 x i32>, <2 x i32> }
10%struct.uint32x2x4_t = type { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }
11
12%struct.uint64x1x2_t = type { <1 x i64>, <1 x i64> }
13%struct.uint64x1x3_t = type { <1 x i64>, <1 x i64>, <1 x i64> }
14%struct.uint64x1x4_t = type { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }
15
16%struct.uint8x8x2_t = type { <8 x i8>, <8 x i8> }
17%struct.uint8x8x3_t = type { <8 x i8>, <8 x i8>, <8 x i8> }
18%struct.uint8x8x4_t = type { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }
19
20%struct.uint16x8x2_t = type { <8 x i16>, <8 x i16> }
21%struct.uint16x8x3_t = type { <8 x i16>, <8 x i16>, <8 x i16> }
22%struct.uint16x8x4_t = type { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }
23
24%struct.uint32x4x2_t = type { <4 x i32>, <4 x i32> }
25%struct.uint32x4x3_t = type { <4 x i32>, <4 x i32>, <4 x i32> }
26%struct.uint32x4x4_t = type { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }
27
28%struct.uint64x2x2_t = type { <2 x i64>, <2 x i64> }
29%struct.uint64x2x3_t = type { <2 x i64>, <2 x i64>, <2 x i64> }
30%struct.uint64x2x4_t = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }
31
32%struct.uint8x16x2_t = type { <16 x i8>, <16 x i8> }
33%struct.uint8x16x3_t = type { <16 x i8>, <16 x i8>, <16 x i8> }
34%struct.uint8x16x4_t = type { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }
35
36declare %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0i16(i16*) nounwind readonly
37declare %struct.uint16x4x3_t @llvm.arm.neon.vld1x3.v4i16.p0i16(i16*) nounwind readonly
38declare %struct.uint16x4x4_t @llvm.arm.neon.vld1x4.v4i16.p0i16(i16*) nounwind readonly
39
40declare %struct.uint32x2x2_t @llvm.arm.neon.vld1x2.v2i32.p0i32(i32*) nounwind readonly
41declare %struct.uint32x2x3_t @llvm.arm.neon.vld1x3.v2i32.p0i32(i32*) nounwind readonly
42declare %struct.uint32x2x4_t @llvm.arm.neon.vld1x4.v2i32.p0i32(i32*) nounwind readonly
43
44declare %struct.uint64x1x2_t @llvm.arm.neon.vld1x2.v1i64.p0i64(i64*) nounwind readonly
45declare %struct.uint64x1x3_t @llvm.arm.neon.vld1x3.v1i64.p0i64(i64*) nounwind readonly
46declare %struct.uint64x1x4_t @llvm.arm.neon.vld1x4.v1i64.p0i64(i64*) nounwind readonly
47
48declare %struct.uint8x8x2_t @llvm.arm.neon.vld1x2.v8i8.p0i8(i8*) nounwind readonly
49declare %struct.uint8x8x3_t @llvm.arm.neon.vld1x3.v8i8.p0i8(i8*) nounwind readonly
50declare %struct.uint8x8x4_t @llvm.arm.neon.vld1x4.v8i8.p0i8(i8*) nounwind readonly
51
52declare %struct.uint16x8x2_t @llvm.arm.neon.vld1x2.v8i16.p0i16(i16*) nounwind readonly
53declare %struct.uint16x8x3_t @llvm.arm.neon.vld1x3.v8i16.p0i16(i16*) nounwind readonly
54declare %struct.uint16x8x4_t @llvm.arm.neon.vld1x4.v8i16.p0i16(i16*) nounwind readonly
55
56declare %struct.uint32x4x2_t @llvm.arm.neon.vld1x2.v4i32.p0i32(i32*) nounwind readonly
57declare %struct.uint32x4x3_t @llvm.arm.neon.vld1x3.v4i32.p0i32(i32*) nounwind readonly
58declare %struct.uint32x4x4_t @llvm.arm.neon.vld1x4.v4i32.p0i32(i32*) nounwind readonly
59
60declare %struct.uint64x2x2_t @llvm.arm.neon.vld1x2.v2i64.p0i64(i64*) nounwind readonly
61declare %struct.uint64x2x3_t @llvm.arm.neon.vld1x3.v2i64.p0i64(i64*) nounwind readonly
62declare %struct.uint64x2x4_t @llvm.arm.neon.vld1x4.v2i64.p0i64(i64*) nounwind readonly
63
64declare %struct.uint8x16x2_t @llvm.arm.neon.vld1x2.v16i8.p0i8(i8*) nounwind readonly
65declare %struct.uint8x16x3_t @llvm.arm.neon.vld1x3.v16i8.p0i8(i8*) nounwind readonly
66declare %struct.uint8x16x4_t @llvm.arm.neon.vld1x4.v16i8.p0i8(i8*) nounwind readonly
67
68; CHECK-LABEL: test_vld1_u16_x2
69; CHECK: vld1.16 {d16, d17}, [r0:64]
70define %struct.uint16x4x2_t @test_vld1_u16_x2(i16* %a) nounwind {
71  %tmp = tail call %struct.uint16x4x2_t @llvm.arm.neon.vld1x2.v4i16.p0i16(i16* %a)
72  ret %struct.uint16x4x2_t %tmp
73}
74
75; CHECK-LABEL: test_vld1_u16_x3
76; CHECK: vld1.16 {d16, d17, d18}, [r1:64]
77define %struct.uint16x4x3_t @test_vld1_u16_x3(i16* %a) nounwind {
78  %tmp = tail call %struct.uint16x4x3_t @llvm.arm.neon.vld1x3.v4i16.p0i16(i16* %a)
79  ret %struct.uint16x4x3_t %tmp
80}
81
82; CHECK-LABEL: test_vld1_u16_x4
83; CHECK: vld1.16 {d16, d17, d18, d19}, [r1:256]
84define %struct.uint16x4x4_t @test_vld1_u16_x4(i16* %a) nounwind {
85  %tmp = tail call %struct.uint16x4x4_t @llvm.arm.neon.vld1x4.v4i16.p0i16(i16* %a)
86  ret %struct.uint16x4x4_t %tmp
87}
88
89; CHECK-LABEL: test_vld1_u32_x2
90; CHECK: vld1.32 {d16, d17}, [r0:64]
91define %struct.uint32x2x2_t @test_vld1_u32_x2(i32* %a) nounwind {
92  %tmp = tail call %struct.uint32x2x2_t @llvm.arm.neon.vld1x2.v2i32.p0i32(i32* %a)
93  ret %struct.uint32x2x2_t %tmp
94}
95
96; CHECK-LABEL: test_vld1_u32_x3
97; CHECK: vld1.32 {d16, d17, d18}, [r1:64]
98define %struct.uint32x2x3_t @test_vld1_u32_x3(i32* %a) nounwind {
99  %tmp = tail call %struct.uint32x2x3_t @llvm.arm.neon.vld1x3.v2i32.p0i32(i32* %a)
100  ret %struct.uint32x2x3_t %tmp
101}
102
103; CHECK-LABEL: test_vld1_u32_x4
104; CHECK: vld1.32 {d16, d17, d18, d19}, [r1:256]
105define %struct.uint32x2x4_t @test_vld1_u32_x4(i32* %a) nounwind {
106  %tmp = tail call %struct.uint32x2x4_t @llvm.arm.neon.vld1x4.v2i32.p0i32(i32* %a)
107  ret %struct.uint32x2x4_t %tmp
108}
109
110; CHECK-LABEL: test_vld1_u64_x2
111; CHECK: vld1.64 {d16, d17}, [r0:64]
112define %struct.uint64x1x2_t @test_vld1_u64_x2(i64* %a) nounwind {
113  %tmp = tail call %struct.uint64x1x2_t @llvm.arm.neon.vld1x2.v1i64.p0i64(i64* %a)
114  ret %struct.uint64x1x2_t %tmp
115}
116
117; CHECK-LABEL: test_vld1_u64_x3
118; CHECK: vld1.64 {d16, d17, d18}, [r1:64]
119define %struct.uint64x1x3_t @test_vld1_u64_x3(i64* %a) nounwind {
120  %tmp = tail call %struct.uint64x1x3_t @llvm.arm.neon.vld1x3.v1i64.p0i64(i64* %a)
121  ret %struct.uint64x1x3_t %tmp
122}
123
124; CHECK-LABEL: test_vld1_u64_x4
125; CHECK: vld1.64 {d16, d17, d18, d19}, [r1:256]
126define %struct.uint64x1x4_t @test_vld1_u64_x4(i64* %a) nounwind {
127  %tmp = tail call %struct.uint64x1x4_t @llvm.arm.neon.vld1x4.v1i64.p0i64(i64* %a)
128  ret %struct.uint64x1x4_t %tmp
129}
130
131; CHECK-LABEL: test_vld1_u8_x2
132; CHECK: vld1.8 {d16, d17}, [r0:64]
133define %struct.uint8x8x2_t @test_vld1_u8_x2(i8* %a) nounwind {
134  %tmp = tail call %struct.uint8x8x2_t @llvm.arm.neon.vld1x2.v8i8.p0i8(i8* %a)
135  ret %struct.uint8x8x2_t %tmp
136}
137
138; CHECK-LABEL: test_vld1_u8_x3
139; CHECK: vld1.8 {d16, d17, d18}, [r1:64]
140define %struct.uint8x8x3_t @test_vld1_u8_x3(i8* %a) nounwind {
141  %tmp = tail call %struct.uint8x8x3_t @llvm.arm.neon.vld1x3.v8i8.p0i8(i8* %a)
142  ret %struct.uint8x8x3_t %tmp
143}
144
145; CHECK-LABEL: test_vld1_u8_x4
146; CHECK: vld1.8 {d16, d17, d18, d19}, [r1:256]
147define %struct.uint8x8x4_t @test_vld1_u8_x4(i8* %a) nounwind {
148  %tmp = tail call %struct.uint8x8x4_t @llvm.arm.neon.vld1x4.v8i8.p0i8(i8* %a)
149  ret %struct.uint8x8x4_t %tmp
150}
151
152; CHECK-LABEL: test_vld1q_u16_x2
153; CHECK: vld1.16 {d16, d17, d18, d19}, [r1:256]
154define %struct.uint16x8x2_t @test_vld1q_u16_x2(i16* %a) nounwind {
155  %tmp = tail call %struct.uint16x8x2_t @llvm.arm.neon.vld1x2.v8i16.p0i16(i16* %a)
156  ret %struct.uint16x8x2_t %tmp
157}
158
159; CHECK-LABEL: test_vld1q_u16_x3
160; CHECK: vld1.16 {d16, d17, d18}, [r1:64]!
161; CHECK: vld1.16 {d19, d20, d21}, [r1:64]
162define %struct.uint16x8x3_t @test_vld1q_u16_x3(i16* %a) nounwind {
163  %tmp = tail call %struct.uint16x8x3_t @llvm.arm.neon.vld1x3.v8i16.p0i16(i16* %a)
164  ret %struct.uint16x8x3_t %tmp
165}
166
167; CHECK-LABEL: test_vld1q_u16_x4
168; CHECK: vld1.16 {d16, d17, d18, d19}, [r1:256]!
169; CHECK: vld1.16 {d20, d21, d22, d23}, [r1:256]
170define %struct.uint16x8x4_t @test_vld1q_u16_x4(i16* %a) nounwind {
171  %tmp = tail call %struct.uint16x8x4_t @llvm.arm.neon.vld1x4.v8i16.p0i16(i16* %a)
172  ret %struct.uint16x8x4_t %tmp
173}
174
175; CHECK-LABEL: test_vld1q_u32_x2
176; CHECK: vld1.32 {d16, d17, d18, d19}, [r1:256]
177define %struct.uint32x4x2_t @test_vld1q_u32_x2(i32* %a) nounwind {
178  %tmp = tail call %struct.uint32x4x2_t @llvm.arm.neon.vld1x2.v4i32.p0i32(i32* %a)
179  ret %struct.uint32x4x2_t %tmp
180}
181
182; CHECK-LABEL: test_vld1q_u32_x3
183; CHECK: vld1.32 {d16, d17, d18}, [r1:64]!
184; CHECK: vld1.32 {d19, d20, d21}, [r1:64]
185define %struct.uint32x4x3_t @test_vld1q_u32_x3(i32* %a) nounwind {
186  %tmp = tail call %struct.uint32x4x3_t @llvm.arm.neon.vld1x3.v4i32.p0i32(i32* %a)
187  ret %struct.uint32x4x3_t %tmp
188}
189
190; CHECK-LABEL: test_vld1q_u32_x4
191; CHECK: vld1.32 {d16, d17, d18, d19}, [r1:256]!
192; CHECK: vld1.32 {d20, d21, d22, d23}, [r1:256]
193define %struct.uint32x4x4_t @test_vld1q_u32_x4(i32* %a) nounwind {
194  %tmp = tail call %struct.uint32x4x4_t @llvm.arm.neon.vld1x4.v4i32.p0i32(i32* %a)
195  ret %struct.uint32x4x4_t %tmp
196}
197
198; CHECK-LABEL: test_vld1q_u64_x2
199; CHECK: vld1.64 {d16, d17, d18, d19}, [r1:256]
200define %struct.uint64x2x2_t @test_vld1q_u64_x2(i64* %a) nounwind {
201  %tmp = tail call %struct.uint64x2x2_t @llvm.arm.neon.vld1x2.v2i64.p0i64(i64* %a)
202  ret %struct.uint64x2x2_t %tmp
203}
204
205; CHECK-LABEL: test_vld1q_u64_x3
206; CHECK: vld1.64 {d16, d17, d18}, [r1:64]!
207; CHECK: vld1.64 {d19, d20, d21}, [r1:64]
208define %struct.uint64x2x3_t @test_vld1q_u64_x3(i64* %a) nounwind {
209  %tmp = tail call %struct.uint64x2x3_t @llvm.arm.neon.vld1x3.v2i64.p0i64(i64* %a)
210  ret %struct.uint64x2x3_t %tmp
211}
212
213; CHECK-LABEL: test_vld1q_u64_x4
214; CHECK: vld1.64 {d16, d17, d18, d19}, [r1:256]!
215; CHECK: vld1.64 {d20, d21, d22, d23}, [r1:256]
216define %struct.uint64x2x4_t @test_vld1q_u64_x4(i64* %a) nounwind {
217  %tmp = tail call %struct.uint64x2x4_t @llvm.arm.neon.vld1x4.v2i64.p0i64(i64* %a)
218  ret %struct.uint64x2x4_t %tmp
219}
220
221; CHECK-LABEL: test_vld1q_u8_x2
222; CHECK: vld1.8 {d16, d17, d18, d19}, [r1:256]
223define %struct.uint8x16x2_t @test_vld1q_u8_x2(i8* %a) nounwind {
224  %tmp = tail call %struct.uint8x16x2_t @llvm.arm.neon.vld1x2.v16i8.p0i8(i8* %a)
225  ret %struct.uint8x16x2_t %tmp
226}
227
228; CHECK-LABEL: test_vld1q_u8_x3
229; CHECK: vld1.8 {d16, d17, d18}, [r1:64]!
230; CHECK: vld1.8 {d19, d20, d21}, [r1:64]
231define %struct.uint8x16x3_t @test_vld1q_u8_x3(i8* %a) nounwind {
232  %tmp = tail call %struct.uint8x16x3_t @llvm.arm.neon.vld1x3.v16i8.p0i8(i8* %a)
233  ret %struct.uint8x16x3_t %tmp
234}
235
236; CHECK-LABEL: test_vld1q_u8_x4
237; CHECK: vld1.8 {d16, d17, d18, d19}, [r1:256]!
238; CHECK: vld1.8 {d20, d21, d22, d23}, [r1:256]
239define %struct.uint8x16x4_t @test_vld1q_u8_x4(i8* %a) nounwind {
240  %tmp = tail call %struct.uint8x16x4_t @llvm.arm.neon.vld1x4.v16i8.p0i8(i8* %a)
241  ret %struct.uint8x16x4_t %tmp
242}
243