1; RUN: llc < %s -mtriple=armv7-apple-darwin -mcpu=cortex-a8 | FileCheck %s
2; Check if the f32 load / store pair are optimized to i32 load / store.
3; rdar://8944252
4
5define void @t(i32 %width, float* nocapture %src, float* nocapture %dst, i32 %index) nounwind {
6; CHECK-LABEL: t:
7entry:
8  %src6 = bitcast float* %src to i8*
9  %0 = icmp eq i32 %width, 0
10  br i1 %0, label %return, label %bb
11
12bb:
13; CHECK: ldr [[REGISTER:(r[0-9]+)]], [{{r[0-9]+}}], {{r[0-9]+}}
14; CHECK: str [[REGISTER]], [{{r[0-9]+}}], #4
15  %j.05 = phi i32 [ %2, %bb ], [ 0, %entry ]
16  %tmp = mul i32 %j.05, %index
17  %uglygep = getelementptr i8, i8* %src6, i32 %tmp
18  %src_addr.04 = bitcast i8* %uglygep to float*
19  %dst_addr.03 = getelementptr float, float* %dst, i32 %j.05
20  %1 = load float, float* %src_addr.04, align 4
21  store float %1, float* %dst_addr.03, align 4
22  %2 = add i32 %j.05, 1
23  %exitcond = icmp eq i32 %2, %width
24  br i1 %exitcond, label %return, label %bb
25
26return:
27  ret void
28}
29