1; RUN: llc -mtriple=arm-eabi %s -o - | FileCheck %s
2; Should use scaled addressing mode.
3
4; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a53 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF
5; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a57 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF
6; RUN: llc -mtriple=arm-eabi -mcpu=cortex-r52 %s -o - | FileCheck %s -check-prefix CHECK-NONEGOFF
7; Should not generate negated register offset
8
9define void @sintzero(i32* %a) nounwind {
10entry:
11	store i32 0, i32* %a
12	br label %cond_next
13
14cond_next:		; preds = %cond_next, %entry
15	%indvar = phi i32 [ 0, %entry ], [ %tmp25, %cond_next ]		; <i32> [#uses=1]
16	%tmp25 = add i32 %indvar, 1		; <i32> [#uses=3]
17	%tmp36 = getelementptr i32, i32* %a, i32 %tmp25		; <i32*> [#uses=1]
18	store i32 0, i32* %tmp36
19	icmp eq i32 %tmp25, -1		; <i1>:0 [#uses=1]
20	br i1 %0, label %return, label %cond_next
21
22return:		; preds = %cond_next
23	ret void
24}
25
26; CHECK: lsl{{.*}}#2]
27; CHECK-NONEGOFF: [{{r[0-9]+}}, {{r[0-9]+}}, lsl{{.*}}#2]
28
29