1; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=cortex-r52 | FileCheck %s --check-prefix=CHECK --check-prefix=USEAA 2; RUN: llc < %s -mtriple=armv8r-eabi -mcpu=generic | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC 3 4; Check we use AA during codegen, so can interleave these loads/stores. 5 6; CHECK-LABEL: test 7; GENERIC: ldr 8; GENERIC: str 9; GENERIC: ldr 10; GENERIC: str 11; USEAA: ldr 12; USEAA: ldr 13; USEAA: str 14; USEAA: str 15 16define void @test(i32* nocapture %a, i32* noalias nocapture %b) { 17entry: 18 %0 = load i32, i32* %a, align 4 19 %add = add nsw i32 %0, 10 20 store i32 %add, i32* %a, align 4 21 %1 = load i32, i32* %b, align 4 22 %add2 = add nsw i32 %1, 20 23 store i32 %add2, i32* %b, align 4 24 ret void 25} 26 27