1 /*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===
2 *
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
9 *
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19 * THE SOFTWARE.
20 *
21 *===-----------------------------------------------------------------------===
22 */
23
24 #ifndef __EMMINTRIN_H
25 #define __EMMINTRIN_H
26
27 #include <xmmintrin.h>
28
29 typedef double __m128d __attribute__((__vector_size__(16)));
30 typedef long long __m128i __attribute__((__vector_size__(16)));
31
32 /* Type defines. */
33 typedef double __v2df __attribute__ ((__vector_size__ (16)));
34 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
35 typedef short __v8hi __attribute__((__vector_size__(16)));
36 typedef char __v16qi __attribute__((__vector_size__(16)));
37
38 /* Unsigned types */
39 typedef unsigned long long __v2du __attribute__ ((__vector_size__ (16)));
40 typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
41 typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
42
43 /* We need an explicitly signed variant for char. Note that this shouldn't
44 * appear in the interface though. */
45 typedef signed char __v16qs __attribute__((__vector_size__(16)));
46
47 /* Define the default attributes for the functions in this file. */
48 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2"), __min_vector_width__(128)))
49 #define __DEFAULT_FN_ATTRS_MMX __attribute__((__always_inline__, __nodebug__, __target__("mmx,sse2"), __min_vector_width__(64)))
50
51 /// Adds lower double-precision values in both operands and returns the
52 /// sum in the lower 64 bits of the result. The upper 64 bits of the result
53 /// are copied from the upper double-precision value of the first operand.
54 ///
55 /// \headerfile <x86intrin.h>
56 ///
57 /// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.
58 ///
59 /// \param __a
60 /// A 128-bit vector of [2 x double] containing one of the source operands.
61 /// \param __b
62 /// A 128-bit vector of [2 x double] containing one of the source operands.
63 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
64 /// sum of the lower 64 bits of both operands. The upper 64 bits are copied
65 /// from the upper 64 bits of the first source operand.
66 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_add_sd(__m128d __a,__m128d __b)67 _mm_add_sd(__m128d __a, __m128d __b)
68 {
69 __a[0] += __b[0];
70 return __a;
71 }
72
73 /// Adds two 128-bit vectors of [2 x double].
74 ///
75 /// \headerfile <x86intrin.h>
76 ///
77 /// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.
78 ///
79 /// \param __a
80 /// A 128-bit vector of [2 x double] containing one of the source operands.
81 /// \param __b
82 /// A 128-bit vector of [2 x double] containing one of the source operands.
83 /// \returns A 128-bit vector of [2 x double] containing the sums of both
84 /// operands.
85 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_add_pd(__m128d __a,__m128d __b)86 _mm_add_pd(__m128d __a, __m128d __b)
87 {
88 return (__m128d)((__v2df)__a + (__v2df)__b);
89 }
90
91 /// Subtracts the lower double-precision value of the second operand
92 /// from the lower double-precision value of the first operand and returns
93 /// the difference in the lower 64 bits of the result. The upper 64 bits of
94 /// the result are copied from the upper double-precision value of the first
95 /// operand.
96 ///
97 /// \headerfile <x86intrin.h>
98 ///
99 /// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.
100 ///
101 /// \param __a
102 /// A 128-bit vector of [2 x double] containing the minuend.
103 /// \param __b
104 /// A 128-bit vector of [2 x double] containing the subtrahend.
105 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
106 /// difference of the lower 64 bits of both operands. The upper 64 bits are
107 /// copied from the upper 64 bits of the first source operand.
108 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_sub_sd(__m128d __a,__m128d __b)109 _mm_sub_sd(__m128d __a, __m128d __b)
110 {
111 __a[0] -= __b[0];
112 return __a;
113 }
114
115 /// Subtracts two 128-bit vectors of [2 x double].
116 ///
117 /// \headerfile <x86intrin.h>
118 ///
119 /// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.
120 ///
121 /// \param __a
122 /// A 128-bit vector of [2 x double] containing the minuend.
123 /// \param __b
124 /// A 128-bit vector of [2 x double] containing the subtrahend.
125 /// \returns A 128-bit vector of [2 x double] containing the differences between
126 /// both operands.
127 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_sub_pd(__m128d __a,__m128d __b)128 _mm_sub_pd(__m128d __a, __m128d __b)
129 {
130 return (__m128d)((__v2df)__a - (__v2df)__b);
131 }
132
133 /// Multiplies lower double-precision values in both operands and returns
134 /// the product in the lower 64 bits of the result. The upper 64 bits of the
135 /// result are copied from the upper double-precision value of the first
136 /// operand.
137 ///
138 /// \headerfile <x86intrin.h>
139 ///
140 /// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.
141 ///
142 /// \param __a
143 /// A 128-bit vector of [2 x double] containing one of the source operands.
144 /// \param __b
145 /// A 128-bit vector of [2 x double] containing one of the source operands.
146 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
147 /// product of the lower 64 bits of both operands. The upper 64 bits are
148 /// copied from the upper 64 bits of the first source operand.
149 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mul_sd(__m128d __a,__m128d __b)150 _mm_mul_sd(__m128d __a, __m128d __b)
151 {
152 __a[0] *= __b[0];
153 return __a;
154 }
155
156 /// Multiplies two 128-bit vectors of [2 x double].
157 ///
158 /// \headerfile <x86intrin.h>
159 ///
160 /// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.
161 ///
162 /// \param __a
163 /// A 128-bit vector of [2 x double] containing one of the operands.
164 /// \param __b
165 /// A 128-bit vector of [2 x double] containing one of the operands.
166 /// \returns A 128-bit vector of [2 x double] containing the products of both
167 /// operands.
168 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_mul_pd(__m128d __a,__m128d __b)169 _mm_mul_pd(__m128d __a, __m128d __b)
170 {
171 return (__m128d)((__v2df)__a * (__v2df)__b);
172 }
173
174 /// Divides the lower double-precision value of the first operand by the
175 /// lower double-precision value of the second operand and returns the
176 /// quotient in the lower 64 bits of the result. The upper 64 bits of the
177 /// result are copied from the upper double-precision value of the first
178 /// operand.
179 ///
180 /// \headerfile <x86intrin.h>
181 ///
182 /// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.
183 ///
184 /// \param __a
185 /// A 128-bit vector of [2 x double] containing the dividend.
186 /// \param __b
187 /// A 128-bit vector of [2 x double] containing divisor.
188 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
189 /// quotient of the lower 64 bits of both operands. The upper 64 bits are
190 /// copied from the upper 64 bits of the first source operand.
191 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_div_sd(__m128d __a,__m128d __b)192 _mm_div_sd(__m128d __a, __m128d __b)
193 {
194 __a[0] /= __b[0];
195 return __a;
196 }
197
198 /// Performs an element-by-element division of two 128-bit vectors of
199 /// [2 x double].
200 ///
201 /// \headerfile <x86intrin.h>
202 ///
203 /// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.
204 ///
205 /// \param __a
206 /// A 128-bit vector of [2 x double] containing the dividend.
207 /// \param __b
208 /// A 128-bit vector of [2 x double] containing the divisor.
209 /// \returns A 128-bit vector of [2 x double] containing the quotients of both
210 /// operands.
211 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_div_pd(__m128d __a,__m128d __b)212 _mm_div_pd(__m128d __a, __m128d __b)
213 {
214 return (__m128d)((__v2df)__a / (__v2df)__b);
215 }
216
217 /// Calculates the square root of the lower double-precision value of
218 /// the second operand and returns it in the lower 64 bits of the result.
219 /// The upper 64 bits of the result are copied from the upper
220 /// double-precision value of the first operand.
221 ///
222 /// \headerfile <x86intrin.h>
223 ///
224 /// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.
225 ///
226 /// \param __a
227 /// A 128-bit vector of [2 x double] containing one of the operands. The
228 /// upper 64 bits of this operand are copied to the upper 64 bits of the
229 /// result.
230 /// \param __b
231 /// A 128-bit vector of [2 x double] containing one of the operands. The
232 /// square root is calculated using the lower 64 bits of this operand.
233 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
234 /// square root of the lower 64 bits of operand \a __b, and whose upper 64
235 /// bits are copied from the upper 64 bits of operand \a __a.
236 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_sqrt_sd(__m128d __a,__m128d __b)237 _mm_sqrt_sd(__m128d __a, __m128d __b)
238 {
239 __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
240 return __extension__ (__m128d) { __c[0], __a[1] };
241 }
242
243 /// Calculates the square root of the each of two values stored in a
244 /// 128-bit vector of [2 x double].
245 ///
246 /// \headerfile <x86intrin.h>
247 ///
248 /// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.
249 ///
250 /// \param __a
251 /// A 128-bit vector of [2 x double].
252 /// \returns A 128-bit vector of [2 x double] containing the square roots of the
253 /// values in the operand.
254 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_sqrt_pd(__m128d __a)255 _mm_sqrt_pd(__m128d __a)
256 {
257 return __builtin_ia32_sqrtpd((__v2df)__a);
258 }
259
260 /// Compares lower 64-bit double-precision values of both operands, and
261 /// returns the lesser of the pair of values in the lower 64-bits of the
262 /// result. The upper 64 bits of the result are copied from the upper
263 /// double-precision value of the first operand.
264 ///
265 /// \headerfile <x86intrin.h>
266 ///
267 /// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.
268 ///
269 /// \param __a
270 /// A 128-bit vector of [2 x double] containing one of the operands. The
271 /// lower 64 bits of this operand are used in the comparison.
272 /// \param __b
273 /// A 128-bit vector of [2 x double] containing one of the operands. The
274 /// lower 64 bits of this operand are used in the comparison.
275 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
276 /// minimum value between both operands. The upper 64 bits are copied from
277 /// the upper 64 bits of the first source operand.
278 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_min_sd(__m128d __a,__m128d __b)279 _mm_min_sd(__m128d __a, __m128d __b)
280 {
281 return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
282 }
283
284 /// Performs element-by-element comparison of the two 128-bit vectors of
285 /// [2 x double] and returns the vector containing the lesser of each pair of
286 /// values.
287 ///
288 /// \headerfile <x86intrin.h>
289 ///
290 /// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.
291 ///
292 /// \param __a
293 /// A 128-bit vector of [2 x double] containing one of the operands.
294 /// \param __b
295 /// A 128-bit vector of [2 x double] containing one of the operands.
296 /// \returns A 128-bit vector of [2 x double] containing the minimum values
297 /// between both operands.
298 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_min_pd(__m128d __a,__m128d __b)299 _mm_min_pd(__m128d __a, __m128d __b)
300 {
301 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
302 }
303
304 /// Compares lower 64-bit double-precision values of both operands, and
305 /// returns the greater of the pair of values in the lower 64-bits of the
306 /// result. The upper 64 bits of the result are copied from the upper
307 /// double-precision value of the first operand.
308 ///
309 /// \headerfile <x86intrin.h>
310 ///
311 /// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.
312 ///
313 /// \param __a
314 /// A 128-bit vector of [2 x double] containing one of the operands. The
315 /// lower 64 bits of this operand are used in the comparison.
316 /// \param __b
317 /// A 128-bit vector of [2 x double] containing one of the operands. The
318 /// lower 64 bits of this operand are used in the comparison.
319 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
320 /// maximum value between both operands. The upper 64 bits are copied from
321 /// the upper 64 bits of the first source operand.
322 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_max_sd(__m128d __a,__m128d __b)323 _mm_max_sd(__m128d __a, __m128d __b)
324 {
325 return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
326 }
327
328 /// Performs element-by-element comparison of the two 128-bit vectors of
329 /// [2 x double] and returns the vector containing the greater of each pair
330 /// of values.
331 ///
332 /// \headerfile <x86intrin.h>
333 ///
334 /// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.
335 ///
336 /// \param __a
337 /// A 128-bit vector of [2 x double] containing one of the operands.
338 /// \param __b
339 /// A 128-bit vector of [2 x double] containing one of the operands.
340 /// \returns A 128-bit vector of [2 x double] containing the maximum values
341 /// between both operands.
342 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_max_pd(__m128d __a,__m128d __b)343 _mm_max_pd(__m128d __a, __m128d __b)
344 {
345 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
346 }
347
348 /// Performs a bitwise AND of two 128-bit vectors of [2 x double].
349 ///
350 /// \headerfile <x86intrin.h>
351 ///
352 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
353 ///
354 /// \param __a
355 /// A 128-bit vector of [2 x double] containing one of the source operands.
356 /// \param __b
357 /// A 128-bit vector of [2 x double] containing one of the source operands.
358 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
359 /// values between both operands.
360 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_and_pd(__m128d __a,__m128d __b)361 _mm_and_pd(__m128d __a, __m128d __b)
362 {
363 return (__m128d)((__v2du)__a & (__v2du)__b);
364 }
365
366 /// Performs a bitwise AND of two 128-bit vectors of [2 x double], using
367 /// the one's complement of the values contained in the first source operand.
368 ///
369 /// \headerfile <x86intrin.h>
370 ///
371 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
372 ///
373 /// \param __a
374 /// A 128-bit vector of [2 x double] containing the left source operand. The
375 /// one's complement of this value is used in the bitwise AND.
376 /// \param __b
377 /// A 128-bit vector of [2 x double] containing the right source operand.
378 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
379 /// values in the second operand and the one's complement of the first
380 /// operand.
381 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_andnot_pd(__m128d __a,__m128d __b)382 _mm_andnot_pd(__m128d __a, __m128d __b)
383 {
384 return (__m128d)(~(__v2du)__a & (__v2du)__b);
385 }
386
387 /// Performs a bitwise OR of two 128-bit vectors of [2 x double].
388 ///
389 /// \headerfile <x86intrin.h>
390 ///
391 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
392 ///
393 /// \param __a
394 /// A 128-bit vector of [2 x double] containing one of the source operands.
395 /// \param __b
396 /// A 128-bit vector of [2 x double] containing one of the source operands.
397 /// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
398 /// values between both operands.
399 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_or_pd(__m128d __a,__m128d __b)400 _mm_or_pd(__m128d __a, __m128d __b)
401 {
402 return (__m128d)((__v2du)__a | (__v2du)__b);
403 }
404
405 /// Performs a bitwise XOR of two 128-bit vectors of [2 x double].
406 ///
407 /// \headerfile <x86intrin.h>
408 ///
409 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
410 ///
411 /// \param __a
412 /// A 128-bit vector of [2 x double] containing one of the source operands.
413 /// \param __b
414 /// A 128-bit vector of [2 x double] containing one of the source operands.
415 /// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
416 /// values between both operands.
417 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_xor_pd(__m128d __a,__m128d __b)418 _mm_xor_pd(__m128d __a, __m128d __b)
419 {
420 return (__m128d)((__v2du)__a ^ (__v2du)__b);
421 }
422
423 /// Compares each of the corresponding double-precision values of the
424 /// 128-bit vectors of [2 x double] for equality. Each comparison yields 0x0
425 /// for false, 0xFFFFFFFFFFFFFFFF for true.
426 ///
427 /// \headerfile <x86intrin.h>
428 ///
429 /// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.
430 ///
431 /// \param __a
432 /// A 128-bit vector of [2 x double].
433 /// \param __b
434 /// A 128-bit vector of [2 x double].
435 /// \returns A 128-bit vector containing the comparison results.
436 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpeq_pd(__m128d __a,__m128d __b)437 _mm_cmpeq_pd(__m128d __a, __m128d __b)
438 {
439 return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
440 }
441
442 /// Compares each of the corresponding double-precision values of the
443 /// 128-bit vectors of [2 x double] to determine if the values in the first
444 /// operand are less than those in the second operand. Each comparison
445 /// yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
446 ///
447 /// \headerfile <x86intrin.h>
448 ///
449 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
450 ///
451 /// \param __a
452 /// A 128-bit vector of [2 x double].
453 /// \param __b
454 /// A 128-bit vector of [2 x double].
455 /// \returns A 128-bit vector containing the comparison results.
456 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmplt_pd(__m128d __a,__m128d __b)457 _mm_cmplt_pd(__m128d __a, __m128d __b)
458 {
459 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
460 }
461
462 /// Compares each of the corresponding double-precision values of the
463 /// 128-bit vectors of [2 x double] to determine if the values in the first
464 /// operand are less than or equal to those in the second operand.
465 ///
466 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
467 ///
468 /// \headerfile <x86intrin.h>
469 ///
470 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
471 ///
472 /// \param __a
473 /// A 128-bit vector of [2 x double].
474 /// \param __b
475 /// A 128-bit vector of [2 x double].
476 /// \returns A 128-bit vector containing the comparison results.
477 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmple_pd(__m128d __a,__m128d __b)478 _mm_cmple_pd(__m128d __a, __m128d __b)
479 {
480 return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
481 }
482
483 /// Compares each of the corresponding double-precision values of the
484 /// 128-bit vectors of [2 x double] to determine if the values in the first
485 /// operand are greater than those in the second operand.
486 ///
487 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
488 ///
489 /// \headerfile <x86intrin.h>
490 ///
491 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
492 ///
493 /// \param __a
494 /// A 128-bit vector of [2 x double].
495 /// \param __b
496 /// A 128-bit vector of [2 x double].
497 /// \returns A 128-bit vector containing the comparison results.
498 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpgt_pd(__m128d __a,__m128d __b)499 _mm_cmpgt_pd(__m128d __a, __m128d __b)
500 {
501 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
502 }
503
504 /// Compares each of the corresponding double-precision values of the
505 /// 128-bit vectors of [2 x double] to determine if the values in the first
506 /// operand are greater than or equal to those in the second operand.
507 ///
508 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
509 ///
510 /// \headerfile <x86intrin.h>
511 ///
512 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
513 ///
514 /// \param __a
515 /// A 128-bit vector of [2 x double].
516 /// \param __b
517 /// A 128-bit vector of [2 x double].
518 /// \returns A 128-bit vector containing the comparison results.
519 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpge_pd(__m128d __a,__m128d __b)520 _mm_cmpge_pd(__m128d __a, __m128d __b)
521 {
522 return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
523 }
524
525 /// Compares each of the corresponding double-precision values of the
526 /// 128-bit vectors of [2 x double] to determine if the values in the first
527 /// operand are ordered with respect to those in the second operand.
528 ///
529 /// A pair of double-precision values are "ordered" with respect to each
530 /// other if neither value is a NaN. Each comparison yields 0x0 for false,
531 /// 0xFFFFFFFFFFFFFFFF for true.
532 ///
533 /// \headerfile <x86intrin.h>
534 ///
535 /// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.
536 ///
537 /// \param __a
538 /// A 128-bit vector of [2 x double].
539 /// \param __b
540 /// A 128-bit vector of [2 x double].
541 /// \returns A 128-bit vector containing the comparison results.
542 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpord_pd(__m128d __a,__m128d __b)543 _mm_cmpord_pd(__m128d __a, __m128d __b)
544 {
545 return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
546 }
547
548 /// Compares each of the corresponding double-precision values of the
549 /// 128-bit vectors of [2 x double] to determine if the values in the first
550 /// operand are unordered with respect to those in the second operand.
551 ///
552 /// A pair of double-precision values are "unordered" with respect to each
553 /// other if one or both values are NaN. Each comparison yields 0x0 for
554 /// false, 0xFFFFFFFFFFFFFFFF for true.
555 ///
556 /// \headerfile <x86intrin.h>
557 ///
558 /// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c>
559 /// instruction.
560 ///
561 /// \param __a
562 /// A 128-bit vector of [2 x double].
563 /// \param __b
564 /// A 128-bit vector of [2 x double].
565 /// \returns A 128-bit vector containing the comparison results.
566 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpunord_pd(__m128d __a,__m128d __b)567 _mm_cmpunord_pd(__m128d __a, __m128d __b)
568 {
569 return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
570 }
571
572 /// Compares each of the corresponding double-precision values of the
573 /// 128-bit vectors of [2 x double] to determine if the values in the first
574 /// operand are unequal to those in the second operand.
575 ///
576 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
577 ///
578 /// \headerfile <x86intrin.h>
579 ///
580 /// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.
581 ///
582 /// \param __a
583 /// A 128-bit vector of [2 x double].
584 /// \param __b
585 /// A 128-bit vector of [2 x double].
586 /// \returns A 128-bit vector containing the comparison results.
587 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpneq_pd(__m128d __a,__m128d __b)588 _mm_cmpneq_pd(__m128d __a, __m128d __b)
589 {
590 return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
591 }
592
593 /// Compares each of the corresponding double-precision values of the
594 /// 128-bit vectors of [2 x double] to determine if the values in the first
595 /// operand are not less than those in the second operand.
596 ///
597 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
598 ///
599 /// \headerfile <x86intrin.h>
600 ///
601 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
602 ///
603 /// \param __a
604 /// A 128-bit vector of [2 x double].
605 /// \param __b
606 /// A 128-bit vector of [2 x double].
607 /// \returns A 128-bit vector containing the comparison results.
608 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpnlt_pd(__m128d __a,__m128d __b)609 _mm_cmpnlt_pd(__m128d __a, __m128d __b)
610 {
611 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
612 }
613
614 /// Compares each of the corresponding double-precision values of the
615 /// 128-bit vectors of [2 x double] to determine if the values in the first
616 /// operand are not less than or equal to those in the second operand.
617 ///
618 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
619 ///
620 /// \headerfile <x86intrin.h>
621 ///
622 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
623 ///
624 /// \param __a
625 /// A 128-bit vector of [2 x double].
626 /// \param __b
627 /// A 128-bit vector of [2 x double].
628 /// \returns A 128-bit vector containing the comparison results.
629 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpnle_pd(__m128d __a,__m128d __b)630 _mm_cmpnle_pd(__m128d __a, __m128d __b)
631 {
632 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
633 }
634
635 /// Compares each of the corresponding double-precision values of the
636 /// 128-bit vectors of [2 x double] to determine if the values in the first
637 /// operand are not greater than those in the second operand.
638 ///
639 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
640 ///
641 /// \headerfile <x86intrin.h>
642 ///
643 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
644 ///
645 /// \param __a
646 /// A 128-bit vector of [2 x double].
647 /// \param __b
648 /// A 128-bit vector of [2 x double].
649 /// \returns A 128-bit vector containing the comparison results.
650 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpngt_pd(__m128d __a,__m128d __b)651 _mm_cmpngt_pd(__m128d __a, __m128d __b)
652 {
653 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
654 }
655
656 /// Compares each of the corresponding double-precision values of the
657 /// 128-bit vectors of [2 x double] to determine if the values in the first
658 /// operand are not greater than or equal to those in the second operand.
659 ///
660 /// Each comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
661 ///
662 /// \headerfile <x86intrin.h>
663 ///
664 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
665 ///
666 /// \param __a
667 /// A 128-bit vector of [2 x double].
668 /// \param __b
669 /// A 128-bit vector of [2 x double].
670 /// \returns A 128-bit vector containing the comparison results.
671 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpnge_pd(__m128d __a,__m128d __b)672 _mm_cmpnge_pd(__m128d __a, __m128d __b)
673 {
674 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
675 }
676
677 /// Compares the lower double-precision floating-point values in each of
678 /// the two 128-bit floating-point vectors of [2 x double] for equality.
679 ///
680 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
681 ///
682 /// \headerfile <x86intrin.h>
683 ///
684 /// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.
685 ///
686 /// \param __a
687 /// A 128-bit vector of [2 x double]. The lower double-precision value is
688 /// compared to the lower double-precision value of \a __b.
689 /// \param __b
690 /// A 128-bit vector of [2 x double]. The lower double-precision value is
691 /// compared to the lower double-precision value of \a __a.
692 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
693 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
694 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpeq_sd(__m128d __a,__m128d __b)695 _mm_cmpeq_sd(__m128d __a, __m128d __b)
696 {
697 return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
698 }
699
700 /// Compares the lower double-precision floating-point values in each of
701 /// the two 128-bit floating-point vectors of [2 x double] to determine if
702 /// the value in the first parameter is less than the corresponding value in
703 /// the second parameter.
704 ///
705 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
706 ///
707 /// \headerfile <x86intrin.h>
708 ///
709 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
710 ///
711 /// \param __a
712 /// A 128-bit vector of [2 x double]. The lower double-precision value is
713 /// compared to the lower double-precision value of \a __b.
714 /// \param __b
715 /// A 128-bit vector of [2 x double]. The lower double-precision value is
716 /// compared to the lower double-precision value of \a __a.
717 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
718 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
719 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmplt_sd(__m128d __a,__m128d __b)720 _mm_cmplt_sd(__m128d __a, __m128d __b)
721 {
722 return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
723 }
724
725 /// Compares the lower double-precision floating-point values in each of
726 /// the two 128-bit floating-point vectors of [2 x double] to determine if
727 /// the value in the first parameter is less than or equal to the
728 /// corresponding value in the second parameter.
729 ///
730 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
731 ///
732 /// \headerfile <x86intrin.h>
733 ///
734 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
735 ///
736 /// \param __a
737 /// A 128-bit vector of [2 x double]. The lower double-precision value is
738 /// compared to the lower double-precision value of \a __b.
739 /// \param __b
740 /// A 128-bit vector of [2 x double]. The lower double-precision value is
741 /// compared to the lower double-precision value of \a __a.
742 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
743 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
744 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmple_sd(__m128d __a,__m128d __b)745 _mm_cmple_sd(__m128d __a, __m128d __b)
746 {
747 return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
748 }
749
750 /// Compares the lower double-precision floating-point values in each of
751 /// the two 128-bit floating-point vectors of [2 x double] to determine if
752 /// the value in the first parameter is greater than the corresponding value
753 /// in the second parameter.
754 ///
755 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
756 ///
757 /// \headerfile <x86intrin.h>
758 ///
759 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
760 ///
761 /// \param __a
762 /// A 128-bit vector of [2 x double]. The lower double-precision value is
763 /// compared to the lower double-precision value of \a __b.
764 /// \param __b
765 /// A 128-bit vector of [2 x double]. The lower double-precision value is
766 /// compared to the lower double-precision value of \a __a.
767 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
768 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
769 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpgt_sd(__m128d __a,__m128d __b)770 _mm_cmpgt_sd(__m128d __a, __m128d __b)
771 {
772 __m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
773 return __extension__ (__m128d) { __c[0], __a[1] };
774 }
775
776 /// Compares the lower double-precision floating-point values in each of
777 /// the two 128-bit floating-point vectors of [2 x double] to determine if
778 /// the value in the first parameter is greater than or equal to the
779 /// corresponding value in the second parameter.
780 ///
781 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
782 ///
783 /// \headerfile <x86intrin.h>
784 ///
785 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
786 ///
787 /// \param __a
788 /// A 128-bit vector of [2 x double]. The lower double-precision value is
789 /// compared to the lower double-precision value of \a __b.
790 /// \param __b
791 /// A 128-bit vector of [2 x double]. The lower double-precision value is
792 /// compared to the lower double-precision value of \a __a.
793 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
794 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
795 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpge_sd(__m128d __a,__m128d __b)796 _mm_cmpge_sd(__m128d __a, __m128d __b)
797 {
798 __m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
799 return __extension__ (__m128d) { __c[0], __a[1] };
800 }
801
802 /// Compares the lower double-precision floating-point values in each of
803 /// the two 128-bit floating-point vectors of [2 x double] to determine if
804 /// the value in the first parameter is "ordered" with respect to the
805 /// corresponding value in the second parameter.
806 ///
807 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair
808 /// of double-precision values are "ordered" with respect to each other if
809 /// neither value is a NaN.
810 ///
811 /// \headerfile <x86intrin.h>
812 ///
813 /// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.
814 ///
815 /// \param __a
816 /// A 128-bit vector of [2 x double]. The lower double-precision value is
817 /// compared to the lower double-precision value of \a __b.
818 /// \param __b
819 /// A 128-bit vector of [2 x double]. The lower double-precision value is
820 /// compared to the lower double-precision value of \a __a.
821 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
822 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
823 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpord_sd(__m128d __a,__m128d __b)824 _mm_cmpord_sd(__m128d __a, __m128d __b)
825 {
826 return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
827 }
828
829 /// Compares the lower double-precision floating-point values in each of
830 /// the two 128-bit floating-point vectors of [2 x double] to determine if
831 /// the value in the first parameter is "unordered" with respect to the
832 /// corresponding value in the second parameter.
833 ///
834 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true. A pair
835 /// of double-precision values are "unordered" with respect to each other if
836 /// one or both values are NaN.
837 ///
838 /// \headerfile <x86intrin.h>
839 ///
840 /// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c>
841 /// instruction.
842 ///
843 /// \param __a
844 /// A 128-bit vector of [2 x double]. The lower double-precision value is
845 /// compared to the lower double-precision value of \a __b.
846 /// \param __b
847 /// A 128-bit vector of [2 x double]. The lower double-precision value is
848 /// compared to the lower double-precision value of \a __a.
849 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
850 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
851 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpunord_sd(__m128d __a,__m128d __b)852 _mm_cmpunord_sd(__m128d __a, __m128d __b)
853 {
854 return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
855 }
856
857 /// Compares the lower double-precision floating-point values in each of
858 /// the two 128-bit floating-point vectors of [2 x double] to determine if
859 /// the value in the first parameter is unequal to the corresponding value in
860 /// the second parameter.
861 ///
862 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
863 ///
864 /// \headerfile <x86intrin.h>
865 ///
866 /// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.
867 ///
868 /// \param __a
869 /// A 128-bit vector of [2 x double]. The lower double-precision value is
870 /// compared to the lower double-precision value of \a __b.
871 /// \param __b
872 /// A 128-bit vector of [2 x double]. The lower double-precision value is
873 /// compared to the lower double-precision value of \a __a.
874 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
875 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
876 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpneq_sd(__m128d __a,__m128d __b)877 _mm_cmpneq_sd(__m128d __a, __m128d __b)
878 {
879 return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
880 }
881
882 /// Compares the lower double-precision floating-point values in each of
883 /// the two 128-bit floating-point vectors of [2 x double] to determine if
884 /// the value in the first parameter is not less than the corresponding
885 /// value in the second parameter.
886 ///
887 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
888 ///
889 /// \headerfile <x86intrin.h>
890 ///
891 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
892 ///
893 /// \param __a
894 /// A 128-bit vector of [2 x double]. The lower double-precision value is
895 /// compared to the lower double-precision value of \a __b.
896 /// \param __b
897 /// A 128-bit vector of [2 x double]. The lower double-precision value is
898 /// compared to the lower double-precision value of \a __a.
899 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
900 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
901 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpnlt_sd(__m128d __a,__m128d __b)902 _mm_cmpnlt_sd(__m128d __a, __m128d __b)
903 {
904 return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
905 }
906
907 /// Compares the lower double-precision floating-point values in each of
908 /// the two 128-bit floating-point vectors of [2 x double] to determine if
909 /// the value in the first parameter is not less than or equal to the
910 /// corresponding value in the second parameter.
911 ///
912 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
913 ///
914 /// \headerfile <x86intrin.h>
915 ///
916 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
917 ///
918 /// \param __a
919 /// A 128-bit vector of [2 x double]. The lower double-precision value is
920 /// compared to the lower double-precision value of \a __b.
921 /// \param __b
922 /// A 128-bit vector of [2 x double]. The lower double-precision value is
923 /// compared to the lower double-precision value of \a __a.
924 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
925 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
926 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpnle_sd(__m128d __a,__m128d __b)927 _mm_cmpnle_sd(__m128d __a, __m128d __b)
928 {
929 return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
930 }
931
932 /// Compares the lower double-precision floating-point values in each of
933 /// the two 128-bit floating-point vectors of [2 x double] to determine if
934 /// the value in the first parameter is not greater than the corresponding
935 /// value in the second parameter.
936 ///
937 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
938 ///
939 /// \headerfile <x86intrin.h>
940 ///
941 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
942 ///
943 /// \param __a
944 /// A 128-bit vector of [2 x double]. The lower double-precision value is
945 /// compared to the lower double-precision value of \a __b.
946 /// \param __b
947 /// A 128-bit vector of [2 x double]. The lower double-precision value is
948 /// compared to the lower double-precision value of \a __a.
949 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
950 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
951 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpngt_sd(__m128d __a,__m128d __b)952 _mm_cmpngt_sd(__m128d __a, __m128d __b)
953 {
954 __m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
955 return __extension__ (__m128d) { __c[0], __a[1] };
956 }
957
958 /// Compares the lower double-precision floating-point values in each of
959 /// the two 128-bit floating-point vectors of [2 x double] to determine if
960 /// the value in the first parameter is not greater than or equal to the
961 /// corresponding value in the second parameter.
962 ///
963 /// The comparison yields 0x0 for false, 0xFFFFFFFFFFFFFFFF for true.
964 ///
965 /// \headerfile <x86intrin.h>
966 ///
967 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
968 ///
969 /// \param __a
970 /// A 128-bit vector of [2 x double]. The lower double-precision value is
971 /// compared to the lower double-precision value of \a __b.
972 /// \param __b
973 /// A 128-bit vector of [2 x double]. The lower double-precision value is
974 /// compared to the lower double-precision value of \a __a.
975 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
976 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
977 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cmpnge_sd(__m128d __a,__m128d __b)978 _mm_cmpnge_sd(__m128d __a, __m128d __b)
979 {
980 __m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
981 return __extension__ (__m128d) { __c[0], __a[1] };
982 }
983
984 /// Compares the lower double-precision floating-point values in each of
985 /// the two 128-bit floating-point vectors of [2 x double] for equality.
986 ///
987 /// The comparison yields 0 for false, 1 for true. If either of the two
988 /// lower double-precision values is NaN, 0 is returned.
989 ///
990 /// \headerfile <x86intrin.h>
991 ///
992 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
993 ///
994 /// \param __a
995 /// A 128-bit vector of [2 x double]. The lower double-precision value is
996 /// compared to the lower double-precision value of \a __b.
997 /// \param __b
998 /// A 128-bit vector of [2 x double]. The lower double-precision value is
999 /// compared to the lower double-precision value of \a __a.
1000 /// \returns An integer containing the comparison results. If either of the two
1001 /// lower double-precision values is NaN, 0 is returned.
1002 static __inline__ int __DEFAULT_FN_ATTRS
_mm_comieq_sd(__m128d __a,__m128d __b)1003 _mm_comieq_sd(__m128d __a, __m128d __b)
1004 {
1005 return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
1006 }
1007
1008 /// Compares the lower double-precision floating-point values in each of
1009 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1010 /// the value in the first parameter is less than the corresponding value in
1011 /// the second parameter.
1012 ///
1013 /// The comparison yields 0 for false, 1 for true. If either of the two
1014 /// lower double-precision values is NaN, 0 is returned.
1015 ///
1016 /// \headerfile <x86intrin.h>
1017 ///
1018 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1019 ///
1020 /// \param __a
1021 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1022 /// compared to the lower double-precision value of \a __b.
1023 /// \param __b
1024 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1025 /// compared to the lower double-precision value of \a __a.
1026 /// \returns An integer containing the comparison results. If either of the two
1027 /// lower double-precision values is NaN, 0 is returned.
1028 static __inline__ int __DEFAULT_FN_ATTRS
_mm_comilt_sd(__m128d __a,__m128d __b)1029 _mm_comilt_sd(__m128d __a, __m128d __b)
1030 {
1031 return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
1032 }
1033
1034 /// Compares the lower double-precision floating-point values in each of
1035 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1036 /// the value in the first parameter is less than or equal to the
1037 /// corresponding value in the second parameter.
1038 ///
1039 /// The comparison yields 0 for false, 1 for true. If either of the two
1040 /// lower double-precision values is NaN, 0 is returned.
1041 ///
1042 /// \headerfile <x86intrin.h>
1043 ///
1044 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1045 ///
1046 /// \param __a
1047 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1048 /// compared to the lower double-precision value of \a __b.
1049 /// \param __b
1050 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1051 /// compared to the lower double-precision value of \a __a.
1052 /// \returns An integer containing the comparison results. If either of the two
1053 /// lower double-precision values is NaN, 0 is returned.
1054 static __inline__ int __DEFAULT_FN_ATTRS
_mm_comile_sd(__m128d __a,__m128d __b)1055 _mm_comile_sd(__m128d __a, __m128d __b)
1056 {
1057 return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
1058 }
1059
1060 /// Compares the lower double-precision floating-point values in each of
1061 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1062 /// the value in the first parameter is greater than the corresponding value
1063 /// in the second parameter.
1064 ///
1065 /// The comparison yields 0 for false, 1 for true. If either of the two
1066 /// lower double-precision values is NaN, 0 is returned.
1067 ///
1068 /// \headerfile <x86intrin.h>
1069 ///
1070 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1071 ///
1072 /// \param __a
1073 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1074 /// compared to the lower double-precision value of \a __b.
1075 /// \param __b
1076 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1077 /// compared to the lower double-precision value of \a __a.
1078 /// \returns An integer containing the comparison results. If either of the two
1079 /// lower double-precision values is NaN, 0 is returned.
1080 static __inline__ int __DEFAULT_FN_ATTRS
_mm_comigt_sd(__m128d __a,__m128d __b)1081 _mm_comigt_sd(__m128d __a, __m128d __b)
1082 {
1083 return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
1084 }
1085
1086 /// Compares the lower double-precision floating-point values in each of
1087 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1088 /// the value in the first parameter is greater than or equal to the
1089 /// corresponding value in the second parameter.
1090 ///
1091 /// The comparison yields 0 for false, 1 for true. If either of the two
1092 /// lower double-precision values is NaN, 0 is returned.
1093 ///
1094 /// \headerfile <x86intrin.h>
1095 ///
1096 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1097 ///
1098 /// \param __a
1099 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1100 /// compared to the lower double-precision value of \a __b.
1101 /// \param __b
1102 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1103 /// compared to the lower double-precision value of \a __a.
1104 /// \returns An integer containing the comparison results. If either of the two
1105 /// lower double-precision values is NaN, 0 is returned.
1106 static __inline__ int __DEFAULT_FN_ATTRS
_mm_comige_sd(__m128d __a,__m128d __b)1107 _mm_comige_sd(__m128d __a, __m128d __b)
1108 {
1109 return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
1110 }
1111
1112 /// Compares the lower double-precision floating-point values in each of
1113 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1114 /// the value in the first parameter is unequal to the corresponding value in
1115 /// the second parameter.
1116 ///
1117 /// The comparison yields 0 for false, 1 for true. If either of the two
1118 /// lower double-precision values is NaN, 1 is returned.
1119 ///
1120 /// \headerfile <x86intrin.h>
1121 ///
1122 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1123 ///
1124 /// \param __a
1125 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1126 /// compared to the lower double-precision value of \a __b.
1127 /// \param __b
1128 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1129 /// compared to the lower double-precision value of \a __a.
1130 /// \returns An integer containing the comparison results. If either of the two
1131 /// lower double-precision values is NaN, 1 is returned.
1132 static __inline__ int __DEFAULT_FN_ATTRS
_mm_comineq_sd(__m128d __a,__m128d __b)1133 _mm_comineq_sd(__m128d __a, __m128d __b)
1134 {
1135 return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
1136 }
1137
1138 /// Compares the lower double-precision floating-point values in each of
1139 /// the two 128-bit floating-point vectors of [2 x double] for equality. The
1140 /// comparison yields 0 for false, 1 for true.
1141 ///
1142 /// If either of the two lower double-precision values is NaN, 0 is returned.
1143 ///
1144 /// \headerfile <x86intrin.h>
1145 ///
1146 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1147 ///
1148 /// \param __a
1149 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1150 /// compared to the lower double-precision value of \a __b.
1151 /// \param __b
1152 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1153 /// compared to the lower double-precision value of \a __a.
1154 /// \returns An integer containing the comparison results. If either of the two
1155 /// lower double-precision values is NaN, 0 is returned.
1156 static __inline__ int __DEFAULT_FN_ATTRS
_mm_ucomieq_sd(__m128d __a,__m128d __b)1157 _mm_ucomieq_sd(__m128d __a, __m128d __b)
1158 {
1159 return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
1160 }
1161
1162 /// Compares the lower double-precision floating-point values in each of
1163 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1164 /// the value in the first parameter is less than the corresponding value in
1165 /// the second parameter.
1166 ///
1167 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1168 /// double-precision values is NaN, 0 is returned.
1169 ///
1170 /// \headerfile <x86intrin.h>
1171 ///
1172 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1173 ///
1174 /// \param __a
1175 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1176 /// compared to the lower double-precision value of \a __b.
1177 /// \param __b
1178 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1179 /// compared to the lower double-precision value of \a __a.
1180 /// \returns An integer containing the comparison results. If either of the two
1181 /// lower double-precision values is NaN, 0 is returned.
1182 static __inline__ int __DEFAULT_FN_ATTRS
_mm_ucomilt_sd(__m128d __a,__m128d __b)1183 _mm_ucomilt_sd(__m128d __a, __m128d __b)
1184 {
1185 return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
1186 }
1187
1188 /// Compares the lower double-precision floating-point values in each of
1189 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1190 /// the value in the first parameter is less than or equal to the
1191 /// corresponding value in the second parameter.
1192 ///
1193 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1194 /// double-precision values is NaN, 0 is returned.
1195 ///
1196 /// \headerfile <x86intrin.h>
1197 ///
1198 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1199 ///
1200 /// \param __a
1201 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1202 /// compared to the lower double-precision value of \a __b.
1203 /// \param __b
1204 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1205 /// compared to the lower double-precision value of \a __a.
1206 /// \returns An integer containing the comparison results. If either of the two
1207 /// lower double-precision values is NaN, 0 is returned.
1208 static __inline__ int __DEFAULT_FN_ATTRS
_mm_ucomile_sd(__m128d __a,__m128d __b)1209 _mm_ucomile_sd(__m128d __a, __m128d __b)
1210 {
1211 return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
1212 }
1213
1214 /// Compares the lower double-precision floating-point values in each of
1215 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1216 /// the value in the first parameter is greater than the corresponding value
1217 /// in the second parameter.
1218 ///
1219 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1220 /// double-precision values is NaN, 0 is returned.
1221 ///
1222 /// \headerfile <x86intrin.h>
1223 ///
1224 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1225 ///
1226 /// \param __a
1227 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1228 /// compared to the lower double-precision value of \a __b.
1229 /// \param __b
1230 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1231 /// compared to the lower double-precision value of \a __a.
1232 /// \returns An integer containing the comparison results. If either of the two
1233 /// lower double-precision values is NaN, 0 is returned.
1234 static __inline__ int __DEFAULT_FN_ATTRS
_mm_ucomigt_sd(__m128d __a,__m128d __b)1235 _mm_ucomigt_sd(__m128d __a, __m128d __b)
1236 {
1237 return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
1238 }
1239
1240 /// Compares the lower double-precision floating-point values in each of
1241 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1242 /// the value in the first parameter is greater than or equal to the
1243 /// corresponding value in the second parameter.
1244 ///
1245 /// The comparison yields 0 for false, 1 for true. If either of the two
1246 /// lower double-precision values is NaN, 0 is returned.
1247 ///
1248 /// \headerfile <x86intrin.h>
1249 ///
1250 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1251 ///
1252 /// \param __a
1253 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1254 /// compared to the lower double-precision value of \a __b.
1255 /// \param __b
1256 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1257 /// compared to the lower double-precision value of \a __a.
1258 /// \returns An integer containing the comparison results. If either of the two
1259 /// lower double-precision values is NaN, 0 is returned.
1260 static __inline__ int __DEFAULT_FN_ATTRS
_mm_ucomige_sd(__m128d __a,__m128d __b)1261 _mm_ucomige_sd(__m128d __a, __m128d __b)
1262 {
1263 return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
1264 }
1265
1266 /// Compares the lower double-precision floating-point values in each of
1267 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1268 /// the value in the first parameter is unequal to the corresponding value in
1269 /// the second parameter.
1270 ///
1271 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1272 /// double-precision values is NaN, 1 is returned.
1273 ///
1274 /// \headerfile <x86intrin.h>
1275 ///
1276 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1277 ///
1278 /// \param __a
1279 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1280 /// compared to the lower double-precision value of \a __b.
1281 /// \param __b
1282 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1283 /// compared to the lower double-precision value of \a __a.
1284 /// \returns An integer containing the comparison result. If either of the two
1285 /// lower double-precision values is NaN, 1 is returned.
1286 static __inline__ int __DEFAULT_FN_ATTRS
_mm_ucomineq_sd(__m128d __a,__m128d __b)1287 _mm_ucomineq_sd(__m128d __a, __m128d __b)
1288 {
1289 return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
1290 }
1291
1292 /// Converts the two double-precision floating-point elements of a
1293 /// 128-bit vector of [2 x double] into two single-precision floating-point
1294 /// values, returned in the lower 64 bits of a 128-bit vector of [4 x float].
1295 /// The upper 64 bits of the result vector are set to zero.
1296 ///
1297 /// \headerfile <x86intrin.h>
1298 ///
1299 /// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.
1300 ///
1301 /// \param __a
1302 /// A 128-bit vector of [2 x double].
1303 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1304 /// converted values. The upper 64 bits are set to zero.
1305 static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_cvtpd_ps(__m128d __a)1306 _mm_cvtpd_ps(__m128d __a)
1307 {
1308 return __builtin_ia32_cvtpd2ps((__v2df)__a);
1309 }
1310
1311 /// Converts the lower two single-precision floating-point elements of a
1312 /// 128-bit vector of [4 x float] into two double-precision floating-point
1313 /// values, returned in a 128-bit vector of [2 x double]. The upper two
1314 /// elements of the input vector are unused.
1315 ///
1316 /// \headerfile <x86intrin.h>
1317 ///
1318 /// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.
1319 ///
1320 /// \param __a
1321 /// A 128-bit vector of [4 x float]. The lower two single-precision
1322 /// floating-point elements are converted to double-precision values. The
1323 /// upper two elements are unused.
1324 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1325 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtps_pd(__m128 __a)1326 _mm_cvtps_pd(__m128 __a)
1327 {
1328 return (__m128d) __builtin_convertvector(
1329 __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
1330 }
1331
1332 /// Converts the lower two integer elements of a 128-bit vector of
1333 /// [4 x i32] into two double-precision floating-point values, returned in a
1334 /// 128-bit vector of [2 x double].
1335 ///
1336 /// The upper two elements of the input vector are unused.
1337 ///
1338 /// \headerfile <x86intrin.h>
1339 ///
1340 /// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.
1341 ///
1342 /// \param __a
1343 /// A 128-bit integer vector of [4 x i32]. The lower two integer elements are
1344 /// converted to double-precision values.
1345 ///
1346 /// The upper two elements are unused.
1347 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1348 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtepi32_pd(__m128i __a)1349 _mm_cvtepi32_pd(__m128i __a)
1350 {
1351 return (__m128d) __builtin_convertvector(
1352 __builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
1353 }
1354
1355 /// Converts the two double-precision floating-point elements of a
1356 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1357 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper
1358 /// 64 bits of the result vector are set to zero.
1359 ///
1360 /// \headerfile <x86intrin.h>
1361 ///
1362 /// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.
1363 ///
1364 /// \param __a
1365 /// A 128-bit vector of [2 x double].
1366 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1367 /// converted values. The upper 64 bits are set to zero.
1368 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cvtpd_epi32(__m128d __a)1369 _mm_cvtpd_epi32(__m128d __a)
1370 {
1371 return __builtin_ia32_cvtpd2dq((__v2df)__a);
1372 }
1373
1374 /// Converts the low-order element of a 128-bit vector of [2 x double]
1375 /// into a 32-bit signed integer value.
1376 ///
1377 /// \headerfile <x86intrin.h>
1378 ///
1379 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
1380 ///
1381 /// \param __a
1382 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1383 /// conversion.
1384 /// \returns A 32-bit signed integer containing the converted value.
1385 static __inline__ int __DEFAULT_FN_ATTRS
_mm_cvtsd_si32(__m128d __a)1386 _mm_cvtsd_si32(__m128d __a)
1387 {
1388 return __builtin_ia32_cvtsd2si((__v2df)__a);
1389 }
1390
1391 /// Converts the lower double-precision floating-point element of a
1392 /// 128-bit vector of [2 x double], in the second parameter, into a
1393 /// single-precision floating-point value, returned in the lower 32 bits of a
1394 /// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are
1395 /// copied from the upper 96 bits of the first parameter.
1396 ///
1397 /// \headerfile <x86intrin.h>
1398 ///
1399 /// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.
1400 ///
1401 /// \param __a
1402 /// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are
1403 /// copied to the upper 96 bits of the result.
1404 /// \param __b
1405 /// A 128-bit vector of [2 x double]. The lower double-precision
1406 /// floating-point element is used in the conversion.
1407 /// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
1408 /// converted value from the second parameter. The upper 96 bits are copied
1409 /// from the upper 96 bits of the first parameter.
1410 static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_cvtsd_ss(__m128 __a,__m128d __b)1411 _mm_cvtsd_ss(__m128 __a, __m128d __b)
1412 {
1413 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
1414 }
1415
1416 /// Converts a 32-bit signed integer value, in the second parameter, into
1417 /// a double-precision floating-point value, returned in the lower 64 bits of
1418 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1419 /// are copied from the upper 64 bits of the first parameter.
1420 ///
1421 /// \headerfile <x86intrin.h>
1422 ///
1423 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
1424 ///
1425 /// \param __a
1426 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1427 /// copied to the upper 64 bits of the result.
1428 /// \param __b
1429 /// A 32-bit signed integer containing the value to be converted.
1430 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1431 /// converted value from the second parameter. The upper 64 bits are copied
1432 /// from the upper 64 bits of the first parameter.
1433 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtsi32_sd(__m128d __a,int __b)1434 _mm_cvtsi32_sd(__m128d __a, int __b)
1435 {
1436 __a[0] = __b;
1437 return __a;
1438 }
1439
1440 /// Converts the lower single-precision floating-point element of a
1441 /// 128-bit vector of [4 x float], in the second parameter, into a
1442 /// double-precision floating-point value, returned in the lower 64 bits of
1443 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1444 /// are copied from the upper 64 bits of the first parameter.
1445 ///
1446 /// \headerfile <x86intrin.h>
1447 ///
1448 /// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.
1449 ///
1450 /// \param __a
1451 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1452 /// copied to the upper 64 bits of the result.
1453 /// \param __b
1454 /// A 128-bit vector of [4 x float]. The lower single-precision
1455 /// floating-point element is used in the conversion.
1456 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1457 /// converted value from the second parameter. The upper 64 bits are copied
1458 /// from the upper 64 bits of the first parameter.
1459 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtss_sd(__m128d __a,__m128 __b)1460 _mm_cvtss_sd(__m128d __a, __m128 __b)
1461 {
1462 __a[0] = __b[0];
1463 return __a;
1464 }
1465
1466 /// Converts the two double-precision floating-point elements of a
1467 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1468 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32].
1469 ///
1470 /// If the result of either conversion is inexact, the result is truncated
1471 /// (rounded towards zero) regardless of the current MXCSR setting. The upper
1472 /// 64 bits of the result vector are set to zero.
1473 ///
1474 /// \headerfile <x86intrin.h>
1475 ///
1476 /// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c>
1477 /// instruction.
1478 ///
1479 /// \param __a
1480 /// A 128-bit vector of [2 x double].
1481 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1482 /// converted values. The upper 64 bits are set to zero.
1483 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cvttpd_epi32(__m128d __a)1484 _mm_cvttpd_epi32(__m128d __a)
1485 {
1486 return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
1487 }
1488
1489 /// Converts the low-order element of a [2 x double] vector into a 32-bit
1490 /// signed integer value, truncating the result when it is inexact.
1491 ///
1492 /// \headerfile <x86intrin.h>
1493 ///
1494 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
1495 /// instruction.
1496 ///
1497 /// \param __a
1498 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1499 /// conversion.
1500 /// \returns A 32-bit signed integer containing the converted value.
1501 static __inline__ int __DEFAULT_FN_ATTRS
_mm_cvttsd_si32(__m128d __a)1502 _mm_cvttsd_si32(__m128d __a)
1503 {
1504 return __builtin_ia32_cvttsd2si((__v2df)__a);
1505 }
1506
1507 /// Converts the two double-precision floating-point elements of a
1508 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1509 /// returned in a 64-bit vector of [2 x i32].
1510 ///
1511 /// \headerfile <x86intrin.h>
1512 ///
1513 /// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.
1514 ///
1515 /// \param __a
1516 /// A 128-bit vector of [2 x double].
1517 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1518 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
_mm_cvtpd_pi32(__m128d __a)1519 _mm_cvtpd_pi32(__m128d __a)
1520 {
1521 return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
1522 }
1523
1524 /// Converts the two double-precision floating-point elements of a
1525 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1526 /// returned in a 64-bit vector of [2 x i32].
1527 ///
1528 /// If the result of either conversion is inexact, the result is truncated
1529 /// (rounded towards zero) regardless of the current MXCSR setting.
1530 ///
1531 /// \headerfile <x86intrin.h>
1532 ///
1533 /// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.
1534 ///
1535 /// \param __a
1536 /// A 128-bit vector of [2 x double].
1537 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1538 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
_mm_cvttpd_pi32(__m128d __a)1539 _mm_cvttpd_pi32(__m128d __a)
1540 {
1541 return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
1542 }
1543
1544 /// Converts the two signed 32-bit integer elements of a 64-bit vector of
1545 /// [2 x i32] into two double-precision floating-point values, returned in a
1546 /// 128-bit vector of [2 x double].
1547 ///
1548 /// \headerfile <x86intrin.h>
1549 ///
1550 /// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.
1551 ///
1552 /// \param __a
1553 /// A 64-bit vector of [2 x i32].
1554 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1555 static __inline__ __m128d __DEFAULT_FN_ATTRS_MMX
_mm_cvtpi32_pd(__m64 __a)1556 _mm_cvtpi32_pd(__m64 __a)
1557 {
1558 return __builtin_ia32_cvtpi2pd((__v2si)__a);
1559 }
1560
1561 /// Returns the low-order element of a 128-bit vector of [2 x double] as
1562 /// a double-precision floating-point value.
1563 ///
1564 /// \headerfile <x86intrin.h>
1565 ///
1566 /// This intrinsic has no corresponding instruction.
1567 ///
1568 /// \param __a
1569 /// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
1570 /// \returns A double-precision floating-point value copied from the lower 64
1571 /// bits of \a __a.
1572 static __inline__ double __DEFAULT_FN_ATTRS
_mm_cvtsd_f64(__m128d __a)1573 _mm_cvtsd_f64(__m128d __a)
1574 {
1575 return __a[0];
1576 }
1577
1578 /// Loads a 128-bit floating-point vector of [2 x double] from an aligned
1579 /// memory location.
1580 ///
1581 /// \headerfile <x86intrin.h>
1582 ///
1583 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
1584 ///
1585 /// \param __dp
1586 /// A pointer to a 128-bit memory location. The address of the memory
1587 /// location has to be 16-byte aligned.
1588 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1589 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_pd(double const * __dp)1590 _mm_load_pd(double const *__dp)
1591 {
1592 return *(__m128d*)__dp;
1593 }
1594
1595 /// Loads a double-precision floating-point value from a specified memory
1596 /// location and duplicates it to both vector elements of a 128-bit vector of
1597 /// [2 x double].
1598 ///
1599 /// \headerfile <x86intrin.h>
1600 ///
1601 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.
1602 ///
1603 /// \param __dp
1604 /// A pointer to a memory location containing a double-precision value.
1605 /// \returns A 128-bit vector of [2 x double] containing the loaded and
1606 /// duplicated values.
1607 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load1_pd(double const * __dp)1608 _mm_load1_pd(double const *__dp)
1609 {
1610 struct __mm_load1_pd_struct {
1611 double __u;
1612 } __attribute__((__packed__, __may_alias__));
1613 double __u = ((struct __mm_load1_pd_struct*)__dp)->__u;
1614 return __extension__ (__m128d){ __u, __u };
1615 }
1616
1617 #define _mm_load_pd1(dp) _mm_load1_pd(dp)
1618
1619 /// Loads two double-precision values, in reverse order, from an aligned
1620 /// memory location into a 128-bit vector of [2 x double].
1621 ///
1622 /// \headerfile <x86intrin.h>
1623 ///
1624 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction +
1625 /// needed shuffling instructions. In AVX mode, the shuffling may be combined
1626 /// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction.
1627 ///
1628 /// \param __dp
1629 /// A 16-byte aligned pointer to an array of double-precision values to be
1630 /// loaded in reverse order.
1631 /// \returns A 128-bit vector of [2 x double] containing the reversed loaded
1632 /// values.
1633 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_loadr_pd(double const * __dp)1634 _mm_loadr_pd(double const *__dp)
1635 {
1636 __m128d __u = *(__m128d*)__dp;
1637 return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
1638 }
1639
1640 /// Loads a 128-bit floating-point vector of [2 x double] from an
1641 /// unaligned memory location.
1642 ///
1643 /// \headerfile <x86intrin.h>
1644 ///
1645 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
1646 ///
1647 /// \param __dp
1648 /// A pointer to a 128-bit memory location. The address of the memory
1649 /// location does not have to be aligned.
1650 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1651 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_loadu_pd(double const * __dp)1652 _mm_loadu_pd(double const *__dp)
1653 {
1654 struct __loadu_pd {
1655 __m128d __v;
1656 } __attribute__((__packed__, __may_alias__));
1657 return ((struct __loadu_pd*)__dp)->__v;
1658 }
1659
1660 /// Loads a 64-bit integer value to the low element of a 128-bit integer
1661 /// vector and clears the upper element.
1662 ///
1663 /// \headerfile <x86intrin.h>
1664 ///
1665 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1666 ///
1667 /// \param __a
1668 /// A pointer to a 64-bit memory location. The address of the memory
1669 /// location does not have to be aligned.
1670 /// \returns A 128-bit vector of [2 x i64] containing the loaded value.
1671 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_loadu_si64(void const * __a)1672 _mm_loadu_si64(void const *__a)
1673 {
1674 struct __loadu_si64 {
1675 long long __v;
1676 } __attribute__((__packed__, __may_alias__));
1677 long long __u = ((struct __loadu_si64*)__a)->__v;
1678 return __extension__ (__m128i)(__v2di){__u, 0LL};
1679 }
1680
1681 /// Loads a 32-bit integer value to the low element of a 128-bit integer
1682 /// vector and clears the upper element.
1683 ///
1684 /// \headerfile <x86intrin.h>
1685 ///
1686 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
1687 ///
1688 /// \param __a
1689 /// A pointer to a 32-bit memory location. The address of the memory
1690 /// location does not have to be aligned.
1691 /// \returns A 128-bit vector of [4 x i32] containing the loaded value.
1692 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_loadu_si32(void const * __a)1693 _mm_loadu_si32(void const *__a)
1694 {
1695 struct __loadu_si32 {
1696 int __v;
1697 } __attribute__((__packed__, __may_alias__));
1698 int __u = ((struct __loadu_si32*)__a)->__v;
1699 return __extension__ (__m128i)(__v4si){__u, 0, 0, 0};
1700 }
1701
1702 /// Loads a 16-bit integer value to the low element of a 128-bit integer
1703 /// vector and clears the upper element.
1704 ///
1705 /// \headerfile <x86intrin.h>
1706 ///
1707 /// This intrinsic does not correspond to a specific instruction.
1708 ///
1709 /// \param __a
1710 /// A pointer to a 16-bit memory location. The address of the memory
1711 /// location does not have to be aligned.
1712 /// \returns A 128-bit vector of [8 x i16] containing the loaded value.
1713 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_loadu_si16(void const * __a)1714 _mm_loadu_si16(void const *__a)
1715 {
1716 struct __loadu_si16 {
1717 short __v;
1718 } __attribute__((__packed__, __may_alias__));
1719 short __u = ((struct __loadu_si16*)__a)->__v;
1720 return __extension__ (__m128i)(__v8hi){__u, 0, 0, 0, 0, 0, 0, 0};
1721 }
1722
1723 /// Loads a 64-bit double-precision value to the low element of a
1724 /// 128-bit integer vector and clears the upper element.
1725 ///
1726 /// \headerfile <x86intrin.h>
1727 ///
1728 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1729 ///
1730 /// \param __dp
1731 /// A pointer to a memory location containing a double-precision value.
1732 /// The address of the memory location does not have to be aligned.
1733 /// \returns A 128-bit vector of [2 x double] containing the loaded value.
1734 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_load_sd(double const * __dp)1735 _mm_load_sd(double const *__dp)
1736 {
1737 struct __mm_load_sd_struct {
1738 double __u;
1739 } __attribute__((__packed__, __may_alias__));
1740 double __u = ((struct __mm_load_sd_struct*)__dp)->__u;
1741 return __extension__ (__m128d){ __u, 0 };
1742 }
1743
1744 /// Loads a double-precision value into the high-order bits of a 128-bit
1745 /// vector of [2 x double]. The low-order bits are copied from the low-order
1746 /// bits of the first operand.
1747 ///
1748 /// \headerfile <x86intrin.h>
1749 ///
1750 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1751 ///
1752 /// \param __a
1753 /// A 128-bit vector of [2 x double]. \n
1754 /// Bits [63:0] are written to bits [63:0] of the result.
1755 /// \param __dp
1756 /// A pointer to a 64-bit memory location containing a double-precision
1757 /// floating-point value that is loaded. The loaded value is written to bits
1758 /// [127:64] of the result. The address of the memory location does not have
1759 /// to be aligned.
1760 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1761 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_loadh_pd(__m128d __a,double const * __dp)1762 _mm_loadh_pd(__m128d __a, double const *__dp)
1763 {
1764 struct __mm_loadh_pd_struct {
1765 double __u;
1766 } __attribute__((__packed__, __may_alias__));
1767 double __u = ((struct __mm_loadh_pd_struct*)__dp)->__u;
1768 return __extension__ (__m128d){ __a[0], __u };
1769 }
1770
1771 /// Loads a double-precision value into the low-order bits of a 128-bit
1772 /// vector of [2 x double]. The high-order bits are copied from the
1773 /// high-order bits of the first operand.
1774 ///
1775 /// \headerfile <x86intrin.h>
1776 ///
1777 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
1778 ///
1779 /// \param __a
1780 /// A 128-bit vector of [2 x double]. \n
1781 /// Bits [127:64] are written to bits [127:64] of the result.
1782 /// \param __dp
1783 /// A pointer to a 64-bit memory location containing a double-precision
1784 /// floating-point value that is loaded. The loaded value is written to bits
1785 /// [63:0] of the result. The address of the memory location does not have to
1786 /// be aligned.
1787 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1788 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_loadl_pd(__m128d __a,double const * __dp)1789 _mm_loadl_pd(__m128d __a, double const *__dp)
1790 {
1791 struct __mm_loadl_pd_struct {
1792 double __u;
1793 } __attribute__((__packed__, __may_alias__));
1794 double __u = ((struct __mm_loadl_pd_struct*)__dp)->__u;
1795 return __extension__ (__m128d){ __u, __a[1] };
1796 }
1797
1798 /// Constructs a 128-bit floating-point vector of [2 x double] with
1799 /// unspecified content. This could be used as an argument to another
1800 /// intrinsic function where the argument is required but the value is not
1801 /// actually used.
1802 ///
1803 /// \headerfile <x86intrin.h>
1804 ///
1805 /// This intrinsic has no corresponding instruction.
1806 ///
1807 /// \returns A 128-bit floating-point vector of [2 x double] with unspecified
1808 /// content.
1809 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_undefined_pd(void)1810 _mm_undefined_pd(void)
1811 {
1812 return (__m128d)__builtin_ia32_undef128();
1813 }
1814
1815 /// Constructs a 128-bit floating-point vector of [2 x double]. The lower
1816 /// 64 bits of the vector are initialized with the specified double-precision
1817 /// floating-point value. The upper 64 bits are set to zero.
1818 ///
1819 /// \headerfile <x86intrin.h>
1820 ///
1821 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1822 ///
1823 /// \param __w
1824 /// A double-precision floating-point value used to initialize the lower 64
1825 /// bits of the result.
1826 /// \returns An initialized 128-bit floating-point vector of [2 x double]. The
1827 /// lower 64 bits contain the value of the parameter. The upper 64 bits are
1828 /// set to zero.
1829 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_set_sd(double __w)1830 _mm_set_sd(double __w)
1831 {
1832 return __extension__ (__m128d){ __w, 0 };
1833 }
1834
1835 /// Constructs a 128-bit floating-point vector of [2 x double], with each
1836 /// of the two double-precision floating-point vector elements set to the
1837 /// specified double-precision floating-point value.
1838 ///
1839 /// \headerfile <x86intrin.h>
1840 ///
1841 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1842 ///
1843 /// \param __w
1844 /// A double-precision floating-point value used to initialize each vector
1845 /// element of the result.
1846 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1847 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_set1_pd(double __w)1848 _mm_set1_pd(double __w)
1849 {
1850 return __extension__ (__m128d){ __w, __w };
1851 }
1852
1853 /// Constructs a 128-bit floating-point vector of [2 x double], with each
1854 /// of the two double-precision floating-point vector elements set to the
1855 /// specified double-precision floating-point value.
1856 ///
1857 /// \headerfile <x86intrin.h>
1858 ///
1859 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1860 ///
1861 /// \param __w
1862 /// A double-precision floating-point value used to initialize each vector
1863 /// element of the result.
1864 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1865 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_set_pd1(double __w)1866 _mm_set_pd1(double __w)
1867 {
1868 return _mm_set1_pd(__w);
1869 }
1870
1871 /// Constructs a 128-bit floating-point vector of [2 x double]
1872 /// initialized with the specified double-precision floating-point values.
1873 ///
1874 /// \headerfile <x86intrin.h>
1875 ///
1876 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1877 ///
1878 /// \param __w
1879 /// A double-precision floating-point value used to initialize the upper 64
1880 /// bits of the result.
1881 /// \param __x
1882 /// A double-precision floating-point value used to initialize the lower 64
1883 /// bits of the result.
1884 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1885 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_set_pd(double __w,double __x)1886 _mm_set_pd(double __w, double __x)
1887 {
1888 return __extension__ (__m128d){ __x, __w };
1889 }
1890
1891 /// Constructs a 128-bit floating-point vector of [2 x double],
1892 /// initialized in reverse order with the specified double-precision
1893 /// floating-point values.
1894 ///
1895 /// \headerfile <x86intrin.h>
1896 ///
1897 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1898 ///
1899 /// \param __w
1900 /// A double-precision floating-point value used to initialize the lower 64
1901 /// bits of the result.
1902 /// \param __x
1903 /// A double-precision floating-point value used to initialize the upper 64
1904 /// bits of the result.
1905 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1906 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_setr_pd(double __w,double __x)1907 _mm_setr_pd(double __w, double __x)
1908 {
1909 return __extension__ (__m128d){ __w, __x };
1910 }
1911
1912 /// Constructs a 128-bit floating-point vector of [2 x double]
1913 /// initialized to zero.
1914 ///
1915 /// \headerfile <x86intrin.h>
1916 ///
1917 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
1918 ///
1919 /// \returns An initialized 128-bit floating-point vector of [2 x double] with
1920 /// all elements set to zero.
1921 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_setzero_pd(void)1922 _mm_setzero_pd(void)
1923 {
1924 return __extension__ (__m128d){ 0, 0 };
1925 }
1926
1927 /// Constructs a 128-bit floating-point vector of [2 x double]. The lower
1928 /// 64 bits are set to the lower 64 bits of the second parameter. The upper
1929 /// 64 bits are set to the upper 64 bits of the first parameter.
1930 ///
1931 /// \headerfile <x86intrin.h>
1932 ///
1933 /// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.
1934 ///
1935 /// \param __a
1936 /// A 128-bit vector of [2 x double]. The upper 64 bits are written to the
1937 /// upper 64 bits of the result.
1938 /// \param __b
1939 /// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
1940 /// lower 64 bits of the result.
1941 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1942 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_move_sd(__m128d __a,__m128d __b)1943 _mm_move_sd(__m128d __a, __m128d __b)
1944 {
1945 __a[0] = __b[0];
1946 return __a;
1947 }
1948
1949 /// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
1950 /// memory location.
1951 ///
1952 /// \headerfile <x86intrin.h>
1953 ///
1954 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1955 ///
1956 /// \param __dp
1957 /// A pointer to a 64-bit memory location.
1958 /// \param __a
1959 /// A 128-bit vector of [2 x double] containing the value to be stored.
1960 static __inline__ void __DEFAULT_FN_ATTRS
_mm_store_sd(double * __dp,__m128d __a)1961 _mm_store_sd(double *__dp, __m128d __a)
1962 {
1963 struct __mm_store_sd_struct {
1964 double __u;
1965 } __attribute__((__packed__, __may_alias__));
1966 ((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
1967 }
1968
1969 /// Moves packed double-precision values from a 128-bit vector of
1970 /// [2 x double] to a memory location.
1971 ///
1972 /// \headerfile <x86intrin.h>
1973 ///
1974 /// This intrinsic corresponds to the <c>VMOVAPD / MOVAPS</c> instruction.
1975 ///
1976 /// \param __dp
1977 /// A pointer to an aligned memory location that can store two
1978 /// double-precision values.
1979 /// \param __a
1980 /// A packed 128-bit vector of [2 x double] containing the values to be
1981 /// moved.
1982 static __inline__ void __DEFAULT_FN_ATTRS
_mm_store_pd(double * __dp,__m128d __a)1983 _mm_store_pd(double *__dp, __m128d __a)
1984 {
1985 *(__m128d*)__dp = __a;
1986 }
1987
1988 /// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
1989 /// the upper and lower 64 bits of a memory location.
1990 ///
1991 /// \headerfile <x86intrin.h>
1992 ///
1993 /// This intrinsic corresponds to the
1994 /// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
1995 ///
1996 /// \param __dp
1997 /// A pointer to a memory location that can store two double-precision
1998 /// values.
1999 /// \param __a
2000 /// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
2001 /// of the values in \a __dp.
2002 static __inline__ void __DEFAULT_FN_ATTRS
_mm_store1_pd(double * __dp,__m128d __a)2003 _mm_store1_pd(double *__dp, __m128d __a)
2004 {
2005 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
2006 _mm_store_pd(__dp, __a);
2007 }
2008
2009 /// Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
2010 /// the upper and lower 64 bits of a memory location.
2011 ///
2012 /// \headerfile <x86intrin.h>
2013 ///
2014 /// This intrinsic corresponds to the
2015 /// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
2016 ///
2017 /// \param __dp
2018 /// A pointer to a memory location that can store two double-precision
2019 /// values.
2020 /// \param __a
2021 /// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
2022 /// of the values in \a __dp.
2023 static __inline__ void __DEFAULT_FN_ATTRS
_mm_store_pd1(double * __dp,__m128d __a)2024 _mm_store_pd1(double *__dp, __m128d __a)
2025 {
2026 _mm_store1_pd(__dp, __a);
2027 }
2028
2029 /// Stores a 128-bit vector of [2 x double] into an unaligned memory
2030 /// location.
2031 ///
2032 /// \headerfile <x86intrin.h>
2033 ///
2034 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
2035 ///
2036 /// \param __dp
2037 /// A pointer to a 128-bit memory location. The address of the memory
2038 /// location does not have to be aligned.
2039 /// \param __a
2040 /// A 128-bit vector of [2 x double] containing the values to be stored.
2041 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storeu_pd(double * __dp,__m128d __a)2042 _mm_storeu_pd(double *__dp, __m128d __a)
2043 {
2044 struct __storeu_pd {
2045 __m128d __v;
2046 } __attribute__((__packed__, __may_alias__));
2047 ((struct __storeu_pd*)__dp)->__v = __a;
2048 }
2049
2050 /// Stores two double-precision values, in reverse order, from a 128-bit
2051 /// vector of [2 x double] to a 16-byte aligned memory location.
2052 ///
2053 /// \headerfile <x86intrin.h>
2054 ///
2055 /// This intrinsic corresponds to a shuffling instruction followed by a
2056 /// <c> VMOVAPD / MOVAPD </c> instruction.
2057 ///
2058 /// \param __dp
2059 /// A pointer to a 16-byte aligned memory location that can store two
2060 /// double-precision values.
2061 /// \param __a
2062 /// A 128-bit vector of [2 x double] containing the values to be reversed and
2063 /// stored.
2064 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storer_pd(double * __dp,__m128d __a)2065 _mm_storer_pd(double *__dp, __m128d __a)
2066 {
2067 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
2068 *(__m128d *)__dp = __a;
2069 }
2070
2071 /// Stores the upper 64 bits of a 128-bit vector of [2 x double] to a
2072 /// memory location.
2073 ///
2074 /// \headerfile <x86intrin.h>
2075 ///
2076 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
2077 ///
2078 /// \param __dp
2079 /// A pointer to a 64-bit memory location.
2080 /// \param __a
2081 /// A 128-bit vector of [2 x double] containing the value to be stored.
2082 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storeh_pd(double * __dp,__m128d __a)2083 _mm_storeh_pd(double *__dp, __m128d __a)
2084 {
2085 struct __mm_storeh_pd_struct {
2086 double __u;
2087 } __attribute__((__packed__, __may_alias__));
2088 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
2089 }
2090
2091 /// Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
2092 /// memory location.
2093 ///
2094 /// \headerfile <x86intrin.h>
2095 ///
2096 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
2097 ///
2098 /// \param __dp
2099 /// A pointer to a 64-bit memory location.
2100 /// \param __a
2101 /// A 128-bit vector of [2 x double] containing the value to be stored.
2102 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storel_pd(double * __dp,__m128d __a)2103 _mm_storel_pd(double *__dp, __m128d __a)
2104 {
2105 struct __mm_storeh_pd_struct {
2106 double __u;
2107 } __attribute__((__packed__, __may_alias__));
2108 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
2109 }
2110
2111 /// Adds the corresponding elements of two 128-bit vectors of [16 x i8],
2112 /// saving the lower 8 bits of each sum in the corresponding element of a
2113 /// 128-bit result vector of [16 x i8].
2114 ///
2115 /// The integer elements of both parameters can be either signed or unsigned.
2116 ///
2117 /// \headerfile <x86intrin.h>
2118 ///
2119 /// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.
2120 ///
2121 /// \param __a
2122 /// A 128-bit vector of [16 x i8].
2123 /// \param __b
2124 /// A 128-bit vector of [16 x i8].
2125 /// \returns A 128-bit vector of [16 x i8] containing the sums of both
2126 /// parameters.
2127 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_add_epi8(__m128i __a,__m128i __b)2128 _mm_add_epi8(__m128i __a, __m128i __b)
2129 {
2130 return (__m128i)((__v16qu)__a + (__v16qu)__b);
2131 }
2132
2133 /// Adds the corresponding elements of two 128-bit vectors of [8 x i16],
2134 /// saving the lower 16 bits of each sum in the corresponding element of a
2135 /// 128-bit result vector of [8 x i16].
2136 ///
2137 /// The integer elements of both parameters can be either signed or unsigned.
2138 ///
2139 /// \headerfile <x86intrin.h>
2140 ///
2141 /// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.
2142 ///
2143 /// \param __a
2144 /// A 128-bit vector of [8 x i16].
2145 /// \param __b
2146 /// A 128-bit vector of [8 x i16].
2147 /// \returns A 128-bit vector of [8 x i16] containing the sums of both
2148 /// parameters.
2149 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_add_epi16(__m128i __a,__m128i __b)2150 _mm_add_epi16(__m128i __a, __m128i __b)
2151 {
2152 return (__m128i)((__v8hu)__a + (__v8hu)__b);
2153 }
2154
2155 /// Adds the corresponding elements of two 128-bit vectors of [4 x i32],
2156 /// saving the lower 32 bits of each sum in the corresponding element of a
2157 /// 128-bit result vector of [4 x i32].
2158 ///
2159 /// The integer elements of both parameters can be either signed or unsigned.
2160 ///
2161 /// \headerfile <x86intrin.h>
2162 ///
2163 /// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.
2164 ///
2165 /// \param __a
2166 /// A 128-bit vector of [4 x i32].
2167 /// \param __b
2168 /// A 128-bit vector of [4 x i32].
2169 /// \returns A 128-bit vector of [4 x i32] containing the sums of both
2170 /// parameters.
2171 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_add_epi32(__m128i __a,__m128i __b)2172 _mm_add_epi32(__m128i __a, __m128i __b)
2173 {
2174 return (__m128i)((__v4su)__a + (__v4su)__b);
2175 }
2176
2177 /// Adds two signed or unsigned 64-bit integer values, returning the
2178 /// lower 64 bits of the sum.
2179 ///
2180 /// \headerfile <x86intrin.h>
2181 ///
2182 /// This intrinsic corresponds to the <c> PADDQ </c> instruction.
2183 ///
2184 /// \param __a
2185 /// A 64-bit integer.
2186 /// \param __b
2187 /// A 64-bit integer.
2188 /// \returns A 64-bit integer containing the sum of both parameters.
2189 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
_mm_add_si64(__m64 __a,__m64 __b)2190 _mm_add_si64(__m64 __a, __m64 __b)
2191 {
2192 return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
2193 }
2194
2195 /// Adds the corresponding elements of two 128-bit vectors of [2 x i64],
2196 /// saving the lower 64 bits of each sum in the corresponding element of a
2197 /// 128-bit result vector of [2 x i64].
2198 ///
2199 /// The integer elements of both parameters can be either signed or unsigned.
2200 ///
2201 /// \headerfile <x86intrin.h>
2202 ///
2203 /// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.
2204 ///
2205 /// \param __a
2206 /// A 128-bit vector of [2 x i64].
2207 /// \param __b
2208 /// A 128-bit vector of [2 x i64].
2209 /// \returns A 128-bit vector of [2 x i64] containing the sums of both
2210 /// parameters.
2211 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_add_epi64(__m128i __a,__m128i __b)2212 _mm_add_epi64(__m128i __a, __m128i __b)
2213 {
2214 return (__m128i)((__v2du)__a + (__v2du)__b);
2215 }
2216
2217 /// Adds, with saturation, the corresponding elements of two 128-bit
2218 /// signed [16 x i8] vectors, saving each sum in the corresponding element of
2219 /// a 128-bit result vector of [16 x i8]. Positive sums greater than 0x7F are
2220 /// saturated to 0x7F. Negative sums less than 0x80 are saturated to 0x80.
2221 ///
2222 /// \headerfile <x86intrin.h>
2223 ///
2224 /// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.
2225 ///
2226 /// \param __a
2227 /// A 128-bit signed [16 x i8] vector.
2228 /// \param __b
2229 /// A 128-bit signed [16 x i8] vector.
2230 /// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
2231 /// both parameters.
2232 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_adds_epi8(__m128i __a,__m128i __b)2233 _mm_adds_epi8(__m128i __a, __m128i __b)
2234 {
2235 return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
2236 }
2237
2238 /// Adds, with saturation, the corresponding elements of two 128-bit
2239 /// signed [8 x i16] vectors, saving each sum in the corresponding element of
2240 /// a 128-bit result vector of [8 x i16]. Positive sums greater than 0x7FFF
2241 /// are saturated to 0x7FFF. Negative sums less than 0x8000 are saturated to
2242 /// 0x8000.
2243 ///
2244 /// \headerfile <x86intrin.h>
2245 ///
2246 /// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.
2247 ///
2248 /// \param __a
2249 /// A 128-bit signed [8 x i16] vector.
2250 /// \param __b
2251 /// A 128-bit signed [8 x i16] vector.
2252 /// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
2253 /// both parameters.
2254 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_adds_epi16(__m128i __a,__m128i __b)2255 _mm_adds_epi16(__m128i __a, __m128i __b)
2256 {
2257 return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
2258 }
2259
2260 /// Adds, with saturation, the corresponding elements of two 128-bit
2261 /// unsigned [16 x i8] vectors, saving each sum in the corresponding element
2262 /// of a 128-bit result vector of [16 x i8]. Positive sums greater than 0xFF
2263 /// are saturated to 0xFF. Negative sums are saturated to 0x00.
2264 ///
2265 /// \headerfile <x86intrin.h>
2266 ///
2267 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2268 ///
2269 /// \param __a
2270 /// A 128-bit unsigned [16 x i8] vector.
2271 /// \param __b
2272 /// A 128-bit unsigned [16 x i8] vector.
2273 /// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
2274 /// of both parameters.
2275 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_adds_epu8(__m128i __a,__m128i __b)2276 _mm_adds_epu8(__m128i __a, __m128i __b)
2277 {
2278 return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
2279 }
2280
2281 /// Adds, with saturation, the corresponding elements of two 128-bit
2282 /// unsigned [8 x i16] vectors, saving each sum in the corresponding element
2283 /// of a 128-bit result vector of [8 x i16]. Positive sums greater than
2284 /// 0xFFFF are saturated to 0xFFFF. Negative sums are saturated to 0x0000.
2285 ///
2286 /// \headerfile <x86intrin.h>
2287 ///
2288 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2289 ///
2290 /// \param __a
2291 /// A 128-bit unsigned [8 x i16] vector.
2292 /// \param __b
2293 /// A 128-bit unsigned [8 x i16] vector.
2294 /// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
2295 /// of both parameters.
2296 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_adds_epu16(__m128i __a,__m128i __b)2297 _mm_adds_epu16(__m128i __a, __m128i __b)
2298 {
2299 return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
2300 }
2301
2302 /// Computes the rounded avarages of corresponding elements of two
2303 /// 128-bit unsigned [16 x i8] vectors, saving each result in the
2304 /// corresponding element of a 128-bit result vector of [16 x i8].
2305 ///
2306 /// \headerfile <x86intrin.h>
2307 ///
2308 /// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.
2309 ///
2310 /// \param __a
2311 /// A 128-bit unsigned [16 x i8] vector.
2312 /// \param __b
2313 /// A 128-bit unsigned [16 x i8] vector.
2314 /// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
2315 /// averages of both parameters.
2316 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_avg_epu8(__m128i __a,__m128i __b)2317 _mm_avg_epu8(__m128i __a, __m128i __b)
2318 {
2319 typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32)));
2320 return (__m128i)__builtin_convertvector(
2321 ((__builtin_convertvector((__v16qu)__a, __v16hu) +
2322 __builtin_convertvector((__v16qu)__b, __v16hu)) + 1)
2323 >> 1, __v16qu);
2324 }
2325
2326 /// Computes the rounded avarages of corresponding elements of two
2327 /// 128-bit unsigned [8 x i16] vectors, saving each result in the
2328 /// corresponding element of a 128-bit result vector of [8 x i16].
2329 ///
2330 /// \headerfile <x86intrin.h>
2331 ///
2332 /// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.
2333 ///
2334 /// \param __a
2335 /// A 128-bit unsigned [8 x i16] vector.
2336 /// \param __b
2337 /// A 128-bit unsigned [8 x i16] vector.
2338 /// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
2339 /// averages of both parameters.
2340 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_avg_epu16(__m128i __a,__m128i __b)2341 _mm_avg_epu16(__m128i __a, __m128i __b)
2342 {
2343 typedef unsigned int __v8su __attribute__ ((__vector_size__ (32)));
2344 return (__m128i)__builtin_convertvector(
2345 ((__builtin_convertvector((__v8hu)__a, __v8su) +
2346 __builtin_convertvector((__v8hu)__b, __v8su)) + 1)
2347 >> 1, __v8hu);
2348 }
2349
2350 /// Multiplies the corresponding elements of two 128-bit signed [8 x i16]
2351 /// vectors, producing eight intermediate 32-bit signed integer products, and
2352 /// adds the consecutive pairs of 32-bit products to form a 128-bit signed
2353 /// [4 x i32] vector.
2354 ///
2355 /// For example, bits [15:0] of both parameters are multiplied producing a
2356 /// 32-bit product, bits [31:16] of both parameters are multiplied producing
2357 /// a 32-bit product, and the sum of those two products becomes bits [31:0]
2358 /// of the result.
2359 ///
2360 /// \headerfile <x86intrin.h>
2361 ///
2362 /// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.
2363 ///
2364 /// \param __a
2365 /// A 128-bit signed [8 x i16] vector.
2366 /// \param __b
2367 /// A 128-bit signed [8 x i16] vector.
2368 /// \returns A 128-bit signed [4 x i32] vector containing the sums of products
2369 /// of both parameters.
2370 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_madd_epi16(__m128i __a,__m128i __b)2371 _mm_madd_epi16(__m128i __a, __m128i __b)
2372 {
2373 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
2374 }
2375
2376 /// Compares corresponding elements of two 128-bit signed [8 x i16]
2377 /// vectors, saving the greater value from each comparison in the
2378 /// corresponding element of a 128-bit result vector of [8 x i16].
2379 ///
2380 /// \headerfile <x86intrin.h>
2381 ///
2382 /// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.
2383 ///
2384 /// \param __a
2385 /// A 128-bit signed [8 x i16] vector.
2386 /// \param __b
2387 /// A 128-bit signed [8 x i16] vector.
2388 /// \returns A 128-bit signed [8 x i16] vector containing the greater value of
2389 /// each comparison.
2390 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_max_epi16(__m128i __a,__m128i __b)2391 _mm_max_epi16(__m128i __a, __m128i __b)
2392 {
2393 return (__m128i)__builtin_ia32_pmaxsw128((__v8hi)__a, (__v8hi)__b);
2394 }
2395
2396 /// Compares corresponding elements of two 128-bit unsigned [16 x i8]
2397 /// vectors, saving the greater value from each comparison in the
2398 /// corresponding element of a 128-bit result vector of [16 x i8].
2399 ///
2400 /// \headerfile <x86intrin.h>
2401 ///
2402 /// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.
2403 ///
2404 /// \param __a
2405 /// A 128-bit unsigned [16 x i8] vector.
2406 /// \param __b
2407 /// A 128-bit unsigned [16 x i8] vector.
2408 /// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
2409 /// each comparison.
2410 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_max_epu8(__m128i __a,__m128i __b)2411 _mm_max_epu8(__m128i __a, __m128i __b)
2412 {
2413 return (__m128i)__builtin_ia32_pmaxub128((__v16qi)__a, (__v16qi)__b);
2414 }
2415
2416 /// Compares corresponding elements of two 128-bit signed [8 x i16]
2417 /// vectors, saving the smaller value from each comparison in the
2418 /// corresponding element of a 128-bit result vector of [8 x i16].
2419 ///
2420 /// \headerfile <x86intrin.h>
2421 ///
2422 /// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.
2423 ///
2424 /// \param __a
2425 /// A 128-bit signed [8 x i16] vector.
2426 /// \param __b
2427 /// A 128-bit signed [8 x i16] vector.
2428 /// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
2429 /// each comparison.
2430 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_min_epi16(__m128i __a,__m128i __b)2431 _mm_min_epi16(__m128i __a, __m128i __b)
2432 {
2433 return (__m128i)__builtin_ia32_pminsw128((__v8hi)__a, (__v8hi)__b);
2434 }
2435
2436 /// Compares corresponding elements of two 128-bit unsigned [16 x i8]
2437 /// vectors, saving the smaller value from each comparison in the
2438 /// corresponding element of a 128-bit result vector of [16 x i8].
2439 ///
2440 /// \headerfile <x86intrin.h>
2441 ///
2442 /// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.
2443 ///
2444 /// \param __a
2445 /// A 128-bit unsigned [16 x i8] vector.
2446 /// \param __b
2447 /// A 128-bit unsigned [16 x i8] vector.
2448 /// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
2449 /// each comparison.
2450 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_min_epu8(__m128i __a,__m128i __b)2451 _mm_min_epu8(__m128i __a, __m128i __b)
2452 {
2453 return (__m128i)__builtin_ia32_pminub128((__v16qi)__a, (__v16qi)__b);
2454 }
2455
2456 /// Multiplies the corresponding elements of two signed [8 x i16]
2457 /// vectors, saving the upper 16 bits of each 32-bit product in the
2458 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2459 ///
2460 /// \headerfile <x86intrin.h>
2461 ///
2462 /// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.
2463 ///
2464 /// \param __a
2465 /// A 128-bit signed [8 x i16] vector.
2466 /// \param __b
2467 /// A 128-bit signed [8 x i16] vector.
2468 /// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
2469 /// each of the eight 32-bit products.
2470 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mulhi_epi16(__m128i __a,__m128i __b)2471 _mm_mulhi_epi16(__m128i __a, __m128i __b)
2472 {
2473 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
2474 }
2475
2476 /// Multiplies the corresponding elements of two unsigned [8 x i16]
2477 /// vectors, saving the upper 16 bits of each 32-bit product in the
2478 /// corresponding element of a 128-bit unsigned [8 x i16] result vector.
2479 ///
2480 /// \headerfile <x86intrin.h>
2481 ///
2482 /// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.
2483 ///
2484 /// \param __a
2485 /// A 128-bit unsigned [8 x i16] vector.
2486 /// \param __b
2487 /// A 128-bit unsigned [8 x i16] vector.
2488 /// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
2489 /// of each of the eight 32-bit products.
2490 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mulhi_epu16(__m128i __a,__m128i __b)2491 _mm_mulhi_epu16(__m128i __a, __m128i __b)
2492 {
2493 return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
2494 }
2495
2496 /// Multiplies the corresponding elements of two signed [8 x i16]
2497 /// vectors, saving the lower 16 bits of each 32-bit product in the
2498 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2499 ///
2500 /// \headerfile <x86intrin.h>
2501 ///
2502 /// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.
2503 ///
2504 /// \param __a
2505 /// A 128-bit signed [8 x i16] vector.
2506 /// \param __b
2507 /// A 128-bit signed [8 x i16] vector.
2508 /// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
2509 /// each of the eight 32-bit products.
2510 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mullo_epi16(__m128i __a,__m128i __b)2511 _mm_mullo_epi16(__m128i __a, __m128i __b)
2512 {
2513 return (__m128i)((__v8hu)__a * (__v8hu)__b);
2514 }
2515
2516 /// Multiplies 32-bit unsigned integer values contained in the lower bits
2517 /// of the two 64-bit integer vectors and returns the 64-bit unsigned
2518 /// product.
2519 ///
2520 /// \headerfile <x86intrin.h>
2521 ///
2522 /// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.
2523 ///
2524 /// \param __a
2525 /// A 64-bit integer containing one of the source operands.
2526 /// \param __b
2527 /// A 64-bit integer containing one of the source operands.
2528 /// \returns A 64-bit integer vector containing the product of both operands.
2529 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
_mm_mul_su32(__m64 __a,__m64 __b)2530 _mm_mul_su32(__m64 __a, __m64 __b)
2531 {
2532 return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
2533 }
2534
2535 /// Multiplies 32-bit unsigned integer values contained in the lower
2536 /// bits of the corresponding elements of two [2 x i64] vectors, and returns
2537 /// the 64-bit products in the corresponding elements of a [2 x i64] vector.
2538 ///
2539 /// \headerfile <x86intrin.h>
2540 ///
2541 /// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.
2542 ///
2543 /// \param __a
2544 /// A [2 x i64] vector containing one of the source operands.
2545 /// \param __b
2546 /// A [2 x i64] vector containing one of the source operands.
2547 /// \returns A [2 x i64] vector containing the product of both operands.
2548 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_mul_epu32(__m128i __a,__m128i __b)2549 _mm_mul_epu32(__m128i __a, __m128i __b)
2550 {
2551 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
2552 }
2553
2554 /// Computes the absolute differences of corresponding 8-bit integer
2555 /// values in two 128-bit vectors. Sums the first 8 absolute differences, and
2556 /// separately sums the second 8 absolute differences. Packs these two
2557 /// unsigned 16-bit integer sums into the upper and lower elements of a
2558 /// [2 x i64] vector.
2559 ///
2560 /// \headerfile <x86intrin.h>
2561 ///
2562 /// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.
2563 ///
2564 /// \param __a
2565 /// A 128-bit integer vector containing one of the source operands.
2566 /// \param __b
2567 /// A 128-bit integer vector containing one of the source operands.
2568 /// \returns A [2 x i64] vector containing the sums of the sets of absolute
2569 /// differences between both operands.
2570 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sad_epu8(__m128i __a,__m128i __b)2571 _mm_sad_epu8(__m128i __a, __m128i __b)
2572 {
2573 return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
2574 }
2575
2576 /// Subtracts the corresponding 8-bit integer values in the operands.
2577 ///
2578 /// \headerfile <x86intrin.h>
2579 ///
2580 /// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.
2581 ///
2582 /// \param __a
2583 /// A 128-bit integer vector containing the minuends.
2584 /// \param __b
2585 /// A 128-bit integer vector containing the subtrahends.
2586 /// \returns A 128-bit integer vector containing the differences of the values
2587 /// in the operands.
2588 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sub_epi8(__m128i __a,__m128i __b)2589 _mm_sub_epi8(__m128i __a, __m128i __b)
2590 {
2591 return (__m128i)((__v16qu)__a - (__v16qu)__b);
2592 }
2593
2594 /// Subtracts the corresponding 16-bit integer values in the operands.
2595 ///
2596 /// \headerfile <x86intrin.h>
2597 ///
2598 /// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.
2599 ///
2600 /// \param __a
2601 /// A 128-bit integer vector containing the minuends.
2602 /// \param __b
2603 /// A 128-bit integer vector containing the subtrahends.
2604 /// \returns A 128-bit integer vector containing the differences of the values
2605 /// in the operands.
2606 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sub_epi16(__m128i __a,__m128i __b)2607 _mm_sub_epi16(__m128i __a, __m128i __b)
2608 {
2609 return (__m128i)((__v8hu)__a - (__v8hu)__b);
2610 }
2611
2612 /// Subtracts the corresponding 32-bit integer values in the operands.
2613 ///
2614 /// \headerfile <x86intrin.h>
2615 ///
2616 /// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.
2617 ///
2618 /// \param __a
2619 /// A 128-bit integer vector containing the minuends.
2620 /// \param __b
2621 /// A 128-bit integer vector containing the subtrahends.
2622 /// \returns A 128-bit integer vector containing the differences of the values
2623 /// in the operands.
2624 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sub_epi32(__m128i __a,__m128i __b)2625 _mm_sub_epi32(__m128i __a, __m128i __b)
2626 {
2627 return (__m128i)((__v4su)__a - (__v4su)__b);
2628 }
2629
2630 /// Subtracts signed or unsigned 64-bit integer values and writes the
2631 /// difference to the corresponding bits in the destination.
2632 ///
2633 /// \headerfile <x86intrin.h>
2634 ///
2635 /// This intrinsic corresponds to the <c> PSUBQ </c> instruction.
2636 ///
2637 /// \param __a
2638 /// A 64-bit integer vector containing the minuend.
2639 /// \param __b
2640 /// A 64-bit integer vector containing the subtrahend.
2641 /// \returns A 64-bit integer vector containing the difference of the values in
2642 /// the operands.
2643 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
_mm_sub_si64(__m64 __a,__m64 __b)2644 _mm_sub_si64(__m64 __a, __m64 __b)
2645 {
2646 return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
2647 }
2648
2649 /// Subtracts the corresponding elements of two [2 x i64] vectors.
2650 ///
2651 /// \headerfile <x86intrin.h>
2652 ///
2653 /// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.
2654 ///
2655 /// \param __a
2656 /// A 128-bit integer vector containing the minuends.
2657 /// \param __b
2658 /// A 128-bit integer vector containing the subtrahends.
2659 /// \returns A 128-bit integer vector containing the differences of the values
2660 /// in the operands.
2661 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sub_epi64(__m128i __a,__m128i __b)2662 _mm_sub_epi64(__m128i __a, __m128i __b)
2663 {
2664 return (__m128i)((__v2du)__a - (__v2du)__b);
2665 }
2666
2667 /// Subtracts corresponding 8-bit signed integer values in the input and
2668 /// returns the differences in the corresponding bytes in the destination.
2669 /// Differences greater than 0x7F are saturated to 0x7F, and differences less
2670 /// than 0x80 are saturated to 0x80.
2671 ///
2672 /// \headerfile <x86intrin.h>
2673 ///
2674 /// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.
2675 ///
2676 /// \param __a
2677 /// A 128-bit integer vector containing the minuends.
2678 /// \param __b
2679 /// A 128-bit integer vector containing the subtrahends.
2680 /// \returns A 128-bit integer vector containing the differences of the values
2681 /// in the operands.
2682 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_subs_epi8(__m128i __a,__m128i __b)2683 _mm_subs_epi8(__m128i __a, __m128i __b)
2684 {
2685 return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
2686 }
2687
2688 /// Subtracts corresponding 16-bit signed integer values in the input and
2689 /// returns the differences in the corresponding bytes in the destination.
2690 /// Differences greater than 0x7FFF are saturated to 0x7FFF, and values less
2691 /// than 0x8000 are saturated to 0x8000.
2692 ///
2693 /// \headerfile <x86intrin.h>
2694 ///
2695 /// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.
2696 ///
2697 /// \param __a
2698 /// A 128-bit integer vector containing the minuends.
2699 /// \param __b
2700 /// A 128-bit integer vector containing the subtrahends.
2701 /// \returns A 128-bit integer vector containing the differences of the values
2702 /// in the operands.
2703 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_subs_epi16(__m128i __a,__m128i __b)2704 _mm_subs_epi16(__m128i __a, __m128i __b)
2705 {
2706 return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
2707 }
2708
2709 /// Subtracts corresponding 8-bit unsigned integer values in the input
2710 /// and returns the differences in the corresponding bytes in the
2711 /// destination. Differences less than 0x00 are saturated to 0x00.
2712 ///
2713 /// \headerfile <x86intrin.h>
2714 ///
2715 /// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.
2716 ///
2717 /// \param __a
2718 /// A 128-bit integer vector containing the minuends.
2719 /// \param __b
2720 /// A 128-bit integer vector containing the subtrahends.
2721 /// \returns A 128-bit integer vector containing the unsigned integer
2722 /// differences of the values in the operands.
2723 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_subs_epu8(__m128i __a,__m128i __b)2724 _mm_subs_epu8(__m128i __a, __m128i __b)
2725 {
2726 return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
2727 }
2728
2729 /// Subtracts corresponding 16-bit unsigned integer values in the input
2730 /// and returns the differences in the corresponding bytes in the
2731 /// destination. Differences less than 0x0000 are saturated to 0x0000.
2732 ///
2733 /// \headerfile <x86intrin.h>
2734 ///
2735 /// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.
2736 ///
2737 /// \param __a
2738 /// A 128-bit integer vector containing the minuends.
2739 /// \param __b
2740 /// A 128-bit integer vector containing the subtrahends.
2741 /// \returns A 128-bit integer vector containing the unsigned integer
2742 /// differences of the values in the operands.
2743 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_subs_epu16(__m128i __a,__m128i __b)2744 _mm_subs_epu16(__m128i __a, __m128i __b)
2745 {
2746 return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
2747 }
2748
2749 /// Performs a bitwise AND of two 128-bit integer vectors.
2750 ///
2751 /// \headerfile <x86intrin.h>
2752 ///
2753 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
2754 ///
2755 /// \param __a
2756 /// A 128-bit integer vector containing one of the source operands.
2757 /// \param __b
2758 /// A 128-bit integer vector containing one of the source operands.
2759 /// \returns A 128-bit integer vector containing the bitwise AND of the values
2760 /// in both operands.
2761 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_and_si128(__m128i __a,__m128i __b)2762 _mm_and_si128(__m128i __a, __m128i __b)
2763 {
2764 return (__m128i)((__v2du)__a & (__v2du)__b);
2765 }
2766
2767 /// Performs a bitwise AND of two 128-bit integer vectors, using the
2768 /// one's complement of the values contained in the first source operand.
2769 ///
2770 /// \headerfile <x86intrin.h>
2771 ///
2772 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
2773 ///
2774 /// \param __a
2775 /// A 128-bit vector containing the left source operand. The one's complement
2776 /// of this value is used in the bitwise AND.
2777 /// \param __b
2778 /// A 128-bit vector containing the right source operand.
2779 /// \returns A 128-bit integer vector containing the bitwise AND of the one's
2780 /// complement of the first operand and the values in the second operand.
2781 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_andnot_si128(__m128i __a,__m128i __b)2782 _mm_andnot_si128(__m128i __a, __m128i __b)
2783 {
2784 return (__m128i)(~(__v2du)__a & (__v2du)__b);
2785 }
2786 /// Performs a bitwise OR of two 128-bit integer vectors.
2787 ///
2788 /// \headerfile <x86intrin.h>
2789 ///
2790 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
2791 ///
2792 /// \param __a
2793 /// A 128-bit integer vector containing one of the source operands.
2794 /// \param __b
2795 /// A 128-bit integer vector containing one of the source operands.
2796 /// \returns A 128-bit integer vector containing the bitwise OR of the values
2797 /// in both operands.
2798 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_or_si128(__m128i __a,__m128i __b)2799 _mm_or_si128(__m128i __a, __m128i __b)
2800 {
2801 return (__m128i)((__v2du)__a | (__v2du)__b);
2802 }
2803
2804 /// Performs a bitwise exclusive OR of two 128-bit integer vectors.
2805 ///
2806 /// \headerfile <x86intrin.h>
2807 ///
2808 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
2809 ///
2810 /// \param __a
2811 /// A 128-bit integer vector containing one of the source operands.
2812 /// \param __b
2813 /// A 128-bit integer vector containing one of the source operands.
2814 /// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
2815 /// values in both operands.
2816 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_xor_si128(__m128i __a,__m128i __b)2817 _mm_xor_si128(__m128i __a, __m128i __b)
2818 {
2819 return (__m128i)((__v2du)__a ^ (__v2du)__b);
2820 }
2821
2822 /// Left-shifts the 128-bit integer vector operand by the specified
2823 /// number of bytes. Low-order bits are cleared.
2824 ///
2825 /// \headerfile <x86intrin.h>
2826 ///
2827 /// \code
2828 /// __m128i _mm_slli_si128(__m128i a, const int imm);
2829 /// \endcode
2830 ///
2831 /// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.
2832 ///
2833 /// \param a
2834 /// A 128-bit integer vector containing the source operand.
2835 /// \param imm
2836 /// An immediate value specifying the number of bytes to left-shift operand
2837 /// \a a.
2838 /// \returns A 128-bit integer vector containing the left-shifted value.
2839 #define _mm_slli_si128(a, imm) \
2840 (__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
2841
2842 #define _mm_bslli_si128(a, imm) \
2843 (__m128i)__builtin_ia32_pslldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
2844
2845 /// Left-shifts each 16-bit value in the 128-bit integer vector operand
2846 /// by the specified number of bits. Low-order bits are cleared.
2847 ///
2848 /// \headerfile <x86intrin.h>
2849 ///
2850 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2851 ///
2852 /// \param __a
2853 /// A 128-bit integer vector containing the source operand.
2854 /// \param __count
2855 /// An integer value specifying the number of bits to left-shift each value
2856 /// in operand \a __a.
2857 /// \returns A 128-bit integer vector containing the left-shifted values.
2858 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_slli_epi16(__m128i __a,int __count)2859 _mm_slli_epi16(__m128i __a, int __count)
2860 {
2861 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
2862 }
2863
2864 /// Left-shifts each 16-bit value in the 128-bit integer vector operand
2865 /// by the specified number of bits. Low-order bits are cleared.
2866 ///
2867 /// \headerfile <x86intrin.h>
2868 ///
2869 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2870 ///
2871 /// \param __a
2872 /// A 128-bit integer vector containing the source operand.
2873 /// \param __count
2874 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2875 /// to left-shift each value in operand \a __a.
2876 /// \returns A 128-bit integer vector containing the left-shifted values.
2877 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sll_epi16(__m128i __a,__m128i __count)2878 _mm_sll_epi16(__m128i __a, __m128i __count)
2879 {
2880 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
2881 }
2882
2883 /// Left-shifts each 32-bit value in the 128-bit integer vector operand
2884 /// by the specified number of bits. Low-order bits are cleared.
2885 ///
2886 /// \headerfile <x86intrin.h>
2887 ///
2888 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2889 ///
2890 /// \param __a
2891 /// A 128-bit integer vector containing the source operand.
2892 /// \param __count
2893 /// An integer value specifying the number of bits to left-shift each value
2894 /// in operand \a __a.
2895 /// \returns A 128-bit integer vector containing the left-shifted values.
2896 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_slli_epi32(__m128i __a,int __count)2897 _mm_slli_epi32(__m128i __a, int __count)
2898 {
2899 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
2900 }
2901
2902 /// Left-shifts each 32-bit value in the 128-bit integer vector operand
2903 /// by the specified number of bits. Low-order bits are cleared.
2904 ///
2905 /// \headerfile <x86intrin.h>
2906 ///
2907 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2908 ///
2909 /// \param __a
2910 /// A 128-bit integer vector containing the source operand.
2911 /// \param __count
2912 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2913 /// to left-shift each value in operand \a __a.
2914 /// \returns A 128-bit integer vector containing the left-shifted values.
2915 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sll_epi32(__m128i __a,__m128i __count)2916 _mm_sll_epi32(__m128i __a, __m128i __count)
2917 {
2918 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
2919 }
2920
2921 /// Left-shifts each 64-bit value in the 128-bit integer vector operand
2922 /// by the specified number of bits. Low-order bits are cleared.
2923 ///
2924 /// \headerfile <x86intrin.h>
2925 ///
2926 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2927 ///
2928 /// \param __a
2929 /// A 128-bit integer vector containing the source operand.
2930 /// \param __count
2931 /// An integer value specifying the number of bits to left-shift each value
2932 /// in operand \a __a.
2933 /// \returns A 128-bit integer vector containing the left-shifted values.
2934 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_slli_epi64(__m128i __a,int __count)2935 _mm_slli_epi64(__m128i __a, int __count)
2936 {
2937 return __builtin_ia32_psllqi128((__v2di)__a, __count);
2938 }
2939
2940 /// Left-shifts each 64-bit value in the 128-bit integer vector operand
2941 /// by the specified number of bits. Low-order bits are cleared.
2942 ///
2943 /// \headerfile <x86intrin.h>
2944 ///
2945 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2946 ///
2947 /// \param __a
2948 /// A 128-bit integer vector containing the source operand.
2949 /// \param __count
2950 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2951 /// to left-shift each value in operand \a __a.
2952 /// \returns A 128-bit integer vector containing the left-shifted values.
2953 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sll_epi64(__m128i __a,__m128i __count)2954 _mm_sll_epi64(__m128i __a, __m128i __count)
2955 {
2956 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
2957 }
2958
2959 /// Right-shifts each 16-bit value in the 128-bit integer vector operand
2960 /// by the specified number of bits. High-order bits are filled with the sign
2961 /// bit of the initial value.
2962 ///
2963 /// \headerfile <x86intrin.h>
2964 ///
2965 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2966 ///
2967 /// \param __a
2968 /// A 128-bit integer vector containing the source operand.
2969 /// \param __count
2970 /// An integer value specifying the number of bits to right-shift each value
2971 /// in operand \a __a.
2972 /// \returns A 128-bit integer vector containing the right-shifted values.
2973 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srai_epi16(__m128i __a,int __count)2974 _mm_srai_epi16(__m128i __a, int __count)
2975 {
2976 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
2977 }
2978
2979 /// Right-shifts each 16-bit value in the 128-bit integer vector operand
2980 /// by the specified number of bits. High-order bits are filled with the sign
2981 /// bit of the initial value.
2982 ///
2983 /// \headerfile <x86intrin.h>
2984 ///
2985 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2986 ///
2987 /// \param __a
2988 /// A 128-bit integer vector containing the source operand.
2989 /// \param __count
2990 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2991 /// to right-shift each value in operand \a __a.
2992 /// \returns A 128-bit integer vector containing the right-shifted values.
2993 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sra_epi16(__m128i __a,__m128i __count)2994 _mm_sra_epi16(__m128i __a, __m128i __count)
2995 {
2996 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
2997 }
2998
2999 /// Right-shifts each 32-bit value in the 128-bit integer vector operand
3000 /// by the specified number of bits. High-order bits are filled with the sign
3001 /// bit of the initial value.
3002 ///
3003 /// \headerfile <x86intrin.h>
3004 ///
3005 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
3006 ///
3007 /// \param __a
3008 /// A 128-bit integer vector containing the source operand.
3009 /// \param __count
3010 /// An integer value specifying the number of bits to right-shift each value
3011 /// in operand \a __a.
3012 /// \returns A 128-bit integer vector containing the right-shifted values.
3013 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srai_epi32(__m128i __a,int __count)3014 _mm_srai_epi32(__m128i __a, int __count)
3015 {
3016 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
3017 }
3018
3019 /// Right-shifts each 32-bit value in the 128-bit integer vector operand
3020 /// by the specified number of bits. High-order bits are filled with the sign
3021 /// bit of the initial value.
3022 ///
3023 /// \headerfile <x86intrin.h>
3024 ///
3025 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
3026 ///
3027 /// \param __a
3028 /// A 128-bit integer vector containing the source operand.
3029 /// \param __count
3030 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3031 /// to right-shift each value in operand \a __a.
3032 /// \returns A 128-bit integer vector containing the right-shifted values.
3033 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_sra_epi32(__m128i __a,__m128i __count)3034 _mm_sra_epi32(__m128i __a, __m128i __count)
3035 {
3036 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
3037 }
3038
3039 /// Right-shifts the 128-bit integer vector operand by the specified
3040 /// number of bytes. High-order bits are cleared.
3041 ///
3042 /// \headerfile <x86intrin.h>
3043 ///
3044 /// \code
3045 /// __m128i _mm_srli_si128(__m128i a, const int imm);
3046 /// \endcode
3047 ///
3048 /// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.
3049 ///
3050 /// \param a
3051 /// A 128-bit integer vector containing the source operand.
3052 /// \param imm
3053 /// An immediate value specifying the number of bytes to right-shift operand
3054 /// \a a.
3055 /// \returns A 128-bit integer vector containing the right-shifted value.
3056 #define _mm_srli_si128(a, imm) \
3057 (__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
3058
3059 #define _mm_bsrli_si128(a, imm) \
3060 (__m128i)__builtin_ia32_psrldqi128_byteshift((__v2di)(__m128i)(a), (int)(imm))
3061
3062 /// Right-shifts each of 16-bit values in the 128-bit integer vector
3063 /// operand by the specified number of bits. High-order bits are cleared.
3064 ///
3065 /// \headerfile <x86intrin.h>
3066 ///
3067 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3068 ///
3069 /// \param __a
3070 /// A 128-bit integer vector containing the source operand.
3071 /// \param __count
3072 /// An integer value specifying the number of bits to right-shift each value
3073 /// in operand \a __a.
3074 /// \returns A 128-bit integer vector containing the right-shifted values.
3075 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srli_epi16(__m128i __a,int __count)3076 _mm_srli_epi16(__m128i __a, int __count)
3077 {
3078 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
3079 }
3080
3081 /// Right-shifts each of 16-bit values in the 128-bit integer vector
3082 /// operand by the specified number of bits. High-order bits are cleared.
3083 ///
3084 /// \headerfile <x86intrin.h>
3085 ///
3086 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3087 ///
3088 /// \param __a
3089 /// A 128-bit integer vector containing the source operand.
3090 /// \param __count
3091 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3092 /// to right-shift each value in operand \a __a.
3093 /// \returns A 128-bit integer vector containing the right-shifted values.
3094 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srl_epi16(__m128i __a,__m128i __count)3095 _mm_srl_epi16(__m128i __a, __m128i __count)
3096 {
3097 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
3098 }
3099
3100 /// Right-shifts each of 32-bit values in the 128-bit integer vector
3101 /// operand by the specified number of bits. High-order bits are cleared.
3102 ///
3103 /// \headerfile <x86intrin.h>
3104 ///
3105 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3106 ///
3107 /// \param __a
3108 /// A 128-bit integer vector containing the source operand.
3109 /// \param __count
3110 /// An integer value specifying the number of bits to right-shift each value
3111 /// in operand \a __a.
3112 /// \returns A 128-bit integer vector containing the right-shifted values.
3113 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srli_epi32(__m128i __a,int __count)3114 _mm_srli_epi32(__m128i __a, int __count)
3115 {
3116 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
3117 }
3118
3119 /// Right-shifts each of 32-bit values in the 128-bit integer vector
3120 /// operand by the specified number of bits. High-order bits are cleared.
3121 ///
3122 /// \headerfile <x86intrin.h>
3123 ///
3124 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3125 ///
3126 /// \param __a
3127 /// A 128-bit integer vector containing the source operand.
3128 /// \param __count
3129 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3130 /// to right-shift each value in operand \a __a.
3131 /// \returns A 128-bit integer vector containing the right-shifted values.
3132 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srl_epi32(__m128i __a,__m128i __count)3133 _mm_srl_epi32(__m128i __a, __m128i __count)
3134 {
3135 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
3136 }
3137
3138 /// Right-shifts each of 64-bit values in the 128-bit integer vector
3139 /// operand by the specified number of bits. High-order bits are cleared.
3140 ///
3141 /// \headerfile <x86intrin.h>
3142 ///
3143 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3144 ///
3145 /// \param __a
3146 /// A 128-bit integer vector containing the source operand.
3147 /// \param __count
3148 /// An integer value specifying the number of bits to right-shift each value
3149 /// in operand \a __a.
3150 /// \returns A 128-bit integer vector containing the right-shifted values.
3151 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srli_epi64(__m128i __a,int __count)3152 _mm_srli_epi64(__m128i __a, int __count)
3153 {
3154 return __builtin_ia32_psrlqi128((__v2di)__a, __count);
3155 }
3156
3157 /// Right-shifts each of 64-bit values in the 128-bit integer vector
3158 /// operand by the specified number of bits. High-order bits are cleared.
3159 ///
3160 /// \headerfile <x86intrin.h>
3161 ///
3162 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3163 ///
3164 /// \param __a
3165 /// A 128-bit integer vector containing the source operand.
3166 /// \param __count
3167 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3168 /// to right-shift each value in operand \a __a.
3169 /// \returns A 128-bit integer vector containing the right-shifted values.
3170 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_srl_epi64(__m128i __a,__m128i __count)3171 _mm_srl_epi64(__m128i __a, __m128i __count)
3172 {
3173 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
3174 }
3175
3176 /// Compares each of the corresponding 8-bit values of the 128-bit
3177 /// integer vectors for equality. Each comparison yields 0x0 for false, 0xFF
3178 /// for true.
3179 ///
3180 /// \headerfile <x86intrin.h>
3181 ///
3182 /// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.
3183 ///
3184 /// \param __a
3185 /// A 128-bit integer vector.
3186 /// \param __b
3187 /// A 128-bit integer vector.
3188 /// \returns A 128-bit integer vector containing the comparison results.
3189 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmpeq_epi8(__m128i __a,__m128i __b)3190 _mm_cmpeq_epi8(__m128i __a, __m128i __b)
3191 {
3192 return (__m128i)((__v16qi)__a == (__v16qi)__b);
3193 }
3194
3195 /// Compares each of the corresponding 16-bit values of the 128-bit
3196 /// integer vectors for equality. Each comparison yields 0x0 for false,
3197 /// 0xFFFF for true.
3198 ///
3199 /// \headerfile <x86intrin.h>
3200 ///
3201 /// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.
3202 ///
3203 /// \param __a
3204 /// A 128-bit integer vector.
3205 /// \param __b
3206 /// A 128-bit integer vector.
3207 /// \returns A 128-bit integer vector containing the comparison results.
3208 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmpeq_epi16(__m128i __a,__m128i __b)3209 _mm_cmpeq_epi16(__m128i __a, __m128i __b)
3210 {
3211 return (__m128i)((__v8hi)__a == (__v8hi)__b);
3212 }
3213
3214 /// Compares each of the corresponding 32-bit values of the 128-bit
3215 /// integer vectors for equality. Each comparison yields 0x0 for false,
3216 /// 0xFFFFFFFF for true.
3217 ///
3218 /// \headerfile <x86intrin.h>
3219 ///
3220 /// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.
3221 ///
3222 /// \param __a
3223 /// A 128-bit integer vector.
3224 /// \param __b
3225 /// A 128-bit integer vector.
3226 /// \returns A 128-bit integer vector containing the comparison results.
3227 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmpeq_epi32(__m128i __a,__m128i __b)3228 _mm_cmpeq_epi32(__m128i __a, __m128i __b)
3229 {
3230 return (__m128i)((__v4si)__a == (__v4si)__b);
3231 }
3232
3233 /// Compares each of the corresponding signed 8-bit values of the 128-bit
3234 /// integer vectors to determine if the values in the first operand are
3235 /// greater than those in the second operand. Each comparison yields 0x0 for
3236 /// false, 0xFF for true.
3237 ///
3238 /// \headerfile <x86intrin.h>
3239 ///
3240 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3241 ///
3242 /// \param __a
3243 /// A 128-bit integer vector.
3244 /// \param __b
3245 /// A 128-bit integer vector.
3246 /// \returns A 128-bit integer vector containing the comparison results.
3247 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmpgt_epi8(__m128i __a,__m128i __b)3248 _mm_cmpgt_epi8(__m128i __a, __m128i __b)
3249 {
3250 /* This function always performs a signed comparison, but __v16qi is a char
3251 which may be signed or unsigned, so use __v16qs. */
3252 return (__m128i)((__v16qs)__a > (__v16qs)__b);
3253 }
3254
3255 /// Compares each of the corresponding signed 16-bit values of the
3256 /// 128-bit integer vectors to determine if the values in the first operand
3257 /// are greater than those in the second operand.
3258 ///
3259 /// Each comparison yields 0x0 for false, 0xFFFF for true.
3260 ///
3261 /// \headerfile <x86intrin.h>
3262 ///
3263 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3264 ///
3265 /// \param __a
3266 /// A 128-bit integer vector.
3267 /// \param __b
3268 /// A 128-bit integer vector.
3269 /// \returns A 128-bit integer vector containing the comparison results.
3270 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmpgt_epi16(__m128i __a,__m128i __b)3271 _mm_cmpgt_epi16(__m128i __a, __m128i __b)
3272 {
3273 return (__m128i)((__v8hi)__a > (__v8hi)__b);
3274 }
3275
3276 /// Compares each of the corresponding signed 32-bit values of the
3277 /// 128-bit integer vectors to determine if the values in the first operand
3278 /// are greater than those in the second operand.
3279 ///
3280 /// Each comparison yields 0x0 for false, 0xFFFFFFFF for true.
3281 ///
3282 /// \headerfile <x86intrin.h>
3283 ///
3284 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3285 ///
3286 /// \param __a
3287 /// A 128-bit integer vector.
3288 /// \param __b
3289 /// A 128-bit integer vector.
3290 /// \returns A 128-bit integer vector containing the comparison results.
3291 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmpgt_epi32(__m128i __a,__m128i __b)3292 _mm_cmpgt_epi32(__m128i __a, __m128i __b)
3293 {
3294 return (__m128i)((__v4si)__a > (__v4si)__b);
3295 }
3296
3297 /// Compares each of the corresponding signed 8-bit values of the 128-bit
3298 /// integer vectors to determine if the values in the first operand are less
3299 /// than those in the second operand.
3300 ///
3301 /// Each comparison yields 0x0 for false, 0xFF for true.
3302 ///
3303 /// \headerfile <x86intrin.h>
3304 ///
3305 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3306 ///
3307 /// \param __a
3308 /// A 128-bit integer vector.
3309 /// \param __b
3310 /// A 128-bit integer vector.
3311 /// \returns A 128-bit integer vector containing the comparison results.
3312 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmplt_epi8(__m128i __a,__m128i __b)3313 _mm_cmplt_epi8(__m128i __a, __m128i __b)
3314 {
3315 return _mm_cmpgt_epi8(__b, __a);
3316 }
3317
3318 /// Compares each of the corresponding signed 16-bit values of the
3319 /// 128-bit integer vectors to determine if the values in the first operand
3320 /// are less than those in the second operand.
3321 ///
3322 /// Each comparison yields 0x0 for false, 0xFFFF for true.
3323 ///
3324 /// \headerfile <x86intrin.h>
3325 ///
3326 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3327 ///
3328 /// \param __a
3329 /// A 128-bit integer vector.
3330 /// \param __b
3331 /// A 128-bit integer vector.
3332 /// \returns A 128-bit integer vector containing the comparison results.
3333 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmplt_epi16(__m128i __a,__m128i __b)3334 _mm_cmplt_epi16(__m128i __a, __m128i __b)
3335 {
3336 return _mm_cmpgt_epi16(__b, __a);
3337 }
3338
3339 /// Compares each of the corresponding signed 32-bit values of the
3340 /// 128-bit integer vectors to determine if the values in the first operand
3341 /// are less than those in the second operand.
3342 ///
3343 /// Each comparison yields 0x0 for false, 0xFFFFFFFF for true.
3344 ///
3345 /// \headerfile <x86intrin.h>
3346 ///
3347 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3348 ///
3349 /// \param __a
3350 /// A 128-bit integer vector.
3351 /// \param __b
3352 /// A 128-bit integer vector.
3353 /// \returns A 128-bit integer vector containing the comparison results.
3354 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cmplt_epi32(__m128i __a,__m128i __b)3355 _mm_cmplt_epi32(__m128i __a, __m128i __b)
3356 {
3357 return _mm_cmpgt_epi32(__b, __a);
3358 }
3359
3360 #ifdef __x86_64__
3361 /// Converts a 64-bit signed integer value from the second operand into a
3362 /// double-precision value and returns it in the lower element of a [2 x
3363 /// double] vector; the upper element of the returned vector is copied from
3364 /// the upper element of the first operand.
3365 ///
3366 /// \headerfile <x86intrin.h>
3367 ///
3368 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
3369 ///
3370 /// \param __a
3371 /// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are
3372 /// copied to the upper 64 bits of the destination.
3373 /// \param __b
3374 /// A 64-bit signed integer operand containing the value to be converted.
3375 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
3376 /// converted value of the second operand. The upper 64 bits are copied from
3377 /// the upper 64 bits of the first operand.
3378 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_cvtsi64_sd(__m128d __a,long long __b)3379 _mm_cvtsi64_sd(__m128d __a, long long __b)
3380 {
3381 __a[0] = __b;
3382 return __a;
3383 }
3384
3385 /// Converts the first (lower) element of a vector of [2 x double] into a
3386 /// 64-bit signed integer value, according to the current rounding mode.
3387 ///
3388 /// \headerfile <x86intrin.h>
3389 ///
3390 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
3391 ///
3392 /// \param __a
3393 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3394 /// conversion.
3395 /// \returns A 64-bit signed integer containing the converted value.
3396 static __inline__ long long __DEFAULT_FN_ATTRS
_mm_cvtsd_si64(__m128d __a)3397 _mm_cvtsd_si64(__m128d __a)
3398 {
3399 return __builtin_ia32_cvtsd2si64((__v2df)__a);
3400 }
3401
3402 /// Converts the first (lower) element of a vector of [2 x double] into a
3403 /// 64-bit signed integer value, truncating the result when it is inexact.
3404 ///
3405 /// \headerfile <x86intrin.h>
3406 ///
3407 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
3408 /// instruction.
3409 ///
3410 /// \param __a
3411 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3412 /// conversion.
3413 /// \returns A 64-bit signed integer containing the converted value.
3414 static __inline__ long long __DEFAULT_FN_ATTRS
_mm_cvttsd_si64(__m128d __a)3415 _mm_cvttsd_si64(__m128d __a)
3416 {
3417 return __builtin_ia32_cvttsd2si64((__v2df)__a);
3418 }
3419 #endif
3420
3421 /// Converts a vector of [4 x i32] into a vector of [4 x float].
3422 ///
3423 /// \headerfile <x86intrin.h>
3424 ///
3425 /// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.
3426 ///
3427 /// \param __a
3428 /// A 128-bit integer vector.
3429 /// \returns A 128-bit vector of [4 x float] containing the converted values.
3430 static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_cvtepi32_ps(__m128i __a)3431 _mm_cvtepi32_ps(__m128i __a)
3432 {
3433 return (__m128)__builtin_convertvector((__v4si)__a, __v4sf);
3434 }
3435
3436 /// Converts a vector of [4 x float] into a vector of [4 x i32].
3437 ///
3438 /// \headerfile <x86intrin.h>
3439 ///
3440 /// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.
3441 ///
3442 /// \param __a
3443 /// A 128-bit vector of [4 x float].
3444 /// \returns A 128-bit integer vector of [4 x i32] containing the converted
3445 /// values.
3446 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cvtps_epi32(__m128 __a)3447 _mm_cvtps_epi32(__m128 __a)
3448 {
3449 return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
3450 }
3451
3452 /// Converts a vector of [4 x float] into a vector of [4 x i32],
3453 /// truncating the result when it is inexact.
3454 ///
3455 /// \headerfile <x86intrin.h>
3456 ///
3457 /// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c>
3458 /// instruction.
3459 ///
3460 /// \param __a
3461 /// A 128-bit vector of [4 x float].
3462 /// \returns A 128-bit vector of [4 x i32] containing the converted values.
3463 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cvttps_epi32(__m128 __a)3464 _mm_cvttps_epi32(__m128 __a)
3465 {
3466 return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
3467 }
3468
3469 /// Returns a vector of [4 x i32] where the lowest element is the input
3470 /// operand and the remaining elements are zero.
3471 ///
3472 /// \headerfile <x86intrin.h>
3473 ///
3474 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3475 ///
3476 /// \param __a
3477 /// A 32-bit signed integer operand.
3478 /// \returns A 128-bit vector of [4 x i32].
3479 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cvtsi32_si128(int __a)3480 _mm_cvtsi32_si128(int __a)
3481 {
3482 return __extension__ (__m128i)(__v4si){ __a, 0, 0, 0 };
3483 }
3484
3485 #ifdef __x86_64__
3486 /// Returns a vector of [2 x i64] where the lower element is the input
3487 /// operand and the upper element is zero.
3488 ///
3489 /// \headerfile <x86intrin.h>
3490 ///
3491 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3492 ///
3493 /// \param __a
3494 /// A 64-bit signed integer operand containing the value to be converted.
3495 /// \returns A 128-bit vector of [2 x i64] containing the converted value.
3496 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_cvtsi64_si128(long long __a)3497 _mm_cvtsi64_si128(long long __a)
3498 {
3499 return __extension__ (__m128i)(__v2di){ __a, 0 };
3500 }
3501 #endif
3502
3503 /// Moves the least significant 32 bits of a vector of [4 x i32] to a
3504 /// 32-bit signed integer value.
3505 ///
3506 /// \headerfile <x86intrin.h>
3507 ///
3508 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3509 ///
3510 /// \param __a
3511 /// A vector of [4 x i32]. The least significant 32 bits are moved to the
3512 /// destination.
3513 /// \returns A 32-bit signed integer containing the moved value.
3514 static __inline__ int __DEFAULT_FN_ATTRS
_mm_cvtsi128_si32(__m128i __a)3515 _mm_cvtsi128_si32(__m128i __a)
3516 {
3517 __v4si __b = (__v4si)__a;
3518 return __b[0];
3519 }
3520
3521 #ifdef __x86_64__
3522 /// Moves the least significant 64 bits of a vector of [2 x i64] to a
3523 /// 64-bit signed integer value.
3524 ///
3525 /// \headerfile <x86intrin.h>
3526 ///
3527 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3528 ///
3529 /// \param __a
3530 /// A vector of [2 x i64]. The least significant 64 bits are moved to the
3531 /// destination.
3532 /// \returns A 64-bit signed integer containing the moved value.
3533 static __inline__ long long __DEFAULT_FN_ATTRS
_mm_cvtsi128_si64(__m128i __a)3534 _mm_cvtsi128_si64(__m128i __a)
3535 {
3536 return __a[0];
3537 }
3538 #endif
3539
3540 /// Moves packed integer values from an aligned 128-bit memory location
3541 /// to elements in a 128-bit integer vector.
3542 ///
3543 /// \headerfile <x86intrin.h>
3544 ///
3545 /// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
3546 ///
3547 /// \param __p
3548 /// An aligned pointer to a memory location containing integer values.
3549 /// \returns A 128-bit integer vector containing the moved values.
3550 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_load_si128(__m128i const * __p)3551 _mm_load_si128(__m128i const *__p)
3552 {
3553 return *__p;
3554 }
3555
3556 /// Moves packed integer values from an unaligned 128-bit memory location
3557 /// to elements in a 128-bit integer vector.
3558 ///
3559 /// \headerfile <x86intrin.h>
3560 ///
3561 /// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.
3562 ///
3563 /// \param __p
3564 /// A pointer to a memory location containing integer values.
3565 /// \returns A 128-bit integer vector containing the moved values.
3566 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_loadu_si128(__m128i const * __p)3567 _mm_loadu_si128(__m128i const *__p)
3568 {
3569 struct __loadu_si128 {
3570 __m128i __v;
3571 } __attribute__((__packed__, __may_alias__));
3572 return ((struct __loadu_si128*)__p)->__v;
3573 }
3574
3575 /// Returns a vector of [2 x i64] where the lower element is taken from
3576 /// the lower element of the operand, and the upper element is zero.
3577 ///
3578 /// \headerfile <x86intrin.h>
3579 ///
3580 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3581 ///
3582 /// \param __p
3583 /// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of
3584 /// the destination.
3585 /// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
3586 /// moved value. The higher order bits are cleared.
3587 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_loadl_epi64(__m128i const * __p)3588 _mm_loadl_epi64(__m128i const *__p)
3589 {
3590 struct __mm_loadl_epi64_struct {
3591 long long __u;
3592 } __attribute__((__packed__, __may_alias__));
3593 return __extension__ (__m128i) { ((struct __mm_loadl_epi64_struct*)__p)->__u, 0};
3594 }
3595
3596 /// Generates a 128-bit vector of [4 x i32] with unspecified content.
3597 /// This could be used as an argument to another intrinsic function where the
3598 /// argument is required but the value is not actually used.
3599 ///
3600 /// \headerfile <x86intrin.h>
3601 ///
3602 /// This intrinsic has no corresponding instruction.
3603 ///
3604 /// \returns A 128-bit vector of [4 x i32] with unspecified content.
3605 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_undefined_si128(void)3606 _mm_undefined_si128(void)
3607 {
3608 return (__m128i)__builtin_ia32_undef128();
3609 }
3610
3611 /// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3612 /// the specified 64-bit integer values.
3613 ///
3614 /// \headerfile <x86intrin.h>
3615 ///
3616 /// This intrinsic is a utility function and does not correspond to a specific
3617 /// instruction.
3618 ///
3619 /// \param __q1
3620 /// A 64-bit integer value used to initialize the upper 64 bits of the
3621 /// destination vector of [2 x i64].
3622 /// \param __q0
3623 /// A 64-bit integer value used to initialize the lower 64 bits of the
3624 /// destination vector of [2 x i64].
3625 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3626 /// provided in the operands.
3627 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set_epi64x(long long __q1,long long __q0)3628 _mm_set_epi64x(long long __q1, long long __q0)
3629 {
3630 return __extension__ (__m128i)(__v2di){ __q0, __q1 };
3631 }
3632
3633 /// Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3634 /// the specified 64-bit integer values.
3635 ///
3636 /// \headerfile <x86intrin.h>
3637 ///
3638 /// This intrinsic is a utility function and does not correspond to a specific
3639 /// instruction.
3640 ///
3641 /// \param __q1
3642 /// A 64-bit integer value used to initialize the upper 64 bits of the
3643 /// destination vector of [2 x i64].
3644 /// \param __q0
3645 /// A 64-bit integer value used to initialize the lower 64 bits of the
3646 /// destination vector of [2 x i64].
3647 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3648 /// provided in the operands.
3649 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set_epi64(__m64 __q1,__m64 __q0)3650 _mm_set_epi64(__m64 __q1, __m64 __q0)
3651 {
3652 return _mm_set_epi64x((long long)__q1, (long long)__q0);
3653 }
3654
3655 /// Initializes the 32-bit values in a 128-bit vector of [4 x i32] with
3656 /// the specified 32-bit integer values.
3657 ///
3658 /// \headerfile <x86intrin.h>
3659 ///
3660 /// This intrinsic is a utility function and does not correspond to a specific
3661 /// instruction.
3662 ///
3663 /// \param __i3
3664 /// A 32-bit integer value used to initialize bits [127:96] of the
3665 /// destination vector.
3666 /// \param __i2
3667 /// A 32-bit integer value used to initialize bits [95:64] of the destination
3668 /// vector.
3669 /// \param __i1
3670 /// A 32-bit integer value used to initialize bits [63:32] of the destination
3671 /// vector.
3672 /// \param __i0
3673 /// A 32-bit integer value used to initialize bits [31:0] of the destination
3674 /// vector.
3675 /// \returns An initialized 128-bit vector of [4 x i32] containing the values
3676 /// provided in the operands.
3677 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set_epi32(int __i3,int __i2,int __i1,int __i0)3678 _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
3679 {
3680 return __extension__ (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
3681 }
3682
3683 /// Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
3684 /// the specified 16-bit integer values.
3685 ///
3686 /// \headerfile <x86intrin.h>
3687 ///
3688 /// This intrinsic is a utility function and does not correspond to a specific
3689 /// instruction.
3690 ///
3691 /// \param __w7
3692 /// A 16-bit integer value used to initialize bits [127:112] of the
3693 /// destination vector.
3694 /// \param __w6
3695 /// A 16-bit integer value used to initialize bits [111:96] of the
3696 /// destination vector.
3697 /// \param __w5
3698 /// A 16-bit integer value used to initialize bits [95:80] of the destination
3699 /// vector.
3700 /// \param __w4
3701 /// A 16-bit integer value used to initialize bits [79:64] of the destination
3702 /// vector.
3703 /// \param __w3
3704 /// A 16-bit integer value used to initialize bits [63:48] of the destination
3705 /// vector.
3706 /// \param __w2
3707 /// A 16-bit integer value used to initialize bits [47:32] of the destination
3708 /// vector.
3709 /// \param __w1
3710 /// A 16-bit integer value used to initialize bits [31:16] of the destination
3711 /// vector.
3712 /// \param __w0
3713 /// A 16-bit integer value used to initialize bits [15:0] of the destination
3714 /// vector.
3715 /// \returns An initialized 128-bit vector of [8 x i16] containing the values
3716 /// provided in the operands.
3717 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set_epi16(short __w7,short __w6,short __w5,short __w4,short __w3,short __w2,short __w1,short __w0)3718 _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short __w2, short __w1, short __w0)
3719 {
3720 return __extension__ (__m128i)(__v8hi){ __w0, __w1, __w2, __w3, __w4, __w5, __w6, __w7 };
3721 }
3722
3723 /// Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
3724 /// the specified 8-bit integer values.
3725 ///
3726 /// \headerfile <x86intrin.h>
3727 ///
3728 /// This intrinsic is a utility function and does not correspond to a specific
3729 /// instruction.
3730 ///
3731 /// \param __b15
3732 /// Initializes bits [127:120] of the destination vector.
3733 /// \param __b14
3734 /// Initializes bits [119:112] of the destination vector.
3735 /// \param __b13
3736 /// Initializes bits [111:104] of the destination vector.
3737 /// \param __b12
3738 /// Initializes bits [103:96] of the destination vector.
3739 /// \param __b11
3740 /// Initializes bits [95:88] of the destination vector.
3741 /// \param __b10
3742 /// Initializes bits [87:80] of the destination vector.
3743 /// \param __b9
3744 /// Initializes bits [79:72] of the destination vector.
3745 /// \param __b8
3746 /// Initializes bits [71:64] of the destination vector.
3747 /// \param __b7
3748 /// Initializes bits [63:56] of the destination vector.
3749 /// \param __b6
3750 /// Initializes bits [55:48] of the destination vector.
3751 /// \param __b5
3752 /// Initializes bits [47:40] of the destination vector.
3753 /// \param __b4
3754 /// Initializes bits [39:32] of the destination vector.
3755 /// \param __b3
3756 /// Initializes bits [31:24] of the destination vector.
3757 /// \param __b2
3758 /// Initializes bits [23:16] of the destination vector.
3759 /// \param __b1
3760 /// Initializes bits [15:8] of the destination vector.
3761 /// \param __b0
3762 /// Initializes bits [7:0] of the destination vector.
3763 /// \returns An initialized 128-bit vector of [16 x i8] containing the values
3764 /// provided in the operands.
3765 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set_epi8(char __b15,char __b14,char __b13,char __b12,char __b11,char __b10,char __b9,char __b8,char __b7,char __b6,char __b5,char __b4,char __b3,char __b2,char __b1,char __b0)3766 _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __b10, char __b9, char __b8, char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, char __b1, char __b0)
3767 {
3768 return __extension__ (__m128i)(__v16qi){ __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15 };
3769 }
3770
3771 /// Initializes both values in a 128-bit integer vector with the
3772 /// specified 64-bit integer value.
3773 ///
3774 /// \headerfile <x86intrin.h>
3775 ///
3776 /// This intrinsic is a utility function and does not correspond to a specific
3777 /// instruction.
3778 ///
3779 /// \param __q
3780 /// Integer value used to initialize the elements of the destination integer
3781 /// vector.
3782 /// \returns An initialized 128-bit integer vector of [2 x i64] with both
3783 /// elements containing the value provided in the operand.
3784 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set1_epi64x(long long __q)3785 _mm_set1_epi64x(long long __q)
3786 {
3787 return _mm_set_epi64x(__q, __q);
3788 }
3789
3790 /// Initializes both values in a 128-bit vector of [2 x i64] with the
3791 /// specified 64-bit value.
3792 ///
3793 /// \headerfile <x86intrin.h>
3794 ///
3795 /// This intrinsic is a utility function and does not correspond to a specific
3796 /// instruction.
3797 ///
3798 /// \param __q
3799 /// A 64-bit value used to initialize the elements of the destination integer
3800 /// vector.
3801 /// \returns An initialized 128-bit vector of [2 x i64] with all elements
3802 /// containing the value provided in the operand.
3803 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set1_epi64(__m64 __q)3804 _mm_set1_epi64(__m64 __q)
3805 {
3806 return _mm_set_epi64(__q, __q);
3807 }
3808
3809 /// Initializes all values in a 128-bit vector of [4 x i32] with the
3810 /// specified 32-bit value.
3811 ///
3812 /// \headerfile <x86intrin.h>
3813 ///
3814 /// This intrinsic is a utility function and does not correspond to a specific
3815 /// instruction.
3816 ///
3817 /// \param __i
3818 /// A 32-bit value used to initialize the elements of the destination integer
3819 /// vector.
3820 /// \returns An initialized 128-bit vector of [4 x i32] with all elements
3821 /// containing the value provided in the operand.
3822 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set1_epi32(int __i)3823 _mm_set1_epi32(int __i)
3824 {
3825 return _mm_set_epi32(__i, __i, __i, __i);
3826 }
3827
3828 /// Initializes all values in a 128-bit vector of [8 x i16] with the
3829 /// specified 16-bit value.
3830 ///
3831 /// \headerfile <x86intrin.h>
3832 ///
3833 /// This intrinsic is a utility function and does not correspond to a specific
3834 /// instruction.
3835 ///
3836 /// \param __w
3837 /// A 16-bit value used to initialize the elements of the destination integer
3838 /// vector.
3839 /// \returns An initialized 128-bit vector of [8 x i16] with all elements
3840 /// containing the value provided in the operand.
3841 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set1_epi16(short __w)3842 _mm_set1_epi16(short __w)
3843 {
3844 return _mm_set_epi16(__w, __w, __w, __w, __w, __w, __w, __w);
3845 }
3846
3847 /// Initializes all values in a 128-bit vector of [16 x i8] with the
3848 /// specified 8-bit value.
3849 ///
3850 /// \headerfile <x86intrin.h>
3851 ///
3852 /// This intrinsic is a utility function and does not correspond to a specific
3853 /// instruction.
3854 ///
3855 /// \param __b
3856 /// An 8-bit value used to initialize the elements of the destination integer
3857 /// vector.
3858 /// \returns An initialized 128-bit vector of [16 x i8] with all elements
3859 /// containing the value provided in the operand.
3860 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_set1_epi8(char __b)3861 _mm_set1_epi8(char __b)
3862 {
3863 return _mm_set_epi8(__b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b);
3864 }
3865
3866 /// Constructs a 128-bit integer vector, initialized in reverse order
3867 /// with the specified 64-bit integral values.
3868 ///
3869 /// \headerfile <x86intrin.h>
3870 ///
3871 /// This intrinsic does not correspond to a specific instruction.
3872 ///
3873 /// \param __q0
3874 /// A 64-bit integral value used to initialize the lower 64 bits of the
3875 /// result.
3876 /// \param __q1
3877 /// A 64-bit integral value used to initialize the upper 64 bits of the
3878 /// result.
3879 /// \returns An initialized 128-bit integer vector.
3880 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_setr_epi64(__m64 __q0,__m64 __q1)3881 _mm_setr_epi64(__m64 __q0, __m64 __q1)
3882 {
3883 return _mm_set_epi64(__q1, __q0);
3884 }
3885
3886 /// Constructs a 128-bit integer vector, initialized in reverse order
3887 /// with the specified 32-bit integral values.
3888 ///
3889 /// \headerfile <x86intrin.h>
3890 ///
3891 /// This intrinsic is a utility function and does not correspond to a specific
3892 /// instruction.
3893 ///
3894 /// \param __i0
3895 /// A 32-bit integral value used to initialize bits [31:0] of the result.
3896 /// \param __i1
3897 /// A 32-bit integral value used to initialize bits [63:32] of the result.
3898 /// \param __i2
3899 /// A 32-bit integral value used to initialize bits [95:64] of the result.
3900 /// \param __i3
3901 /// A 32-bit integral value used to initialize bits [127:96] of the result.
3902 /// \returns An initialized 128-bit integer vector.
3903 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_setr_epi32(int __i0,int __i1,int __i2,int __i3)3904 _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
3905 {
3906 return _mm_set_epi32(__i3, __i2, __i1, __i0);
3907 }
3908
3909 /// Constructs a 128-bit integer vector, initialized in reverse order
3910 /// with the specified 16-bit integral values.
3911 ///
3912 /// \headerfile <x86intrin.h>
3913 ///
3914 /// This intrinsic is a utility function and does not correspond to a specific
3915 /// instruction.
3916 ///
3917 /// \param __w0
3918 /// A 16-bit integral value used to initialize bits [15:0] of the result.
3919 /// \param __w1
3920 /// A 16-bit integral value used to initialize bits [31:16] of the result.
3921 /// \param __w2
3922 /// A 16-bit integral value used to initialize bits [47:32] of the result.
3923 /// \param __w3
3924 /// A 16-bit integral value used to initialize bits [63:48] of the result.
3925 /// \param __w4
3926 /// A 16-bit integral value used to initialize bits [79:64] of the result.
3927 /// \param __w5
3928 /// A 16-bit integral value used to initialize bits [95:80] of the result.
3929 /// \param __w6
3930 /// A 16-bit integral value used to initialize bits [111:96] of the result.
3931 /// \param __w7
3932 /// A 16-bit integral value used to initialize bits [127:112] of the result.
3933 /// \returns An initialized 128-bit integer vector.
3934 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_setr_epi16(short __w0,short __w1,short __w2,short __w3,short __w4,short __w5,short __w6,short __w7)3935 _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short __w5, short __w6, short __w7)
3936 {
3937 return _mm_set_epi16(__w7, __w6, __w5, __w4, __w3, __w2, __w1, __w0);
3938 }
3939
3940 /// Constructs a 128-bit integer vector, initialized in reverse order
3941 /// with the specified 8-bit integral values.
3942 ///
3943 /// \headerfile <x86intrin.h>
3944 ///
3945 /// This intrinsic is a utility function and does not correspond to a specific
3946 /// instruction.
3947 ///
3948 /// \param __b0
3949 /// An 8-bit integral value used to initialize bits [7:0] of the result.
3950 /// \param __b1
3951 /// An 8-bit integral value used to initialize bits [15:8] of the result.
3952 /// \param __b2
3953 /// An 8-bit integral value used to initialize bits [23:16] of the result.
3954 /// \param __b3
3955 /// An 8-bit integral value used to initialize bits [31:24] of the result.
3956 /// \param __b4
3957 /// An 8-bit integral value used to initialize bits [39:32] of the result.
3958 /// \param __b5
3959 /// An 8-bit integral value used to initialize bits [47:40] of the result.
3960 /// \param __b6
3961 /// An 8-bit integral value used to initialize bits [55:48] of the result.
3962 /// \param __b7
3963 /// An 8-bit integral value used to initialize bits [63:56] of the result.
3964 /// \param __b8
3965 /// An 8-bit integral value used to initialize bits [71:64] of the result.
3966 /// \param __b9
3967 /// An 8-bit integral value used to initialize bits [79:72] of the result.
3968 /// \param __b10
3969 /// An 8-bit integral value used to initialize bits [87:80] of the result.
3970 /// \param __b11
3971 /// An 8-bit integral value used to initialize bits [95:88] of the result.
3972 /// \param __b12
3973 /// An 8-bit integral value used to initialize bits [103:96] of the result.
3974 /// \param __b13
3975 /// An 8-bit integral value used to initialize bits [111:104] of the result.
3976 /// \param __b14
3977 /// An 8-bit integral value used to initialize bits [119:112] of the result.
3978 /// \param __b15
3979 /// An 8-bit integral value used to initialize bits [127:120] of the result.
3980 /// \returns An initialized 128-bit integer vector.
3981 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_setr_epi8(char __b0,char __b1,char __b2,char __b3,char __b4,char __b5,char __b6,char __b7,char __b8,char __b9,char __b10,char __b11,char __b12,char __b13,char __b14,char __b15)3982 _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, char __b6, char __b7, char __b8, char __b9, char __b10, char __b11, char __b12, char __b13, char __b14, char __b15)
3983 {
3984 return _mm_set_epi8(__b15, __b14, __b13, __b12, __b11, __b10, __b9, __b8, __b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
3985 }
3986
3987 /// Creates a 128-bit integer vector initialized to zero.
3988 ///
3989 /// \headerfile <x86intrin.h>
3990 ///
3991 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
3992 ///
3993 /// \returns An initialized 128-bit integer vector with all elements set to
3994 /// zero.
3995 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_setzero_si128(void)3996 _mm_setzero_si128(void)
3997 {
3998 return __extension__ (__m128i)(__v2di){ 0LL, 0LL };
3999 }
4000
4001 /// Stores a 128-bit integer vector to a memory location aligned on a
4002 /// 128-bit boundary.
4003 ///
4004 /// \headerfile <x86intrin.h>
4005 ///
4006 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
4007 ///
4008 /// \param __p
4009 /// A pointer to an aligned memory location that will receive the integer
4010 /// values.
4011 /// \param __b
4012 /// A 128-bit integer vector containing the values to be moved.
4013 static __inline__ void __DEFAULT_FN_ATTRS
_mm_store_si128(__m128i * __p,__m128i __b)4014 _mm_store_si128(__m128i *__p, __m128i __b)
4015 {
4016 *__p = __b;
4017 }
4018
4019 /// Stores a 128-bit integer vector to an unaligned memory location.
4020 ///
4021 /// \headerfile <x86intrin.h>
4022 ///
4023 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
4024 ///
4025 /// \param __p
4026 /// A pointer to a memory location that will receive the integer values.
4027 /// \param __b
4028 /// A 128-bit integer vector containing the values to be moved.
4029 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storeu_si128(__m128i * __p,__m128i __b)4030 _mm_storeu_si128(__m128i *__p, __m128i __b)
4031 {
4032 struct __storeu_si128 {
4033 __m128i __v;
4034 } __attribute__((__packed__, __may_alias__));
4035 ((struct __storeu_si128*)__p)->__v = __b;
4036 }
4037
4038 /// Stores a 64-bit integer value from the low element of a 128-bit integer
4039 /// vector.
4040 ///
4041 /// \headerfile <x86intrin.h>
4042 ///
4043 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
4044 ///
4045 /// \param __p
4046 /// A pointer to a 64-bit memory location. The address of the memory
4047 /// location does not have to be algned.
4048 /// \param __b
4049 /// A 128-bit integer vector containing the value to be stored.
4050 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storeu_si64(void const * __p,__m128i __b)4051 _mm_storeu_si64(void const *__p, __m128i __b)
4052 {
4053 struct __storeu_si64 {
4054 long long __v;
4055 } __attribute__((__packed__, __may_alias__));
4056 ((struct __storeu_si64*)__p)->__v = ((__v2di)__b)[0];
4057 }
4058
4059 /// Stores a 32-bit integer value from the low element of a 128-bit integer
4060 /// vector.
4061 ///
4062 /// \headerfile <x86intrin.h>
4063 ///
4064 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
4065 ///
4066 /// \param __p
4067 /// A pointer to a 32-bit memory location. The address of the memory
4068 /// location does not have to be aligned.
4069 /// \param __b
4070 /// A 128-bit integer vector containing the value to be stored.
4071 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storeu_si32(void const * __p,__m128i __b)4072 _mm_storeu_si32(void const *__p, __m128i __b)
4073 {
4074 struct __storeu_si32 {
4075 int __v;
4076 } __attribute__((__packed__, __may_alias__));
4077 ((struct __storeu_si32*)__p)->__v = ((__v4si)__b)[0];
4078 }
4079
4080 /// Stores a 16-bit integer value from the low element of a 128-bit integer
4081 /// vector.
4082 ///
4083 /// \headerfile <x86intrin.h>
4084 ///
4085 /// This intrinsic does not correspond to a specific instruction.
4086 ///
4087 /// \param __p
4088 /// A pointer to a 16-bit memory location. The address of the memory
4089 /// location does not have to be aligned.
4090 /// \param __b
4091 /// A 128-bit integer vector containing the value to be stored.
4092 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storeu_si16(void const * __p,__m128i __b)4093 _mm_storeu_si16(void const *__p, __m128i __b)
4094 {
4095 struct __storeu_si16 {
4096 short __v;
4097 } __attribute__((__packed__, __may_alias__));
4098 ((struct __storeu_si16*)__p)->__v = ((__v8hi)__b)[0];
4099 }
4100
4101 /// Moves bytes selected by the mask from the first operand to the
4102 /// specified unaligned memory location. When a mask bit is 1, the
4103 /// corresponding byte is written, otherwise it is not written.
4104 ///
4105 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4106 /// used again soon). Exception and trap behavior for elements not selected
4107 /// for storage to memory are implementation dependent.
4108 ///
4109 /// \headerfile <x86intrin.h>
4110 ///
4111 /// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c>
4112 /// instruction.
4113 ///
4114 /// \param __d
4115 /// A 128-bit integer vector containing the values to be moved.
4116 /// \param __n
4117 /// A 128-bit integer vector containing the mask. The most significant bit of
4118 /// each byte represents the mask bits.
4119 /// \param __p
4120 /// A pointer to an unaligned 128-bit memory location where the specified
4121 /// values are moved.
4122 static __inline__ void __DEFAULT_FN_ATTRS
_mm_maskmoveu_si128(__m128i __d,__m128i __n,char * __p)4123 _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
4124 {
4125 __builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
4126 }
4127
4128 /// Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to
4129 /// a memory location.
4130 ///
4131 /// \headerfile <x86intrin.h>
4132 ///
4133 /// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
4134 ///
4135 /// \param __p
4136 /// A pointer to a 64-bit memory location that will receive the lower 64 bits
4137 /// of the integer vector parameter.
4138 /// \param __a
4139 /// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
4140 /// value to be stored.
4141 static __inline__ void __DEFAULT_FN_ATTRS
_mm_storel_epi64(__m128i * __p,__m128i __a)4142 _mm_storel_epi64(__m128i *__p, __m128i __a)
4143 {
4144 struct __mm_storel_epi64_struct {
4145 long long __u;
4146 } __attribute__((__packed__, __may_alias__));
4147 ((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
4148 }
4149
4150 /// Stores a 128-bit floating point vector of [2 x double] to a 128-bit
4151 /// aligned memory location.
4152 ///
4153 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4154 /// used again soon).
4155 ///
4156 /// \headerfile <x86intrin.h>
4157 ///
4158 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4159 ///
4160 /// \param __p
4161 /// A pointer to the 128-bit aligned memory location used to store the value.
4162 /// \param __a
4163 /// A vector of [2 x double] containing the 64-bit values to be stored.
4164 static __inline__ void __DEFAULT_FN_ATTRS
_mm_stream_pd(double * __p,__m128d __a)4165 _mm_stream_pd(double *__p, __m128d __a)
4166 {
4167 __builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
4168 }
4169
4170 /// Stores a 128-bit integer vector to a 128-bit aligned memory location.
4171 ///
4172 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4173 /// used again soon).
4174 ///
4175 /// \headerfile <x86intrin.h>
4176 ///
4177 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4178 ///
4179 /// \param __p
4180 /// A pointer to the 128-bit aligned memory location used to store the value.
4181 /// \param __a
4182 /// A 128-bit integer vector containing the values to be stored.
4183 static __inline__ void __DEFAULT_FN_ATTRS
_mm_stream_si128(__m128i * __p,__m128i __a)4184 _mm_stream_si128(__m128i *__p, __m128i __a)
4185 {
4186 __builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
4187 }
4188
4189 /// Stores a 32-bit integer value in the specified memory location.
4190 ///
4191 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4192 /// used again soon).
4193 ///
4194 /// \headerfile <x86intrin.h>
4195 ///
4196 /// This intrinsic corresponds to the <c> MOVNTI </c> instruction.
4197 ///
4198 /// \param __p
4199 /// A pointer to the 32-bit memory location used to store the value.
4200 /// \param __a
4201 /// A 32-bit integer containing the value to be stored.
4202 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
_mm_stream_si32(int * __p,int __a)4203 _mm_stream_si32(int *__p, int __a)
4204 {
4205 __builtin_ia32_movnti(__p, __a);
4206 }
4207
4208 #ifdef __x86_64__
4209 /// Stores a 64-bit integer value in the specified memory location.
4210 ///
4211 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4212 /// used again soon).
4213 ///
4214 /// \headerfile <x86intrin.h>
4215 ///
4216 /// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.
4217 ///
4218 /// \param __p
4219 /// A pointer to the 64-bit memory location used to store the value.
4220 /// \param __a
4221 /// A 64-bit integer containing the value to be stored.
4222 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
_mm_stream_si64(long long * __p,long long __a)4223 _mm_stream_si64(long long *__p, long long __a)
4224 {
4225 __builtin_ia32_movnti64(__p, __a);
4226 }
4227 #endif
4228
4229 #if defined(__cplusplus)
4230 extern "C" {
4231 #endif
4232
4233 /// The cache line containing \a __p is flushed and invalidated from all
4234 /// caches in the coherency domain.
4235 ///
4236 /// \headerfile <x86intrin.h>
4237 ///
4238 /// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.
4239 ///
4240 /// \param __p
4241 /// A pointer to the memory location used to identify the cache line to be
4242 /// flushed.
4243 void _mm_clflush(void const * __p);
4244
4245 /// Forces strong memory ordering (serialization) between load
4246 /// instructions preceding this instruction and load instructions following
4247 /// this instruction, ensuring the system completes all previous loads before
4248 /// executing subsequent loads.
4249 ///
4250 /// \headerfile <x86intrin.h>
4251 ///
4252 /// This intrinsic corresponds to the <c> LFENCE </c> instruction.
4253 ///
4254 void _mm_lfence(void);
4255
4256 /// Forces strong memory ordering (serialization) between load and store
4257 /// instructions preceding this instruction and load and store instructions
4258 /// following this instruction, ensuring that the system completes all
4259 /// previous memory accesses before executing subsequent memory accesses.
4260 ///
4261 /// \headerfile <x86intrin.h>
4262 ///
4263 /// This intrinsic corresponds to the <c> MFENCE </c> instruction.
4264 ///
4265 void _mm_mfence(void);
4266
4267 #if defined(__cplusplus)
4268 } // extern "C"
4269 #endif
4270
4271 /// Converts 16-bit signed integers from both 128-bit integer vector
4272 /// operands into 8-bit signed integers, and packs the results into the
4273 /// destination. Positive values greater than 0x7F are saturated to 0x7F.
4274 /// Negative values less than 0x80 are saturated to 0x80.
4275 ///
4276 /// \headerfile <x86intrin.h>
4277 ///
4278 /// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.
4279 ///
4280 /// \param __a
4281 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4282 /// a signed integer and is converted to a 8-bit signed integer with
4283 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4284 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4285 /// written to the lower 64 bits of the result.
4286 /// \param __b
4287 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4288 /// a signed integer and is converted to a 8-bit signed integer with
4289 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4290 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4291 /// written to the higher 64 bits of the result.
4292 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4293 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_packs_epi16(__m128i __a,__m128i __b)4294 _mm_packs_epi16(__m128i __a, __m128i __b)
4295 {
4296 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
4297 }
4298
4299 /// Converts 32-bit signed integers from both 128-bit integer vector
4300 /// operands into 16-bit signed integers, and packs the results into the
4301 /// destination. Positive values greater than 0x7FFF are saturated to 0x7FFF.
4302 /// Negative values less than 0x8000 are saturated to 0x8000.
4303 ///
4304 /// \headerfile <x86intrin.h>
4305 ///
4306 /// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.
4307 ///
4308 /// \param __a
4309 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4310 /// a signed integer and is converted to a 16-bit signed integer with
4311 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4312 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4313 /// are written to the lower 64 bits of the result.
4314 /// \param __b
4315 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4316 /// a signed integer and is converted to a 16-bit signed integer with
4317 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4318 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4319 /// are written to the higher 64 bits of the result.
4320 /// \returns A 128-bit vector of [8 x i16] containing the converted values.
4321 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_packs_epi32(__m128i __a,__m128i __b)4322 _mm_packs_epi32(__m128i __a, __m128i __b)
4323 {
4324 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
4325 }
4326
4327 /// Converts 16-bit signed integers from both 128-bit integer vector
4328 /// operands into 8-bit unsigned integers, and packs the results into the
4329 /// destination. Values greater than 0xFF are saturated to 0xFF. Values less
4330 /// than 0x00 are saturated to 0x00.
4331 ///
4332 /// \headerfile <x86intrin.h>
4333 ///
4334 /// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.
4335 ///
4336 /// \param __a
4337 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4338 /// a signed integer and is converted to an 8-bit unsigned integer with
4339 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4340 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4341 /// written to the lower 64 bits of the result.
4342 /// \param __b
4343 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4344 /// a signed integer and is converted to an 8-bit unsigned integer with
4345 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4346 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4347 /// written to the higher 64 bits of the result.
4348 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4349 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_packus_epi16(__m128i __a,__m128i __b)4350 _mm_packus_epi16(__m128i __a, __m128i __b)
4351 {
4352 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
4353 }
4354
4355 /// Extracts 16 bits from a 128-bit integer vector of [8 x i16], using
4356 /// the immediate-value parameter as a selector.
4357 ///
4358 /// \headerfile <x86intrin.h>
4359 ///
4360 /// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
4361 ///
4362 /// \param __a
4363 /// A 128-bit integer vector.
4364 /// \param __imm
4365 /// An immediate value. Bits [2:0] selects values from \a __a to be assigned
4366 /// to bits[15:0] of the result. \n
4367 /// 000: assign values from bits [15:0] of \a __a. \n
4368 /// 001: assign values from bits [31:16] of \a __a. \n
4369 /// 010: assign values from bits [47:32] of \a __a. \n
4370 /// 011: assign values from bits [63:48] of \a __a. \n
4371 /// 100: assign values from bits [79:64] of \a __a. \n
4372 /// 101: assign values from bits [95:80] of \a __a. \n
4373 /// 110: assign values from bits [111:96] of \a __a. \n
4374 /// 111: assign values from bits [127:112] of \a __a.
4375 /// \returns An integer, whose lower 16 bits are selected from the 128-bit
4376 /// integer vector parameter and the remaining bits are assigned zeros.
4377 #define _mm_extract_epi16(a, imm) \
4378 (int)(unsigned short)__builtin_ia32_vec_ext_v8hi((__v8hi)(__m128i)(a), \
4379 (int)(imm))
4380
4381 /// Constructs a 128-bit integer vector by first making a copy of the
4382 /// 128-bit integer vector parameter, and then inserting the lower 16 bits
4383 /// of an integer parameter into an offset specified by the immediate-value
4384 /// parameter.
4385 ///
4386 /// \headerfile <x86intrin.h>
4387 ///
4388 /// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
4389 ///
4390 /// \param __a
4391 /// A 128-bit integer vector of [8 x i16]. This vector is copied to the
4392 /// result and then one of the eight elements in the result is replaced by
4393 /// the lower 16 bits of \a __b.
4394 /// \param __b
4395 /// An integer. The lower 16 bits of this parameter are written to the
4396 /// result beginning at an offset specified by \a __imm.
4397 /// \param __imm
4398 /// An immediate value specifying the bit offset in the result at which the
4399 /// lower 16 bits of \a __b are written.
4400 /// \returns A 128-bit integer vector containing the constructed values.
4401 #define _mm_insert_epi16(a, b, imm) \
4402 (__m128i)__builtin_ia32_vec_set_v8hi((__v8hi)(__m128i)(a), (int)(b), \
4403 (int)(imm))
4404
4405 /// Copies the values of the most significant bits from each 8-bit
4406 /// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask
4407 /// value, zero-extends the value, and writes it to the destination.
4408 ///
4409 /// \headerfile <x86intrin.h>
4410 ///
4411 /// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.
4412 ///
4413 /// \param __a
4414 /// A 128-bit integer vector containing the values with bits to be extracted.
4415 /// \returns The most significant bits from each 8-bit element in \a __a,
4416 /// written to bits [15:0]. The other bits are assigned zeros.
4417 static __inline__ int __DEFAULT_FN_ATTRS
_mm_movemask_epi8(__m128i __a)4418 _mm_movemask_epi8(__m128i __a)
4419 {
4420 return __builtin_ia32_pmovmskb128((__v16qi)__a);
4421 }
4422
4423 /// Constructs a 128-bit integer vector by shuffling four 32-bit
4424 /// elements of a 128-bit integer vector parameter, using the immediate-value
4425 /// parameter as a specifier.
4426 ///
4427 /// \headerfile <x86intrin.h>
4428 ///
4429 /// \code
4430 /// __m128i _mm_shuffle_epi32(__m128i a, const int imm);
4431 /// \endcode
4432 ///
4433 /// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
4434 ///
4435 /// \param a
4436 /// A 128-bit integer vector containing the values to be copied.
4437 /// \param imm
4438 /// An immediate value containing an 8-bit value specifying which elements to
4439 /// copy from a. The destinations within the 128-bit destination are assigned
4440 /// values as follows: \n
4441 /// Bits [1:0] are used to assign values to bits [31:0] of the result. \n
4442 /// Bits [3:2] are used to assign values to bits [63:32] of the result. \n
4443 /// Bits [5:4] are used to assign values to bits [95:64] of the result. \n
4444 /// Bits [7:6] are used to assign values to bits [127:96] of the result. \n
4445 /// Bit value assignments: \n
4446 /// 00: assign values from bits [31:0] of \a a. \n
4447 /// 01: assign values from bits [63:32] of \a a. \n
4448 /// 10: assign values from bits [95:64] of \a a. \n
4449 /// 11: assign values from bits [127:96] of \a a.
4450 /// \returns A 128-bit integer vector containing the shuffled values.
4451 #define _mm_shuffle_epi32(a, imm) \
4452 (__m128i)__builtin_ia32_pshufd((__v4si)(__m128i)(a), (int)(imm))
4453
4454 /// Constructs a 128-bit integer vector by shuffling four lower 16-bit
4455 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4456 /// value parameter as a specifier.
4457 ///
4458 /// \headerfile <x86intrin.h>
4459 ///
4460 /// \code
4461 /// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);
4462 /// \endcode
4463 ///
4464 /// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
4465 ///
4466 /// \param a
4467 /// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits
4468 /// [127:64] of the result.
4469 /// \param imm
4470 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4471 /// Bits[1:0] are used to assign values to bits [15:0] of the result. \n
4472 /// Bits[3:2] are used to assign values to bits [31:16] of the result. \n
4473 /// Bits[5:4] are used to assign values to bits [47:32] of the result. \n
4474 /// Bits[7:6] are used to assign values to bits [63:48] of the result. \n
4475 /// Bit value assignments: \n
4476 /// 00: assign values from bits [15:0] of \a a. \n
4477 /// 01: assign values from bits [31:16] of \a a. \n
4478 /// 10: assign values from bits [47:32] of \a a. \n
4479 /// 11: assign values from bits [63:48] of \a a. \n
4480 /// \returns A 128-bit integer vector containing the shuffled values.
4481 #define _mm_shufflelo_epi16(a, imm) \
4482 (__m128i)__builtin_ia32_pshuflw((__v8hi)(__m128i)(a), (int)(imm))
4483
4484 /// Constructs a 128-bit integer vector by shuffling four upper 16-bit
4485 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4486 /// value parameter as a specifier.
4487 ///
4488 /// \headerfile <x86intrin.h>
4489 ///
4490 /// \code
4491 /// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);
4492 /// \endcode
4493 ///
4494 /// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.
4495 ///
4496 /// \param a
4497 /// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits
4498 /// [63:0] of the result.
4499 /// \param imm
4500 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4501 /// Bits[1:0] are used to assign values to bits [79:64] of the result. \n
4502 /// Bits[3:2] are used to assign values to bits [95:80] of the result. \n
4503 /// Bits[5:4] are used to assign values to bits [111:96] of the result. \n
4504 /// Bits[7:6] are used to assign values to bits [127:112] of the result. \n
4505 /// Bit value assignments: \n
4506 /// 00: assign values from bits [79:64] of \a a. \n
4507 /// 01: assign values from bits [95:80] of \a a. \n
4508 /// 10: assign values from bits [111:96] of \a a. \n
4509 /// 11: assign values from bits [127:112] of \a a. \n
4510 /// \returns A 128-bit integer vector containing the shuffled values.
4511 #define _mm_shufflehi_epi16(a, imm) \
4512 (__m128i)__builtin_ia32_pshufhw((__v8hi)(__m128i)(a), (int)(imm))
4513
4514 /// Unpacks the high-order (index 8-15) values from two 128-bit vectors
4515 /// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4516 ///
4517 /// \headerfile <x86intrin.h>
4518 ///
4519 /// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c>
4520 /// instruction.
4521 ///
4522 /// \param __a
4523 /// A 128-bit vector of [16 x i8].
4524 /// Bits [71:64] are written to bits [7:0] of the result. \n
4525 /// Bits [79:72] are written to bits [23:16] of the result. \n
4526 /// Bits [87:80] are written to bits [39:32] of the result. \n
4527 /// Bits [95:88] are written to bits [55:48] of the result. \n
4528 /// Bits [103:96] are written to bits [71:64] of the result. \n
4529 /// Bits [111:104] are written to bits [87:80] of the result. \n
4530 /// Bits [119:112] are written to bits [103:96] of the result. \n
4531 /// Bits [127:120] are written to bits [119:112] of the result.
4532 /// \param __b
4533 /// A 128-bit vector of [16 x i8]. \n
4534 /// Bits [71:64] are written to bits [15:8] of the result. \n
4535 /// Bits [79:72] are written to bits [31:24] of the result. \n
4536 /// Bits [87:80] are written to bits [47:40] of the result. \n
4537 /// Bits [95:88] are written to bits [63:56] of the result. \n
4538 /// Bits [103:96] are written to bits [79:72] of the result. \n
4539 /// Bits [111:104] are written to bits [95:88] of the result. \n
4540 /// Bits [119:112] are written to bits [111:104] of the result. \n
4541 /// Bits [127:120] are written to bits [127:120] of the result.
4542 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4543 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpackhi_epi8(__m128i __a,__m128i __b)4544 _mm_unpackhi_epi8(__m128i __a, __m128i __b)
4545 {
4546 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
4547 }
4548
4549 /// Unpacks the high-order (index 4-7) values from two 128-bit vectors of
4550 /// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16].
4551 ///
4552 /// \headerfile <x86intrin.h>
4553 ///
4554 /// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c>
4555 /// instruction.
4556 ///
4557 /// \param __a
4558 /// A 128-bit vector of [8 x i16].
4559 /// Bits [79:64] are written to bits [15:0] of the result. \n
4560 /// Bits [95:80] are written to bits [47:32] of the result. \n
4561 /// Bits [111:96] are written to bits [79:64] of the result. \n
4562 /// Bits [127:112] are written to bits [111:96] of the result.
4563 /// \param __b
4564 /// A 128-bit vector of [8 x i16].
4565 /// Bits [79:64] are written to bits [31:16] of the result. \n
4566 /// Bits [95:80] are written to bits [63:48] of the result. \n
4567 /// Bits [111:96] are written to bits [95:80] of the result. \n
4568 /// Bits [127:112] are written to bits [127:112] of the result.
4569 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4570 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpackhi_epi16(__m128i __a,__m128i __b)4571 _mm_unpackhi_epi16(__m128i __a, __m128i __b)
4572 {
4573 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8+4, 5, 8+5, 6, 8+6, 7, 8+7);
4574 }
4575
4576 /// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
4577 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4578 ///
4579 /// \headerfile <x86intrin.h>
4580 ///
4581 /// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c>
4582 /// instruction.
4583 ///
4584 /// \param __a
4585 /// A 128-bit vector of [4 x i32]. \n
4586 /// Bits [95:64] are written to bits [31:0] of the destination. \n
4587 /// Bits [127:96] are written to bits [95:64] of the destination.
4588 /// \param __b
4589 /// A 128-bit vector of [4 x i32]. \n
4590 /// Bits [95:64] are written to bits [64:32] of the destination. \n
4591 /// Bits [127:96] are written to bits [127:96] of the destination.
4592 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4593 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpackhi_epi32(__m128i __a,__m128i __b)4594 _mm_unpackhi_epi32(__m128i __a, __m128i __b)
4595 {
4596 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4+2, 3, 4+3);
4597 }
4598
4599 /// Unpacks the high-order 64-bit elements from two 128-bit vectors of
4600 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4601 ///
4602 /// \headerfile <x86intrin.h>
4603 ///
4604 /// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c>
4605 /// instruction.
4606 ///
4607 /// \param __a
4608 /// A 128-bit vector of [2 x i64]. \n
4609 /// Bits [127:64] are written to bits [63:0] of the destination.
4610 /// \param __b
4611 /// A 128-bit vector of [2 x i64]. \n
4612 /// Bits [127:64] are written to bits [127:64] of the destination.
4613 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4614 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpackhi_epi64(__m128i __a,__m128i __b)4615 _mm_unpackhi_epi64(__m128i __a, __m128i __b)
4616 {
4617 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
4618 }
4619
4620 /// Unpacks the low-order (index 0-7) values from two 128-bit vectors of
4621 /// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4622 ///
4623 /// \headerfile <x86intrin.h>
4624 ///
4625 /// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c>
4626 /// instruction.
4627 ///
4628 /// \param __a
4629 /// A 128-bit vector of [16 x i8]. \n
4630 /// Bits [7:0] are written to bits [7:0] of the result. \n
4631 /// Bits [15:8] are written to bits [23:16] of the result. \n
4632 /// Bits [23:16] are written to bits [39:32] of the result. \n
4633 /// Bits [31:24] are written to bits [55:48] of the result. \n
4634 /// Bits [39:32] are written to bits [71:64] of the result. \n
4635 /// Bits [47:40] are written to bits [87:80] of the result. \n
4636 /// Bits [55:48] are written to bits [103:96] of the result. \n
4637 /// Bits [63:56] are written to bits [119:112] of the result.
4638 /// \param __b
4639 /// A 128-bit vector of [16 x i8].
4640 /// Bits [7:0] are written to bits [15:8] of the result. \n
4641 /// Bits [15:8] are written to bits [31:24] of the result. \n
4642 /// Bits [23:16] are written to bits [47:40] of the result. \n
4643 /// Bits [31:24] are written to bits [63:56] of the result. \n
4644 /// Bits [39:32] are written to bits [79:72] of the result. \n
4645 /// Bits [47:40] are written to bits [95:88] of the result. \n
4646 /// Bits [55:48] are written to bits [111:104] of the result. \n
4647 /// Bits [63:56] are written to bits [127:120] of the result.
4648 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4649 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpacklo_epi8(__m128i __a,__m128i __b)4650 _mm_unpacklo_epi8(__m128i __a, __m128i __b)
4651 {
4652 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7);
4653 }
4654
4655 /// Unpacks the low-order (index 0-3) values from each of the two 128-bit
4656 /// vectors of [8 x i16] and interleaves them into a 128-bit vector of
4657 /// [8 x i16].
4658 ///
4659 /// \headerfile <x86intrin.h>
4660 ///
4661 /// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c>
4662 /// instruction.
4663 ///
4664 /// \param __a
4665 /// A 128-bit vector of [8 x i16].
4666 /// Bits [15:0] are written to bits [15:0] of the result. \n
4667 /// Bits [31:16] are written to bits [47:32] of the result. \n
4668 /// Bits [47:32] are written to bits [79:64] of the result. \n
4669 /// Bits [63:48] are written to bits [111:96] of the result.
4670 /// \param __b
4671 /// A 128-bit vector of [8 x i16].
4672 /// Bits [15:0] are written to bits [31:16] of the result. \n
4673 /// Bits [31:16] are written to bits [63:48] of the result. \n
4674 /// Bits [47:32] are written to bits [95:80] of the result. \n
4675 /// Bits [63:48] are written to bits [127:112] of the result.
4676 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4677 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpacklo_epi16(__m128i __a,__m128i __b)4678 _mm_unpacklo_epi16(__m128i __a, __m128i __b)
4679 {
4680 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8+0, 1, 8+1, 2, 8+2, 3, 8+3);
4681 }
4682
4683 /// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
4684 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4685 ///
4686 /// \headerfile <x86intrin.h>
4687 ///
4688 /// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c>
4689 /// instruction.
4690 ///
4691 /// \param __a
4692 /// A 128-bit vector of [4 x i32]. \n
4693 /// Bits [31:0] are written to bits [31:0] of the destination. \n
4694 /// Bits [63:32] are written to bits [95:64] of the destination.
4695 /// \param __b
4696 /// A 128-bit vector of [4 x i32]. \n
4697 /// Bits [31:0] are written to bits [64:32] of the destination. \n
4698 /// Bits [63:32] are written to bits [127:96] of the destination.
4699 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4700 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpacklo_epi32(__m128i __a,__m128i __b)4701 _mm_unpacklo_epi32(__m128i __a, __m128i __b)
4702 {
4703 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4+0, 1, 4+1);
4704 }
4705
4706 /// Unpacks the low-order 64-bit elements from two 128-bit vectors of
4707 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4708 ///
4709 /// \headerfile <x86intrin.h>
4710 ///
4711 /// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>
4712 /// instruction.
4713 ///
4714 /// \param __a
4715 /// A 128-bit vector of [2 x i64]. \n
4716 /// Bits [63:0] are written to bits [63:0] of the destination. \n
4717 /// \param __b
4718 /// A 128-bit vector of [2 x i64]. \n
4719 /// Bits [63:0] are written to bits [127:64] of the destination. \n
4720 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4721 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_unpacklo_epi64(__m128i __a,__m128i __b)4722 _mm_unpacklo_epi64(__m128i __a, __m128i __b)
4723 {
4724 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
4725 }
4726
4727 /// Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
4728 /// integer.
4729 ///
4730 /// \headerfile <x86intrin.h>
4731 ///
4732 /// This intrinsic corresponds to the <c> MOVDQ2Q </c> instruction.
4733 ///
4734 /// \param __a
4735 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4736 /// destination.
4737 /// \returns A 64-bit integer containing the lower 64 bits of the parameter.
4738 static __inline__ __m64 __DEFAULT_FN_ATTRS
_mm_movepi64_pi64(__m128i __a)4739 _mm_movepi64_pi64(__m128i __a)
4740 {
4741 return (__m64)__a[0];
4742 }
4743
4744 /// Moves the 64-bit operand to a 128-bit integer vector, zeroing the
4745 /// upper bits.
4746 ///
4747 /// \headerfile <x86intrin.h>
4748 ///
4749 /// This intrinsic corresponds to the <c> MOVD+VMOVQ </c> instruction.
4750 ///
4751 /// \param __a
4752 /// A 64-bit value.
4753 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4754 /// the operand. The upper 64 bits are assigned zeros.
4755 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_movpi64_epi64(__m64 __a)4756 _mm_movpi64_epi64(__m64 __a)
4757 {
4758 return __extension__ (__m128i)(__v2di){ (long long)__a, 0 };
4759 }
4760
4761 /// Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
4762 /// integer vector, zeroing the upper bits.
4763 ///
4764 /// \headerfile <x86intrin.h>
4765 ///
4766 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
4767 ///
4768 /// \param __a
4769 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4770 /// destination.
4771 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4772 /// the operand. The upper 64 bits are assigned zeros.
4773 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_move_epi64(__m128i __a)4774 _mm_move_epi64(__m128i __a)
4775 {
4776 return __builtin_shufflevector((__v2di)__a, _mm_setzero_si128(), 0, 2);
4777 }
4778
4779 /// Unpacks the high-order 64-bit elements from two 128-bit vectors of
4780 /// [2 x double] and interleaves them into a 128-bit vector of [2 x
4781 /// double].
4782 ///
4783 /// \headerfile <x86intrin.h>
4784 ///
4785 /// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
4786 ///
4787 /// \param __a
4788 /// A 128-bit vector of [2 x double]. \n
4789 /// Bits [127:64] are written to bits [63:0] of the destination.
4790 /// \param __b
4791 /// A 128-bit vector of [2 x double]. \n
4792 /// Bits [127:64] are written to bits [127:64] of the destination.
4793 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4794 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_unpackhi_pd(__m128d __a,__m128d __b)4795 _mm_unpackhi_pd(__m128d __a, __m128d __b)
4796 {
4797 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
4798 }
4799
4800 /// Unpacks the low-order 64-bit elements from two 128-bit vectors
4801 /// of [2 x double] and interleaves them into a 128-bit vector of [2 x
4802 /// double].
4803 ///
4804 /// \headerfile <x86intrin.h>
4805 ///
4806 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
4807 ///
4808 /// \param __a
4809 /// A 128-bit vector of [2 x double]. \n
4810 /// Bits [63:0] are written to bits [63:0] of the destination.
4811 /// \param __b
4812 /// A 128-bit vector of [2 x double]. \n
4813 /// Bits [63:0] are written to bits [127:64] of the destination.
4814 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4815 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_unpacklo_pd(__m128d __a,__m128d __b)4816 _mm_unpacklo_pd(__m128d __a, __m128d __b)
4817 {
4818 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
4819 }
4820
4821 /// Extracts the sign bits of the double-precision values in the 128-bit
4822 /// vector of [2 x double], zero-extends the value, and writes it to the
4823 /// low-order bits of the destination.
4824 ///
4825 /// \headerfile <x86intrin.h>
4826 ///
4827 /// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.
4828 ///
4829 /// \param __a
4830 /// A 128-bit vector of [2 x double] containing the values with sign bits to
4831 /// be extracted.
4832 /// \returns The sign bits from each of the double-precision elements in \a __a,
4833 /// written to bits [1:0]. The remaining bits are assigned values of zero.
4834 static __inline__ int __DEFAULT_FN_ATTRS
_mm_movemask_pd(__m128d __a)4835 _mm_movemask_pd(__m128d __a)
4836 {
4837 return __builtin_ia32_movmskpd((__v2df)__a);
4838 }
4839
4840
4841 /// Constructs a 128-bit floating-point vector of [2 x double] from two
4842 /// 128-bit vector parameters of [2 x double], using the immediate-value
4843 /// parameter as a specifier.
4844 ///
4845 /// \headerfile <x86intrin.h>
4846 ///
4847 /// \code
4848 /// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);
4849 /// \endcode
4850 ///
4851 /// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.
4852 ///
4853 /// \param a
4854 /// A 128-bit vector of [2 x double].
4855 /// \param b
4856 /// A 128-bit vector of [2 x double].
4857 /// \param i
4858 /// An 8-bit immediate value. The least significant two bits specify which
4859 /// elements to copy from \a a and \a b: \n
4860 /// Bit[0] = 0: lower element of \a a copied to lower element of result. \n
4861 /// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
4862 /// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
4863 /// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
4864 /// \returns A 128-bit vector of [2 x double] containing the shuffled values.
4865 #define _mm_shuffle_pd(a, b, i) \
4866 (__m128d)__builtin_ia32_shufpd((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
4867 (int)(i))
4868
4869 /// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4870 /// floating-point vector of [4 x float].
4871 ///
4872 /// \headerfile <x86intrin.h>
4873 ///
4874 /// This intrinsic has no corresponding instruction.
4875 ///
4876 /// \param __a
4877 /// A 128-bit floating-point vector of [2 x double].
4878 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4879 /// bitwise pattern as the parameter.
4880 static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_castpd_ps(__m128d __a)4881 _mm_castpd_ps(__m128d __a)
4882 {
4883 return (__m128)__a;
4884 }
4885
4886 /// Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4887 /// integer vector.
4888 ///
4889 /// \headerfile <x86intrin.h>
4890 ///
4891 /// This intrinsic has no corresponding instruction.
4892 ///
4893 /// \param __a
4894 /// A 128-bit floating-point vector of [2 x double].
4895 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4896 /// parameter.
4897 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_castpd_si128(__m128d __a)4898 _mm_castpd_si128(__m128d __a)
4899 {
4900 return (__m128i)__a;
4901 }
4902
4903 /// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4904 /// floating-point vector of [2 x double].
4905 ///
4906 /// \headerfile <x86intrin.h>
4907 ///
4908 /// This intrinsic has no corresponding instruction.
4909 ///
4910 /// \param __a
4911 /// A 128-bit floating-point vector of [4 x float].
4912 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4913 /// bitwise pattern as the parameter.
4914 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_castps_pd(__m128 __a)4915 _mm_castps_pd(__m128 __a)
4916 {
4917 return (__m128d)__a;
4918 }
4919
4920 /// Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4921 /// integer vector.
4922 ///
4923 /// \headerfile <x86intrin.h>
4924 ///
4925 /// This intrinsic has no corresponding instruction.
4926 ///
4927 /// \param __a
4928 /// A 128-bit floating-point vector of [4 x float].
4929 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4930 /// parameter.
4931 static __inline__ __m128i __DEFAULT_FN_ATTRS
_mm_castps_si128(__m128 __a)4932 _mm_castps_si128(__m128 __a)
4933 {
4934 return (__m128i)__a;
4935 }
4936
4937 /// Casts a 128-bit integer vector into a 128-bit floating-point vector
4938 /// of [4 x float].
4939 ///
4940 /// \headerfile <x86intrin.h>
4941 ///
4942 /// This intrinsic has no corresponding instruction.
4943 ///
4944 /// \param __a
4945 /// A 128-bit integer vector.
4946 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4947 /// bitwise pattern as the parameter.
4948 static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_castsi128_ps(__m128i __a)4949 _mm_castsi128_ps(__m128i __a)
4950 {
4951 return (__m128)__a;
4952 }
4953
4954 /// Casts a 128-bit integer vector into a 128-bit floating-point vector
4955 /// of [2 x double].
4956 ///
4957 /// \headerfile <x86intrin.h>
4958 ///
4959 /// This intrinsic has no corresponding instruction.
4960 ///
4961 /// \param __a
4962 /// A 128-bit integer vector.
4963 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4964 /// bitwise pattern as the parameter.
4965 static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_castsi128_pd(__m128i __a)4966 _mm_castsi128_pd(__m128i __a)
4967 {
4968 return (__m128d)__a;
4969 }
4970
4971 #if defined(__cplusplus)
4972 extern "C" {
4973 #endif
4974
4975 /// Indicates that a spin loop is being executed for the purposes of
4976 /// optimizing power consumption during the loop.
4977 ///
4978 /// \headerfile <x86intrin.h>
4979 ///
4980 /// This intrinsic corresponds to the <c> PAUSE </c> instruction.
4981 ///
4982 void _mm_pause(void);
4983
4984 #if defined(__cplusplus)
4985 } // extern "C"
4986 #endif
4987 #undef __DEFAULT_FN_ATTRS
4988 #undef __DEFAULT_FN_ATTRS_MMX
4989
4990 #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
4991
4992 #define _MM_DENORMALS_ZERO_ON (0x0040)
4993 #define _MM_DENORMALS_ZERO_OFF (0x0000)
4994
4995 #define _MM_DENORMALS_ZERO_MASK (0x0040)
4996
4997 #define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
4998 #define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
4999
5000 #endif /* __EMMINTRIN_H */
5001