1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines interfaces to access the target independent code generation 10 // passes provided by the LLVM backend. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_CODEGEN_PASSES_H 15 #define LLVM_CODEGEN_PASSES_H 16 17 #include <functional> 18 #include <string> 19 20 namespace llvm { 21 22 class FunctionPass; 23 class MachineFunction; 24 class MachineFunctionPass; 25 class ModulePass; 26 class Pass; 27 class TargetMachine; 28 class TargetRegisterClass; 29 class raw_ostream; 30 31 } // End llvm namespace 32 33 /// List of target independent CodeGen pass IDs. 34 namespace llvm { 35 FunctionPass *createAtomicExpandPass(); 36 37 /// createUnreachableBlockEliminationPass - The LLVM code generator does not 38 /// work well with unreachable basic blocks (what live ranges make sense for a 39 /// block that cannot be reached?). As such, a code generator should either 40 /// not instruction select unreachable blocks, or run this pass as its 41 /// last LLVM modifying pass to clean up blocks that are not reachable from 42 /// the entry block. 43 FunctionPass *createUnreachableBlockEliminationPass(); 44 45 /// MachineFunctionPrinter pass - This pass prints out the machine function to 46 /// the given stream as a debugging tool. 47 MachineFunctionPass * 48 createMachineFunctionPrinterPass(raw_ostream &OS, 49 const std::string &Banner =""); 50 51 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream 52 /// using the MIR serialization format. 53 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS); 54 55 /// This pass resets a MachineFunction when it has the FailedISel property 56 /// as if it was just created. 57 /// If EmitFallbackDiag is true, the pass will emit a 58 /// DiagnosticInfoISelFallback for every MachineFunction it resets. 59 /// If AbortOnFailedISel is true, abort compilation instead of resetting. 60 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag, 61 bool AbortOnFailedISel); 62 63 /// createCodeGenPreparePass - Transform the code to expose more pattern 64 /// matching during instruction selection. 65 FunctionPass *createCodeGenPreparePass(); 66 67 /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather 68 /// and scatter intrinsics with scalar code when target doesn't support them. 69 FunctionPass *createScalarizeMaskedMemIntrinPass(); 70 71 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg 72 /// load-linked/store-conditional loops. 73 extern char &AtomicExpandID; 74 75 /// MachineLoopInfo - This pass is a loop analysis pass. 76 extern char &MachineLoopInfoID; 77 78 /// MachineDominators - This pass is a machine dominators analysis pass. 79 extern char &MachineDominatorsID; 80 81 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass. 82 extern char &MachineDominanceFrontierID; 83 84 /// MachineRegionInfo - This pass computes SESE regions for machine functions. 85 extern char &MachineRegionInfoPassID; 86 87 /// EdgeBundles analysis - Bundle machine CFG edges. 88 extern char &EdgeBundlesID; 89 90 /// LiveVariables pass - This pass computes the set of blocks in which each 91 /// variable is life and sets machine operand kill flags. 92 extern char &LiveVariablesID; 93 94 /// PHIElimination - This pass eliminates machine instruction PHI nodes 95 /// by inserting copy instructions. This destroys SSA information, but is the 96 /// desired input for some register allocators. This pass is "required" by 97 /// these register allocator like this: AU.addRequiredID(PHIEliminationID); 98 extern char &PHIEliminationID; 99 100 /// LiveIntervals - This analysis keeps track of the live ranges of virtual 101 /// and physical registers. 102 extern char &LiveIntervalsID; 103 104 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots. 105 extern char &LiveStacksID; 106 107 /// TwoAddressInstruction - This pass reduces two-address instructions to 108 /// use two operands. This destroys SSA information but it is desired by 109 /// register allocators. 110 extern char &TwoAddressInstructionPassID; 111 112 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs. 113 extern char &ProcessImplicitDefsID; 114 115 /// RegisterCoalescer - This pass merges live ranges to eliminate copies. 116 extern char &RegisterCoalescerID; 117 118 /// MachineScheduler - This pass schedules machine instructions. 119 extern char &MachineSchedulerID; 120 121 /// PostMachineScheduler - This pass schedules machine instructions postRA. 122 extern char &PostMachineSchedulerID; 123 124 /// SpillPlacement analysis. Suggest optimal placement of spill code between 125 /// basic blocks. 126 extern char &SpillPlacementID; 127 128 /// ShrinkWrap pass. Look for the best place to insert save and restore 129 // instruction and update the MachineFunctionInfo with that information. 130 extern char &ShrinkWrapID; 131 132 /// LiveRangeShrink pass. Move instruction close to its definition to shrink 133 /// the definition's live range. 134 extern char &LiveRangeShrinkID; 135 136 /// Greedy register allocator. 137 extern char &RAGreedyID; 138 139 /// Basic register allocator. 140 extern char &RABasicID; 141 142 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as 143 /// assigned in VirtRegMap. 144 extern char &VirtRegRewriterID; 145 146 /// UnreachableMachineBlockElimination - This pass removes unreachable 147 /// machine basic blocks. 148 extern char &UnreachableMachineBlockElimID; 149 150 /// DeadMachineInstructionElim - This pass removes dead machine instructions. 151 extern char &DeadMachineInstructionElimID; 152 153 /// This pass adds dead/undef flags after analyzing subregister lanes. 154 extern char &DetectDeadLanesID; 155 156 /// This pass perform post-ra machine sink for COPY instructions. 157 extern char &PostRAMachineSinkingID; 158 159 /// FastRegisterAllocation Pass - This pass register allocates as fast as 160 /// possible. It is best suited for debug code where live ranges are short. 161 /// 162 FunctionPass *createFastRegisterAllocator(); 163 164 /// BasicRegisterAllocation Pass - This pass implements a degenerate global 165 /// register allocator using the basic regalloc framework. 166 /// 167 FunctionPass *createBasicRegisterAllocator(); 168 169 /// Greedy register allocation pass - This pass implements a global register 170 /// allocator for optimized builds. 171 /// 172 FunctionPass *createGreedyRegisterAllocator(); 173 174 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean 175 /// Quadratic Prograaming (PBQP) based register allocator. 176 /// 177 FunctionPass *createDefaultPBQPRegisterAllocator(); 178 179 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code, 180 /// and eliminates abstract frame references. 181 extern char &PrologEpilogCodeInserterID; 182 MachineFunctionPass *createPrologEpilogInserterPass(); 183 184 /// ExpandPostRAPseudos - This pass expands pseudo instructions after 185 /// register allocation. 186 extern char &ExpandPostRAPseudosID; 187 188 /// createPostRAHazardRecognizer - This pass runs the post-ra hazard 189 /// recognizer. 190 extern char &PostRAHazardRecognizerID; 191 192 /// createPostRAScheduler - This pass performs post register allocation 193 /// scheduling. 194 extern char &PostRASchedulerID; 195 196 /// BranchFolding - This pass performs machine code CFG based 197 /// optimizations to delete branches to branches, eliminate branches to 198 /// successor blocks (creating fall throughs), and eliminating branches over 199 /// branches. 200 extern char &BranchFolderPassID; 201 202 /// BranchRelaxation - This pass replaces branches that need to jump further 203 /// than is supported by a branch instruction. 204 extern char &BranchRelaxationPassID; 205 206 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's. 207 extern char &MachineFunctionPrinterPassID; 208 209 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR 210 /// serialization format. 211 extern char &MIRPrintingPassID; 212 213 /// TailDuplicate - Duplicate blocks with unconditional branches 214 /// into tails of their predecessors. 215 extern char &TailDuplicateID; 216 217 /// Duplicate blocks with unconditional branches into tails of their 218 /// predecessors. Variant that works before register allocation. 219 extern char &EarlyTailDuplicateID; 220 221 /// MachineTraceMetrics - This pass computes critical path and CPU resource 222 /// usage in an ensemble of traces. 223 extern char &MachineTraceMetricsID; 224 225 /// EarlyIfConverter - This pass performs if-conversion on SSA form by 226 /// inserting cmov instructions. 227 extern char &EarlyIfConverterID; 228 229 /// This pass performs instruction combining using trace metrics to estimate 230 /// critical-path and resource depth. 231 extern char &MachineCombinerID; 232 233 /// StackSlotColoring - This pass performs stack coloring and merging. 234 /// It merges disjoint allocas to reduce the stack size. 235 extern char &StackColoringID; 236 237 /// IfConverter - This pass performs machine code if conversion. 238 extern char &IfConverterID; 239 240 FunctionPass *createIfConverter( 241 std::function<bool(const MachineFunction &)> Ftor); 242 243 /// MachineBlockPlacement - This pass places basic blocks based on branch 244 /// probabilities. 245 extern char &MachineBlockPlacementID; 246 247 /// MachineBlockPlacementStats - This pass collects statistics about the 248 /// basic block placement using branch probabilities and block frequency 249 /// information. 250 extern char &MachineBlockPlacementStatsID; 251 252 /// GCLowering Pass - Used by gc.root to perform its default lowering 253 /// operations. 254 FunctionPass *createGCLoweringPass(); 255 256 /// ShadowStackGCLowering - Implements the custom lowering mechanism 257 /// used by the shadow stack GC. Only runs on functions which opt in to 258 /// the shadow stack collector. 259 FunctionPass *createShadowStackGCLoweringPass(); 260 261 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points 262 /// in machine code. Must be added very late during code generation, just 263 /// prior to output, and importantly after all CFG transformations (such as 264 /// branch folding). 265 extern char &GCMachineCodeAnalysisID; 266 267 /// Creates a pass to print GC metadata. 268 /// 269 FunctionPass *createGCInfoPrinter(raw_ostream &OS); 270 271 /// MachineCSE - This pass performs global CSE on machine instructions. 272 extern char &MachineCSEID; 273 274 /// ImplicitNullChecks - This pass folds null pointer checks into nearby 275 /// memory operations. 276 extern char &ImplicitNullChecksID; 277 278 /// This pass performs loop invariant code motion on machine instructions. 279 extern char &MachineLICMID; 280 281 /// This pass performs loop invariant code motion on machine instructions. 282 /// This variant works before register allocation. \see MachineLICMID. 283 extern char &EarlyMachineLICMID; 284 285 /// MachineSinking - This pass performs sinking on machine instructions. 286 extern char &MachineSinkingID; 287 288 /// MachineCopyPropagation - This pass performs copy propagation on 289 /// machine instructions. 290 extern char &MachineCopyPropagationID; 291 292 /// PeepholeOptimizer - This pass performs peephole optimizations - 293 /// like extension and comparison eliminations. 294 extern char &PeepholeOptimizerID; 295 296 /// OptimizePHIs - This pass optimizes machine instruction PHIs 297 /// to take advantage of opportunities created during DAG legalization. 298 extern char &OptimizePHIsID; 299 300 /// StackSlotColoring - This pass performs stack slot coloring. 301 extern char &StackSlotColoringID; 302 303 /// This pass lays out funclets contiguously. 304 extern char &FuncletLayoutID; 305 306 /// This pass inserts the XRay instrumentation sleds if they are supported by 307 /// the target platform. 308 extern char &XRayInstrumentationID; 309 310 /// This pass inserts FEntry calls 311 extern char &FEntryInserterID; 312 313 /// This pass implements the "patchable-function" attribute. 314 extern char &PatchableFunctionID; 315 316 /// createStackProtectorPass - This pass adds stack protectors to functions. 317 /// 318 FunctionPass *createStackProtectorPass(); 319 320 /// createMachineVerifierPass - This pass verifies cenerated machine code 321 /// instructions for correctness. 322 /// 323 FunctionPass *createMachineVerifierPass(const std::string& Banner); 324 325 /// createDwarfEHPass - This pass mulches exception handling code into a form 326 /// adapted to code generation. Required if using dwarf exception handling. 327 FunctionPass *createDwarfEHPass(); 328 329 /// createWinEHPass - Prepares personality functions used by MSVC on Windows, 330 /// in addition to the Itanium LSDA based personalities. 331 FunctionPass *createWinEHPass(bool DemoteCatchSwitchPHIOnly = false); 332 333 /// createSjLjEHPreparePass - This pass adapts exception handling code to use 334 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow. 335 /// 336 FunctionPass *createSjLjEHPreparePass(); 337 338 /// createWasmEHPass - This pass adapts exception handling code to use 339 /// WebAssembly's exception handling scheme. 340 FunctionPass *createWasmEHPass(); 341 342 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack 343 /// slots relative to one another and allocates base registers to access them 344 /// when it is estimated by the target to be out of range of normal frame 345 /// pointer or stack pointer index addressing. 346 extern char &LocalStackSlotAllocationID; 347 348 /// This pass expands pseudo-instructions, reserves registers and adjusts 349 /// machine frame information. 350 extern char &FinalizeISelID; 351 352 /// UnpackMachineBundles - This pass unpack machine instruction bundles. 353 extern char &UnpackMachineBundlesID; 354 355 FunctionPass * 356 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor); 357 358 /// FinalizeMachineBundles - This pass finalize machine instruction 359 /// bundles (created earlier, e.g. during pre-RA scheduling). 360 extern char &FinalizeMachineBundlesID; 361 362 /// StackMapLiveness - This pass analyses the register live-out set of 363 /// stackmap/patchpoint intrinsics and attaches the calculated information to 364 /// the intrinsic for later emission to the StackMap. 365 extern char &StackMapLivenessID; 366 367 /// LiveDebugValues pass 368 extern char &LiveDebugValuesID; 369 370 /// createJumpInstrTables - This pass creates jump-instruction tables. 371 ModulePass *createJumpInstrTablesPass(); 372 373 /// createForwardControlFlowIntegrityPass - This pass adds control-flow 374 /// integrity. 375 ModulePass *createForwardControlFlowIntegrityPass(); 376 377 /// InterleavedAccess Pass - This pass identifies and matches interleaved 378 /// memory accesses to target specific intrinsics. 379 /// 380 FunctionPass *createInterleavedAccessPass(); 381 382 /// InterleavedLoadCombines Pass - This pass identifies interleaved loads and 383 /// combines them into wide loads detectable by InterleavedAccessPass 384 /// 385 FunctionPass *createInterleavedLoadCombinePass(); 386 387 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all 388 /// TLS variables for the emulated TLS model. 389 /// 390 ModulePass *createLowerEmuTLSPass(); 391 392 /// This pass lowers the \@llvm.load.relative and \@llvm.objc.* intrinsics to 393 /// instructions. This is unsafe to do earlier because a pass may combine the 394 /// constant initializer into the load, which may result in an overflowing 395 /// evaluation. 396 ModulePass *createPreISelIntrinsicLoweringPass(); 397 398 /// GlobalMerge - This pass merges internal (by default) globals into structs 399 /// to enable reuse of a base pointer by indexed addressing modes. 400 /// It can also be configured to focus on size optimizations only. 401 /// 402 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset, 403 bool OnlyOptimizeForSize = false, 404 bool MergeExternalByDefault = false); 405 406 /// This pass splits the stack into a safe stack and an unsafe stack to 407 /// protect against stack-based overflow vulnerabilities. 408 FunctionPass *createSafeStackPass(); 409 410 /// This pass detects subregister lanes in a virtual register that are used 411 /// independently of other lanes and splits them into separate virtual 412 /// registers. 413 extern char &RenameIndependentSubregsID; 414 415 /// This pass is executed POST-RA to collect which physical registers are 416 /// preserved by given machine function. 417 FunctionPass *createRegUsageInfoCollector(); 418 419 /// Return a MachineFunction pass that identifies call sites 420 /// and propagates register usage information of callee to caller 421 /// if available with PysicalRegisterUsageInfo pass. 422 FunctionPass *createRegUsageInfoPropPass(); 423 424 /// This pass performs software pipelining on machine instructions. 425 extern char &MachinePipelinerID; 426 427 /// This pass frees the memory occupied by the MachineFunction. 428 FunctionPass *createFreeMachineFunctionPass(); 429 430 /// This pass performs outlining on machine instructions directly before 431 /// printing assembly. 432 ModulePass *createMachineOutlinerPass(bool RunOnAllFunctions = true); 433 434 /// This pass expands the experimental reduction intrinsics into sequences of 435 /// shuffles. 436 FunctionPass *createExpandReductionsPass(); 437 438 // This pass expands memcmp() to load/stores. 439 FunctionPass *createExpandMemCmpPass(); 440 441 /// Creates Break False Dependencies pass. \see BreakFalseDeps.cpp 442 FunctionPass *createBreakFalseDeps(); 443 444 // This pass expands indirectbr instructions. 445 FunctionPass *createIndirectBrExpandPass(); 446 447 /// Creates CFI Instruction Inserter pass. \see CFIInstrInserter.cpp 448 FunctionPass *createCFIInstrInserter(); 449 450 /// Create Hardware Loop pass. \see HardwareLoops.cpp 451 FunctionPass *createHardwareLoopsPass(); 452 453 } // End llvm namespace 454 455 #endif 456