1; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s 2 3@board = common global [400 x i8] zeroinitializer, align 1 4@next_string = common global i32 0, align 4 5@string_number = common global [400 x i32] zeroinitializer, align 4 6 7; Function Attrs: nounwind ssp 8define void @new_position(i32 %pos) { 9entry: 10 %idxprom = sext i32 %pos to i64 11 %arrayidx = getelementptr inbounds [400 x i8], [400 x i8]* @board, i64 0, i64 %idxprom 12 %tmp = load i8, i8* %arrayidx, align 1 13 %.off = add i8 %tmp, -1 14 %switch = icmp ult i8 %.off, 2 15 br i1 %switch, label %if.then, label %if.end 16 17if.then: ; preds = %entry 18 %tmp1 = load i32, i32* @next_string, align 4 19 %arrayidx8 = getelementptr inbounds [400 x i32], [400 x i32]* @string_number, i64 0, i64 %idxprom 20 store i32 %tmp1, i32* %arrayidx8, align 4 21 br label %if.end 22 23if.end: ; preds = %if.then, %entry 24 ret void 25; CHECK-LABEL: new_position 26; CHECK-NOT: and 27; CHECK: ret 28} 29 30define zeroext i1 @test8_0(i8 zeroext %x) align 2 { 31entry: 32 %0 = add i8 %x, 74 33 %1 = icmp ult i8 %0, -20 34 br i1 %1, label %ret_true, label %ret_false 35ret_false: 36 ret i1 false 37ret_true: 38 ret i1 true 39; CHECK-LABEL: test8_0 40; CHECK: and 41; CHECK: ret 42} 43 44define zeroext i1 @test8_1(i8 zeroext %x) align 2 { 45entry: 46 %0 = add i8 %x, 246 47 %1 = icmp uge i8 %0, 90 48 br i1 %1, label %ret_true, label %ret_false 49ret_false: 50 ret i1 false 51ret_true: 52 ret i1 true 53; CHECK-LABEL: test8_1 54; CHECK-NOT: and 55; CHECK: ret 56} 57 58define zeroext i1 @test8_2(i8 zeroext %x) align 2 { 59entry: 60 %0 = add i8 %x, 227 61 %1 = icmp ne i8 %0, 179 62 br i1 %1, label %ret_true, label %ret_false 63ret_false: 64 ret i1 false 65ret_true: 66 ret i1 true 67; CHECK-LABEL: test8_2 68; CHECK-NOT: and 69; CHECK: ret 70} 71 72define zeroext i1 @test8_3(i8 zeroext %x) align 2 { 73entry: 74 %0 = add i8 %x, 201 75 %1 = icmp eq i8 %0, 154 76 br i1 %1, label %ret_true, label %ret_false 77ret_false: 78 ret i1 false 79ret_true: 80 ret i1 true 81; CHECK-LABEL: test8_3 82; CHECK-NOT: and 83; CHECK: ret 84} 85 86define zeroext i1 @test8_4(i8 zeroext %x) align 2 { 87entry: 88 %0 = add i8 %x, -79 89 %1 = icmp ne i8 %0, -40 90 br i1 %1, label %ret_true, label %ret_false 91ret_false: 92 ret i1 false 93ret_true: 94 ret i1 true 95; CHECK-LABEL: test8_4 96; CHECK-NOT: and 97; CHECK: ret 98} 99 100define zeroext i1 @test8_5(i8 zeroext %x) align 2 { 101entry: 102 %0 = add i8 %x, 133 103 %1 = icmp uge i8 %0, -105 104 br i1 %1, label %ret_true, label %ret_false 105ret_false: 106 ret i1 false 107ret_true: 108 ret i1 true 109; CHECK-LABEL: test8_5 110; CHECK: and 111; CHECK: ret 112} 113 114define zeroext i1 @test8_6(i8 zeroext %x) align 2 { 115entry: 116 %0 = add i8 %x, -58 117 %1 = icmp uge i8 %0, 155 118 br i1 %1, label %ret_true, label %ret_false 119ret_false: 120 ret i1 false 121ret_true: 122 ret i1 true 123; CHECK-LABEL: test8_6 124; CHECK: and 125; CHECK: ret 126} 127 128define zeroext i1 @test8_7(i8 zeroext %x) align 2 { 129entry: 130 %0 = add i8 %x, 225 131 %1 = icmp ult i8 %0, 124 132 br i1 %1, label %ret_true, label %ret_false 133ret_false: 134 ret i1 false 135ret_true: 136 ret i1 true 137; CHECK-LABEL: test8_7 138; CHECK-NOT: and 139; CHECK: ret 140} 141 142 143 144define zeroext i1 @test8_8(i8 zeroext %x) align 2 { 145entry: 146 %0 = add i8 %x, 190 147 %1 = icmp uge i8 %0, 1 148 br i1 %1, label %ret_true, label %ret_false 149ret_false: 150 ret i1 false 151ret_true: 152 ret i1 true 153; CHECK-LABEL: test8_8 154; CHECK-NOT: and 155; CHECK: ret 156} 157 158define zeroext i1 @test16_0(i16 zeroext %x) align 2 { 159entry: 160 %0 = add i16 %x, -46989 161 %1 = icmp ne i16 %0, -41903 162 br i1 %1, label %ret_true, label %ret_false 163ret_false: 164 ret i1 false 165ret_true: 166 ret i1 true 167; CHECK-LABEL: test16_0 168; CHECK-NOT: and 169; CHECK: ret 170} 171 172define zeroext i1 @test16_2(i16 zeroext %x) align 2 { 173entry: 174 %0 = add i16 %x, 16882 175 %1 = icmp ule i16 %0, -24837 176 br i1 %1, label %ret_true, label %ret_false 177ret_false: 178 ret i1 false 179ret_true: 180 ret i1 true 181; CHECK-LABEL: test16_2 182; CHECK: mov [[CST:w[0-9]+]], #16882 183; CHECK: add [[ADD:w[0-9]+]], w0, [[CST]] 184; CHECK: cmp {{.*}}, [[ADD]], uxth 185; CHECK: ret 186} 187 188define zeroext i1 @test16_3(i16 zeroext %x) align 2 { 189entry: 190 %0 = add i16 %x, 29283 191 %1 = icmp ne i16 %0, 16947 192 br i1 %1, label %ret_true, label %ret_false 193ret_false: 194 ret i1 false 195ret_true: 196 ret i1 true 197; CHECK-LABEL: test16_3 198; CHECK-NOT: and 199; CHECK: ret 200} 201 202define zeroext i1 @test16_4(i16 zeroext %x) align 2 { 203entry: 204 %0 = add i16 %x, -35551 205 %1 = icmp uge i16 %0, 15677 206 br i1 %1, label %ret_true, label %ret_false 207ret_false: 208 ret i1 false 209ret_true: 210 ret i1 true 211; CHECK-LABEL: test16_4 212; CHECK: mov [[CST:w[0-9]+]], #29985 213; CHECK: add [[ADD:w[0-9]+]], w0, [[CST]] 214; CHECK: cmp {{.*}}, [[ADD]], uxth 215; CHECK: ret 216} 217 218define zeroext i1 @test16_5(i16 zeroext %x) align 2 { 219entry: 220 %0 = add i16 %x, -25214 221 %1 = icmp ne i16 %0, -1932 222 br i1 %1, label %ret_true, label %ret_false 223ret_false: 224 ret i1 false 225ret_true: 226 ret i1 true 227; CHECK-LABEL: test16_5 228; CHECK-NOT: and 229; CHECK: ret 230} 231 232define zeroext i1 @test16_6(i16 zeroext %x) align 2 { 233entry: 234 %0 = add i16 %x, -32194 235 %1 = icmp uge i16 %0, -41215 236 br i1 %1, label %ret_true, label %ret_false 237ret_false: 238 ret i1 false 239ret_true: 240 ret i1 true 241; CHECK-LABEL: test16_6 242; CHECK-NOT: and 243; CHECK: ret 244} 245 246define zeroext i1 @test16_7(i16 zeroext %x) align 2 { 247entry: 248 %0 = add i16 %x, 9272 249 %1 = icmp uge i16 %0, -42916 250 br i1 %1, label %ret_true, label %ret_false 251ret_false: 252 ret i1 false 253ret_true: 254 ret i1 true 255; CHECK-LABEL: test16_7 256; CHECK: mov [[CST:w[0-9]+]], #9272 257; CHECK: add [[ADD:w[0-9]+]], w0, [[CST]] 258; CHECK: cmp {{.*}}, [[ADD]], uxth 259; CHECK: ret 260} 261 262define zeroext i1 @test16_8(i16 zeroext %x) align 2 { 263entry: 264 %0 = add i16 %x, -63749 265 %1 = icmp ne i16 %0, 6706 266 br i1 %1, label %ret_true, label %ret_false 267ret_false: 268 ret i1 false 269ret_true: 270 ret i1 true 271; CHECK-LABEL: test16_8 272; CHECK-NOT: and 273; CHECK: ret 274} 275 276