1; RUN: llc -verify-machineinstrs < %s | FileCheck %s
2
3target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"
4target triple = "msp430---elf"
5
6declare void @llvm.va_start(i8*) nounwind
7declare void @llvm.va_end(i8*) nounwind
8declare void @llvm.va_copy(i8*, i8*) nounwind
9
10define void @va_start(i16 %a, ...) nounwind {
11entry:
12; CHECK-LABEL: va_start:
13; CHECK: sub #2, r1
14  %vl = alloca i8*, align 2
15  %vl1 = bitcast i8** %vl to i8*
16; CHECK-NEXT: mov r1, [[REG:r[0-9]+]]
17; CHECK-NEXT: add #6, [[REG]]
18; CHECK-NEXT: mov [[REG]], 0(r1)
19  call void @llvm.va_start(i8* %vl1)
20  call void @llvm.va_end(i8* %vl1)
21  ret void
22}
23
24define i16 @va_arg(i8* %vl) nounwind {
25entry:
26; CHECK-LABEL: va_arg:
27  %vl.addr = alloca i8*, align 2
28  store i8* %vl, i8** %vl.addr, align 2
29; CHECK: mov r12, [[REG:r[0-9]+]]
30; CHECK-NEXT: incd [[REG]]
31; CHECK-NEXT: mov [[REG]], 0(r1)
32  %0 = va_arg i8** %vl.addr, i16
33; CHECK-NEXT: mov 0(r12), r12
34  ret i16 %0
35}
36
37define void @va_copy(i8* %vl) nounwind {
38entry:
39; CHECK-LABEL: va_copy:
40  %vl.addr = alloca i8*, align 2
41  %vl2 = alloca i8*, align 2
42; CHECK-DAG: mov r12, 2(r1)
43  store i8* %vl, i8** %vl.addr, align 2
44  %0 = bitcast i8** %vl2 to i8*
45  %1 = bitcast i8** %vl.addr to i8*
46; CHECK-DAG: mov r12, 0(r1)
47  call void @llvm.va_copy(i8* %0, i8* %1)
48  ret void
49}
50