1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu -mcpu=bdver2 < %s | FileCheck %s
3
4define i32 @foo(i32* nocapture readonly %arr, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) {
5; CHECK-LABEL: @foo(
6; CHECK-NEXT:  entry:
7; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 1
8; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[ARR]] to <2 x i32>*
9; CHECK-NEXT:    [[TMP1:%.*]] = load <2 x i32>, <2 x i32>* [[TMP0]], align 4
10; CHECK-NEXT:    [[REORDER_SHUFFLE:%.*]] = shufflevector <2 x i32> [[TMP1]], <2 x i32> undef, <2 x i32> <i32 1, i32 0>
11; CHECK-NEXT:    [[SHUFFLE:%.*]] = shufflevector <2 x i32> [[REORDER_SHUFFLE]], <2 x i32> undef, <8 x i32> <i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 1, i32 1>
12; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <8 x i32> undef, i32 [[A1:%.*]], i32 0
13; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[A2:%.*]], i32 1
14; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[A3:%.*]], i32 2
15; CHECK-NEXT:    [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[A4:%.*]], i32 3
16; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[A5:%.*]], i32 4
17; CHECK-NEXT:    [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[A6:%.*]], i32 5
18; CHECK-NEXT:    [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[A7:%.*]], i32 6
19; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <8 x i32> [[TMP8]], i32 [[A8:%.*]], i32 7
20; CHECK-NEXT:    [[TMP10:%.*]] = add <8 x i32> [[SHUFFLE]], [[TMP9]]
21; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 undef, undef
22; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 undef, i32 undef
23; CHECK-NEXT:    [[CMP15:%.*]] = icmp ult i32 [[COND]], undef
24; CHECK-NEXT:    [[COND19:%.*]] = select i1 [[CMP15]], i32 [[COND]], i32 undef
25; CHECK-NEXT:    [[CMP20:%.*]] = icmp ult i32 [[COND19]], undef
26; CHECK-NEXT:    [[COND24:%.*]] = select i1 [[CMP20]], i32 [[COND19]], i32 undef
27; CHECK-NEXT:    [[CMP25:%.*]] = icmp ult i32 [[COND24]], undef
28; CHECK-NEXT:    [[COND29:%.*]] = select i1 [[CMP25]], i32 [[COND24]], i32 undef
29; CHECK-NEXT:    [[CMP30:%.*]] = icmp ult i32 [[COND29]], undef
30; CHECK-NEXT:    [[COND34:%.*]] = select i1 [[CMP30]], i32 [[COND29]], i32 undef
31; CHECK-NEXT:    [[CMP35:%.*]] = icmp ult i32 [[COND34]], undef
32; CHECK-NEXT:    [[COND39:%.*]] = select i1 [[CMP35]], i32 [[COND34]], i32 undef
33; CHECK-NEXT:    [[CMP40:%.*]] = icmp ult i32 [[COND39]], undef
34; CHECK-NEXT:    [[RDX_SHUF:%.*]] = shufflevector <8 x i32> [[TMP10]], <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
35; CHECK-NEXT:    [[RDX_MINMAX_CMP:%.*]] = icmp ult <8 x i32> [[TMP10]], [[RDX_SHUF]]
36; CHECK-NEXT:    [[RDX_MINMAX_SELECT:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP]], <8 x i32> [[TMP10]], <8 x i32> [[RDX_SHUF]]
37; CHECK-NEXT:    [[RDX_SHUF1:%.*]] = shufflevector <8 x i32> [[RDX_MINMAX_SELECT]], <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
38; CHECK-NEXT:    [[RDX_MINMAX_CMP2:%.*]] = icmp ult <8 x i32> [[RDX_MINMAX_SELECT]], [[RDX_SHUF1]]
39; CHECK-NEXT:    [[RDX_MINMAX_SELECT3:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP2]], <8 x i32> [[RDX_MINMAX_SELECT]], <8 x i32> [[RDX_SHUF1]]
40; CHECK-NEXT:    [[RDX_SHUF4:%.*]] = shufflevector <8 x i32> [[RDX_MINMAX_SELECT3]], <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
41; CHECK-NEXT:    [[RDX_MINMAX_CMP5:%.*]] = icmp ult <8 x i32> [[RDX_MINMAX_SELECT3]], [[RDX_SHUF4]]
42; CHECK-NEXT:    [[RDX_MINMAX_SELECT6:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP5]], <8 x i32> [[RDX_MINMAX_SELECT3]], <8 x i32> [[RDX_SHUF4]]
43; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <8 x i32> [[RDX_MINMAX_SELECT6]], i32 0
44; CHECK-NEXT:    [[COND44:%.*]] = select i1 [[CMP40]], i32 [[COND39]], i32 undef
45; CHECK-NEXT:    ret i32 [[TMP11]]
46;
47entry:
48  %arrayidx = getelementptr inbounds i32, i32* %arr, i64 1
49  %0 = load i32, i32* %arrayidx, align 4
50  %add = add i32 %0, %a1
51  %add2 = add i32 %0, %a2
52  %add4 = add i32 %0, %a3
53  %add6 = add i32 %0, %a4
54  %add8 = add i32 %0, %a5
55  %add10 = add i32 %0, %a6
56  %1 = load i32, i32* %arr, align 4
57  %add12 = add i32 %1, %a7
58  %add14 = add i32 %1, %a8
59  %cmp = icmp ult i32 %add, %add2
60  %cond = select i1 %cmp, i32 %add, i32 %add2
61  %cmp15 = icmp ult i32 %cond, %add4
62  %cond19 = select i1 %cmp15, i32 %cond, i32 %add4
63  %cmp20 = icmp ult i32 %cond19, %add6
64  %cond24 = select i1 %cmp20, i32 %cond19, i32 %add6
65  %cmp25 = icmp ult i32 %cond24, %add8
66  %cond29 = select i1 %cmp25, i32 %cond24, i32 %add8
67  %cmp30 = icmp ult i32 %cond29, %add10
68  %cond34 = select i1 %cmp30, i32 %cond29, i32 %add10
69  %cmp35 = icmp ult i32 %cond34, %add12
70  %cond39 = select i1 %cmp35, i32 %cond34, i32 %add12
71  %cmp40 = icmp ult i32 %cond39, %add14
72  %cond44 = select i1 %cmp40, i32 %cond39, i32 %add14
73  ret i32 %cond44
74}
75
76define i32 @foo1(i32* nocapture readonly %arr, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) {
77; CHECK-LABEL: @foo1(
78; CHECK-NEXT:  entry:
79; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 1
80; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[ARR]], i64 2
81; CHECK-NEXT:    [[ARRAYIDX3:%.*]] = getelementptr inbounds i32, i32* [[ARR]], i64 3
82; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[ARR]] to <4 x i32>*
83; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
84; CHECK-NEXT:    [[REORDER_SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
85; CHECK-NEXT:    [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[REORDER_SHUFFLE]], <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 0, i32 0, i32 3, i32 1, i32 0>
86; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <8 x i32> undef, i32 [[A1:%.*]], i32 0
87; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[A2:%.*]], i32 1
88; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[A3:%.*]], i32 2
89; CHECK-NEXT:    [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[A4:%.*]], i32 3
90; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[A5:%.*]], i32 4
91; CHECK-NEXT:    [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[A6:%.*]], i32 5
92; CHECK-NEXT:    [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[A7:%.*]], i32 6
93; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <8 x i32> [[TMP8]], i32 [[A8:%.*]], i32 7
94; CHECK-NEXT:    [[TMP10:%.*]] = add <8 x i32> [[SHUFFLE]], [[TMP9]]
95; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 undef, undef
96; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 undef, i32 undef
97; CHECK-NEXT:    [[CMP15:%.*]] = icmp ult i32 [[COND]], undef
98; CHECK-NEXT:    [[COND19:%.*]] = select i1 [[CMP15]], i32 [[COND]], i32 undef
99; CHECK-NEXT:    [[CMP20:%.*]] = icmp ult i32 [[COND19]], undef
100; CHECK-NEXT:    [[COND24:%.*]] = select i1 [[CMP20]], i32 [[COND19]], i32 undef
101; CHECK-NEXT:    [[CMP25:%.*]] = icmp ult i32 [[COND24]], undef
102; CHECK-NEXT:    [[COND29:%.*]] = select i1 [[CMP25]], i32 [[COND24]], i32 undef
103; CHECK-NEXT:    [[CMP30:%.*]] = icmp ult i32 [[COND29]], undef
104; CHECK-NEXT:    [[COND34:%.*]] = select i1 [[CMP30]], i32 [[COND29]], i32 undef
105; CHECK-NEXT:    [[CMP35:%.*]] = icmp ult i32 [[COND34]], undef
106; CHECK-NEXT:    [[COND39:%.*]] = select i1 [[CMP35]], i32 [[COND34]], i32 undef
107; CHECK-NEXT:    [[CMP40:%.*]] = icmp ult i32 [[COND39]], undef
108; CHECK-NEXT:    [[RDX_SHUF:%.*]] = shufflevector <8 x i32> [[TMP10]], <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
109; CHECK-NEXT:    [[RDX_MINMAX_CMP:%.*]] = icmp ult <8 x i32> [[TMP10]], [[RDX_SHUF]]
110; CHECK-NEXT:    [[RDX_MINMAX_SELECT:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP]], <8 x i32> [[TMP10]], <8 x i32> [[RDX_SHUF]]
111; CHECK-NEXT:    [[RDX_SHUF1:%.*]] = shufflevector <8 x i32> [[RDX_MINMAX_SELECT]], <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
112; CHECK-NEXT:    [[RDX_MINMAX_CMP2:%.*]] = icmp ult <8 x i32> [[RDX_MINMAX_SELECT]], [[RDX_SHUF1]]
113; CHECK-NEXT:    [[RDX_MINMAX_SELECT3:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP2]], <8 x i32> [[RDX_MINMAX_SELECT]], <8 x i32> [[RDX_SHUF1]]
114; CHECK-NEXT:    [[RDX_SHUF4:%.*]] = shufflevector <8 x i32> [[RDX_MINMAX_SELECT3]], <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
115; CHECK-NEXT:    [[RDX_MINMAX_CMP5:%.*]] = icmp ult <8 x i32> [[RDX_MINMAX_SELECT3]], [[RDX_SHUF4]]
116; CHECK-NEXT:    [[RDX_MINMAX_SELECT6:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP5]], <8 x i32> [[RDX_MINMAX_SELECT3]], <8 x i32> [[RDX_SHUF4]]
117; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <8 x i32> [[RDX_MINMAX_SELECT6]], i32 0
118; CHECK-NEXT:    [[COND44:%.*]] = select i1 [[CMP40]], i32 [[COND39]], i32 undef
119; CHECK-NEXT:    ret i32 [[TMP11]]
120;
121entry:
122  %arrayidx = getelementptr inbounds i32, i32* %arr, i64 1
123  %0 = load i32, i32* %arrayidx, align 4
124  %add = add i32 %0, %a1
125  %arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 2
126  %1 = load i32, i32* %arrayidx1, align 4
127  %add2 = add i32 %1, %a2
128  %arrayidx3 = getelementptr inbounds i32, i32* %arr, i64 3
129  %2 = load i32, i32* %arrayidx3, align 4
130  %add4 = add i32 %2, %a3
131  %add6 = add i32 %0, %a4
132  %add8 = add i32 %0, %a5
133  %3 = load i32, i32* %arr, align 4
134  %add10 = add i32 %3, %a6
135  %add12 = add i32 %1, %a7
136  %add14 = add i32 %0, %a8
137  %cmp = icmp ult i32 %add, %add2
138  %cond = select i1 %cmp, i32 %add, i32 %add2
139  %cmp15 = icmp ult i32 %cond, %add4
140  %cond19 = select i1 %cmp15, i32 %cond, i32 %add4
141  %cmp20 = icmp ult i32 %cond19, %add6
142  %cond24 = select i1 %cmp20, i32 %cond19, i32 %add6
143  %cmp25 = icmp ult i32 %cond24, %add8
144  %cond29 = select i1 %cmp25, i32 %cond24, i32 %add8
145  %cmp30 = icmp ult i32 %cond29, %add10
146  %cond34 = select i1 %cmp30, i32 %cond29, i32 %add10
147  %cmp35 = icmp ult i32 %cond34, %add12
148  %cond39 = select i1 %cmp35, i32 %cond34, i32 %add12
149  %cmp40 = icmp ult i32 %cond39, %add14
150  %cond44 = select i1 %cmp40, i32 %cond39, i32 %add14
151  ret i32 %cond44
152}
153
154define i32 @foo2(i32* nocapture readonly %arr, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) {
155; CHECK-LABEL: @foo2(
156; CHECK-NEXT:  entry:
157; CHECK-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 3
158; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i32, i32* [[ARR]], i64 2
159; CHECK-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds i32, i32* [[ARR]], i64 1
160; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i32* [[ARR]] to <4 x i32>*
161; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[TMP0]], align 4
162; CHECK-NEXT:    [[REORDER_SHUFFLE:%.*]] = shufflevector <4 x i32> [[TMP1]], <4 x i32> undef, <4 x i32> <i32 3, i32 2, i32 0, i32 1>
163; CHECK-NEXT:    [[SHUFFLE:%.*]] = shufflevector <4 x i32> [[REORDER_SHUFFLE]], <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 0, i32 2, i32 3, i32 2, i32 1, i32 3>
164; CHECK-NEXT:    [[TMP2:%.*]] = insertelement <8 x i32> undef, i32 [[A1:%.*]], i32 0
165; CHECK-NEXT:    [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[A2:%.*]], i32 1
166; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[A3:%.*]], i32 2
167; CHECK-NEXT:    [[TMP5:%.*]] = insertelement <8 x i32> [[TMP4]], i32 [[A4:%.*]], i32 3
168; CHECK-NEXT:    [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[A5:%.*]], i32 4
169; CHECK-NEXT:    [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[A6:%.*]], i32 5
170; CHECK-NEXT:    [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[A7:%.*]], i32 6
171; CHECK-NEXT:    [[TMP9:%.*]] = insertelement <8 x i32> [[TMP8]], i32 [[A8:%.*]], i32 7
172; CHECK-NEXT:    [[TMP10:%.*]] = add <8 x i32> [[SHUFFLE]], [[TMP9]]
173; CHECK-NEXT:    [[CMP:%.*]] = icmp ult i32 undef, undef
174; CHECK-NEXT:    [[COND:%.*]] = select i1 [[CMP]], i32 undef, i32 undef
175; CHECK-NEXT:    [[CMP15:%.*]] = icmp ult i32 [[COND]], undef
176; CHECK-NEXT:    [[COND19:%.*]] = select i1 [[CMP15]], i32 [[COND]], i32 undef
177; CHECK-NEXT:    [[CMP20:%.*]] = icmp ult i32 [[COND19]], undef
178; CHECK-NEXT:    [[COND24:%.*]] = select i1 [[CMP20]], i32 [[COND19]], i32 undef
179; CHECK-NEXT:    [[CMP25:%.*]] = icmp ult i32 [[COND24]], undef
180; CHECK-NEXT:    [[COND29:%.*]] = select i1 [[CMP25]], i32 [[COND24]], i32 undef
181; CHECK-NEXT:    [[CMP30:%.*]] = icmp ult i32 [[COND29]], undef
182; CHECK-NEXT:    [[COND34:%.*]] = select i1 [[CMP30]], i32 [[COND29]], i32 undef
183; CHECK-NEXT:    [[CMP35:%.*]] = icmp ult i32 [[COND34]], undef
184; CHECK-NEXT:    [[COND39:%.*]] = select i1 [[CMP35]], i32 [[COND34]], i32 undef
185; CHECK-NEXT:    [[CMP40:%.*]] = icmp ult i32 [[COND39]], undef
186; CHECK-NEXT:    [[RDX_SHUF:%.*]] = shufflevector <8 x i32> [[TMP10]], <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef>
187; CHECK-NEXT:    [[RDX_MINMAX_CMP:%.*]] = icmp ult <8 x i32> [[TMP10]], [[RDX_SHUF]]
188; CHECK-NEXT:    [[RDX_MINMAX_SELECT:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP]], <8 x i32> [[TMP10]], <8 x i32> [[RDX_SHUF]]
189; CHECK-NEXT:    [[RDX_SHUF1:%.*]] = shufflevector <8 x i32> [[RDX_MINMAX_SELECT]], <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
190; CHECK-NEXT:    [[RDX_MINMAX_CMP2:%.*]] = icmp ult <8 x i32> [[RDX_MINMAX_SELECT]], [[RDX_SHUF1]]
191; CHECK-NEXT:    [[RDX_MINMAX_SELECT3:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP2]], <8 x i32> [[RDX_MINMAX_SELECT]], <8 x i32> [[RDX_SHUF1]]
192; CHECK-NEXT:    [[RDX_SHUF4:%.*]] = shufflevector <8 x i32> [[RDX_MINMAX_SELECT3]], <8 x i32> undef, <8 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
193; CHECK-NEXT:    [[RDX_MINMAX_CMP5:%.*]] = icmp ult <8 x i32> [[RDX_MINMAX_SELECT3]], [[RDX_SHUF4]]
194; CHECK-NEXT:    [[RDX_MINMAX_SELECT6:%.*]] = select <8 x i1> [[RDX_MINMAX_CMP5]], <8 x i32> [[RDX_MINMAX_SELECT3]], <8 x i32> [[RDX_SHUF4]]
195; CHECK-NEXT:    [[TMP11:%.*]] = extractelement <8 x i32> [[RDX_MINMAX_SELECT6]], i32 0
196; CHECK-NEXT:    [[COND44:%.*]] = select i1 [[CMP40]], i32 [[COND39]], i32 undef
197; CHECK-NEXT:    ret i32 [[TMP11]]
198;
199entry:
200  %arrayidx = getelementptr inbounds i32, i32* %arr, i64 3
201  %0 = load i32, i32* %arrayidx, align 4
202  %add = add i32 %0, %a1
203  %arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 2
204  %1 = load i32, i32* %arrayidx1, align 4
205  %add2 = add i32 %1, %a2
206  %add4 = add i32 %0, %a3
207  %2 = load i32, i32* %arr, align 4
208  %add6 = add i32 %2, %a4
209  %arrayidx7 = getelementptr inbounds i32, i32* %arr, i64 1
210  %3 = load i32, i32* %arrayidx7, align 4
211  %add8 = add i32 %3, %a5
212  %add10 = add i32 %2, %a6
213  %add12 = add i32 %1, %a7
214  %add14 = add i32 %3, %a8
215  %cmp = icmp ult i32 %add, %add2
216  %cond = select i1 %cmp, i32 %add, i32 %add2
217  %cmp15 = icmp ult i32 %cond, %add4
218  %cond19 = select i1 %cmp15, i32 %cond, i32 %add4
219  %cmp20 = icmp ult i32 %cond19, %add6
220  %cond24 = select i1 %cmp20, i32 %cond19, i32 %add6
221  %cmp25 = icmp ult i32 %cond24, %add8
222  %cond29 = select i1 %cmp25, i32 %cond24, i32 %add8
223  %cmp30 = icmp ult i32 %cond29, %add10
224  %cond34 = select i1 %cmp30, i32 %cond29, i32 %add10
225  %cmp35 = icmp ult i32 %cond34, %add12
226  %cond39 = select i1 %cmp35, i32 %cond34, i32 %add12
227  %cmp40 = icmp ult i32 %cond39, %add14
228  %cond44 = select i1 %cmp40, i32 %cond39, i32 %add14
229  ret i32 %cond44
230}
231