1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt -S -simplifycfg -switch-to-lookup < %s -mtriple=x86_64-apple-darwin12.0.0 | FileCheck %s
3; RUN: opt -S -passes='simplify-cfg<switch-to-lookup>' < %s -mtriple=x86_64-apple-darwin12.0.0 | FileCheck %s
4
5; rdar://17887153
6target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
7target triple = "x86_64-apple-darwin12.0.0"
8
9define i64 @test(i3 %arg) {
10; CHECK-LABEL: @test(
11; CHECK-NEXT:  entry:
12; CHECK-NEXT:    [[SWITCH_TABLEIDX:%.*]] = sub i3 [[ARG:%.*]], -4
13; CHECK-NEXT:    [[SWITCH_TABLEIDX_ZEXT:%.*]] = zext i3 [[SWITCH_TABLEIDX]] to i4
14; CHECK-NEXT:    [[SWITCH_GEP:%.*]] = getelementptr inbounds [8 x i64], [8 x i64]* @switch.table.test, i32 0, i4 [[SWITCH_TABLEIDX_ZEXT]]
15; CHECK-NEXT:    [[SWITCH_LOAD:%.*]] = load i64, i64* [[SWITCH_GEP]]
16; CHECK-NEXT:    [[V3:%.*]] = add i64 [[SWITCH_LOAD]], 0
17; CHECK-NEXT:    ret i64 [[V3]]
18;
19entry:
20  switch i3 %arg, label %Default [
21  i3 -2, label %Label6
22  i3 1, label %Label1
23  i3 2, label %Label2
24  i3 3, label %Label3
25  i3 -4, label %Label4
26  i3 -3, label %Label5
27  ]
28
29Default:
30  %v1 = phi i64 [ 7, %Label6 ], [ 11, %Label5 ], [ 6, %Label4 ], [ 13, %Label3 ], [ 9, %Label2 ], [ 15, %Label1 ], [ 8, %entry ]
31  %v2 = phi i64 [ 0, %Label6 ], [ 0, %Label5 ], [ 0, %Label4 ], [ 0, %Label3 ], [ 0, %Label2 ], [ 0, %Label1 ], [ 0, %entry ]
32  %v3 = add i64 %v1, %v2
33  ret i64 %v3
34
35Label1:
36  br label %Default
37
38Label2:
39  br label %Default
40
41Label3:
42  br label %Default
43
44Label4:
45  br label %Default
46
47Label5:
48  br label %Default
49
50Label6:
51  br label %Default
52}
53