1 /**
2 * \ingroup MODULMACROS
3 *
4 * \file WaitForStorage.c
5 *
6 * \brief Check the state storage register for storage events and return storage * data on change
7 *
8 */
9 /*
10 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
11 *
12 *
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
15 * are met:
16 *
17 * Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 *
20 * Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the
23 * distribution.
24 *
25 * Neither the name of Texas Instruments Incorporated nor the names of
26 * its contributors may be used to endorse or promote products derived
27 * from this software without specific prior written permission.
28 *
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 */
41
42 #include "arch.h"
43 #include "edt.h"
44 #include "hal.h"
45 #include "stream.h"
46 #include "error_def.h"
47 #include "JtagId.h"
48
49 unsigned short lastTraceWritePos = 0;
50
51 /**
52 WaitForStorage
53 Check the state storage register for storage events and return storage data on change.
54 This is best used with the ExecLoop command type.
55 */
56
HAL_FUNCTION(_hal_WaitForStorage)57 HAL_FUNCTION(_hal_WaitForStorage)
58 {
59 short RetState = 2;
60 unsigned short sStStorCtrl = 0;
61
62 if(!jtagIdIsValid(cntrl_sig_capture()))
63 {
64 return 2;
65 }
66 eem_data_exchange();
67 SetReg_16Bits(0x9F);
68 sStStorCtrl = SetReg_16Bits(0);
69
70 //Storage written bit
71 if (sStStorCtrl & 0x100)
72 {
73 //Variable watch mode
74 if ( (sStStorCtrl & 0x6) == 0x4 )
75 {
76 unsigned short readPos = 0;
77
78 STREAM_put_word(VARIABLE_WATCH_FLAG);
79
80 //Reset storage
81 SetReg_16Bits(0x9E);
82 SetReg_16Bits(sStStorCtrl | 0x40);
83
84 for (readPos = 0; readPos < 8; ++readPos)
85 {
86 //Slice bits autoincrement on reading
87
88 SetReg_16Bits(0x9A);
89 SetReg_16Bits(readPos << 2);
90
91 //Read MAB value
92 SetReg_16Bits(0x9D);
93 STREAM_put_long(SetReg_16Bits(0));
94 //Read MDB value
95
96 SetReg_16Bits(0x9D);
97 STREAM_put_word(SetReg_16Bits(0));
98 }
99
100 RetState = 1;
101 }
102
103 //Trace mode
104 else
105 {
106 short writePos = 0;
107 short newEntries = 0;
108
109 SetReg_16Bits(0x9B);
110
111 writePos = SetReg_16Bits(0) >> 10;
112
113 //store until full bit
114 if (sStStorCtrl & 0x8)
115 {
116 //storage full bit (or writePos = 0, if written after polling storage control)
117 if ((sStStorCtrl & 0x200) || (writePos == 0))
118 {
119 //Disable and reset bits when full to avoid further events
120 //Enable bit will be set again with next reset from DLL
121 SetReg_16Bits(0x9E);
122 SetReg_16Bits((sStStorCtrl | 0x40) & ~0x1);
123
124 newEntries = 8 - lastTraceWritePos;
125 }
126 else if (writePos != lastTraceWritePos)
127 {
128 newEntries = writePos - lastTraceWritePos;
129 }
130 }
131 //Store continuously (only history mode: stop on trigger)
132 else
133 {
134 static unsigned int noChangeSince = 0;
135
136 if (writePos != lastTraceWritePos)
137 {
138 noChangeSince = 0;
139 }
140 else if (++noChangeSince == 20)
141 {
142 newEntries = (sStStorCtrl & 0x200) ? 8 : writePos;
143 }
144 }
145
146 lastTraceWritePos = writePos;
147
148 if (newEntries > 0)
149 {
150 unsigned short readPos = (writePos - newEntries) & 0x7;
151
152 STREAM_put_word(STATE_STORAGE_FLAG);
153 STREAM_put_word(newEntries);
154
155 do
156 {
157 //Slice bits autoincrement on reading
158
159 SetReg_16Bits(0x9A);
160 SetReg_16Bits(readPos << 2);
161
162 //Read MAB value
163 SetReg_16Bits(0x9D);
164 STREAM_put_long(SetReg_16Bits(0));
165
166 //Read MDB value
167 SetReg_16Bits(0x9D);
168 STREAM_put_word(SetReg_16Bits(0));
169
170 //Read Ctrl value
171 SetReg_16Bits(0x9D);
172 STREAM_put_word(SetReg_16Bits(0));
173
174 if (++readPos > 7)
175 {
176 readPos = 0;
177 }
178
179 } while (readPos != writePos);
180
181 RetState = 1;
182 }
183 }
184 }
185
186 return RetState;
187 }
188