1 /* 2 * $Id: tpc.h,v 1.4 2005/09/29 11:13:32 telka Exp $ 3 * 4 * H8/3048 TPC Registers 5 * Copyright (C) 2005 Elcom s.r.o. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the copyright holders nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 26 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 27 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * Written by Branislav Petrovsky <brano111@szm.sk>, 2005. 32 * 33 * Documentation: 34 * [1] Renesas Technology Corp., "Hitachi Single-Chip Microcomputer 35 * H8/3048 Series, H8/3048F-ZTAT Hardware Manual", 36 * Rev. 6.0, 9/3/2002, Order Number: ADE-602-073E 37 * 38 */ 39 40 #ifndef H83048_TPC_H 41 #define H83048_TPC_H 42 43 #include <openwince.h> 44 45 #ifndef __ASSEMBLY__ 46 #include <stdint.h> 47 #endif 48 49 /* TPC registers */ 50 51 #define TPC_BASE 0xffffa0 52 53 #ifndef __ASSEMBLY__ 54 typedef volatile struct TPC_registers { 55 uint8_t tpmr; 56 uint8_t tpcr; 57 uint8_t nderb; 58 uint8_t ndera; 59 uint8_t ndrb; 60 uint8_t ndra; 61 uint8_t ndrb_d; 62 uint8_t ndra_d; 63 } TPC_registers_t; 64 65 #define TPC_pointer ((TPC_registers_t*) TPC_BASE) 66 67 #define TPMR TPC_pointer->tpmr 68 #define TPCR TPC_pointer->tpcr 69 #define NDERB TPC_pointer->nderb 70 #define NDERA TPC_pointer->ndera 71 #define NDRB TPC_pointer->ndrb 72 #define NDRA TPC_pointer->ndra 73 #define NDRB_D TPC_pointer->ndrb_d 74 #define NDRA_D TPC_pointer->ndra_d 75 #endif /* __ASSEMBLY__ */ 76 77 #define TPMR_OFFSET 0x00 78 #define TPCR_OFFSET 0x01 79 #define NDERB_OFFSET 0x02 80 #define NDERA_OFFSET 0x03 81 #define NDRB_OFFSET 0x04 82 #define NDRA_OFFSET 0x05 83 #define NDRB_D_OFFSET 0x06 84 #define NDRA_D_OFFSET 0x07 85 86 /* TPMR bits */ 87 #define TPMR_G3NOV bit(3) 88 #define TPMR_G2NOV bit(2) 89 #define TPMR_G1NOV bit(1) 90 #define TPMR_G0NOV bit(0) 91 92 /* TPCR bits */ 93 #define TPCR_G3CMS_MASK bits(7,6) 94 #define TPCR_G3CMS(x) bits_val(7,6,x) 95 #define get_TPCR_G3CMS(x) bits_get(7,6,x) 96 #define TPCR_G2CMS_MASK bits(5,4) 97 #define TPCR_G2CMS(x) bits_val(5,4,x) 98 #define get_TPCR_G2CMS(x) bits_get(5,4,x) 99 #define TPCR_G1CMS_MASK bits(3,2) 100 #define TPCR_G1CMS(x) bits_val(3,2,x) 101 #define get_TPCR_G1CMS(x) bits_get(3,2,x) 102 #define TPCR_G0CMS_MASK bits(1,0) 103 #define TPCR_G0CMS(x) bits_val(1,0,x) 104 #define get_TPCR_G0CMS(x) bits_get(1,0,x) 105 106 /* NDERB bits */ 107 #define NDERB_NDER15 bit(7) 108 #define NDERB_NDER14 bit(6) 109 #define NDERB_NDER13 bit(5) 110 #define NDERB_NDER12 bit(4) 111 #define NDERB_NDER11 bit(3) 112 #define NDERB_NDER10 bit(2) 113 #define NDERB_NDER9 bit(1) 114 #define NDERB_NDER8 bit(0) 115 116 /* NDERA bits */ 117 #define NDERA_NDER7 bit(7) 118 #define NDERA_NDER6 bit(6) 119 #define NDERA_NDER5 bit(5) 120 #define NDERA_NDER4 bit(4) 121 #define NDERA_NDER3 bit(3) 122 #define NDERA_NDER2 bit(2) 123 #define NDERA_NDER1 bit(1) 124 #define NDERA_NDER0 bit(0) 125 126 /* NDRB bits */ 127 #define NDRB_NDR15 bit(7) 128 #define NDRB_NDR14 bit(6) 129 #define NDRB_NDR13 bit(5) 130 #define NDRB_NDR12 bit(4) 131 #define NDRB_NDR11 bit(3) 132 #define NDRB_NDR10 bit(2) 133 #define NDRB_NDR9 bit(1) 134 #define NDRB_NDR8 bit(0) 135 136 /* NDRA bits */ 137 #define NDRA_NDR7 bit(7) 138 #define NDRA_NDR6 bit(6) 139 #define NDRA_NDR5 bit(5) 140 #define NDRA_NDR4 bit(4) 141 #define NDRA_NDR3 bit(3) 142 #define NDRA_NDR2 bit(2) 143 #define NDRA_NDR1 bit(1) 144 #define NDRA_NDR0 bit(0) 145 146 #endif /* H83048_TPC_H */ 147