1 /**************************************************************************** 2 ** 3 ** Copyright (C) 2019 Denis Shienkov <denis.shienkov@gmail.com> 4 ** Contact: https://www.qt.io/licensing/ 5 ** 6 ** This file is part of the examples of Qbs. 7 ** 8 ** $QT_BEGIN_LICENSE:BSD$ 9 ** Commercial License Usage 10 ** Licensees holding valid commercial Qt licenses may use this file in 11 ** accordance with the commercial license agreement provided with the 12 ** Software or, alternatively, in accordance with the terms contained in 13 ** a written agreement between you and The Qt Company. For licensing terms 14 ** and conditions see https://www.qt.io/terms-conditions. For further 15 ** information use the contact form at https://www.qt.io/contact-us. 16 ** 17 ** BSD License Usage 18 ** Alternatively, you may use this file under the terms of the BSD license 19 ** as follows: 20 ** 21 ** "Redistribution and use in source and binary forms, with or without 22 ** modification, are permitted provided that the following conditions are 23 ** met: 24 ** * Redistributions of source code must retain the above copyright 25 ** notice, this list of conditions and the following disclaimer. 26 ** * Redistributions in binary form must reproduce the above copyright 27 ** notice, this list of conditions and the following disclaimer in 28 ** the documentation and/or other materials provided with the 29 ** distribution. 30 ** * Neither the name of The Qt Company Ltd nor the names of its 31 ** contributors may be used to endorse or promote products derived 32 ** from this software without specific prior written permission. 33 ** 34 ** 35 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 36 ** "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 37 ** LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 38 ** A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 39 ** OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 40 ** SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 41 ** LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 42 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 43 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 44 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 45 ** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE." 46 ** 47 ** $QT_END_LICENSE$ 48 ** 49 ****************************************************************************/ 50 51 #ifndef SYSTEM_H 52 #define SYSTEM_H 53 54 #include <stdint.h> 55 56 #ifdef __cplusplus 57 extern "C" { 58 #endif 59 60 #define __IO volatile 61 62 // General purpose input/output registers map. 63 struct gpio_regs_map { 64 __IO uint32_t MODER; 65 __IO uint32_t OTYPER; 66 __IO uint32_t OSPEEDR; 67 __IO uint32_t PUPDR; 68 __IO uint32_t IDR; 69 __IO uint32_t ODR; 70 __IO uint32_t BSRR; 71 __IO uint32_t LCKR; 72 __IO uint32_t AFR[2u]; 73 }; 74 75 // Reset and clock control registers map. 76 struct rcc_regs_map { 77 __IO uint32_t CR; 78 __IO uint32_t PLLCFGR; 79 __IO uint32_t CFGR; 80 __IO uint32_t CIR; 81 __IO uint32_t AHB1RSTR; 82 __IO uint32_t AHB2RSTR; 83 __IO uint32_t AHB3RSTR; 84 uint32_t RESERVED0; 85 __IO uint32_t APB1RSTR; 86 __IO uint32_t APB2RSTR; 87 uint32_t RESERVED1[2u]; 88 __IO uint32_t AHB1ENR; 89 __IO uint32_t AHB2ENR; 90 __IO uint32_t AHB3ENR; 91 uint32_t RESERVED2; 92 __IO uint32_t APB1ENR; 93 __IO uint32_t APB2ENR; 94 uint32_t RESERVED3[2u]; 95 __IO uint32_t AHB1LPENR; 96 __IO uint32_t AHB2LPENR; 97 __IO uint32_t AHB3LPENR; 98 uint32_t RESERVED4; 99 __IO uint32_t APB1LPENR; 100 __IO uint32_t APB2LPENR; 101 uint32_t RESERVED5[2u]; 102 __IO uint32_t BDCR; 103 __IO uint32_t CSR; 104 uint32_t RESERVED6[2u]; 105 __IO uint32_t SSCGR; 106 __IO uint32_t PLLI2SCFGR; 107 }; 108 109 #define PERIPH_ADDRESS (0x40000000u) 110 111 #define APB2PERIPH_ADDRESS (PERIPH_ADDRESS + 0x00010000u) 112 #define AHB1PERIPH_ADDRESS (PERIPH_ADDRESS + 0x00020000u) 113 114 // APB2 peripherals. 115 #define SYSCFG_REGS_ADDRESS (APB2PERIPH_ADDRESS + 0x3800u) 116 #define EXTI_REGS_ADDRESS (APB2PERIPH_ADDRESS + 0x3C00u) 117 118 // AHB1 peripherals. 119 #define GPIOD_REGS_ADDRESS (AHB1PERIPH_ADDRESS + 0x0C00u) 120 #define RCC_REGS_ADDRESS (AHB1PERIPH_ADDRESS + 0x3800u) 121 122 #define GPIOD_REGS_MAP ((struct gpio_regs_map *)GPIOD_REGS_ADDRESS) 123 #define RCC_REGS_MAP ((struct rcc_regs_map *)RCC_REGS_ADDRESS) 124 125 #ifdef __cplusplus 126 } 127 #endif 128 129 #endif // SYSTEM_H 130