1 /* Common hooks for ARM.
2 Copyright (C) 1991-2018 Free Software Foundation, Inc.
3
4 This file is part of GCC.
5
6 GCC is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published
8 by the Free Software Foundation; either version 3, or (at your
9 option) any later version.
10
11 GCC is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
14 License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
19
20 #define INCLUDE_LIST
21 #define INCLUDE_VECTOR
22 #include "config.h"
23 #include "system.h"
24 #include "coretypes.h"
25 #include "tm.h"
26 #include "memmodel.h"
27 #include "tm_p.h"
28 #include "common/common-target.h"
29 #include "common/common-target-def.h"
30 #include "opts.h"
31 #include "flags.h"
32 #include "sbitmap.h"
33 #include "diagnostic.h"
34 #include <algorithm>
35
36 /* Set default optimization options. */
37 static const struct default_options arm_option_optimization_table[] =
38 {
39 /* Enable section anchors by default at -O1 or higher. */
40 { OPT_LEVELS_1_PLUS, OPT_fsection_anchors, NULL, 1 },
41 { OPT_LEVELS_1_PLUS, OPT_fsched_pressure, NULL, 1 },
42 { OPT_LEVELS_NONE, 0, NULL, 0 }
43 };
44
45 /* Implement TARGET_EXCEPT_UNWIND_INFO. */
46
47 enum unwind_info_type
arm_except_unwind_info(struct gcc_options * opts)48 arm_except_unwind_info (struct gcc_options *opts)
49 {
50 /* Honor the --enable-sjlj-exceptions configure switch. */
51 #ifdef CONFIG_SJLJ_EXCEPTIONS
52 if (CONFIG_SJLJ_EXCEPTIONS)
53 return UI_SJLJ;
54 #endif
55
56 /* If not using ARM EABI unwind tables... */
57 if (ARM_UNWIND_INFO)
58 {
59 /* For simplicity elsewhere in this file, indicate that all unwind
60 info is disabled if we're not emitting unwind tables. */
61 if (!opts->x_flag_exceptions && !opts->x_flag_unwind_tables)
62 return UI_NONE;
63 else
64 return UI_TARGET;
65 }
66
67 /* ... honor target configurations requesting DWARF2 EH... */
68 #ifdef DWARF2_UNWIND_INFO
69 if (DWARF2_UNWIND_INFO)
70 return UI_DWARF2;
71 #endif
72
73 /* ... or fallback to sjlj exceptions for backwards compatibility. */
74 return UI_SJLJ;
75 }
76
77 #define ARM_CPU_NAME_LENGTH 20
78
79 /* Truncate NAME at the first '.' or '+' character seen, or return
80 NAME unmodified. */
81
82 const char *
arm_rewrite_selected_cpu(const char * name)83 arm_rewrite_selected_cpu (const char *name)
84 {
85 static char output_buf[ARM_CPU_NAME_LENGTH + 1] = {0};
86 char *arg_pos;
87
88 strncpy (output_buf, name, ARM_CPU_NAME_LENGTH);
89 output_buf[ARM_CPU_NAME_LENGTH] = 0;
90
91 arg_pos = strchr (output_buf, '.');
92
93 /* If we found a '.' truncate the entry at that point. */
94 if (arg_pos)
95 *arg_pos = '\0';
96
97 arg_pos = strchr (output_buf, '+');
98
99 /* If we found a '+' truncate the entry at that point. */
100 if (arg_pos)
101 *arg_pos = '\0';
102
103 return output_buf;
104 }
105
106 /* Called by the driver to rewrite a name passed to the -mcpu
107 argument in preparation to be passed to the assembler. The
108 names passed from the command line will be in ARGV, we want
109 to use the right-most argument, which should be in
110 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
111
112 const char *
arm_rewrite_mcpu(int argc,const char ** argv)113 arm_rewrite_mcpu (int argc, const char **argv)
114 {
115 gcc_assert (argc);
116 return arm_rewrite_selected_cpu (argv[argc - 1]);
117 }
118
119 /* Comparator for arm_rewrite_selected_arch. Compare the two arch extension
120 strings FIRST and SECOND and return TRUE if FIRST is less than SECOND
121 alphabetically. */
122
123 static bool
compare_opt_names(const char * first,const char * second)124 compare_opt_names (const char *first, const char *second)
125 {
126 return strcmp (first, second) <= 0;
127 }
128
129 /* Rewrite the architecture string for passing to the assembler.
130 Although the syntax is similar we cannot assume that it supports
131 the newer FP related options. So strip any option that only
132 defines features in the standard -mfpu options out. We'll generate
133 a suitable -mfpu option elsewhere to carry that information. NAME
134 should already have been canonicalized, so we do not expect to
135 encounter +no.. options that remove features. A final problem is
136 that the assembler expects the feature extensions to be listed
137 alphabetically, so we build a list of required options and then
138 sort them into canonical order in the resulting string. */
139 const char *
arm_rewrite_selected_arch(const char * name)140 arm_rewrite_selected_arch (const char *name)
141 {
142 /* The result we return needs to be semi persistent, so handle being
143 re-invoked. */
144 static char *asm_arch = NULL;
145
146 if (asm_arch)
147 {
148 free (asm_arch);
149 asm_arch = NULL;
150 }
151
152 const char *arg_pos = strchr (name, '+');
153
154 /* No extension options? just return the original string. */
155 if (arg_pos == NULL)
156 return name;
157
158 const arch_option *arch_opt
159 = arm_parse_arch_option_name (all_architectures, "-march", name);
160
161 auto_sbitmap fpu_bits (isa_num_bits);
162 static const enum isa_feature fpu_bitlist[]
163 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
164
165 arm_initialize_isa (fpu_bits, fpu_bitlist);
166
167 auto_sbitmap opt_bits (isa_num_bits);
168
169 /* Ensure that the resulting string is large enough for the result. We
170 never add options, so using strdup here will ensure that. */
171 asm_arch = xstrdup (name);
172 asm_arch[arg_pos - name] = '\0';
173
174 std::vector<const char *>optlist;
175
176 while (arg_pos)
177 {
178 const char *end = strchr (arg_pos + 1, '+');
179 size_t len = end ? end - arg_pos : strlen (arg_pos);
180
181 for (const cpu_arch_extension *entry = arch_opt->common.extensions;
182 entry->name != NULL;
183 entry++)
184 {
185 if (strncmp (entry->name, arg_pos + 1, len - 1) == 0
186 && entry->name[len - 1] == '\0')
187 {
188 /* Don't expect removal options. */
189 gcc_assert (!entry->remove);
190 arm_initialize_isa (opt_bits, entry->isa_bits);
191 if (!bitmap_subset_p (opt_bits, fpu_bits))
192 optlist.push_back (entry->name);
193 bitmap_clear (opt_bits);
194 break;
195 }
196 }
197
198 arg_pos = end;
199 }
200
201 std::sort (optlist.begin (), optlist.end (), compare_opt_names);
202
203 for (std::vector<const char *>::iterator opt_iter = optlist.begin ();
204 opt_iter != optlist.end ();
205 ++opt_iter)
206 {
207 strcat (asm_arch, "+");
208 strcat (asm_arch, (*opt_iter));
209 }
210
211 return asm_arch;
212 }
213
214 /* Called by the driver to rewrite a name passed to the -march
215 argument in preparation to be passed to the assembler. The
216 names passed from the command line will be in ARGV, we want
217 to use the right-most argument, which should be in
218 ARGV[ARGC - 1]. ARGC should always be greater than 0. */
219
220 const char *
arm_rewrite_march(int argc,const char ** argv)221 arm_rewrite_march (int argc, const char **argv)
222 {
223 gcc_assert (argc);
224 return arm_rewrite_selected_arch (argv[argc - 1]);
225 }
226
227 #include "arm-cpu-cdata.h"
228
229 /* Scan over a raw feature array BITS checking for BIT being present.
230 This is slower than the normal bitmask checks, but we would spend longer
231 initializing that than doing the check this way. Returns true iff
232 BIT is found. */
233 static bool
check_isa_bits_for(const enum isa_feature * bits,enum isa_feature bit)234 check_isa_bits_for (const enum isa_feature* bits, enum isa_feature bit)
235 {
236 while (*bits != isa_nobit)
237 if (*bits++ == bit)
238 return true;
239
240 return false;
241 }
242
243 /* Called by the driver to check whether the target denoted by current
244 command line options is a Thumb-only target. ARGV is an array of
245 tupples (normally only one) where the first element of the tupple
246 is 'cpu' or 'arch' and the second is the option passed to the
247 compiler for that. An architecture tupple is always taken in
248 preference to a cpu tupple and the last of each type always
249 overrides any earlier setting. */
250
251 const char *
arm_target_thumb_only(int argc,const char ** argv)252 arm_target_thumb_only (int argc, const char **argv)
253 {
254 const char *arch = NULL;
255 const char *cpu = NULL;
256
257 if (argc % 2 != 0)
258 fatal_error (input_location,
259 "%%:target_mode_check takes an even number of parameters");
260
261 while (argc)
262 {
263 if (strcmp (argv[0], "arch") == 0)
264 arch = argv[1];
265 else if (strcmp (argv[0], "cpu") == 0)
266 cpu = argv[1];
267 else
268 fatal_error (input_location,
269 "unrecognized option passed to %%:target_mode_check");
270 argc -= 2;
271 argv += 2;
272 }
273
274 /* No architecture, or CPU, has option extensions that change
275 whether or not we have a Thumb-only device, so there is no need
276 to scan any option extensions specified. */
277
278 /* If the architecture is specified, that overrides any CPU setting. */
279 if (arch)
280 {
281 const arch_option *arch_opt
282 = arm_parse_arch_option_name (all_architectures, "-march", arch,
283 false);
284
285 if (arch_opt && !check_isa_bits_for (arch_opt->common.isa_bits,
286 isa_bit_notm))
287 return "-mthumb";
288 }
289 else if (cpu)
290 {
291 const cpu_option *cpu_opt
292 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu, false);
293
294 if (cpu_opt && !check_isa_bits_for (cpu_opt->common.isa_bits,
295 isa_bit_notm))
296 return "-mthumb";
297 }
298
299 /* Compiler hasn't been configured with a default, and the CPU
300 doesn't require Thumb, so default to ARM. */
301 return "-marm";
302 }
303
304 /* List the permitted CPU option names. If TARGET is a near miss for an
305 entry, print out the suggested alternative. */
306 static void
arm_print_hint_for_cpu_option(const char * target,const cpu_option * list)307 arm_print_hint_for_cpu_option (const char *target,
308 const cpu_option *list)
309 {
310 auto_vec<const char*> candidates;
311 for (; list->common.name != NULL; list++)
312 candidates.safe_push (list->common.name);
313
314 #ifdef HAVE_LOCAL_CPU_DETECT
315 /* Add also "native" as possible value. */
316 candidates.safe_push ("native");
317 #endif
318
319 char *s;
320 const char *hint = candidates_list_and_hint (target, s, candidates);
321 if (hint)
322 inform (input_location, "valid arguments are: %s; did you mean %qs?",
323 s, hint);
324 else
325 inform (input_location, "valid arguments are: %s", s);
326
327 XDELETEVEC (s);
328 }
329
330 /* Parse the base component of a CPU selection in LIST. Return a
331 pointer to the entry in the architecture table. OPTNAME is the
332 name of the option we are parsing and can be used if a diagnostic
333 is needed. If COMPLAIN is true (the default) emit error
334 messages and hints on invalid input. */
335 const cpu_option *
arm_parse_cpu_option_name(const cpu_option * list,const char * optname,const char * target,bool complain)336 arm_parse_cpu_option_name (const cpu_option *list, const char *optname,
337 const char *target, bool complain)
338 {
339 const cpu_option *entry;
340 const char *end = strchr (target, '+');
341 size_t len = end ? end - target : strlen (target);
342
343 for (entry = list; entry->common.name != NULL; entry++)
344 {
345 if (strncmp (entry->common.name, target, len) == 0
346 && entry->common.name[len] == '\0')
347 return entry;
348 }
349
350 if (complain)
351 {
352 error_at (input_location, "unrecognized %s target: %s", optname, target);
353 arm_print_hint_for_cpu_option (target, list);
354 }
355 return NULL;
356 }
357
358 /* List the permitted architecture option names. If TARGET is a near
359 miss for an entry, print out the suggested alternative. */
360 static void
arm_print_hint_for_arch_option(const char * target,const arch_option * list)361 arm_print_hint_for_arch_option (const char *target,
362 const arch_option *list)
363 {
364 auto_vec<const char*> candidates;
365 for (; list->common.name != NULL; list++)
366 candidates.safe_push (list->common.name);
367
368 #ifdef HAVE_LOCAL_CPU_DETECT
369 /* Add also "native" as possible value. */
370 candidates.safe_push ("native");
371 #endif
372
373 char *s;
374 const char *hint = candidates_list_and_hint (target, s, candidates);
375 if (hint)
376 inform (input_location, "valid arguments are: %s; did you mean %qs?",
377 s, hint);
378 else
379 inform (input_location, "valid arguments are: %s", s);
380
381 XDELETEVEC (s);
382 }
383
384 /* Parse the base component of a CPU or architecture selection in
385 LIST. Return a pointer to the entry in the architecture table.
386 OPTNAME is the name of the option we are parsing and can be used if
387 a diagnostic is needed. If COMPLAIN is true (the default) emit error
388 messages and hints on invalid input. */
389 const arch_option *
arm_parse_arch_option_name(const arch_option * list,const char * optname,const char * target,bool complain)390 arm_parse_arch_option_name (const arch_option *list, const char *optname,
391 const char *target, bool complain)
392 {
393 const arch_option *entry;
394 const char *end = strchr (target, '+');
395 size_t len = end ? end - target : strlen (target);
396
397 for (entry = list; entry->common.name != NULL; entry++)
398 {
399 if (strncmp (entry->common.name, target, len) == 0
400 && entry->common.name[len] == '\0')
401 return entry;
402 }
403
404 if (complain)
405 {
406 error_at (input_location, "unrecognized %s target: %s", optname, target);
407 arm_print_hint_for_arch_option (target, list);
408 }
409 return NULL;
410 }
411
412 /* List the permitted architecture option names. If TARGET is a near
413 miss for an entry, print out the suggested alternative. */
414 static void
arm_print_hint_for_fpu_option(const char * target)415 arm_print_hint_for_fpu_option (const char *target)
416 {
417 auto_vec<const char*> candidates;
418 for (int i = 0; i < TARGET_FPU_auto; i++)
419 candidates.safe_push (all_fpus[i].name);
420 char *s;
421 const char *hint = candidates_list_and_hint (target, s, candidates);
422 if (hint)
423 inform (input_location, "valid arguments are: %s; did you mean %qs?",
424 s, hint);
425 else
426 inform (input_location, "valid arguments are: %s", s);
427
428 XDELETEVEC (s);
429 }
430
431 static const arm_fpu_desc *
arm_parse_fpu_option(const char * opt)432 arm_parse_fpu_option (const char *opt)
433 {
434 int i;
435
436 for (i = 0; i < TARGET_FPU_auto; i++)
437 {
438 if (strcmp (all_fpus[i].name, opt) == 0)
439 return all_fpus + i;
440 }
441
442 error_at (input_location, "unrecognized -mfpu target: %s", opt);
443 arm_print_hint_for_fpu_option (opt);
444 return NULL;
445 }
446
447 /* Convert a static initializer array of feature bits to sbitmap
448 representation. */
449 void
arm_initialize_isa(sbitmap isa,const enum isa_feature * isa_bits)450 arm_initialize_isa (sbitmap isa, const enum isa_feature *isa_bits)
451 {
452 bitmap_clear (isa);
453 while (*isa_bits != isa_nobit)
454 bitmap_set_bit (isa, *(isa_bits++));
455 }
456
457 /* OPT isn't a recognized feature. Print a suitable error message and
458 suggest a possible value. Always print the list of permitted
459 values. */
460 static void
arm_unrecognized_feature(const char * opt,size_t len,const cpu_arch_option * target)461 arm_unrecognized_feature (const char *opt, size_t len,
462 const cpu_arch_option *target)
463 {
464 char *this_opt = XALLOCAVEC (char, len+1);
465 auto_vec<const char*> candidates;
466
467 strncpy (this_opt, opt, len);
468 this_opt[len] = 0;
469
470 error_at (input_location, "%qs does not support feature %qs", target->name,
471 this_opt);
472 for (const cpu_arch_extension *list = target->extensions;
473 list->name != NULL;
474 list++)
475 candidates.safe_push (list->name);
476
477 char *s;
478 const char *hint = candidates_list_and_hint (this_opt, s, candidates);
479
480 if (hint)
481 inform (input_location, "valid feature names are: %s; did you mean %qs?",
482 s, hint);
483 else
484 inform (input_location, "valid feature names are: %s", s);
485
486 XDELETEVEC (s);
487 }
488
489 /* Parse any feature extensions to add to (or remove from) the
490 permitted ISA selection. */
491 void
arm_parse_option_features(sbitmap isa,const cpu_arch_option * target,const char * opts_in)492 arm_parse_option_features (sbitmap isa, const cpu_arch_option *target,
493 const char *opts_in)
494 {
495 const char *opts = opts_in;
496
497 if (!opts)
498 return;
499
500 if (!target->extensions)
501 {
502 error_at (input_location, "%s does not take any feature options",
503 target->name);
504 return;
505 }
506
507 while (opts)
508 {
509 gcc_assert (*opts == '+');
510 const struct cpu_arch_extension *entry;
511 const char *end = strchr (++opts, '+');
512 size_t len = end ? end - opts : strlen (opts);
513 bool matched = false;
514
515 for (entry = target->extensions;
516 !matched && entry->name != NULL;
517 entry++)
518 {
519 if (strncmp (entry->name, opts, len) == 0
520 && entry->name[len] == '\0')
521 {
522 if (isa)
523 {
524 const enum isa_feature *f = entry->isa_bits;
525 if (entry->remove)
526 {
527 while (*f != isa_nobit)
528 bitmap_clear_bit (isa, *(f++));
529 }
530 else
531 {
532 while (*f != isa_nobit)
533 bitmap_set_bit (isa, *(f++));
534 }
535 }
536 matched = true;
537 }
538 }
539
540 if (!matched)
541 arm_unrecognized_feature (opts, len, target);
542
543 opts = end;
544 }
545 }
546
547 class candidate_extension
548 {
549 public:
550 const cpu_arch_extension *extension;
551 sbitmap isa_bits;
552 bool required;
553
candidate_extension(const cpu_arch_extension * ext,sbitmap bits)554 candidate_extension (const cpu_arch_extension *ext, sbitmap bits)
555 : extension (ext), isa_bits (bits), required (true)
556 {}
~candidate_extension()557 ~candidate_extension ()
558 {
559 sbitmap_free (isa_bits);
560 }
561 };
562
563 /* Generate a canonical representation of the -march option from the
564 current -march string (if given) and other options on the command
565 line that might affect the architecture. This aids multilib selection
566 by ensuring that:
567 a) the option is always present
568 b) only the minimal set of options are used
569 c) when there are multiple extensions, they are in a consistent order.
570
571 The options array consists of couplets of information where the
572 first item in each couplet is the string describing which option
573 name was selected (arch, cpu, fpu) and the second is the value
574 passed for that option. */
575 const char *
arm_canon_arch_option(int argc,const char ** argv)576 arm_canon_arch_option (int argc, const char **argv)
577 {
578 const char *arch = NULL;
579 const char *cpu = NULL;
580 const char *fpu = NULL;
581 const char *abi = NULL;
582 static char *canonical_arch = NULL;
583
584 /* Just in case we're called more than once. */
585 if (canonical_arch)
586 {
587 free (canonical_arch);
588 canonical_arch = NULL;
589 }
590
591 if (argc & 1)
592 fatal_error (input_location,
593 "%%:canon_for_mlib takes 1 or more pairs of parameters");
594
595 while (argc)
596 {
597 if (strcmp (argv[0], "arch") == 0)
598 arch = argv[1];
599 else if (strcmp (argv[0], "cpu") == 0)
600 cpu = argv[1];
601 else if (strcmp (argv[0], "fpu") == 0)
602 fpu = argv[1];
603 else if (strcmp (argv[0], "abi") == 0)
604 abi = argv[1];
605 else
606 fatal_error (input_location,
607 "unrecognized operand to %%:canon_for_mlib");
608
609 argc -= 2;
610 argv += 2;
611 }
612
613 auto_sbitmap target_isa (isa_num_bits);
614 auto_sbitmap base_isa (isa_num_bits);
615 auto_sbitmap fpu_isa (isa_num_bits);
616
617 bitmap_clear (fpu_isa);
618
619 const arch_option *selected_arch = NULL;
620
621 /* At least one of these must be defined by either the specs or the
622 user. */
623 gcc_assert (cpu || arch);
624
625 if (!fpu)
626 fpu = FPUTYPE_AUTO;
627
628 if (!abi)
629 {
630 if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFT)
631 abi = "soft";
632 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_SOFTFP)
633 abi = "softfp";
634 else if (TARGET_DEFAULT_FLOAT_ABI == ARM_FLOAT_ABI_HARD)
635 abi = "hard";
636 }
637
638 /* First build up a bitmap describing the target architecture. */
639 if (arch)
640 {
641 selected_arch = arm_parse_arch_option_name (all_architectures,
642 "-march", arch);
643
644 if (selected_arch == NULL)
645 return "";
646
647 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
648 arm_parse_option_features (target_isa, &selected_arch->common,
649 strchr (arch, '+'));
650 if (fpu && strcmp (fpu, "auto") != 0)
651 {
652 /* We assume that architectures do not have any FPU bits
653 enabled by default. If they did, we would need to strip
654 these out first. */
655 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
656 if (target_fpu == NULL)
657 return "";
658
659 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
660 bitmap_ior (target_isa, target_isa, fpu_isa);
661 }
662 }
663 else if (cpu)
664 {
665 const cpu_option *selected_cpu
666 = arm_parse_cpu_option_name (all_cores, "-mcpu", cpu);
667
668 if (selected_cpu == NULL)
669 return "";
670
671 arm_initialize_isa (target_isa, selected_cpu->common.isa_bits);
672 arm_parse_option_features (target_isa, &selected_cpu->common,
673 strchr (cpu, '+'));
674 if (fpu && strcmp (fpu, "auto") != 0)
675 {
676 /* The easiest and safest way to remove the default fpu
677 capabilities is to look for a '+no..' option that removes
678 the base FPU bit (isa_bit_vfpv2). If that doesn't exist
679 then the best we can do is strip out all the bits that
680 might be part of the most capable FPU we know about,
681 which is "crypto-neon-fp-armv8". */
682 bool default_fpu_found = false;
683 if (selected_cpu->common.extensions)
684 {
685 const cpu_arch_extension *ext;
686 for (ext = selected_cpu->common.extensions; ext->name != NULL;
687 ++ext)
688 {
689 if (ext->remove
690 && check_isa_bits_for (ext->isa_bits, isa_bit_vfpv2))
691 {
692 arm_initialize_isa (fpu_isa, ext->isa_bits);
693 bitmap_and_compl (target_isa, target_isa, fpu_isa);
694 default_fpu_found = true;
695 }
696 }
697
698 }
699
700 if (!default_fpu_found)
701 {
702 arm_initialize_isa
703 (fpu_isa,
704 all_fpus[TARGET_FPU_crypto_neon_fp_armv8].isa_bits);
705 bitmap_and_compl (target_isa, target_isa, fpu_isa);
706 }
707
708 const arm_fpu_desc *target_fpu = arm_parse_fpu_option (fpu);
709 if (target_fpu == NULL)
710 return "";
711
712 arm_initialize_isa (fpu_isa, target_fpu->isa_bits);
713 bitmap_ior (target_isa, target_isa, fpu_isa);
714 }
715
716 selected_arch = all_architectures + selected_cpu->arch;
717 }
718
719 /* If we have a soft-float ABI, disable the FPU. */
720 if (abi && strcmp (abi, "soft") == 0)
721 {
722 /* Clearing the VFPv2 bit is sufficient to stop any extention that
723 builds on the FPU from matching. */
724 bitmap_clear_bit (target_isa, isa_bit_vfpv2);
725 }
726
727 /* If we don't have a selected architecture by now, something's
728 badly wrong. */
729 gcc_assert (selected_arch);
730
731 arm_initialize_isa (base_isa, selected_arch->common.isa_bits);
732
733 /* Architecture has no extension options, so just return the canonical
734 architecture name. */
735 if (selected_arch->common.extensions == NULL)
736 return selected_arch->common.name;
737
738 /* We're only interested in extension bits. */
739 bitmap_and_compl (target_isa, target_isa, base_isa);
740
741 /* There are no extensions needed. Just return the canonical architecture
742 name. */
743 if (bitmap_empty_p (target_isa))
744 return selected_arch->common.name;
745
746 /* What is left is the architecture that the compiler will target. We
747 now need to map that back into a suitable option+features list.
748
749 The list is built in two passes. First we scan every additive
750 option feature supported by the architecture. If the option
751 provides a subset of the features we need we add it to the list
752 of candidates. We then scan backwards over the list of
753 candidates and if we find a feature that adds nothing to one that
754 was later in the list we mark it as redundant. The result is a
755 minimal list of required features for the target
756 architecture. */
757
758 std::list<candidate_extension *> extensions;
759
760 auto_sbitmap target_isa_unsatisfied (isa_num_bits);
761 bitmap_copy (target_isa_unsatisfied, target_isa);
762
763 sbitmap isa_bits = NULL;
764 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
765 cand->name != NULL;
766 cand++)
767 {
768 if (cand->remove || cand->alias)
769 continue;
770
771 if (isa_bits == NULL)
772 isa_bits = sbitmap_alloc (isa_num_bits);
773
774 arm_initialize_isa (isa_bits, cand->isa_bits);
775 if (bitmap_subset_p (isa_bits, target_isa))
776 {
777 extensions.push_back (new candidate_extension (cand, isa_bits));
778 bitmap_and_compl (target_isa_unsatisfied, target_isa_unsatisfied,
779 isa_bits);
780 isa_bits = NULL;
781 }
782 }
783
784 /* There's one extra case to consider, which is that the user has
785 specified an FPU that is less capable than this architecture
786 supports. In that case the code above will fail to find a
787 suitable feature. We handle this by scanning the list of options
788 again, matching the first option that provides an FPU that is
789 more capable than the selected FPU.
790
791 Note that the other case (user specified a more capable FPU than
792 this architecture supports) should end up selecting the most
793 capable FPU variant that we do support. This is sufficient for
794 multilib selection. */
795
796 if (bitmap_bit_p (target_isa_unsatisfied, isa_bit_vfpv2)
797 && bitmap_bit_p (fpu_isa, isa_bit_vfpv2))
798 {
799 std::list<candidate_extension *>::iterator ipoint = extensions.begin ();
800
801 for (const cpu_arch_extension *cand = selected_arch->common.extensions;
802 cand->name != NULL;
803 cand++)
804 {
805 if (cand->remove || cand->alias)
806 continue;
807
808 if (isa_bits == NULL)
809 isa_bits = sbitmap_alloc (isa_num_bits);
810
811 /* We need to keep the features in canonical order, so move the
812 insertion point if this feature is a candidate. */
813 if (ipoint != extensions.end ()
814 && (*ipoint)->extension == cand)
815 ++ipoint;
816
817 arm_initialize_isa (isa_bits, cand->isa_bits);
818 if (bitmap_subset_p (fpu_isa, isa_bits))
819 {
820 extensions.insert (ipoint,
821 new candidate_extension (cand, isa_bits));
822 isa_bits = NULL;
823 break;
824 }
825 }
826 }
827
828 if (isa_bits)
829 sbitmap_free (isa_bits);
830
831 bitmap_clear (target_isa);
832 size_t len = 1;
833 for (std::list<candidate_extension *>::reverse_iterator riter
834 = extensions.rbegin ();
835 riter != extensions.rend (); ++riter)
836 {
837 if (bitmap_subset_p ((*riter)->isa_bits, target_isa))
838 (*riter)->required = false;
839 else
840 {
841 bitmap_ior (target_isa, target_isa, (*riter)->isa_bits);
842 len += strlen ((*riter)->extension->name) + 1;
843 }
844 }
845
846 canonical_arch
847 = (char *) xmalloc (len + strlen (selected_arch->common.name));
848
849 strcpy (canonical_arch, selected_arch->common.name);
850
851 for (std::list<candidate_extension *>::iterator iter = extensions.begin ();
852 iter != extensions.end (); ++iter)
853 {
854 if ((*iter)->required)
855 {
856 strcat (canonical_arch, "+");
857 strcat (canonical_arch, (*iter)->extension->name);
858 }
859 delete (*iter);
860 }
861
862 return canonical_arch;
863 }
864
865 /* If building big-endian on a BE8 target generate a --be8 option for
866 the linker. Takes four types of option: "little" - little-endian;
867 "big" - big-endian; "be8" - force be8 iff big-endian; and "arch"
868 "<arch-name>" (two arguments) - the target architecture. The
869 parameter names are generated by the driver from the command-line
870 options. */
871 const char *
arm_be8_option(int argc,const char ** argv)872 arm_be8_option (int argc, const char **argv)
873 {
874 int endian = TARGET_ENDIAN_DEFAULT;
875 const char *arch = NULL;
876 int arg;
877 bool force = false;
878
879 for (arg = 0; arg < argc; arg++)
880 {
881 if (strcmp (argv[arg], "little") == 0)
882 endian = 0;
883 else if (strcmp (argv[arg], "big") == 0)
884 endian = 1;
885 else if (strcmp (argv[arg], "be8") == 0)
886 force = true;
887 else if (strcmp (argv[arg], "arch") == 0)
888 {
889 arg++;
890 gcc_assert (arg < argc);
891 arch = argv[arg];
892 }
893 else
894 gcc_unreachable ();
895 }
896
897 /* Little endian - no be8 option. */
898 if (!endian)
899 return "";
900
901 if (force)
902 return "--be8";
903
904 /* Arch might not be set iff arm_canon_arch (above) detected an
905 error. Do nothing in that case. */
906 if (!arch)
907 return "";
908
909 const arch_option *selected_arch
910 = arm_parse_arch_option_name (all_architectures, "-march", arch);
911
912 /* Similarly if the given arch option was itself invalid. */
913 if (!selected_arch)
914 return "";
915
916 if (check_isa_bits_for (selected_arch->common.isa_bits, isa_bit_be8))
917 return "--be8";
918
919 return "";
920 }
921
922 /* Generate a -mfpu= option for passing to the assembler. This is
923 only called when -mfpu was set (possibly defaulted) to auto and is
924 needed to ensure that the assembler knows the correct FPU to use.
925 It wouldn't really be needed except that the compiler can be used
926 to invoke the assembler directly on hand-written files that lack
927 the necessary internal .fpu directives. We assume that the architecture
928 canonicalization calls have already been made so that we have a final
929 -march= option to derive the fpu from. */
930 const char*
arm_asm_auto_mfpu(int argc,const char ** argv)931 arm_asm_auto_mfpu (int argc, const char **argv)
932 {
933 static char *auto_fpu = NULL;
934 const char *arch = NULL;
935 static const enum isa_feature fpu_bitlist[]
936 = { ISA_ALL_FPU_INTERNAL, isa_nobit };
937 const arch_option *selected_arch;
938 static const char* fpuname = "softvfp";
939
940 /* Handle multiple calls to this routine. */
941 if (auto_fpu)
942 {
943 free (auto_fpu);
944 auto_fpu = NULL;
945 }
946
947 while (argc)
948 {
949 if (strcmp (argv[0], "arch") == 0)
950 arch = argv[1];
951 else
952 fatal_error (input_location,
953 "unrecognized operand to %%:asm_auto_mfpu");
954 argc -= 2;
955 argv += 2;
956 }
957
958 auto_sbitmap target_isa (isa_num_bits);
959 auto_sbitmap fpubits (isa_num_bits);
960
961 gcc_assert (arch != NULL);
962 selected_arch = arm_parse_arch_option_name (all_architectures,
963 "-march", arch);
964 if (selected_arch == NULL)
965 return "";
966
967 arm_initialize_isa (target_isa, selected_arch->common.isa_bits);
968 arm_parse_option_features (target_isa, &selected_arch->common,
969 strchr (arch, '+'));
970 arm_initialize_isa (fpubits, fpu_bitlist);
971
972 bitmap_and (fpubits, fpubits, target_isa);
973
974 /* The logic below is essentially identical to that in
975 arm.c:arm_identify_fpu_from_isa(), but that only works in the main
976 part of the compiler. */
977
978 /* If there are no FPU capability bits, we just pass -mfpu=softvfp. */
979 if (!bitmap_empty_p (fpubits))
980 {
981 unsigned int i;
982 auto_sbitmap cand_fpubits (isa_num_bits);
983 for (i = 0; i < TARGET_FPU_auto; i++)
984 {
985 arm_initialize_isa (cand_fpubits, all_fpus[i].isa_bits);
986 if (bitmap_equal_p (fpubits, cand_fpubits))
987 {
988 fpuname = all_fpus[i].name;
989 break;
990 }
991 }
992
993 gcc_assert (i != TARGET_FPU_auto);
994 }
995
996 auto_fpu = (char *) xmalloc (strlen (fpuname) + sizeof ("-mfpu="));
997 strcpy (auto_fpu, "-mfpu=");
998 strcat (auto_fpu, fpuname);
999 return auto_fpu;
1000 }
1001
1002 #undef ARM_CPU_NAME_LENGTH
1003
1004
1005 #undef TARGET_DEFAULT_TARGET_FLAGS
1006 #define TARGET_DEFAULT_TARGET_FLAGS (TARGET_DEFAULT | MASK_SCHED_PROLOG)
1007
1008 #undef TARGET_OPTION_OPTIMIZATION_TABLE
1009 #define TARGET_OPTION_OPTIMIZATION_TABLE arm_option_optimization_table
1010
1011 #undef TARGET_EXCEPT_UNWIND_INFO
1012 #define TARGET_EXCEPT_UNWIND_INFO arm_except_unwind_info
1013
1014 struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
1015