1;; Generic DFA-based pipeline description for MIPS targets
2;;   Copyright (C) 2004-2018 Free Software Foundation, Inc.
3;;
4;; This file is part of GCC.
5
6;; GCC is free software; you can redistribute it and/or modify it
7;; under the terms of the GNU General Public License as published
8;; by the Free Software Foundation; either version 3, or (at your
9;; option) any later version.
10
11;; GCC is distributed in the hope that it will be useful, but WITHOUT
12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14;; License for more details.
15
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING3.  If not see
18;; <http://www.gnu.org/licenses/>.
19
20
21;; This file is derived from the old define_function_unit description.
22;; Each reservation can be overridden on a processor-by-processor basis.
23
24(define_insn_reservation "generic_alu" 1
25  (eq_attr "type" "unknown,prefetch,prefetchx,condmove,const,arith,
26		   shift,slt,clz,trap,multi,nop,logical,signext,move")
27  "alu")
28
29(define_insn_reservation "generic_load" 3
30  (eq_attr "type" "load,fpload,fpidxload")
31  "alu")
32
33(define_insn_reservation "generic_store" 1
34  (eq_attr "type" "store,fpstore,fpidxstore")
35  "alu")
36
37(define_insn_reservation "generic_xfer" 2
38  (eq_attr "type" "mfc,mtc")
39  "alu")
40
41(define_insn_reservation "generic_branch" 1
42  (eq_attr "type" "branch,jump,call")
43  "alu")
44
45(define_insn_reservation "generic_hilo" 1
46  (eq_attr "type" "mfhi,mflo,mthi,mtlo")
47  "imuldiv*3")
48
49(define_insn_reservation "generic_imul" 17
50  (eq_attr "type" "imul,imul3,imadd")
51  "imuldiv*17")
52
53(define_insn_reservation "generic_idiv" 38
54  (eq_attr "type" "idiv")
55  "imuldiv*38")
56
57(define_insn_reservation "generic_fcvt" 1
58  (eq_attr "type" "fcvt")
59  "alu")
60
61(define_insn_reservation "generic_fmove" 2
62  (eq_attr "type" "fabs,fneg,fmove")
63  "alu")
64
65(define_insn_reservation "generic_fcmp" 3
66  (eq_attr "type" "fcmp")
67  "alu")
68
69(define_insn_reservation "generic_fadd" 4
70  (eq_attr "type" "fadd")
71  "alu")
72
73(define_insn_reservation "generic_fmul_single" 7
74  (and (eq_attr "type" "fmul,fmadd")
75       (eq_attr "mode" "SF"))
76  "alu")
77
78(define_insn_reservation "generic_fmul_double" 8
79  (and (eq_attr "type" "fmul,fmadd")
80       (eq_attr "mode" "DF"))
81  "alu")
82
83(define_insn_reservation "generic_fdiv_single" 23
84  (and (eq_attr "type" "fdiv,frdiv")
85       (eq_attr "mode" "SF"))
86  "alu")
87
88(define_insn_reservation "generic_fdiv_double" 36
89  (and (eq_attr "type" "fdiv,frdiv")
90       (eq_attr "mode" "DF"))
91  "alu")
92
93(define_insn_reservation "generic_fsqrt_single" 54
94  (and (eq_attr "type" "fsqrt,frsqrt")
95       (eq_attr "mode" "SF"))
96  "alu")
97
98(define_insn_reservation "generic_fsqrt_double" 112
99  (and (eq_attr "type" "fsqrt,frsqrt")
100       (eq_attr "mode" "DF"))
101  "alu")
102
103(define_insn_reservation "generic_frecip_fsqrt_step" 5
104  (eq_attr "type" "frdiv1,frdiv2,frsqrt1,frsqrt2")
105  "alu")
106
107(define_insn_reservation "generic_atomic" 10
108  (eq_attr "type" "atomic")
109  "alu")
110
111;; Sync loop consists of (in order)
112;; (1) optional sync,
113;; (2) LL instruction,
114;; (3) branch and 1-2 ALU instructions,
115;; (4) SC instruction,
116;; (5) branch and ALU instruction.
117;; The net result of this reservation is a big delay with a flush of
118;; ALU pipeline.
119(define_insn_reservation "generic_sync_loop" 40
120  (eq_attr "type" "syncloop")
121  "alu*39")
122