1 /* Test the vmulx_lane_f64 AArch64 SIMD intrinsic. */
2
3 /* { dg-do run } */
4 /* { dg-options "-save-temps -O3" } */
5
6 #include "arm_neon.h"
7
8 extern void abort (void);
9
10 float64x1_t __attribute__ ((noinline))
test_vmulx_lane_f64(float64x1_t vec1_1,float64x1_t vec1_2)11 test_vmulx_lane_f64 (float64x1_t vec1_1, float64x1_t vec1_2)
12 {
13 return vmulx_lane_f64 (vec1_1, vec1_2, 0);
14 }
15
16 void
test_case(float64_t v1[],float64_t v2[],float64_t e[])17 test_case (float64_t v1[], float64_t v2[], float64_t e[])
18 {
19 float64x1_t vec1_1 = vld1_f64 (v1);
20 float64x1_t vec1_2 = vld1_f64 (v2);
21 float64x1_t expected1 = vld1_f64 (e);
22
23 float64x1_t actual1 = test_vmulx_lane_f64 (vec1_1, vec1_2);
24 float64_t actual[1];
25 vst1_f64 (actual, actual1);
26 if (actual[0] != e[0])
27 abort ();
28 }
29 int
main(void)30 main (void)
31 {
32 float64_t v1 = 3.14159265359;
33 float64_t v2 = -2.71828;
34
35 float64_t v1_1[] = {v1};
36 float64_t v1_2[] = {v2};
37 float64_t e1[] = {v1 * v2};
38 test_case (v1_1, v1_2, e1);
39
40 float64_t v2_1[] = {0};
41 float64_t v2_2[] = {__builtin_huge_val ()};
42 float64_t e2[] = {2.0};
43 test_case (v2_1, v2_2, e2);
44
45 float64_t v4_1[] = {0};
46 float64_t v4_2[] = {-__builtin_huge_val ()};
47 float64_t e4[] = {-2.0};
48 test_case (v4_1, v4_2, e4);
49
50 float64_t v5_1[] = {-0.0};
51 float64_t v5_2[] = {__builtin_huge_val ()};
52 float64_t e5[] = {-2.0};
53 test_case (v5_1, v5_2, e5);
54
55 float64_t v6_1[] = {-0.0};
56 float64_t v6_2[] = {-__builtin_huge_val ()};
57 float64_t e6[] = {2.0};
58 test_case (v6_1, v6_2, e6);
59
60 return 0;
61 }
62 /* { dg-final { scan-assembler-times "fmulx\[ \t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" 1 } } */
63