1 /* PR target/40838 */
2 /* { dg-do compile { target { { ! *-*-darwin* } && ia32 } } } */
3 /* { dg-options "-w -mstackrealign -O2 -msse2 -mpreferred-stack-boundary=4" } */
4 
5 typedef int v4si __attribute__ ((vector_size (16)));
6 
7 extern v4si y(v4si *s3);
8 
9 extern v4si s1, s2;
10 
x(void)11 v4si x(void)
12 {
13   v4si s3 = s1 + s2;
14   return y(&s3);
15 }
16 
17 /* { dg-final { scan-assembler "andl\[\\t \]*\\$-16,\[\\t \]*%esp" } } */
18