1@c Copyright 2002, 2003, 2005 2@c Free Software Foundation, Inc. 3@c Contributed by David Mosberger-Tang <davidm@hpl.hp.com> 4@c This is part of the GAS manual. 5@c For copying conditions, see the file as.texinfo. 6 7@ifset GENERIC 8@page 9@node IA-64-Dependent 10@chapter IA-64 Dependent Features 11@end ifset 12 13@ifclear GENERIC 14@node Machine Dependencies 15@chapter IA-64 Dependent Features 16@end ifclear 17 18@cindex IA-64 support 19@menu 20* IA-64 Options:: Options 21* IA-64 Syntax:: Syntax 22@c * IA-64 Floating Point:: Floating Point // to be written 23@c * IA-64 Directives:: IA-64 Machine Directives // to be written 24* IA-64 Opcodes:: Opcodes 25@end menu 26 27@node IA-64 Options 28@section Options 29@cindex IA-64 options 30@cindex options for IA-64 31 32@table @option 33@cindex @code{-mconstant-gp} command line option, IA-64 34 35@item -mconstant-gp 36This option instructs the assembler to mark the resulting object file 37as using the ``constant GP'' model. With this model, it is assumed 38that the entire program uses a single global pointer (GP) value. Note 39that this option does not in any fashion affect the machine code 40emitted by the assembler. All it does is turn on the EF_IA_64_CONS_GP 41flag in the ELF file header. 42 43@item -mauto-pic 44This option instructs the assembler to mark the resulting object file 45as using the ``constant GP without function descriptor'' data model. 46This model is like the ``constant GP'' model, except that it 47additionally does away with function descriptors. What this means is 48that the address of a function refers directly to the function's code 49entry-point. Normally, such an address would refer to a function 50descriptor, which contains both the code entry-point and the GP-value 51needed by the function. Note that this option does not in any fashion 52affect the machine code emitted by the assembler. All it does is 53turn on the EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. 54 55@item -milp32 56@item -milp64 57@item -mlp64 58@item -mp64 59These options select the data model. The assembler defaults to @code{-mlp64} 60(LP64 data model). 61 62@item -mle 63@item -mbe 64These options select the byte order. The @code{-mle} option selects little-endian 65byte order (default) and @code{-mbe} selects big-endian byte order. Note that 66IA-64 machine code always uses little-endian byte order. 67 68@item -munwind-check=warning 69@item -munwind-check=error 70These options control what the assembler will do when performing 71consistency checks on unwind directives. @code{-munwind-check=warning} 72will make the assembler issue a warning when an unwind directive check 73fails. This is the default. @code{-munwind-check=error} will make the 74assembler issue an error when an unwind directive check fails. 75 76@item -mhint.b=ok 77@item -mhint.b=warning 78@item -mhint.b=error 79These options control what the assembler will do when the @samp{hint.b} 80instruction is used. @code{-mhint.b=ok} will make the assembler accept 81@samp{hint.b}. @code{-mint.b=warning} will make the assembler issue a 82warning when @samp{hint.b} is used. @code{-mhint.b=error} will make 83the assembler treat @samp{hint.b} as an error, which is the default. 84 85@item -x 86@item -xexplicit 87These options turn on dependency violation checking. 88 89@item -xauto 90This option instructs the assembler to automatically insert stop bits where necessary 91to remove dependency violations. This is the default mode. 92 93@item -xnone 94This option turns off dependency violation checking. 95 96@item -xdebug 97This turns on debug output intended to help tracking down bugs in the dependency 98violation checker. 99 100@item -xdebugn 101This is a shortcut for -xnone -xdebug. 102 103@item -xdebugx 104This is a shortcut for -xexplicit -xdebug. 105 106@end table 107 108@cindex IA-64 Syntax 109@node IA-64 Syntax 110@section Syntax 111The assembler syntax closely follows the IA-64 Assembly Language 112Reference Guide. 113 114@menu 115* IA-64-Chars:: Special Characters 116* IA-64-Regs:: Register Names 117* IA-64-Bits:: Bit Names 118@c * IA-64-Relocs:: Relocations // to be written 119@end menu 120 121@node IA-64-Chars 122@subsection Special Characters 123 124@cindex line comment character, IA-64 125@cindex IA-64 line comment character 126@samp{//} is the line comment token. 127 128@cindex line separator, IA-64 129@cindex statement separator, IA-64 130@cindex IA-64 line separator 131@samp{;} can be used instead of a newline to separate statements. 132 133@node IA-64-Regs 134@subsection Register Names 135@cindex IA-64 registers 136@cindex register names, IA-64 137 138The 128 integer registers are referred to as @samp{r@var{n}}. 139The 128 floating-point registers are referred to as @samp{f@var{n}}. 140The 128 application registers are referred to as @samp{ar@var{n}}. 141The 128 control registers are referred to as @samp{cr@var{n}}. 142The 64 one-bit predicate registers are referred to as @samp{p@var{n}}. 143The 8 branch registers are referred to as @samp{b@var{n}}. 144In addition, the assembler defines a number of aliases: 145@samp{gp} (@samp{r1}), @samp{sp} (@samp{r12}), @samp{rp} (@samp{b0}), 146@samp{ret0} (@samp{r8}), @samp{ret1} (@samp{r9}), @samp{ret2} (@samp{r10}), 147@samp{ret3} (@samp{r9}), @samp{farg@var{n}} (@samp{f8+@var{n}}), and 148@samp{fret@var{n}} (@samp{f8+@var{n}}). 149 150For convenience, the assembler also defines aliases for all named application 151and control registers. For example, @samp{ar.bsp} refers to the register 152backing store pointer (@samp{ar17}). Similarly, @samp{cr.eoi} refers to 153the end-of-interrupt register (@samp{cr67}). 154 155@node IA-64-Bits 156@subsection IA-64 Processor-Status-Register (PSR) Bit Names 157@cindex IA-64 Processor-status-Register bit names 158@cindex PSR bits 159@cindex bit names, IA-64 160 161The assembler defines bit masks for each of the bits in the IA-64 162processor status register. For example, @samp{psr.ic} corresponds to 163a value of 0x2000. These masks are primarily intended for use with 164the @samp{ssm}/@samp{sum} and @samp{rsm}/@samp{rum} 165instructions, but they can be used anywhere else where an integer 166constant is expected. 167 168@node IA-64 Opcodes 169@section Opcodes 170For detailed information on the IA-64 machine instruction set, see the 171@c Attempt to work around a very overfull hbox. 172@iftex 173IA-64 Assembly Language Reference Guide available at 174@smallfonts 175@example 176http://developer.intel.com/design/itanium/arch_spec.htm 177@end example 178@textfonts 179@end iftex 180@ifnottex 181@uref{http://developer.intel.com/design/itanium/arch_spec.htm,IA-64 Architecture Handbook}. 182@end ifnottex 183