1@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000, 2003, 2@c 2004 Free Software Foundation, Inc. 3@c This is part of the GAS manual. 4@c For copying conditions, see the file as.texinfo. 5@ifset GENERIC 6@page 7@node M68K-Dependent 8@chapter M680x0 Dependent Features 9@end ifset 10@ifclear GENERIC 11@node Machine Dependencies 12@chapter M680x0 Dependent Features 13@end ifclear 14 15@cindex M680x0 support 16@menu 17* M68K-Opts:: M680x0 Options 18* M68K-Syntax:: Syntax 19* M68K-Moto-Syntax:: Motorola Syntax 20* M68K-Float:: Floating Point 21* M68K-Directives:: 680x0 Machine Directives 22* M68K-opcodes:: Opcodes 23@end menu 24 25@node M68K-Opts 26@section M680x0 Options 27 28@cindex options, M680x0 29@cindex M680x0 options 30The Motorola 680x0 version of @code{@value{AS}} has a few machine 31dependent options: 32 33@table @samp 34 35@cindex @samp{-l} option, M680x0 36@item -l 37You can use the @samp{-l} option to shorten the size of references to undefined 38symbols. If you do not use the @samp{-l} option, references to undefined 39symbols are wide enough for a full @code{long} (32 bits). (Since 40@code{@value{AS}} cannot know where these symbols end up, @code{@value{AS}} can 41only allocate space for the linker to fill in later. Since @code{@value{AS}} 42does not know how far away these symbols are, it allocates as much space as it 43can.) If you use this option, the references are only one word wide (16 bits). 44This may be useful if you want the object file to be as small as possible, and 45you know that the relevant symbols are always less than 17 bits away. 46 47@cindex @samp{--register-prefix-optional} option, M680x0 48@item --register-prefix-optional 49For some configurations, especially those where the compiler normally 50does not prepend an underscore to the names of user variables, the 51assembler requires a @samp{%} before any use of a register name. This 52is intended to let the assembler distinguish between C variables and 53functions named @samp{a0} through @samp{a7}, and so on. The @samp{%} is 54always accepted, but is not required for certain configurations, notably 55@samp{sun3}. The @samp{--register-prefix-optional} option may be used 56to permit omitting the @samp{%} even for configurations for which it is 57normally required. If this is done, it will generally be impossible to 58refer to C variables and functions with the same names as register 59names. 60 61@cindex @samp{--bitwise-or} option, M680x0 62@item --bitwise-or 63Normally the character @samp{|} is treated as a comment character, which 64means that it can not be used in expressions. The @samp{--bitwise-or} 65option turns @samp{|} into a normal character. In this mode, you must 66either use C style comments, or start comments with a @samp{#} character 67at the beginning of a line. 68 69@cindex @samp{--base-size-default-16} 70@cindex @samp{--base-size-default-32} 71@item --base-size-default-16 --base-size-default-32 72If you use an addressing mode with a base register without specifying 73the size, @code{@value{AS}} will normally use the full 32 bit value. 74For example, the addressing mode @samp{%a0@@(%d0)} is equivalent to 75@samp{%a0@@(%d0:l)}. You may use the @samp{--base-size-default-16} 76option to tell @code{@value{AS}} to default to using the 16 bit value. 77In this case, @samp{%a0@@(%d0)} is equivalent to @samp{%a0@@(%d0:w)}. 78You may use the @samp{--base-size-default-32} option to restore the 79default behaviour. 80 81@cindex @samp{--disp-size-default-16} 82@cindex @samp{--disp-size-default-32} 83@item --disp-size-default-16 --disp-size-default-32 84If you use an addressing mode with a displacement, and the value of the 85displacement is not known, @code{@value{AS}} will normally assume that 86the value is 32 bits. For example, if the symbol @samp{disp} has not 87been defined, @code{@value{AS}} will assemble the addressing mode 88@samp{%a0@@(disp,%d0)} as though @samp{disp} is a 32 bit value. You may 89use the @samp{--disp-size-default-16} option to tell @code{@value{AS}} 90to instead assume that the displacement is 16 bits. In this case, 91@code{@value{AS}} will assemble @samp{%a0@@(disp,%d0)} as though 92@samp{disp} is a 16 bit value. You may use the 93@samp{--disp-size-default-32} option to restore the default behaviour. 94 95@cindex @samp{--pcrel} 96@item --pcrel 97Always keep branches PC-relative. In the M680x0 architecture all branches 98are defined as PC-relative. However, on some processors they are limited 99to word displacements maximum. When @code{@value{AS}} needs a long branch 100that is not available, it normally emits an absolute jump instead. This 101option disables this substitution. When this option is given and no long 102branches are available, only word branches will be emitted. An error 103message will be generated if a word branch cannot reach its target. This 104option has no effect on 68020 and other processors that have long branches. 105@pxref{M68K-Branch,,Branch Improvement}. 106 107@cindex @samp{-m68000} and related options 108@cindex architecture options, M680x0 109@cindex M680x0 architecture options 110@item -m68000 111@code{@value{AS}} can assemble code for several different members of the 112Motorola 680x0 family. The default depends upon how @code{@value{AS}} 113was configured when it was built; normally, the default is to assemble 114code for the 68020 microprocessor. The following options may be used to 115change the default. These options control which instructions and 116addressing modes are permitted. The members of the 680x0 family are 117very similar. For detailed information about the differences, see the 118Motorola manuals. 119 120@table @samp 121@item -m68000 122@itemx -m68ec000 123@itemx -m68hc000 124@itemx -m68hc001 125@itemx -m68008 126@itemx -m68302 127@itemx -m68306 128@itemx -m68307 129@itemx -m68322 130@itemx -m68356 131Assemble for the 68000. @samp{-m68008}, @samp{-m68302}, and so on are synonyms 132for @samp{-m68000}, since the chips are the same from the point of view 133of the assembler. 134 135@item -m68010 136Assemble for the 68010. 137 138@item -m68020 139@itemx -m68ec020 140Assemble for the 68020. This is normally the default. 141 142@item -m68030 143@itemx -m68ec030 144Assemble for the 68030. 145 146@item -m68040 147@itemx -m68ec040 148Assemble for the 68040. 149 150@item -m68060 151@itemx -m68ec060 152Assemble for the 68060. 153 154@item -mcpu32 155@itemx -m68330 156@itemx -m68331 157@itemx -m68332 158@itemx -m68333 159@itemx -m68334 160@itemx -m68336 161@itemx -m68340 162@itemx -m68341 163@itemx -m68349 164@itemx -m68360 165Assemble for the CPU32 family of chips. 166 167@item -m5200 168@item -m5202 169@item -m5204 170@item -m5206 171@item -m5206e 172@item -m521x 173@item -m5249 174@item -m528x 175@item -m5307 176@item -m5407 177@item -m547x 178@item -m548x 179@item -mcfv4 180@item -mcfv4e 181Assemble for the ColdFire family of chips. 182 183@item -m68881 184@itemx -m68882 185Assemble 68881 floating point instructions. This is the default for the 18668020, 68030, and the CPU32. The 68040 and 68060 always support 187floating point instructions. 188 189@item -mno-68881 190Do not assemble 68881 floating point instructions. This is the default 191for 68000 and the 68010. The 68040 and 68060 always support floating 192point instructions, even if this option is used. 193 194@item -m68851 195Assemble 68851 MMU instructions. This is the default for the 68020, 19668030, and 68060. The 68040 accepts a somewhat different set of MMU 197instructions; @samp{-m68851} and @samp{-m68040} should not be used 198together. 199 200@item -mno-68851 201Do not assemble 68851 MMU instructions. This is the default for the 20268000, 68010, and the CPU32. The 68040 accepts a somewhat different set 203of MMU instructions. 204@end table 205@end table 206 207@node M68K-Syntax 208@section Syntax 209 210@cindex @sc{mit} 211This syntax for the Motorola 680x0 was developed at @sc{mit}. 212 213@cindex M680x0 syntax 214@cindex syntax, M680x0 215@cindex M680x0 size modifiers 216@cindex size modifiers, M680x0 217The 680x0 version of @code{@value{AS}} uses instructions names and 218syntax compatible with the Sun assembler. Intervening periods are 219ignored; for example, @samp{movl} is equivalent to @samp{mov.l}. 220 221In the following table @var{apc} stands for any of the address registers 222(@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the 223zero-address relative to the program counter (@samp{%zpc}), a suppressed 224address register (@samp{%za0} through @samp{%za7}), or it may be omitted 225entirely. The use of @var{size} means one of @samp{w} or @samp{l}, and 226it may be omitted, along with the leading colon, unless a scale is also 227specified. The use of @var{scale} means one of @samp{1}, @samp{2}, 228@samp{4}, or @samp{8}, and it may always be omitted along with the 229leading colon. 230 231@cindex M680x0 addressing modes 232@cindex addressing modes, M680x0 233The following addressing modes are understood: 234@table @dfn 235@item Immediate 236@samp{#@var{number}} 237 238@item Data Register 239@samp{%d0} through @samp{%d7} 240 241@item Address Register 242@samp{%a0} through @samp{%a7}@* 243@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6} 244is also known as @samp{%fp}, the Frame Pointer. 245 246@item Address Register Indirect 247@samp{%a0@@} through @samp{%a7@@} 248 249@item Address Register Postincrement 250@samp{%a0@@+} through @samp{%a7@@+} 251 252@item Address Register Predecrement 253@samp{%a0@@-} through @samp{%a7@@-} 254 255@item Indirect Plus Offset 256@samp{@var{apc}@@(@var{number})} 257 258@item Index 259@samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})} 260 261The @var{number} may be omitted. 262 263@item Postindex 264@samp{@var{apc}@@(@var{number})@@(@var{onumber},@var{register}:@var{size}:@var{scale})} 265 266The @var{onumber} or the @var{register}, but not both, may be omitted. 267 268@item Preindex 269@samp{@var{apc}@@(@var{number},@var{register}:@var{size}:@var{scale})@@(@var{onumber})} 270 271The @var{number} may be omitted. Omitting the @var{register} produces 272the Postindex addressing mode. 273 274@item Absolute 275@samp{@var{symbol}}, or @samp{@var{digits}}, optionally followed by 276@samp{:b}, @samp{:w}, or @samp{:l}. 277@end table 278 279@node M68K-Moto-Syntax 280@section Motorola Syntax 281 282@cindex Motorola syntax for the 680x0 283@cindex alternate syntax for the 680x0 284 285The standard Motorola syntax for this chip differs from the syntax 286already discussed (@pxref{M68K-Syntax,,Syntax}). @code{@value{AS}} can 287accept Motorola syntax for operands, even if @sc{mit} syntax is used for 288other operands in the same instruction. The two kinds of syntax are 289fully compatible. 290 291In the following table @var{apc} stands for any of the address registers 292(@samp{%a0} through @samp{%a7}), the program counter (@samp{%pc}), the 293zero-address relative to the program counter (@samp{%zpc}), or a 294suppressed address register (@samp{%za0} through @samp{%za7}). The use 295of @var{size} means one of @samp{w} or @samp{l}, and it may always be 296omitted along with the leading dot. The use of @var{scale} means one of 297@samp{1}, @samp{2}, @samp{4}, or @samp{8}, and it may always be omitted 298along with the leading asterisk. 299 300The following additional addressing modes are understood: 301 302@table @dfn 303@item Address Register Indirect 304@samp{(%a0)} through @samp{(%a7)}@* 305@samp{%a7} is also known as @samp{%sp}, i.e. the Stack Pointer. @code{%a6} 306is also known as @samp{%fp}, the Frame Pointer. 307 308@item Address Register Postincrement 309@samp{(%a0)+} through @samp{(%a7)+} 310 311@item Address Register Predecrement 312@samp{-(%a0)} through @samp{-(%a7)} 313 314@item Indirect Plus Offset 315@samp{@var{number}(@var{%a0})} through @samp{@var{number}(@var{%a7})}, 316or @samp{@var{number}(@var{%pc})}. 317 318The @var{number} may also appear within the parentheses, as in 319@samp{(@var{number},@var{%a0})}. When used with the @var{pc}, the 320@var{number} may be omitted (with an address register, omitting the 321@var{number} produces Address Register Indirect mode). 322 323@item Index 324@samp{@var{number}(@var{apc},@var{register}.@var{size}*@var{scale})} 325 326The @var{number} may be omitted, or it may appear within the 327parentheses. The @var{apc} may be omitted. The @var{register} and the 328@var{apc} may appear in either order. If both @var{apc} and 329@var{register} are address registers, and the @var{size} and @var{scale} 330are omitted, then the first register is taken as the base register, and 331the second as the index register. 332 333@item Postindex 334@samp{([@var{number},@var{apc}],@var{register}.@var{size}*@var{scale},@var{onumber})} 335 336The @var{onumber}, or the @var{register}, or both, may be omitted. 337Either the @var{number} or the @var{apc} may be omitted, but not both. 338 339@item Preindex 340@samp{([@var{number},@var{apc},@var{register}.@var{size}*@var{scale}],@var{onumber})} 341 342The @var{number}, or the @var{apc}, or the @var{register}, or any two of 343them, may be omitted. The @var{onumber} may be omitted. The 344@var{register} and the @var{apc} may appear in either order. If both 345@var{apc} and @var{register} are address registers, and the @var{size} 346and @var{scale} are omitted, then the first register is taken as the 347base register, and the second as the index register. 348@end table 349 350@node M68K-Float 351@section Floating Point 352 353@cindex floating point, M680x0 354@cindex M680x0 floating point 355Packed decimal (P) format floating literals are not supported. 356Feel free to add the code! 357 358The floating point formats generated by directives are these. 359 360@table @code 361@cindex @code{float} directive, M680x0 362@item .float 363@code{Single} precision floating point constants. 364 365@cindex @code{double} directive, M680x0 366@item .double 367@code{Double} precision floating point constants. 368 369@cindex @code{extend} directive M680x0 370@cindex @code{ldouble} directive M680x0 371@item .extend 372@itemx .ldouble 373@code{Extended} precision (@code{long double}) floating point constants. 374@end table 375 376@node M68K-Directives 377@section 680x0 Machine Directives 378 379@cindex M680x0 directives 380@cindex directives, M680x0 381In order to be compatible with the Sun assembler the 680x0 assembler 382understands the following directives. 383 384@table @code 385@cindex @code{data1} directive, M680x0 386@item .data1 387This directive is identical to a @code{.data 1} directive. 388 389@cindex @code{data2} directive, M680x0 390@item .data2 391This directive is identical to a @code{.data 2} directive. 392 393@cindex @code{even} directive, M680x0 394@item .even 395This directive is a special case of the @code{.align} directive; it 396aligns the output to an even byte boundary. 397 398@cindex @code{skip} directive, M680x0 399@item .skip 400This directive is identical to a @code{.space} directive. 401@end table 402 403@need 2000 404@node M68K-opcodes 405@section Opcodes 406 407@cindex M680x0 opcodes 408@cindex opcodes, M680x0 409@cindex instruction set, M680x0 410@c doc@cygnus.com: I don't see any point in the following 411@c paragraph. Bugs are bugs; how does saying this 412@c help anyone? 413@ignore 414Danger: Several bugs have been found in the opcode table (and 415fixed). More bugs may exist. Be careful when using obscure 416instructions. 417@end ignore 418 419@menu 420* M68K-Branch:: Branch Improvement 421* M68K-Chars:: Special Characters 422@end menu 423 424@node M68K-Branch 425@subsection Branch Improvement 426 427@cindex pseudo-opcodes, M680x0 428@cindex M680x0 pseudo-opcodes 429@cindex branch improvement, M680x0 430@cindex M680x0 branch improvement 431Certain pseudo opcodes are permitted for branch instructions. 432They expand to the shortest branch instruction that reach the 433target. Generally these mnemonics are made by substituting @samp{j} for 434@samp{b} at the start of a Motorola mnemonic. 435 436The following table summarizes the pseudo-operations. A @code{*} flags 437cases that are more fully described after the table: 438 439@smallexample 440 Displacement 441 +------------------------------------------------------------ 442 | 68020 68000/10, not PC-relative OK 443Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** 444 +------------------------------------------------------------ 445 jbsr |bsrs bsrw bsrl jsr 446 jra |bras braw bral jmp 447* jXX |bXXs bXXw bXXl bNXs;jmp 448* dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp 449 fjXX | N/A fbXXw fbXXl N/A 450 451XX: condition 452NX: negative of condition XX 453 454@end smallexample 455@center @code{*}---see full description below 456@center @code{**}---this expansion mode is disallowed by @samp{--pcrel} 457 458@table @code 459@item jbsr 460@itemx jra 461These are the simplest jump pseudo-operations; they always map to one 462particular machine instruction, depending on the displacement to the 463branch target. This instruction will be a byte or word branch is that 464is sufficient. Otherwise, a long branch will be emitted if available. 465If no long branches are available and the @samp{--pcrel} option is not 466given, an absolute long jump will be emitted instead. If no long 467branches are available, the @samp{--pcrel} option is given, and a word 468branch cannot reach the target, an error message is generated. 469 470In addition to standard branch operands, @code{@value{AS}} allows these 471pseudo-operations to have all operands that are allowed for jsr and jmp, 472substituting these instructions if the operand given is not valid for a 473branch instruction. 474 475@item j@var{XX} 476Here, @samp{j@var{XX}} stands for an entire family of pseudo-operations, 477where @var{XX} is a conditional branch or condition-code test. The full 478list of pseudo-ops in this family is: 479@smallexample 480 jhi jls jcc jcs jne jeq jvc 481 jvs jpl jmi jge jlt jgt jle 482@end smallexample 483 484Usually, each of these pseudo-operations expands to a single branch 485instruction. However, if a word branch is not sufficient, no long branches 486are available, and the @samp{--pcrel} option is not given, @code{@value{AS}} 487issues a longer code fragment in terms of @var{NX}, the opposite condition 488to @var{XX}. For example, under these conditions: 489@smallexample 490 j@var{XX} foo 491@end smallexample 492gives 493@smallexample 494 b@var{NX}s oof 495 jmp foo 496 oof: 497@end smallexample 498 499@item db@var{XX} 500The full family of pseudo-operations covered here is 501@smallexample 502 dbhi dbls dbcc dbcs dbne dbeq dbvc 503 dbvs dbpl dbmi dbge dblt dbgt dble 504 dbf dbra dbt 505@end smallexample 506 507Motorola @samp{db@var{XX}} instructions allow word displacements only. When 508a word displacement is sufficient, each of these pseudo-operations expands 509to the corresponding Motorola instruction. When a word displacement is not 510sufficient and long branches are available, when the source reads 511@samp{db@var{XX} foo}, @code{@value{AS}} emits 512@smallexample 513 db@var{XX} oo1 514 bras oo2 515 oo1:bral foo 516 oo2: 517@end smallexample 518 519If, however, long branches are not available and the @samp{--pcrel} option is 520not given, @code{@value{AS}} emits 521@smallexample 522 db@var{XX} oo1 523 bras oo2 524 oo1:jmp foo 525 oo2: 526@end smallexample 527 528@item fj@var{XX} 529This family includes 530@smallexample 531 fjne fjeq fjge fjlt fjgt fjle fjf 532 fjt fjgl fjgle fjnge fjngl fjngle fjngt 533 fjnle fjnlt fjoge fjogl fjogt fjole fjolt 534 fjor fjseq fjsf fjsne fjst fjueq fjuge 535 fjugt fjule fjult fjun 536@end smallexample 537 538Each of these pseudo-operations always expands to a single Motorola 539coprocessor branch instruction, word or long. All Motorola coprocessor 540branch instructions allow both word and long displacements. 541 542@end table 543 544@node M68K-Chars 545@subsection Special Characters 546 547@cindex special characters, M680x0 548@cindex M680x0 immediate character 549@cindex immediate character, M680x0 550@cindex M680x0 line comment character 551@cindex line comment character, M680x0 552@cindex comments, M680x0 553The immediate character is @samp{#} for Sun compatibility. The 554line-comment character is @samp{|} (unless the @samp{--bitwise-or} 555option is used). If a @samp{#} appears at the beginning of a line, it 556is treated as a comment unless it looks like @samp{# line file}, in 557which case it is treated normally. 558 559