1 /* Disassemble AVR instructions.
2    Copyright 1999, 2000, 2002, 2004 Free Software Foundation, Inc.
3 
4    Contributed by Denis Chertykov <denisc@overta.ru>
5 
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10 
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 GNU General Public License for more details.
15 
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
19 
20 #include <assert.h>
21 #include "sysdep.h"
22 #include "dis-asm.h"
23 #include "opintl.h"
24 #include "libiberty.h"
25 
26 struct avr_opcodes_s
27 {
28   char *name;
29   char *constraints;
30   char *opcode;
31   int insn_size;		/* in words */
32   int isa;
33   unsigned int bin_opcode;
34 };
35 
36 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
37 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
38 
39 const struct avr_opcodes_s avr_opcodes[] =
40 {
41   #include "opcode/avr.h"
42   {NULL, NULL, NULL, 0, 0, 0}
43 };
44 
45 static int avr_operand (unsigned int, unsigned int, unsigned int, int,
46                         char *, char *, int, int *, bfd_vma *);
47 
48 static int
avr_operand(unsigned int insn,unsigned int insn2,unsigned int pc,int constraint,char * buf,char * comment,int regs,int * sym,bfd_vma * sym_addr)49 avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint,
50              char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr)
51 {
52   int ok = 1;
53   *sym = 0;
54 
55   switch (constraint)
56     {
57       /* Any register operand.  */
58     case 'r':
59       if (regs)
60 	insn = (insn & 0xf) | ((insn & 0x0200) >> 5); /* source register */
61       else
62 	insn = (insn & 0x01f0) >> 4; /* destination register */
63 
64       sprintf (buf, "r%d", insn);
65       break;
66 
67     case 'd':
68       if (regs)
69 	sprintf (buf, "r%d", 16 + (insn & 0xf));
70       else
71 	sprintf (buf, "r%d", 16 + ((insn & 0xf0) >> 4));
72       break;
73 
74     case 'w':
75       sprintf (buf, "r%d", 24 + ((insn & 0x30) >> 3));
76       break;
77 
78     case 'a':
79       if (regs)
80 	sprintf (buf, "r%d", 16 + (insn & 7));
81       else
82 	sprintf (buf, "r%d", 16 + ((insn >> 4) & 7));
83       break;
84 
85     case 'v':
86       if (regs)
87 	sprintf (buf, "r%d", (insn & 0xf) * 2);
88       else
89 	sprintf (buf, "r%d", ((insn & 0xf0) >> 3));
90       break;
91 
92     case 'e':
93       {
94 	char *xyz;
95 
96 	switch (insn & 0x100f)
97 	  {
98 	    case 0x0000: xyz = "Z";  break;
99 	    case 0x1001: xyz = "Z+"; break;
100 	    case 0x1002: xyz = "-Z"; break;
101 	    case 0x0008: xyz = "Y";  break;
102 	    case 0x1009: xyz = "Y+"; break;
103 	    case 0x100a: xyz = "-Y"; break;
104 	    case 0x100c: xyz = "X";  break;
105 	    case 0x100d: xyz = "X+"; break;
106 	    case 0x100e: xyz = "-X"; break;
107 	    default: xyz = "??"; ok = 0;
108 	  }
109 	sprintf (buf, xyz);
110 
111 	if (AVR_UNDEF_P (insn))
112 	  sprintf (comment, _("undefined"));
113       }
114       break;
115 
116     case 'z':
117       *buf++ = 'Z';
118       if (insn & 0x1)
119 	*buf++ = '+';
120       *buf = '\0';
121       if (AVR_UNDEF_P (insn))
122 	sprintf (comment, _("undefined"));
123       break;
124 
125     case 'b':
126       {
127 	unsigned int x;
128 
129 	x = (insn & 7);
130 	x |= (insn >> 7) & (3 << 3);
131 	x |= (insn >> 8) & (1 << 5);
132 
133 	if (insn & 0x8)
134 	  *buf++ = 'Y';
135 	else
136 	  *buf++ = 'Z';
137 	sprintf (buf, "+%d", x);
138 	sprintf (comment, "0x%02x", x);
139       }
140       break;
141 
142     case 'h':
143       *sym = 1;
144       *sym_addr = ((((insn & 1) | ((insn & 0x1f0) >> 3)) << 16) | insn2) * 2;
145       sprintf (buf, "0x");
146       break;
147 
148     case 'L':
149       {
150 	int rel_addr = (((insn & 0xfff) ^ 0x800) - 0x800) * 2;
151 	sprintf (buf, ".%+-8d", rel_addr);
152         *sym = 1;
153         *sym_addr = pc + 2 + rel_addr;
154 	sprintf (comment, "0x");
155       }
156       break;
157 
158     case 'l':
159       {
160 	int rel_addr = ((((insn >> 3) & 0x7f) ^ 0x40) - 0x40) * 2;
161 	sprintf (buf, ".%+-8d", rel_addr);
162         *sym = 1;
163         *sym_addr = pc + 2 + rel_addr;
164 	sprintf (comment, "0x");
165       }
166       break;
167 
168     case 'i':
169       sprintf (buf, "0x%04X", insn2);
170       break;
171 
172     case 'M':
173       sprintf (buf, "0x%02X", ((insn & 0xf00) >> 4) | (insn & 0xf));
174       sprintf (comment, "%d", ((insn & 0xf00) >> 4) | (insn & 0xf));
175       break;
176 
177     case 'n':
178       sprintf (buf, "??");
179       fprintf (stderr, _("Internal disassembler error"));
180       ok = 0;
181       break;
182 
183     case 'K':
184       {
185 	unsigned int x;
186 
187 	x = (insn & 0xf) | ((insn >> 2) & 0x30);
188 	sprintf (buf, "0x%02x", x);
189 	sprintf (comment, "%d", x);
190       }
191       break;
192 
193     case 's':
194       sprintf (buf, "%d", insn & 7);
195       break;
196 
197     case 'S':
198       sprintf (buf, "%d", (insn >> 4) & 7);
199       break;
200 
201     case 'P':
202       {
203 	unsigned int x;
204 	x = (insn & 0xf);
205 	x |= (insn >> 5) & 0x30;
206 	sprintf (buf, "0x%02x", x);
207 	sprintf (comment, "%d", x);
208       }
209       break;
210 
211     case 'p':
212       {
213 	unsigned int x;
214 
215 	x = (insn >> 3) & 0x1f;
216 	sprintf (buf, "0x%02x", x);
217 	sprintf (comment, "%d", x);
218       }
219       break;
220 
221     case '?':
222       *buf = '\0';
223       break;
224 
225     default:
226       sprintf (buf, "??");
227       fprintf (stderr, _("unknown constraint `%c'"), constraint);
228       ok = 0;
229     }
230 
231     return ok;
232 }
233 
234 static unsigned short avrdis_opcode PARAMS ((bfd_vma, disassemble_info *));
235 
236 static unsigned short
avrdis_opcode(addr,info)237 avrdis_opcode (addr, info)
238      bfd_vma addr;
239      disassemble_info *info;
240 {
241   bfd_byte buffer[2];
242   int status;
243   status = info->read_memory_func(addr, buffer, 2, info);
244   if (status != 0)
245     {
246       info->memory_error_func(status, addr, info);
247       return -1;
248     }
249   return bfd_getl16 (buffer);
250 }
251 
252 
253 int
print_insn_avr(addr,info)254 print_insn_avr(addr, info)
255      bfd_vma addr;
256      disassemble_info *info;
257 {
258   unsigned int insn, insn2;
259   const struct avr_opcodes_s *opcode;
260   static unsigned int *maskptr;
261   void *stream = info->stream;
262   fprintf_ftype prin = info->fprintf_func;
263   static unsigned int *avr_bin_masks;
264   static int initialized;
265   int cmd_len = 2;
266   int ok = 0;
267   char op1[20], op2[20], comment1[40], comment2[40];
268   int sym_op1 = 0, sym_op2 = 0;
269   bfd_vma sym_addr1, sym_addr2;
270 
271   if (!initialized)
272     {
273       unsigned int nopcodes;
274 
275       nopcodes = sizeof (avr_opcodes) / sizeof (struct avr_opcodes_s);
276 
277       avr_bin_masks = (unsigned int *)
278 	xmalloc (nopcodes * sizeof (unsigned int));
279 
280       for (opcode = avr_opcodes, maskptr = avr_bin_masks;
281 	   opcode->name;
282 	   opcode++, maskptr++)
283 	{
284 	  char * s;
285 	  unsigned int bin = 0;
286 	  unsigned int mask = 0;
287 
288 	  for (s = opcode->opcode; *s; ++s)
289 	    {
290 	      bin <<= 1;
291 	      mask <<= 1;
292 	      bin |= (*s == '1');
293 	      mask |= (*s == '1' || *s == '0');
294 	    }
295 	  assert (s - opcode->opcode == 16);
296 	  assert (opcode->bin_opcode == bin);
297 	  *maskptr = mask;
298 	}
299 
300       initialized = 1;
301     }
302 
303   insn = avrdis_opcode (addr, info);
304 
305   for (opcode = avr_opcodes, maskptr = avr_bin_masks;
306        opcode->name;
307        opcode++, maskptr++)
308     {
309       if ((insn & *maskptr) == opcode->bin_opcode)
310 	break;
311     }
312 
313   /* Special case: disassemble `ldd r,b+0' as `ld r,b', and
314      `std b+0,r' as `st b,r' (next entry in the table).  */
315 
316   if (AVR_DISP0_P (insn))
317     opcode++;
318 
319   op1[0] = 0;
320   op2[0] = 0;
321   comment1[0] = 0;
322   comment2[0] = 0;
323 
324   if (opcode->name)
325     {
326       char *op = opcode->constraints;
327 
328       insn2 = 0;
329       ok = 1;
330 
331       if (opcode->insn_size > 1)
332 	{
333 	  insn2 = avrdis_opcode (addr + 2, info);
334 	  cmd_len = 4;
335 	}
336 
337       if (*op && *op != '?')
338 	{
339 	  int regs = REGISTER_P (*op);
340 
341 	  ok = avr_operand (insn, insn2, addr, *op, op1, comment1, 0, &sym_op1, &sym_addr1);
342 
343 	  if (ok && *(++op) == ',')
344 	    ok = avr_operand (insn, insn2, addr, *(++op), op2,
345 			      *comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2);
346 	}
347     }
348 
349   if (!ok)
350     {
351       /* Unknown opcode, or invalid combination of operands.  */
352       sprintf (op1, "0x%04x", insn);
353       op2[0] = 0;
354       sprintf (comment1, "????");
355       comment2[0] = 0;
356     }
357 
358   (*prin) (stream, "%s", ok ? opcode->name : ".word");
359 
360   if (*op1)
361       (*prin) (stream, "\t%s", op1);
362 
363   if (*op2)
364     (*prin) (stream, ", %s", op2);
365 
366   if (*comment1)
367     (*prin) (stream, "\t; %s", comment1);
368 
369   if (sym_op1)
370     info->print_address_func (sym_addr1, info);
371 
372   if (*comment2)
373     (*prin) (stream, " %s", comment2);
374 
375   if (sym_op2)
376     info->print_address_func (sym_addr2, info);
377 
378   return cmd_len;
379 }
380