1 /* CPU data for frv.
2
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
4
5 Copyright 1996-2005 Free Software Foundation, Inc.
6
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23 */
24
25 #include "sysdep.h"
26 #include <stdio.h>
27 #include <stdarg.h>
28 #include "ansidecl.h"
29 #include "bfd.h"
30 #include "symcat.h"
31 #include "frv-desc.h"
32 #include "frv-opc.h"
33 #include "opintl.h"
34 #include "libiberty.h"
35 #include "xregex.h"
36
37 /* Attributes. */
38
39 static const CGEN_ATTR_ENTRY bool_attr[] =
40 {
41 { "#f", 0 },
42 { "#t", 1 },
43 { 0, 0 }
44 };
45
46 static const CGEN_ATTR_ENTRY MACH_attr[] ATTRIBUTE_UNUSED =
47 {
48 { "base", MACH_BASE },
49 { "frv", MACH_FRV },
50 { "fr550", MACH_FR550 },
51 { "fr500", MACH_FR500 },
52 { "fr450", MACH_FR450 },
53 { "fr400", MACH_FR400 },
54 { "tomcat", MACH_TOMCAT },
55 { "simple", MACH_SIMPLE },
56 { "max", MACH_MAX },
57 { 0, 0 }
58 };
59
60 static const CGEN_ATTR_ENTRY ISA_attr[] ATTRIBUTE_UNUSED =
61 {
62 { "frv", ISA_FRV },
63 { "max", ISA_MAX },
64 { 0, 0 }
65 };
66
67 static const CGEN_ATTR_ENTRY UNIT_attr[] ATTRIBUTE_UNUSED =
68 {
69 { "NIL", UNIT_NIL },
70 { "I0", UNIT_I0 },
71 { "I1", UNIT_I1 },
72 { "I01", UNIT_I01 },
73 { "I2", UNIT_I2 },
74 { "I3", UNIT_I3 },
75 { "IALL", UNIT_IALL },
76 { "FM0", UNIT_FM0 },
77 { "FM1", UNIT_FM1 },
78 { "FM01", UNIT_FM01 },
79 { "FM2", UNIT_FM2 },
80 { "FM3", UNIT_FM3 },
81 { "FMALL", UNIT_FMALL },
82 { "FMLOW", UNIT_FMLOW },
83 { "B0", UNIT_B0 },
84 { "B1", UNIT_B1 },
85 { "B01", UNIT_B01 },
86 { "C", UNIT_C },
87 { "MULT_DIV", UNIT_MULT_DIV },
88 { "IACC", UNIT_IACC },
89 { "LOAD", UNIT_LOAD },
90 { "STORE", UNIT_STORE },
91 { "SCAN", UNIT_SCAN },
92 { "DCPL", UNIT_DCPL },
93 { "MDUALACC", UNIT_MDUALACC },
94 { "MDCUTSSI", UNIT_MDCUTSSI },
95 { "MCLRACC_1", UNIT_MCLRACC_1 },
96 { "NUM_UNITS", UNIT_NUM_UNITS },
97 { 0, 0 }
98 };
99
100 static const CGEN_ATTR_ENTRY FR400_MAJOR_attr[] ATTRIBUTE_UNUSED =
101 {
102 { "NONE", FR400_MAJOR_NONE },
103 { "I_1", FR400_MAJOR_I_1 },
104 { "I_2", FR400_MAJOR_I_2 },
105 { "I_3", FR400_MAJOR_I_3 },
106 { "I_4", FR400_MAJOR_I_4 },
107 { "I_5", FR400_MAJOR_I_5 },
108 { "B_1", FR400_MAJOR_B_1 },
109 { "B_2", FR400_MAJOR_B_2 },
110 { "B_3", FR400_MAJOR_B_3 },
111 { "B_4", FR400_MAJOR_B_4 },
112 { "B_5", FR400_MAJOR_B_5 },
113 { "B_6", FR400_MAJOR_B_6 },
114 { "C_1", FR400_MAJOR_C_1 },
115 { "C_2", FR400_MAJOR_C_2 },
116 { "M_1", FR400_MAJOR_M_1 },
117 { "M_2", FR400_MAJOR_M_2 },
118 { 0, 0 }
119 };
120
121 static const CGEN_ATTR_ENTRY FR450_MAJOR_attr[] ATTRIBUTE_UNUSED =
122 {
123 { "NONE", FR450_MAJOR_NONE },
124 { "I_1", FR450_MAJOR_I_1 },
125 { "I_2", FR450_MAJOR_I_2 },
126 { "I_3", FR450_MAJOR_I_3 },
127 { "I_4", FR450_MAJOR_I_4 },
128 { "I_5", FR450_MAJOR_I_5 },
129 { "B_1", FR450_MAJOR_B_1 },
130 { "B_2", FR450_MAJOR_B_2 },
131 { "B_3", FR450_MAJOR_B_3 },
132 { "B_4", FR450_MAJOR_B_4 },
133 { "B_5", FR450_MAJOR_B_5 },
134 { "B_6", FR450_MAJOR_B_6 },
135 { "C_1", FR450_MAJOR_C_1 },
136 { "C_2", FR450_MAJOR_C_2 },
137 { "M_1", FR450_MAJOR_M_1 },
138 { "M_2", FR450_MAJOR_M_2 },
139 { "M_3", FR450_MAJOR_M_3 },
140 { "M_4", FR450_MAJOR_M_4 },
141 { "M_5", FR450_MAJOR_M_5 },
142 { "M_6", FR450_MAJOR_M_6 },
143 { 0, 0 }
144 };
145
146 static const CGEN_ATTR_ENTRY FR500_MAJOR_attr[] ATTRIBUTE_UNUSED =
147 {
148 { "NONE", FR500_MAJOR_NONE },
149 { "I_1", FR500_MAJOR_I_1 },
150 { "I_2", FR500_MAJOR_I_2 },
151 { "I_3", FR500_MAJOR_I_3 },
152 { "I_4", FR500_MAJOR_I_4 },
153 { "I_5", FR500_MAJOR_I_5 },
154 { "I_6", FR500_MAJOR_I_6 },
155 { "B_1", FR500_MAJOR_B_1 },
156 { "B_2", FR500_MAJOR_B_2 },
157 { "B_3", FR500_MAJOR_B_3 },
158 { "B_4", FR500_MAJOR_B_4 },
159 { "B_5", FR500_MAJOR_B_5 },
160 { "B_6", FR500_MAJOR_B_6 },
161 { "C_1", FR500_MAJOR_C_1 },
162 { "C_2", FR500_MAJOR_C_2 },
163 { "F_1", FR500_MAJOR_F_1 },
164 { "F_2", FR500_MAJOR_F_2 },
165 { "F_3", FR500_MAJOR_F_3 },
166 { "F_4", FR500_MAJOR_F_4 },
167 { "F_5", FR500_MAJOR_F_5 },
168 { "F_6", FR500_MAJOR_F_6 },
169 { "F_7", FR500_MAJOR_F_7 },
170 { "F_8", FR500_MAJOR_F_8 },
171 { "M_1", FR500_MAJOR_M_1 },
172 { "M_2", FR500_MAJOR_M_2 },
173 { "M_3", FR500_MAJOR_M_3 },
174 { "M_4", FR500_MAJOR_M_4 },
175 { "M_5", FR500_MAJOR_M_5 },
176 { "M_6", FR500_MAJOR_M_6 },
177 { "M_7", FR500_MAJOR_M_7 },
178 { "M_8", FR500_MAJOR_M_8 },
179 { 0, 0 }
180 };
181
182 static const CGEN_ATTR_ENTRY FR550_MAJOR_attr[] ATTRIBUTE_UNUSED =
183 {
184 { "NONE", FR550_MAJOR_NONE },
185 { "I_1", FR550_MAJOR_I_1 },
186 { "I_2", FR550_MAJOR_I_2 },
187 { "I_3", FR550_MAJOR_I_3 },
188 { "I_4", FR550_MAJOR_I_4 },
189 { "I_5", FR550_MAJOR_I_5 },
190 { "I_6", FR550_MAJOR_I_6 },
191 { "I_7", FR550_MAJOR_I_7 },
192 { "I_8", FR550_MAJOR_I_8 },
193 { "B_1", FR550_MAJOR_B_1 },
194 { "B_2", FR550_MAJOR_B_2 },
195 { "B_3", FR550_MAJOR_B_3 },
196 { "B_4", FR550_MAJOR_B_4 },
197 { "B_5", FR550_MAJOR_B_5 },
198 { "B_6", FR550_MAJOR_B_6 },
199 { "C_1", FR550_MAJOR_C_1 },
200 { "C_2", FR550_MAJOR_C_2 },
201 { "F_1", FR550_MAJOR_F_1 },
202 { "F_2", FR550_MAJOR_F_2 },
203 { "F_3", FR550_MAJOR_F_3 },
204 { "F_4", FR550_MAJOR_F_4 },
205 { "M_1", FR550_MAJOR_M_1 },
206 { "M_2", FR550_MAJOR_M_2 },
207 { "M_3", FR550_MAJOR_M_3 },
208 { "M_4", FR550_MAJOR_M_4 },
209 { "M_5", FR550_MAJOR_M_5 },
210 { 0, 0 }
211 };
212
213 const CGEN_ATTR_TABLE frv_cgen_ifield_attr_table[] =
214 {
215 { "MACH", & MACH_attr[0], & MACH_attr[0] },
216 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
217 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
218 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
219 { "RESERVED", &bool_attr[0], &bool_attr[0] },
220 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
221 { "SIGNED", &bool_attr[0], &bool_attr[0] },
222 { 0, 0, 0 }
223 };
224
225 const CGEN_ATTR_TABLE frv_cgen_hardware_attr_table[] =
226 {
227 { "MACH", & MACH_attr[0], & MACH_attr[0] },
228 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
229 { "CACHE-ADDR", &bool_attr[0], &bool_attr[0] },
230 { "PC", &bool_attr[0], &bool_attr[0] },
231 { "PROFILE", &bool_attr[0], &bool_attr[0] },
232 { 0, 0, 0 }
233 };
234
235 const CGEN_ATTR_TABLE frv_cgen_operand_attr_table[] =
236 {
237 { "MACH", & MACH_attr[0], & MACH_attr[0] },
238 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
239 { "PCREL-ADDR", &bool_attr[0], &bool_attr[0] },
240 { "ABS-ADDR", &bool_attr[0], &bool_attr[0] },
241 { "SIGN-OPT", &bool_attr[0], &bool_attr[0] },
242 { "SIGNED", &bool_attr[0], &bool_attr[0] },
243 { "NEGATIVE", &bool_attr[0], &bool_attr[0] },
244 { "RELAX", &bool_attr[0], &bool_attr[0] },
245 { "SEM-ONLY", &bool_attr[0], &bool_attr[0] },
246 { "HASH-PREFIX", &bool_attr[0], &bool_attr[0] },
247 { 0, 0, 0 }
248 };
249
250 const CGEN_ATTR_TABLE frv_cgen_insn_attr_table[] =
251 {
252 { "MACH", & MACH_attr[0], & MACH_attr[0] },
253 { "UNIT", & UNIT_attr[0], & UNIT_attr[0] },
254 { "FR400-MAJOR", & FR400_MAJOR_attr[0], & FR400_MAJOR_attr[0] },
255 { "FR450-MAJOR", & FR450_MAJOR_attr[0], & FR450_MAJOR_attr[0] },
256 { "FR500-MAJOR", & FR500_MAJOR_attr[0], & FR500_MAJOR_attr[0] },
257 { "FR550-MAJOR", & FR550_MAJOR_attr[0], & FR550_MAJOR_attr[0] },
258 { "ALIAS", &bool_attr[0], &bool_attr[0] },
259 { "VIRTUAL", &bool_attr[0], &bool_attr[0] },
260 { "UNCOND-CTI", &bool_attr[0], &bool_attr[0] },
261 { "COND-CTI", &bool_attr[0], &bool_attr[0] },
262 { "SKIP-CTI", &bool_attr[0], &bool_attr[0] },
263 { "DELAY-SLOT", &bool_attr[0], &bool_attr[0] },
264 { "RELAXABLE", &bool_attr[0], &bool_attr[0] },
265 { "RELAXED", &bool_attr[0], &bool_attr[0] },
266 { "NO-DIS", &bool_attr[0], &bool_attr[0] },
267 { "PBB", &bool_attr[0], &bool_attr[0] },
268 { "PRIVILEGED", &bool_attr[0], &bool_attr[0] },
269 { "NON-EXCEPTING", &bool_attr[0], &bool_attr[0] },
270 { "CONDITIONAL", &bool_attr[0], &bool_attr[0] },
271 { "FR-ACCESS", &bool_attr[0], &bool_attr[0] },
272 { "PRESERVE-OVF", &bool_attr[0], &bool_attr[0] },
273 { "AUDIO", &bool_attr[0], &bool_attr[0] },
274 { 0, 0, 0 }
275 };
276
277 /* Instruction set variants. */
278
279 static const CGEN_ISA frv_cgen_isa_table[] = {
280 { "frv", 32, 32, 32, 32 },
281 { 0, 0, 0, 0, 0 }
282 };
283
284 /* Machine variants. */
285
286 static const CGEN_MACH frv_cgen_mach_table[] = {
287 { "frv", "frv", MACH_FRV, 0 },
288 { "fr550", "fr550", MACH_FR550, 0 },
289 { "fr500", "fr500", MACH_FR500, 0 },
290 { "tomcat", "tomcat", MACH_TOMCAT, 0 },
291 { "fr400", "fr400", MACH_FR400, 0 },
292 { "fr450", "fr450", MACH_FR450, 0 },
293 { "simple", "simple", MACH_SIMPLE, 0 },
294 { 0, 0, 0, 0 }
295 };
296
297 static CGEN_KEYWORD_ENTRY frv_cgen_opval_gr_names_entries[] =
298 {
299 { "sp", 1, {0, {0}}, 0, 0 },
300 { "fp", 2, {0, {0}}, 0, 0 },
301 { "gr0", 0, {0, {0}}, 0, 0 },
302 { "gr1", 1, {0, {0}}, 0, 0 },
303 { "gr2", 2, {0, {0}}, 0, 0 },
304 { "gr3", 3, {0, {0}}, 0, 0 },
305 { "gr4", 4, {0, {0}}, 0, 0 },
306 { "gr5", 5, {0, {0}}, 0, 0 },
307 { "gr6", 6, {0, {0}}, 0, 0 },
308 { "gr7", 7, {0, {0}}, 0, 0 },
309 { "gr8", 8, {0, {0}}, 0, 0 },
310 { "gr9", 9, {0, {0}}, 0, 0 },
311 { "gr10", 10, {0, {0}}, 0, 0 },
312 { "gr11", 11, {0, {0}}, 0, 0 },
313 { "gr12", 12, {0, {0}}, 0, 0 },
314 { "gr13", 13, {0, {0}}, 0, 0 },
315 { "gr14", 14, {0, {0}}, 0, 0 },
316 { "gr15", 15, {0, {0}}, 0, 0 },
317 { "gr16", 16, {0, {0}}, 0, 0 },
318 { "gr17", 17, {0, {0}}, 0, 0 },
319 { "gr18", 18, {0, {0}}, 0, 0 },
320 { "gr19", 19, {0, {0}}, 0, 0 },
321 { "gr20", 20, {0, {0}}, 0, 0 },
322 { "gr21", 21, {0, {0}}, 0, 0 },
323 { "gr22", 22, {0, {0}}, 0, 0 },
324 { "gr23", 23, {0, {0}}, 0, 0 },
325 { "gr24", 24, {0, {0}}, 0, 0 },
326 { "gr25", 25, {0, {0}}, 0, 0 },
327 { "gr26", 26, {0, {0}}, 0, 0 },
328 { "gr27", 27, {0, {0}}, 0, 0 },
329 { "gr28", 28, {0, {0}}, 0, 0 },
330 { "gr29", 29, {0, {0}}, 0, 0 },
331 { "gr30", 30, {0, {0}}, 0, 0 },
332 { "gr31", 31, {0, {0}}, 0, 0 },
333 { "gr32", 32, {0, {0}}, 0, 0 },
334 { "gr33", 33, {0, {0}}, 0, 0 },
335 { "gr34", 34, {0, {0}}, 0, 0 },
336 { "gr35", 35, {0, {0}}, 0, 0 },
337 { "gr36", 36, {0, {0}}, 0, 0 },
338 { "gr37", 37, {0, {0}}, 0, 0 },
339 { "gr38", 38, {0, {0}}, 0, 0 },
340 { "gr39", 39, {0, {0}}, 0, 0 },
341 { "gr40", 40, {0, {0}}, 0, 0 },
342 { "gr41", 41, {0, {0}}, 0, 0 },
343 { "gr42", 42, {0, {0}}, 0, 0 },
344 { "gr43", 43, {0, {0}}, 0, 0 },
345 { "gr44", 44, {0, {0}}, 0, 0 },
346 { "gr45", 45, {0, {0}}, 0, 0 },
347 { "gr46", 46, {0, {0}}, 0, 0 },
348 { "gr47", 47, {0, {0}}, 0, 0 },
349 { "gr48", 48, {0, {0}}, 0, 0 },
350 { "gr49", 49, {0, {0}}, 0, 0 },
351 { "gr50", 50, {0, {0}}, 0, 0 },
352 { "gr51", 51, {0, {0}}, 0, 0 },
353 { "gr52", 52, {0, {0}}, 0, 0 },
354 { "gr53", 53, {0, {0}}, 0, 0 },
355 { "gr54", 54, {0, {0}}, 0, 0 },
356 { "gr55", 55, {0, {0}}, 0, 0 },
357 { "gr56", 56, {0, {0}}, 0, 0 },
358 { "gr57", 57, {0, {0}}, 0, 0 },
359 { "gr58", 58, {0, {0}}, 0, 0 },
360 { "gr59", 59, {0, {0}}, 0, 0 },
361 { "gr60", 60, {0, {0}}, 0, 0 },
362 { "gr61", 61, {0, {0}}, 0, 0 },
363 { "gr62", 62, {0, {0}}, 0, 0 },
364 { "gr63", 63, {0, {0}}, 0, 0 }
365 };
366
367 CGEN_KEYWORD frv_cgen_opval_gr_names =
368 {
369 & frv_cgen_opval_gr_names_entries[0],
370 66,
371 0, 0, 0, 0, ""
372 };
373
374 static CGEN_KEYWORD_ENTRY frv_cgen_opval_fr_names_entries[] =
375 {
376 { "fr0", 0, {0, {0}}, 0, 0 },
377 { "fr1", 1, {0, {0}}, 0, 0 },
378 { "fr2", 2, {0, {0}}, 0, 0 },
379 { "fr3", 3, {0, {0}}, 0, 0 },
380 { "fr4", 4, {0, {0}}, 0, 0 },
381 { "fr5", 5, {0, {0}}, 0, 0 },
382 { "fr6", 6, {0, {0}}, 0, 0 },
383 { "fr7", 7, {0, {0}}, 0, 0 },
384 { "fr8", 8, {0, {0}}, 0, 0 },
385 { "fr9", 9, {0, {0}}, 0, 0 },
386 { "fr10", 10, {0, {0}}, 0, 0 },
387 { "fr11", 11, {0, {0}}, 0, 0 },
388 { "fr12", 12, {0, {0}}, 0, 0 },
389 { "fr13", 13, {0, {0}}, 0, 0 },
390 { "fr14", 14, {0, {0}}, 0, 0 },
391 { "fr15", 15, {0, {0}}, 0, 0 },
392 { "fr16", 16, {0, {0}}, 0, 0 },
393 { "fr17", 17, {0, {0}}, 0, 0 },
394 { "fr18", 18, {0, {0}}, 0, 0 },
395 { "fr19", 19, {0, {0}}, 0, 0 },
396 { "fr20", 20, {0, {0}}, 0, 0 },
397 { "fr21", 21, {0, {0}}, 0, 0 },
398 { "fr22", 22, {0, {0}}, 0, 0 },
399 { "fr23", 23, {0, {0}}, 0, 0 },
400 { "fr24", 24, {0, {0}}, 0, 0 },
401 { "fr25", 25, {0, {0}}, 0, 0 },
402 { "fr26", 26, {0, {0}}, 0, 0 },
403 { "fr27", 27, {0, {0}}, 0, 0 },
404 { "fr28", 28, {0, {0}}, 0, 0 },
405 { "fr29", 29, {0, {0}}, 0, 0 },
406 { "fr30", 30, {0, {0}}, 0, 0 },
407 { "fr31", 31, {0, {0}}, 0, 0 },
408 { "fr32", 32, {0, {0}}, 0, 0 },
409 { "fr33", 33, {0, {0}}, 0, 0 },
410 { "fr34", 34, {0, {0}}, 0, 0 },
411 { "fr35", 35, {0, {0}}, 0, 0 },
412 { "fr36", 36, {0, {0}}, 0, 0 },
413 { "fr37", 37, {0, {0}}, 0, 0 },
414 { "fr38", 38, {0, {0}}, 0, 0 },
415 { "fr39", 39, {0, {0}}, 0, 0 },
416 { "fr40", 40, {0, {0}}, 0, 0 },
417 { "fr41", 41, {0, {0}}, 0, 0 },
418 { "fr42", 42, {0, {0}}, 0, 0 },
419 { "fr43", 43, {0, {0}}, 0, 0 },
420 { "fr44", 44, {0, {0}}, 0, 0 },
421 { "fr45", 45, {0, {0}}, 0, 0 },
422 { "fr46", 46, {0, {0}}, 0, 0 },
423 { "fr47", 47, {0, {0}}, 0, 0 },
424 { "fr48", 48, {0, {0}}, 0, 0 },
425 { "fr49", 49, {0, {0}}, 0, 0 },
426 { "fr50", 50, {0, {0}}, 0, 0 },
427 { "fr51", 51, {0, {0}}, 0, 0 },
428 { "fr52", 52, {0, {0}}, 0, 0 },
429 { "fr53", 53, {0, {0}}, 0, 0 },
430 { "fr54", 54, {0, {0}}, 0, 0 },
431 { "fr55", 55, {0, {0}}, 0, 0 },
432 { "fr56", 56, {0, {0}}, 0, 0 },
433 { "fr57", 57, {0, {0}}, 0, 0 },
434 { "fr58", 58, {0, {0}}, 0, 0 },
435 { "fr59", 59, {0, {0}}, 0, 0 },
436 { "fr60", 60, {0, {0}}, 0, 0 },
437 { "fr61", 61, {0, {0}}, 0, 0 },
438 { "fr62", 62, {0, {0}}, 0, 0 },
439 { "fr63", 63, {0, {0}}, 0, 0 }
440 };
441
442 CGEN_KEYWORD frv_cgen_opval_fr_names =
443 {
444 & frv_cgen_opval_fr_names_entries[0],
445 64,
446 0, 0, 0, 0, ""
447 };
448
449 static CGEN_KEYWORD_ENTRY frv_cgen_opval_cpr_names_entries[] =
450 {
451 { "cpr0", 0, {0, {0}}, 0, 0 },
452 { "cpr1", 1, {0, {0}}, 0, 0 },
453 { "cpr2", 2, {0, {0}}, 0, 0 },
454 { "cpr3", 3, {0, {0}}, 0, 0 },
455 { "cpr4", 4, {0, {0}}, 0, 0 },
456 { "cpr5", 5, {0, {0}}, 0, 0 },
457 { "cpr6", 6, {0, {0}}, 0, 0 },
458 { "cpr7", 7, {0, {0}}, 0, 0 },
459 { "cpr8", 8, {0, {0}}, 0, 0 },
460 { "cpr9", 9, {0, {0}}, 0, 0 },
461 { "cpr10", 10, {0, {0}}, 0, 0 },
462 { "cpr11", 11, {0, {0}}, 0, 0 },
463 { "cpr12", 12, {0, {0}}, 0, 0 },
464 { "cpr13", 13, {0, {0}}, 0, 0 },
465 { "cpr14", 14, {0, {0}}, 0, 0 },
466 { "cpr15", 15, {0, {0}}, 0, 0 },
467 { "cpr16", 16, {0, {0}}, 0, 0 },
468 { "cpr17", 17, {0, {0}}, 0, 0 },
469 { "cpr18", 18, {0, {0}}, 0, 0 },
470 { "cpr19", 19, {0, {0}}, 0, 0 },
471 { "cpr20", 20, {0, {0}}, 0, 0 },
472 { "cpr21", 21, {0, {0}}, 0, 0 },
473 { "cpr22", 22, {0, {0}}, 0, 0 },
474 { "cpr23", 23, {0, {0}}, 0, 0 },
475 { "cpr24", 24, {0, {0}}, 0, 0 },
476 { "cpr25", 25, {0, {0}}, 0, 0 },
477 { "cpr26", 26, {0, {0}}, 0, 0 },
478 { "cpr27", 27, {0, {0}}, 0, 0 },
479 { "cpr28", 28, {0, {0}}, 0, 0 },
480 { "cpr29", 29, {0, {0}}, 0, 0 },
481 { "cpr30", 30, {0, {0}}, 0, 0 },
482 { "cpr31", 31, {0, {0}}, 0, 0 },
483 { "cpr32", 32, {0, {0}}, 0, 0 },
484 { "cpr33", 33, {0, {0}}, 0, 0 },
485 { "cpr34", 34, {0, {0}}, 0, 0 },
486 { "cpr35", 35, {0, {0}}, 0, 0 },
487 { "cpr36", 36, {0, {0}}, 0, 0 },
488 { "cpr37", 37, {0, {0}}, 0, 0 },
489 { "cpr38", 38, {0, {0}}, 0, 0 },
490 { "cpr39", 39, {0, {0}}, 0, 0 },
491 { "cpr40", 40, {0, {0}}, 0, 0 },
492 { "cpr41", 41, {0, {0}}, 0, 0 },
493 { "cpr42", 42, {0, {0}}, 0, 0 },
494 { "cpr43", 43, {0, {0}}, 0, 0 },
495 { "cpr44", 44, {0, {0}}, 0, 0 },
496 { "cpr45", 45, {0, {0}}, 0, 0 },
497 { "cpr46", 46, {0, {0}}, 0, 0 },
498 { "cpr47", 47, {0, {0}}, 0, 0 },
499 { "cpr48", 48, {0, {0}}, 0, 0 },
500 { "cpr49", 49, {0, {0}}, 0, 0 },
501 { "cpr50", 50, {0, {0}}, 0, 0 },
502 { "cpr51", 51, {0, {0}}, 0, 0 },
503 { "cpr52", 52, {0, {0}}, 0, 0 },
504 { "cpr53", 53, {0, {0}}, 0, 0 },
505 { "cpr54", 54, {0, {0}}, 0, 0 },
506 { "cpr55", 55, {0, {0}}, 0, 0 },
507 { "cpr56", 56, {0, {0}}, 0, 0 },
508 { "cpr57", 57, {0, {0}}, 0, 0 },
509 { "cpr58", 58, {0, {0}}, 0, 0 },
510 { "cpr59", 59, {0, {0}}, 0, 0 },
511 { "cpr60", 60, {0, {0}}, 0, 0 },
512 { "cpr61", 61, {0, {0}}, 0, 0 },
513 { "cpr62", 62, {0, {0}}, 0, 0 },
514 { "cpr63", 63, {0, {0}}, 0, 0 }
515 };
516
517 CGEN_KEYWORD frv_cgen_opval_cpr_names =
518 {
519 & frv_cgen_opval_cpr_names_entries[0],
520 64,
521 0, 0, 0, 0, ""
522 };
523
524 static CGEN_KEYWORD_ENTRY frv_cgen_opval_spr_names_entries[] =
525 {
526 { "psr", 0, {0, {0}}, 0, 0 },
527 { "pcsr", 1, {0, {0}}, 0, 0 },
528 { "bpcsr", 2, {0, {0}}, 0, 0 },
529 { "tbr", 3, {0, {0}}, 0, 0 },
530 { "bpsr", 4, {0, {0}}, 0, 0 },
531 { "hsr0", 16, {0, {0}}, 0, 0 },
532 { "hsr1", 17, {0, {0}}, 0, 0 },
533 { "hsr2", 18, {0, {0}}, 0, 0 },
534 { "hsr3", 19, {0, {0}}, 0, 0 },
535 { "hsr4", 20, {0, {0}}, 0, 0 },
536 { "hsr5", 21, {0, {0}}, 0, 0 },
537 { "hsr6", 22, {0, {0}}, 0, 0 },
538 { "hsr7", 23, {0, {0}}, 0, 0 },
539 { "hsr8", 24, {0, {0}}, 0, 0 },
540 { "hsr9", 25, {0, {0}}, 0, 0 },
541 { "hsr10", 26, {0, {0}}, 0, 0 },
542 { "hsr11", 27, {0, {0}}, 0, 0 },
543 { "hsr12", 28, {0, {0}}, 0, 0 },
544 { "hsr13", 29, {0, {0}}, 0, 0 },
545 { "hsr14", 30, {0, {0}}, 0, 0 },
546 { "hsr15", 31, {0, {0}}, 0, 0 },
547 { "hsr16", 32, {0, {0}}, 0, 0 },
548 { "hsr17", 33, {0, {0}}, 0, 0 },
549 { "hsr18", 34, {0, {0}}, 0, 0 },
550 { "hsr19", 35, {0, {0}}, 0, 0 },
551 { "hsr20", 36, {0, {0}}, 0, 0 },
552 { "hsr21", 37, {0, {0}}, 0, 0 },
553 { "hsr22", 38, {0, {0}}, 0, 0 },
554 { "hsr23", 39, {0, {0}}, 0, 0 },
555 { "hsr24", 40, {0, {0}}, 0, 0 },
556 { "hsr25", 41, {0, {0}}, 0, 0 },
557 { "hsr26", 42, {0, {0}}, 0, 0 },
558 { "hsr27", 43, {0, {0}}, 0, 0 },
559 { "hsr28", 44, {0, {0}}, 0, 0 },
560 { "hsr29", 45, {0, {0}}, 0, 0 },
561 { "hsr30", 46, {0, {0}}, 0, 0 },
562 { "hsr31", 47, {0, {0}}, 0, 0 },
563 { "hsr32", 48, {0, {0}}, 0, 0 },
564 { "hsr33", 49, {0, {0}}, 0, 0 },
565 { "hsr34", 50, {0, {0}}, 0, 0 },
566 { "hsr35", 51, {0, {0}}, 0, 0 },
567 { "hsr36", 52, {0, {0}}, 0, 0 },
568 { "hsr37", 53, {0, {0}}, 0, 0 },
569 { "hsr38", 54, {0, {0}}, 0, 0 },
570 { "hsr39", 55, {0, {0}}, 0, 0 },
571 { "hsr40", 56, {0, {0}}, 0, 0 },
572 { "hsr41", 57, {0, {0}}, 0, 0 },
573 { "hsr42", 58, {0, {0}}, 0, 0 },
574 { "hsr43", 59, {0, {0}}, 0, 0 },
575 { "hsr44", 60, {0, {0}}, 0, 0 },
576 { "hsr45", 61, {0, {0}}, 0, 0 },
577 { "hsr46", 62, {0, {0}}, 0, 0 },
578 { "hsr47", 63, {0, {0}}, 0, 0 },
579 { "hsr48", 64, {0, {0}}, 0, 0 },
580 { "hsr49", 65, {0, {0}}, 0, 0 },
581 { "hsr50", 66, {0, {0}}, 0, 0 },
582 { "hsr51", 67, {0, {0}}, 0, 0 },
583 { "hsr52", 68, {0, {0}}, 0, 0 },
584 { "hsr53", 69, {0, {0}}, 0, 0 },
585 { "hsr54", 70, {0, {0}}, 0, 0 },
586 { "hsr55", 71, {0, {0}}, 0, 0 },
587 { "hsr56", 72, {0, {0}}, 0, 0 },
588 { "hsr57", 73, {0, {0}}, 0, 0 },
589 { "hsr58", 74, {0, {0}}, 0, 0 },
590 { "hsr59", 75, {0, {0}}, 0, 0 },
591 { "hsr60", 76, {0, {0}}, 0, 0 },
592 { "hsr61", 77, {0, {0}}, 0, 0 },
593 { "hsr62", 78, {0, {0}}, 0, 0 },
594 { "hsr63", 79, {0, {0}}, 0, 0 },
595 { "ccr", 256, {0, {0}}, 0, 0 },
596 { "cccr", 263, {0, {0}}, 0, 0 },
597 { "lr", 272, {0, {0}}, 0, 0 },
598 { "lcr", 273, {0, {0}}, 0, 0 },
599 { "iacc0h", 280, {0, {0}}, 0, 0 },
600 { "iacc0l", 281, {0, {0}}, 0, 0 },
601 { "isr", 288, {0, {0}}, 0, 0 },
602 { "neear0", 352, {0, {0}}, 0, 0 },
603 { "neear1", 353, {0, {0}}, 0, 0 },
604 { "neear2", 354, {0, {0}}, 0, 0 },
605 { "neear3", 355, {0, {0}}, 0, 0 },
606 { "neear4", 356, {0, {0}}, 0, 0 },
607 { "neear5", 357, {0, {0}}, 0, 0 },
608 { "neear6", 358, {0, {0}}, 0, 0 },
609 { "neear7", 359, {0, {0}}, 0, 0 },
610 { "neear8", 360, {0, {0}}, 0, 0 },
611 { "neear9", 361, {0, {0}}, 0, 0 },
612 { "neear10", 362, {0, {0}}, 0, 0 },
613 { "neear11", 363, {0, {0}}, 0, 0 },
614 { "neear12", 364, {0, {0}}, 0, 0 },
615 { "neear13", 365, {0, {0}}, 0, 0 },
616 { "neear14", 366, {0, {0}}, 0, 0 },
617 { "neear15", 367, {0, {0}}, 0, 0 },
618 { "neear16", 368, {0, {0}}, 0, 0 },
619 { "neear17", 369, {0, {0}}, 0, 0 },
620 { "neear18", 370, {0, {0}}, 0, 0 },
621 { "neear19", 371, {0, {0}}, 0, 0 },
622 { "neear20", 372, {0, {0}}, 0, 0 },
623 { "neear21", 373, {0, {0}}, 0, 0 },
624 { "neear22", 374, {0, {0}}, 0, 0 },
625 { "neear23", 375, {0, {0}}, 0, 0 },
626 { "neear24", 376, {0, {0}}, 0, 0 },
627 { "neear25", 377, {0, {0}}, 0, 0 },
628 { "neear26", 378, {0, {0}}, 0, 0 },
629 { "neear27", 379, {0, {0}}, 0, 0 },
630 { "neear28", 380, {0, {0}}, 0, 0 },
631 { "neear29", 381, {0, {0}}, 0, 0 },
632 { "neear30", 382, {0, {0}}, 0, 0 },
633 { "neear31", 383, {0, {0}}, 0, 0 },
634 { "nesr0", 384, {0, {0}}, 0, 0 },
635 { "nesr1", 385, {0, {0}}, 0, 0 },
636 { "nesr2", 386, {0, {0}}, 0, 0 },
637 { "nesr3", 387, {0, {0}}, 0, 0 },
638 { "nesr4", 388, {0, {0}}, 0, 0 },
639 { "nesr5", 389, {0, {0}}, 0, 0 },
640 { "nesr6", 390, {0, {0}}, 0, 0 },
641 { "nesr7", 391, {0, {0}}, 0, 0 },
642 { "nesr8", 392, {0, {0}}, 0, 0 },
643 { "nesr9", 393, {0, {0}}, 0, 0 },
644 { "nesr10", 394, {0, {0}}, 0, 0 },
645 { "nesr11", 395, {0, {0}}, 0, 0 },
646 { "nesr12", 396, {0, {0}}, 0, 0 },
647 { "nesr13", 397, {0, {0}}, 0, 0 },
648 { "nesr14", 398, {0, {0}}, 0, 0 },
649 { "nesr15", 399, {0, {0}}, 0, 0 },
650 { "nesr16", 400, {0, {0}}, 0, 0 },
651 { "nesr17", 401, {0, {0}}, 0, 0 },
652 { "nesr18", 402, {0, {0}}, 0, 0 },
653 { "nesr19", 403, {0, {0}}, 0, 0 },
654 { "nesr20", 404, {0, {0}}, 0, 0 },
655 { "nesr21", 405, {0, {0}}, 0, 0 },
656 { "nesr22", 406, {0, {0}}, 0, 0 },
657 { "nesr23", 407, {0, {0}}, 0, 0 },
658 { "nesr24", 408, {0, {0}}, 0, 0 },
659 { "nesr25", 409, {0, {0}}, 0, 0 },
660 { "nesr26", 410, {0, {0}}, 0, 0 },
661 { "nesr27", 411, {0, {0}}, 0, 0 },
662 { "nesr28", 412, {0, {0}}, 0, 0 },
663 { "nesr29", 413, {0, {0}}, 0, 0 },
664 { "nesr30", 414, {0, {0}}, 0, 0 },
665 { "nesr31", 415, {0, {0}}, 0, 0 },
666 { "necr", 416, {0, {0}}, 0, 0 },
667 { "gner0", 432, {0, {0}}, 0, 0 },
668 { "gner1", 433, {0, {0}}, 0, 0 },
669 { "fner0", 434, {0, {0}}, 0, 0 },
670 { "fner1", 435, {0, {0}}, 0, 0 },
671 { "epcr0", 512, {0, {0}}, 0, 0 },
672 { "epcr1", 513, {0, {0}}, 0, 0 },
673 { "epcr2", 514, {0, {0}}, 0, 0 },
674 { "epcr3", 515, {0, {0}}, 0, 0 },
675 { "epcr4", 516, {0, {0}}, 0, 0 },
676 { "epcr5", 517, {0, {0}}, 0, 0 },
677 { "epcr6", 518, {0, {0}}, 0, 0 },
678 { "epcr7", 519, {0, {0}}, 0, 0 },
679 { "epcr8", 520, {0, {0}}, 0, 0 },
680 { "epcr9", 521, {0, {0}}, 0, 0 },
681 { "epcr10", 522, {0, {0}}, 0, 0 },
682 { "epcr11", 523, {0, {0}}, 0, 0 },
683 { "epcr12", 524, {0, {0}}, 0, 0 },
684 { "epcr13", 525, {0, {0}}, 0, 0 },
685 { "epcr14", 526, {0, {0}}, 0, 0 },
686 { "epcr15", 527, {0, {0}}, 0, 0 },
687 { "epcr16", 528, {0, {0}}, 0, 0 },
688 { "epcr17", 529, {0, {0}}, 0, 0 },
689 { "epcr18", 530, {0, {0}}, 0, 0 },
690 { "epcr19", 531, {0, {0}}, 0, 0 },
691 { "epcr20", 532, {0, {0}}, 0, 0 },
692 { "epcr21", 533, {0, {0}}, 0, 0 },
693 { "epcr22", 534, {0, {0}}, 0, 0 },
694 { "epcr23", 535, {0, {0}}, 0, 0 },
695 { "epcr24", 536, {0, {0}}, 0, 0 },
696 { "epcr25", 537, {0, {0}}, 0, 0 },
697 { "epcr26", 538, {0, {0}}, 0, 0 },
698 { "epcr27", 539, {0, {0}}, 0, 0 },
699 { "epcr28", 540, {0, {0}}, 0, 0 },
700 { "epcr29", 541, {0, {0}}, 0, 0 },
701 { "epcr30", 542, {0, {0}}, 0, 0 },
702 { "epcr31", 543, {0, {0}}, 0, 0 },
703 { "epcr32", 544, {0, {0}}, 0, 0 },
704 { "epcr33", 545, {0, {0}}, 0, 0 },
705 { "epcr34", 546, {0, {0}}, 0, 0 },
706 { "epcr35", 547, {0, {0}}, 0, 0 },
707 { "epcr36", 548, {0, {0}}, 0, 0 },
708 { "epcr37", 549, {0, {0}}, 0, 0 },
709 { "epcr38", 550, {0, {0}}, 0, 0 },
710 { "epcr39", 551, {0, {0}}, 0, 0 },
711 { "epcr40", 552, {0, {0}}, 0, 0 },
712 { "epcr41", 553, {0, {0}}, 0, 0 },
713 { "epcr42", 554, {0, {0}}, 0, 0 },
714 { "epcr43", 555, {0, {0}}, 0, 0 },
715 { "epcr44", 556, {0, {0}}, 0, 0 },
716 { "epcr45", 557, {0, {0}}, 0, 0 },
717 { "epcr46", 558, {0, {0}}, 0, 0 },
718 { "epcr47", 559, {0, {0}}, 0, 0 },
719 { "epcr48", 560, {0, {0}}, 0, 0 },
720 { "epcr49", 561, {0, {0}}, 0, 0 },
721 { "epcr50", 562, {0, {0}}, 0, 0 },
722 { "epcr51", 563, {0, {0}}, 0, 0 },
723 { "epcr52", 564, {0, {0}}, 0, 0 },
724 { "epcr53", 565, {0, {0}}, 0, 0 },
725 { "epcr54", 566, {0, {0}}, 0, 0 },
726 { "epcr55", 567, {0, {0}}, 0, 0 },
727 { "epcr56", 568, {0, {0}}, 0, 0 },
728 { "epcr57", 569, {0, {0}}, 0, 0 },
729 { "epcr58", 570, {0, {0}}, 0, 0 },
730 { "epcr59", 571, {0, {0}}, 0, 0 },
731 { "epcr60", 572, {0, {0}}, 0, 0 },
732 { "epcr61", 573, {0, {0}}, 0, 0 },
733 { "epcr62", 574, {0, {0}}, 0, 0 },
734 { "epcr63", 575, {0, {0}}, 0, 0 },
735 { "esr0", 576, {0, {0}}, 0, 0 },
736 { "esr1", 577, {0, {0}}, 0, 0 },
737 { "esr2", 578, {0, {0}}, 0, 0 },
738 { "esr3", 579, {0, {0}}, 0, 0 },
739 { "esr4", 580, {0, {0}}, 0, 0 },
740 { "esr5", 581, {0, {0}}, 0, 0 },
741 { "esr6", 582, {0, {0}}, 0, 0 },
742 { "esr7", 583, {0, {0}}, 0, 0 },
743 { "esr8", 584, {0, {0}}, 0, 0 },
744 { "esr9", 585, {0, {0}}, 0, 0 },
745 { "esr10", 586, {0, {0}}, 0, 0 },
746 { "esr11", 587, {0, {0}}, 0, 0 },
747 { "esr12", 588, {0, {0}}, 0, 0 },
748 { "esr13", 589, {0, {0}}, 0, 0 },
749 { "esr14", 590, {0, {0}}, 0, 0 },
750 { "esr15", 591, {0, {0}}, 0, 0 },
751 { "esr16", 592, {0, {0}}, 0, 0 },
752 { "esr17", 593, {0, {0}}, 0, 0 },
753 { "esr18", 594, {0, {0}}, 0, 0 },
754 { "esr19", 595, {0, {0}}, 0, 0 },
755 { "esr20", 596, {0, {0}}, 0, 0 },
756 { "esr21", 597, {0, {0}}, 0, 0 },
757 { "esr22", 598, {0, {0}}, 0, 0 },
758 { "esr23", 599, {0, {0}}, 0, 0 },
759 { "esr24", 600, {0, {0}}, 0, 0 },
760 { "esr25", 601, {0, {0}}, 0, 0 },
761 { "esr26", 602, {0, {0}}, 0, 0 },
762 { "esr27", 603, {0, {0}}, 0, 0 },
763 { "esr28", 604, {0, {0}}, 0, 0 },
764 { "esr29", 605, {0, {0}}, 0, 0 },
765 { "esr30", 606, {0, {0}}, 0, 0 },
766 { "esr31", 607, {0, {0}}, 0, 0 },
767 { "esr32", 608, {0, {0}}, 0, 0 },
768 { "esr33", 609, {0, {0}}, 0, 0 },
769 { "esr34", 610, {0, {0}}, 0, 0 },
770 { "esr35", 611, {0, {0}}, 0, 0 },
771 { "esr36", 612, {0, {0}}, 0, 0 },
772 { "esr37", 613, {0, {0}}, 0, 0 },
773 { "esr38", 614, {0, {0}}, 0, 0 },
774 { "esr39", 615, {0, {0}}, 0, 0 },
775 { "esr40", 616, {0, {0}}, 0, 0 },
776 { "esr41", 617, {0, {0}}, 0, 0 },
777 { "esr42", 618, {0, {0}}, 0, 0 },
778 { "esr43", 619, {0, {0}}, 0, 0 },
779 { "esr44", 620, {0, {0}}, 0, 0 },
780 { "esr45", 621, {0, {0}}, 0, 0 },
781 { "esr46", 622, {0, {0}}, 0, 0 },
782 { "esr47", 623, {0, {0}}, 0, 0 },
783 { "esr48", 624, {0, {0}}, 0, 0 },
784 { "esr49", 625, {0, {0}}, 0, 0 },
785 { "esr50", 626, {0, {0}}, 0, 0 },
786 { "esr51", 627, {0, {0}}, 0, 0 },
787 { "esr52", 628, {0, {0}}, 0, 0 },
788 { "esr53", 629, {0, {0}}, 0, 0 },
789 { "esr54", 630, {0, {0}}, 0, 0 },
790 { "esr55", 631, {0, {0}}, 0, 0 },
791 { "esr56", 632, {0, {0}}, 0, 0 },
792 { "esr57", 633, {0, {0}}, 0, 0 },
793 { "esr58", 634, {0, {0}}, 0, 0 },
794 { "esr59", 635, {0, {0}}, 0, 0 },
795 { "esr60", 636, {0, {0}}, 0, 0 },
796 { "esr61", 637, {0, {0}}, 0, 0 },
797 { "esr62", 638, {0, {0}}, 0, 0 },
798 { "esr63", 639, {0, {0}}, 0, 0 },
799 { "eir0", 640, {0, {0}}, 0, 0 },
800 { "eir1", 641, {0, {0}}, 0, 0 },
801 { "eir2", 642, {0, {0}}, 0, 0 },
802 { "eir3", 643, {0, {0}}, 0, 0 },
803 { "eir4", 644, {0, {0}}, 0, 0 },
804 { "eir5", 645, {0, {0}}, 0, 0 },
805 { "eir6", 646, {0, {0}}, 0, 0 },
806 { "eir7", 647, {0, {0}}, 0, 0 },
807 { "eir8", 648, {0, {0}}, 0, 0 },
808 { "eir9", 649, {0, {0}}, 0, 0 },
809 { "eir10", 650, {0, {0}}, 0, 0 },
810 { "eir11", 651, {0, {0}}, 0, 0 },
811 { "eir12", 652, {0, {0}}, 0, 0 },
812 { "eir13", 653, {0, {0}}, 0, 0 },
813 { "eir14", 654, {0, {0}}, 0, 0 },
814 { "eir15", 655, {0, {0}}, 0, 0 },
815 { "eir16", 656, {0, {0}}, 0, 0 },
816 { "eir17", 657, {0, {0}}, 0, 0 },
817 { "eir18", 658, {0, {0}}, 0, 0 },
818 { "eir19", 659, {0, {0}}, 0, 0 },
819 { "eir20", 660, {0, {0}}, 0, 0 },
820 { "eir21", 661, {0, {0}}, 0, 0 },
821 { "eir22", 662, {0, {0}}, 0, 0 },
822 { "eir23", 663, {0, {0}}, 0, 0 },
823 { "eir24", 664, {0, {0}}, 0, 0 },
824 { "eir25", 665, {0, {0}}, 0, 0 },
825 { "eir26", 666, {0, {0}}, 0, 0 },
826 { "eir27", 667, {0, {0}}, 0, 0 },
827 { "eir28", 668, {0, {0}}, 0, 0 },
828 { "eir29", 669, {0, {0}}, 0, 0 },
829 { "eir30", 670, {0, {0}}, 0, 0 },
830 { "eir31", 671, {0, {0}}, 0, 0 },
831 { "esfr0", 672, {0, {0}}, 0, 0 },
832 { "esfr1", 673, {0, {0}}, 0, 0 },
833 { "sr0", 768, {0, {0}}, 0, 0 },
834 { "sr1", 769, {0, {0}}, 0, 0 },
835 { "sr2", 770, {0, {0}}, 0, 0 },
836 { "sr3", 771, {0, {0}}, 0, 0 },
837 { "scr0", 832, {0, {0}}, 0, 0 },
838 { "scr1", 833, {0, {0}}, 0, 0 },
839 { "scr2", 834, {0, {0}}, 0, 0 },
840 { "scr3", 835, {0, {0}}, 0, 0 },
841 { "fsr0", 1024, {0, {0}}, 0, 0 },
842 { "fsr1", 1025, {0, {0}}, 0, 0 },
843 { "fsr2", 1026, {0, {0}}, 0, 0 },
844 { "fsr3", 1027, {0, {0}}, 0, 0 },
845 { "fsr4", 1028, {0, {0}}, 0, 0 },
846 { "fsr5", 1029, {0, {0}}, 0, 0 },
847 { "fsr6", 1030, {0, {0}}, 0, 0 },
848 { "fsr7", 1031, {0, {0}}, 0, 0 },
849 { "fsr8", 1032, {0, {0}}, 0, 0 },
850 { "fsr9", 1033, {0, {0}}, 0, 0 },
851 { "fsr10", 1034, {0, {0}}, 0, 0 },
852 { "fsr11", 1035, {0, {0}}, 0, 0 },
853 { "fsr12", 1036, {0, {0}}, 0, 0 },
854 { "fsr13", 1037, {0, {0}}, 0, 0 },
855 { "fsr14", 1038, {0, {0}}, 0, 0 },
856 { "fsr15", 1039, {0, {0}}, 0, 0 },
857 { "fsr16", 1040, {0, {0}}, 0, 0 },
858 { "fsr17", 1041, {0, {0}}, 0, 0 },
859 { "fsr18", 1042, {0, {0}}, 0, 0 },
860 { "fsr19", 1043, {0, {0}}, 0, 0 },
861 { "fsr20", 1044, {0, {0}}, 0, 0 },
862 { "fsr21", 1045, {0, {0}}, 0, 0 },
863 { "fsr22", 1046, {0, {0}}, 0, 0 },
864 { "fsr23", 1047, {0, {0}}, 0, 0 },
865 { "fsr24", 1048, {0, {0}}, 0, 0 },
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1222 { "edr59", 1659, {0, {0}}, 0, 0 },
1223 { "edr60", 1660, {0, {0}}, 0, 0 },
1224 { "edr61", 1661, {0, {0}}, 0, 0 },
1225 { "edr62", 1662, {0, {0}}, 0, 0 },
1226 { "edr63", 1663, {0, {0}}, 0, 0 },
1227 { "iamlr0", 1664, {0, {0}}, 0, 0 },
1228 { "iamlr1", 1665, {0, {0}}, 0, 0 },
1229 { "iamlr2", 1666, {0, {0}}, 0, 0 },
1230 { "iamlr3", 1667, {0, {0}}, 0, 0 },
1231 { "iamlr4", 1668, {0, {0}}, 0, 0 },
1232 { "iamlr5", 1669, {0, {0}}, 0, 0 },
1233 { "iamlr6", 1670, {0, {0}}, 0, 0 },
1234 { "iamlr7", 1671, {0, {0}}, 0, 0 },
1235 { "iamlr8", 1672, {0, {0}}, 0, 0 },
1236 { "iamlr9", 1673, {0, {0}}, 0, 0 },
1237 { "iamlr10", 1674, {0, {0}}, 0, 0 },
1238 { "iamlr11", 1675, {0, {0}}, 0, 0 },
1239 { "iamlr12", 1676, {0, {0}}, 0, 0 },
1240 { "iamlr13", 1677, {0, {0}}, 0, 0 },
1241 { "iamlr14", 1678, {0, {0}}, 0, 0 },
1242 { "iamlr15", 1679, {0, {0}}, 0, 0 },
1243 { "iamlr16", 1680, {0, {0}}, 0, 0 },
1244 { "iamlr17", 1681, {0, {0}}, 0, 0 },
1245 { "iamlr18", 1682, {0, {0}}, 0, 0 },
1246 { "iamlr19", 1683, {0, {0}}, 0, 0 },
1247 { "iamlr20", 1684, {0, {0}}, 0, 0 },
1248 { "iamlr21", 1685, {0, {0}}, 0, 0 },
1249 { "iamlr22", 1686, {0, {0}}, 0, 0 },
1250 { "iamlr23", 1687, {0, {0}}, 0, 0 },
1251 { "iamlr24", 1688, {0, {0}}, 0, 0 },
1252 { "iamlr25", 1689, {0, {0}}, 0, 0 },
1253 { "iamlr26", 1690, {0, {0}}, 0, 0 },
1254 { "iamlr27", 1691, {0, {0}}, 0, 0 },
1255 { "iamlr28", 1692, {0, {0}}, 0, 0 },
1256 { "iamlr29", 1693, {0, {0}}, 0, 0 },
1257 { "iamlr30", 1694, {0, {0}}, 0, 0 },
1258 { "iamlr31", 1695, {0, {0}}, 0, 0 },
1259 { "iamlr32", 1696, {0, {0}}, 0, 0 },
1260 { "iamlr33", 1697, {0, {0}}, 0, 0 },
1261 { "iamlr34", 1698, {0, {0}}, 0, 0 },
1262 { "iamlr35", 1699, {0, {0}}, 0, 0 },
1263 { "iamlr36", 1700, {0, {0}}, 0, 0 },
1264 { "iamlr37", 1701, {0, {0}}, 0, 0 },
1265 { "iamlr38", 1702, {0, {0}}, 0, 0 },
1266 { "iamlr39", 1703, {0, {0}}, 0, 0 },
1267 { "iamlr40", 1704, {0, {0}}, 0, 0 },
1268 { "iamlr41", 1705, {0, {0}}, 0, 0 },
1269 { "iamlr42", 1706, {0, {0}}, 0, 0 },
1270 { "iamlr43", 1707, {0, {0}}, 0, 0 },
1271 { "iamlr44", 1708, {0, {0}}, 0, 0 },
1272 { "iamlr45", 1709, {0, {0}}, 0, 0 },
1273 { "iamlr46", 1710, {0, {0}}, 0, 0 },
1274 { "iamlr47", 1711, {0, {0}}, 0, 0 },
1275 { "iamlr48", 1712, {0, {0}}, 0, 0 },
1276 { "iamlr49", 1713, {0, {0}}, 0, 0 },
1277 { "iamlr50", 1714, {0, {0}}, 0, 0 },
1278 { "iamlr51", 1715, {0, {0}}, 0, 0 },
1279 { "iamlr52", 1716, {0, {0}}, 0, 0 },
1280 { "iamlr53", 1717, {0, {0}}, 0, 0 },
1281 { "iamlr54", 1718, {0, {0}}, 0, 0 },
1282 { "iamlr55", 1719, {0, {0}}, 0, 0 },
1283 { "iamlr56", 1720, {0, {0}}, 0, 0 },
1284 { "iamlr57", 1721, {0, {0}}, 0, 0 },
1285 { "iamlr58", 1722, {0, {0}}, 0, 0 },
1286 { "iamlr59", 1723, {0, {0}}, 0, 0 },
1287 { "iamlr60", 1724, {0, {0}}, 0, 0 },
1288 { "iamlr61", 1725, {0, {0}}, 0, 0 },
1289 { "iamlr62", 1726, {0, {0}}, 0, 0 },
1290 { "iamlr63", 1727, {0, {0}}, 0, 0 },
1291 { "iampr0", 1728, {0, {0}}, 0, 0 },
1292 { "iampr1", 1729, {0, {0}}, 0, 0 },
1293 { "iampr2", 1730, {0, {0}}, 0, 0 },
1294 { "iampr3", 1731, {0, {0}}, 0, 0 },
1295 { "iampr4", 1732, {0, {0}}, 0, 0 },
1296 { "iampr5", 1733, {0, {0}}, 0, 0 },
1297 { "iampr6", 1734, {0, {0}}, 0, 0 },
1298 { "iampr7", 1735, {0, {0}}, 0, 0 },
1299 { "iampr8", 1736, {0, {0}}, 0, 0 },
1300 { "iampr9", 1737, {0, {0}}, 0, 0 },
1301 { "iampr10", 1738, {0, {0}}, 0, 0 },
1302 { "iampr11", 1739, {0, {0}}, 0, 0 },
1303 { "iampr12", 1740, {0, {0}}, 0, 0 },
1304 { "iampr13", 1741, {0, {0}}, 0, 0 },
1305 { "iampr14", 1742, {0, {0}}, 0, 0 },
1306 { "iampr15", 1743, {0, {0}}, 0, 0 },
1307 { "iampr16", 1744, {0, {0}}, 0, 0 },
1308 { "iampr17", 1745, {0, {0}}, 0, 0 },
1309 { "iampr18", 1746, {0, {0}}, 0, 0 },
1310 { "iampr19", 1747, {0, {0}}, 0, 0 },
1311 { "iampr20", 1748, {0, {0}}, 0, 0 },
1312 { "iampr21", 1749, {0, {0}}, 0, 0 },
1313 { "iampr22", 1750, {0, {0}}, 0, 0 },
1314 { "iampr23", 1751, {0, {0}}, 0, 0 },
1315 { "iampr24", 1752, {0, {0}}, 0, 0 },
1316 { "iampr25", 1753, {0, {0}}, 0, 0 },
1317 { "iampr26", 1754, {0, {0}}, 0, 0 },
1318 { "iampr27", 1755, {0, {0}}, 0, 0 },
1319 { "iampr28", 1756, {0, {0}}, 0, 0 },
1320 { "iampr29", 1757, {0, {0}}, 0, 0 },
1321 { "iampr30", 1758, {0, {0}}, 0, 0 },
1322 { "iampr31", 1759, {0, {0}}, 0, 0 },
1323 { "iampr32", 1760, {0, {0}}, 0, 0 },
1324 { "iampr33", 1761, {0, {0}}, 0, 0 },
1325 { "iampr34", 1762, {0, {0}}, 0, 0 },
1326 { "iampr35", 1763, {0, {0}}, 0, 0 },
1327 { "iampr36", 1764, {0, {0}}, 0, 0 },
1328 { "iampr37", 1765, {0, {0}}, 0, 0 },
1329 { "iampr38", 1766, {0, {0}}, 0, 0 },
1330 { "iampr39", 1767, {0, {0}}, 0, 0 },
1331 { "iampr40", 1768, {0, {0}}, 0, 0 },
1332 { "iampr41", 1769, {0, {0}}, 0, 0 },
1333 { "iampr42", 1770, {0, {0}}, 0, 0 },
1334 { "iampr43", 1771, {0, {0}}, 0, 0 },
1335 { "iampr44", 1772, {0, {0}}, 0, 0 },
1336 { "iampr45", 1773, {0, {0}}, 0, 0 },
1337 { "iampr46", 1774, {0, {0}}, 0, 0 },
1338 { "iampr47", 1775, {0, {0}}, 0, 0 },
1339 { "iampr48", 1776, {0, {0}}, 0, 0 },
1340 { "iampr49", 1777, {0, {0}}, 0, 0 },
1341 { "iampr50", 1778, {0, {0}}, 0, 0 },
1342 { "iampr51", 1779, {0, {0}}, 0, 0 },
1343 { "iampr52", 1780, {0, {0}}, 0, 0 },
1344 { "iampr53", 1781, {0, {0}}, 0, 0 },
1345 { "iampr54", 1782, {0, {0}}, 0, 0 },
1346 { "iampr55", 1783, {0, {0}}, 0, 0 },
1347 { "iampr56", 1784, {0, {0}}, 0, 0 },
1348 { "iampr57", 1785, {0, {0}}, 0, 0 },
1349 { "iampr58", 1786, {0, {0}}, 0, 0 },
1350 { "iampr59", 1787, {0, {0}}, 0, 0 },
1351 { "iampr60", 1788, {0, {0}}, 0, 0 },
1352 { "iampr61", 1789, {0, {0}}, 0, 0 },
1353 { "iampr62", 1790, {0, {0}}, 0, 0 },
1354 { "iampr63", 1791, {0, {0}}, 0, 0 },
1355 { "damlr0", 1792, {0, {0}}, 0, 0 },
1356 { "damlr1", 1793, {0, {0}}, 0, 0 },
1357 { "damlr2", 1794, {0, {0}}, 0, 0 },
1358 { "damlr3", 1795, {0, {0}}, 0, 0 },
1359 { "damlr4", 1796, {0, {0}}, 0, 0 },
1360 { "damlr5", 1797, {0, {0}}, 0, 0 },
1361 { "damlr6", 1798, {0, {0}}, 0, 0 },
1362 { "damlr7", 1799, {0, {0}}, 0, 0 },
1363 { "damlr8", 1800, {0, {0}}, 0, 0 },
1364 { "damlr9", 1801, {0, {0}}, 0, 0 },
1365 { "damlr10", 1802, {0, {0}}, 0, 0 },
1366 { "damlr11", 1803, {0, {0}}, 0, 0 },
1367 { "damlr12", 1804, {0, {0}}, 0, 0 },
1368 { "damlr13", 1805, {0, {0}}, 0, 0 },
1369 { "damlr14", 1806, {0, {0}}, 0, 0 },
1370 { "damlr15", 1807, {0, {0}}, 0, 0 },
1371 { "damlr16", 1808, {0, {0}}, 0, 0 },
1372 { "damlr17", 1809, {0, {0}}, 0, 0 },
1373 { "damlr18", 1810, {0, {0}}, 0, 0 },
1374 { "damlr19", 1811, {0, {0}}, 0, 0 },
1375 { "damlr20", 1812, {0, {0}}, 0, 0 },
1376 { "damlr21", 1813, {0, {0}}, 0, 0 },
1377 { "damlr22", 1814, {0, {0}}, 0, 0 },
1378 { "damlr23", 1815, {0, {0}}, 0, 0 },
1379 { "damlr24", 1816, {0, {0}}, 0, 0 },
1380 { "damlr25", 1817, {0, {0}}, 0, 0 },
1381 { "damlr26", 1818, {0, {0}}, 0, 0 },
1382 { "damlr27", 1819, {0, {0}}, 0, 0 },
1383 { "damlr28", 1820, {0, {0}}, 0, 0 },
1384 { "damlr29", 1821, {0, {0}}, 0, 0 },
1385 { "damlr30", 1822, {0, {0}}, 0, 0 },
1386 { "damlr31", 1823, {0, {0}}, 0, 0 },
1387 { "damlr32", 1824, {0, {0}}, 0, 0 },
1388 { "damlr33", 1825, {0, {0}}, 0, 0 },
1389 { "damlr34", 1826, {0, {0}}, 0, 0 },
1390 { "damlr35", 1827, {0, {0}}, 0, 0 },
1391 { "damlr36", 1828, {0, {0}}, 0, 0 },
1392 { "damlr37", 1829, {0, {0}}, 0, 0 },
1393 { "damlr38", 1830, {0, {0}}, 0, 0 },
1394 { "damlr39", 1831, {0, {0}}, 0, 0 },
1395 { "damlr40", 1832, {0, {0}}, 0, 0 },
1396 { "damlr41", 1833, {0, {0}}, 0, 0 },
1397 { "damlr42", 1834, {0, {0}}, 0, 0 },
1398 { "damlr43", 1835, {0, {0}}, 0, 0 },
1399 { "damlr44", 1836, {0, {0}}, 0, 0 },
1400 { "damlr45", 1837, {0, {0}}, 0, 0 },
1401 { "damlr46", 1838, {0, {0}}, 0, 0 },
1402 { "damlr47", 1839, {0, {0}}, 0, 0 },
1403 { "damlr48", 1840, {0, {0}}, 0, 0 },
1404 { "damlr49", 1841, {0, {0}}, 0, 0 },
1405 { "damlr50", 1842, {0, {0}}, 0, 0 },
1406 { "damlr51", 1843, {0, {0}}, 0, 0 },
1407 { "damlr52", 1844, {0, {0}}, 0, 0 },
1408 { "damlr53", 1845, {0, {0}}, 0, 0 },
1409 { "damlr54", 1846, {0, {0}}, 0, 0 },
1410 { "damlr55", 1847, {0, {0}}, 0, 0 },
1411 { "damlr56", 1848, {0, {0}}, 0, 0 },
1412 { "damlr57", 1849, {0, {0}}, 0, 0 },
1413 { "damlr58", 1850, {0, {0}}, 0, 0 },
1414 { "damlr59", 1851, {0, {0}}, 0, 0 },
1415 { "damlr60", 1852, {0, {0}}, 0, 0 },
1416 { "damlr61", 1853, {0, {0}}, 0, 0 },
1417 { "damlr62", 1854, {0, {0}}, 0, 0 },
1418 { "damlr63", 1855, {0, {0}}, 0, 0 },
1419 { "dampr0", 1856, {0, {0}}, 0, 0 },
1420 { "dampr1", 1857, {0, {0}}, 0, 0 },
1421 { "dampr2", 1858, {0, {0}}, 0, 0 },
1422 { "dampr3", 1859, {0, {0}}, 0, 0 },
1423 { "dampr4", 1860, {0, {0}}, 0, 0 },
1424 { "dampr5", 1861, {0, {0}}, 0, 0 },
1425 { "dampr6", 1862, {0, {0}}, 0, 0 },
1426 { "dampr7", 1863, {0, {0}}, 0, 0 },
1427 { "dampr8", 1864, {0, {0}}, 0, 0 },
1428 { "dampr9", 1865, {0, {0}}, 0, 0 },
1429 { "dampr10", 1866, {0, {0}}, 0, 0 },
1430 { "dampr11", 1867, {0, {0}}, 0, 0 },
1431 { "dampr12", 1868, {0, {0}}, 0, 0 },
1432 { "dampr13", 1869, {0, {0}}, 0, 0 },
1433 { "dampr14", 1870, {0, {0}}, 0, 0 },
1434 { "dampr15", 1871, {0, {0}}, 0, 0 },
1435 { "dampr16", 1872, {0, {0}}, 0, 0 },
1436 { "dampr17", 1873, {0, {0}}, 0, 0 },
1437 { "dampr18", 1874, {0, {0}}, 0, 0 },
1438 { "dampr19", 1875, {0, {0}}, 0, 0 },
1439 { "dampr20", 1876, {0, {0}}, 0, 0 },
1440 { "dampr21", 1877, {0, {0}}, 0, 0 },
1441 { "dampr22", 1878, {0, {0}}, 0, 0 },
1442 { "dampr23", 1879, {0, {0}}, 0, 0 },
1443 { "dampr24", 1880, {0, {0}}, 0, 0 },
1444 { "dampr25", 1881, {0, {0}}, 0, 0 },
1445 { "dampr26", 1882, {0, {0}}, 0, 0 },
1446 { "dampr27", 1883, {0, {0}}, 0, 0 },
1447 { "dampr28", 1884, {0, {0}}, 0, 0 },
1448 { "dampr29", 1885, {0, {0}}, 0, 0 },
1449 { "dampr30", 1886, {0, {0}}, 0, 0 },
1450 { "dampr31", 1887, {0, {0}}, 0, 0 },
1451 { "dampr32", 1888, {0, {0}}, 0, 0 },
1452 { "dampr33", 1889, {0, {0}}, 0, 0 },
1453 { "dampr34", 1890, {0, {0}}, 0, 0 },
1454 { "dampr35", 1891, {0, {0}}, 0, 0 },
1455 { "dampr36", 1892, {0, {0}}, 0, 0 },
1456 { "dampr37", 1893, {0, {0}}, 0, 0 },
1457 { "dampr38", 1894, {0, {0}}, 0, 0 },
1458 { "dampr39", 1895, {0, {0}}, 0, 0 },
1459 { "dampr40", 1896, {0, {0}}, 0, 0 },
1460 { "dampr41", 1897, {0, {0}}, 0, 0 },
1461 { "dampr42", 1898, {0, {0}}, 0, 0 },
1462 { "dampr43", 1899, {0, {0}}, 0, 0 },
1463 { "dampr44", 1900, {0, {0}}, 0, 0 },
1464 { "dampr45", 1901, {0, {0}}, 0, 0 },
1465 { "dampr46", 1902, {0, {0}}, 0, 0 },
1466 { "dampr47", 1903, {0, {0}}, 0, 0 },
1467 { "dampr48", 1904, {0, {0}}, 0, 0 },
1468 { "dampr49", 1905, {0, {0}}, 0, 0 },
1469 { "dampr50", 1906, {0, {0}}, 0, 0 },
1470 { "dampr51", 1907, {0, {0}}, 0, 0 },
1471 { "dampr52", 1908, {0, {0}}, 0, 0 },
1472 { "dampr53", 1909, {0, {0}}, 0, 0 },
1473 { "dampr54", 1910, {0, {0}}, 0, 0 },
1474 { "dampr55", 1911, {0, {0}}, 0, 0 },
1475 { "dampr56", 1912, {0, {0}}, 0, 0 },
1476 { "dampr57", 1913, {0, {0}}, 0, 0 },
1477 { "dampr58", 1914, {0, {0}}, 0, 0 },
1478 { "dampr59", 1915, {0, {0}}, 0, 0 },
1479 { "dampr60", 1916, {0, {0}}, 0, 0 },
1480 { "dampr61", 1917, {0, {0}}, 0, 0 },
1481 { "dampr62", 1918, {0, {0}}, 0, 0 },
1482 { "dampr63", 1919, {0, {0}}, 0, 0 },
1483 { "amcr", 1920, {0, {0}}, 0, 0 },
1484 { "stbar", 1921, {0, {0}}, 0, 0 },
1485 { "mmcr", 1922, {0, {0}}, 0, 0 },
1486 { "iamvr1", 1925, {0, {0}}, 0, 0 },
1487 { "damvr1", 1927, {0, {0}}, 0, 0 },
1488 { "cxnr", 1936, {0, {0}}, 0, 0 },
1489 { "ttbr", 1937, {0, {0}}, 0, 0 },
1490 { "tplr", 1938, {0, {0}}, 0, 0 },
1491 { "tppr", 1939, {0, {0}}, 0, 0 },
1492 { "tpxr", 1940, {0, {0}}, 0, 0 },
1493 { "timerh", 1952, {0, {0}}, 0, 0 },
1494 { "timerl", 1953, {0, {0}}, 0, 0 },
1495 { "timerd", 1954, {0, {0}}, 0, 0 },
1496 { "dcr", 2048, {0, {0}}, 0, 0 },
1497 { "brr", 2049, {0, {0}}, 0, 0 },
1498 { "nmar", 2050, {0, {0}}, 0, 0 },
1499 { "btbr", 2051, {0, {0}}, 0, 0 },
1500 { "ibar0", 2052, {0, {0}}, 0, 0 },
1501 { "ibar1", 2053, {0, {0}}, 0, 0 },
1502 { "ibar2", 2054, {0, {0}}, 0, 0 },
1503 { "ibar3", 2055, {0, {0}}, 0, 0 },
1504 { "dbar0", 2056, {0, {0}}, 0, 0 },
1505 { "dbar1", 2057, {0, {0}}, 0, 0 },
1506 { "dbar2", 2058, {0, {0}}, 0, 0 },
1507 { "dbar3", 2059, {0, {0}}, 0, 0 },
1508 { "dbdr00", 2060, {0, {0}}, 0, 0 },
1509 { "dbdr01", 2061, {0, {0}}, 0, 0 },
1510 { "dbdr02", 2062, {0, {0}}, 0, 0 },
1511 { "dbdr03", 2063, {0, {0}}, 0, 0 },
1512 { "dbdr10", 2064, {0, {0}}, 0, 0 },
1513 { "dbdr11", 2065, {0, {0}}, 0, 0 },
1514 { "dbdr12", 2066, {0, {0}}, 0, 0 },
1515 { "dbdr13", 2067, {0, {0}}, 0, 0 },
1516 { "dbdr20", 2068, {0, {0}}, 0, 0 },
1517 { "dbdr21", 2069, {0, {0}}, 0, 0 },
1518 { "dbdr22", 2070, {0, {0}}, 0, 0 },
1519 { "dbdr23", 2071, {0, {0}}, 0, 0 },
1520 { "dbdr30", 2072, {0, {0}}, 0, 0 },
1521 { "dbdr31", 2073, {0, {0}}, 0, 0 },
1522 { "dbdr32", 2074, {0, {0}}, 0, 0 },
1523 { "dbdr33", 2075, {0, {0}}, 0, 0 },
1524 { "dbmr00", 2076, {0, {0}}, 0, 0 },
1525 { "dbmr01", 2077, {0, {0}}, 0, 0 },
1526 { "dbmr02", 2078, {0, {0}}, 0, 0 },
1527 { "dbmr03", 2079, {0, {0}}, 0, 0 },
1528 { "dbmr10", 2080, {0, {0}}, 0, 0 },
1529 { "dbmr11", 2081, {0, {0}}, 0, 0 },
1530 { "dbmr12", 2082, {0, {0}}, 0, 0 },
1531 { "dbmr13", 2083, {0, {0}}, 0, 0 },
1532 { "dbmr20", 2084, {0, {0}}, 0, 0 },
1533 { "dbmr21", 2085, {0, {0}}, 0, 0 },
1534 { "dbmr22", 2086, {0, {0}}, 0, 0 },
1535 { "dbmr23", 2087, {0, {0}}, 0, 0 },
1536 { "dbmr30", 2088, {0, {0}}, 0, 0 },
1537 { "dbmr31", 2089, {0, {0}}, 0, 0 },
1538 { "dbmr32", 2090, {0, {0}}, 0, 0 },
1539 { "dbmr33", 2091, {0, {0}}, 0, 0 },
1540 { "cpcfr", 2092, {0, {0}}, 0, 0 },
1541 { "cpcr", 2093, {0, {0}}, 0, 0 },
1542 { "cpsr", 2094, {0, {0}}, 0, 0 },
1543 { "cpesr0", 2096, {0, {0}}, 0, 0 },
1544 { "cpesr1", 2097, {0, {0}}, 0, 0 },
1545 { "cpemr0", 2098, {0, {0}}, 0, 0 },
1546 { "cpemr1", 2099, {0, {0}}, 0, 0 },
1547 { "ihsr8", 3848, {0, {0}}, 0, 0 }
1548 };
1549
1550 CGEN_KEYWORD frv_cgen_opval_spr_names =
1551 {
1552 & frv_cgen_opval_spr_names_entries[0],
1553 1022,
1554 0, 0, 0, 0, ""
1555 };
1556
1557 static CGEN_KEYWORD_ENTRY frv_cgen_opval_accg_names_entries[] =
1558 {
1559 { "accg0", 0, {0, {0}}, 0, 0 },
1560 { "accg1", 1, {0, {0}}, 0, 0 },
1561 { "accg2", 2, {0, {0}}, 0, 0 },
1562 { "accg3", 3, {0, {0}}, 0, 0 },
1563 { "accg4", 4, {0, {0}}, 0, 0 },
1564 { "accg5", 5, {0, {0}}, 0, 0 },
1565 { "accg6", 6, {0, {0}}, 0, 0 },
1566 { "accg7", 7, {0, {0}}, 0, 0 },
1567 { "accg8", 8, {0, {0}}, 0, 0 },
1568 { "accg9", 9, {0, {0}}, 0, 0 },
1569 { "accg10", 10, {0, {0}}, 0, 0 },
1570 { "accg11", 11, {0, {0}}, 0, 0 },
1571 { "accg12", 12, {0, {0}}, 0, 0 },
1572 { "accg13", 13, {0, {0}}, 0, 0 },
1573 { "accg14", 14, {0, {0}}, 0, 0 },
1574 { "accg15", 15, {0, {0}}, 0, 0 },
1575 { "accg16", 16, {0, {0}}, 0, 0 },
1576 { "accg17", 17, {0, {0}}, 0, 0 },
1577 { "accg18", 18, {0, {0}}, 0, 0 },
1578 { "accg19", 19, {0, {0}}, 0, 0 },
1579 { "accg20", 20, {0, {0}}, 0, 0 },
1580 { "accg21", 21, {0, {0}}, 0, 0 },
1581 { "accg22", 22, {0, {0}}, 0, 0 },
1582 { "accg23", 23, {0, {0}}, 0, 0 },
1583 { "accg24", 24, {0, {0}}, 0, 0 },
1584 { "accg25", 25, {0, {0}}, 0, 0 },
1585 { "accg26", 26, {0, {0}}, 0, 0 },
1586 { "accg27", 27, {0, {0}}, 0, 0 },
1587 { "accg28", 28, {0, {0}}, 0, 0 },
1588 { "accg29", 29, {0, {0}}, 0, 0 },
1589 { "accg30", 30, {0, {0}}, 0, 0 },
1590 { "accg31", 31, {0, {0}}, 0, 0 },
1591 { "accg32", 32, {0, {0}}, 0, 0 },
1592 { "accg33", 33, {0, {0}}, 0, 0 },
1593 { "accg34", 34, {0, {0}}, 0, 0 },
1594 { "accg35", 35, {0, {0}}, 0, 0 },
1595 { "accg36", 36, {0, {0}}, 0, 0 },
1596 { "accg37", 37, {0, {0}}, 0, 0 },
1597 { "accg38", 38, {0, {0}}, 0, 0 },
1598 { "accg39", 39, {0, {0}}, 0, 0 },
1599 { "accg40", 40, {0, {0}}, 0, 0 },
1600 { "accg41", 41, {0, {0}}, 0, 0 },
1601 { "accg42", 42, {0, {0}}, 0, 0 },
1602 { "accg43", 43, {0, {0}}, 0, 0 },
1603 { "accg44", 44, {0, {0}}, 0, 0 },
1604 { "accg45", 45, {0, {0}}, 0, 0 },
1605 { "accg46", 46, {0, {0}}, 0, 0 },
1606 { "accg47", 47, {0, {0}}, 0, 0 },
1607 { "accg48", 48, {0, {0}}, 0, 0 },
1608 { "accg49", 49, {0, {0}}, 0, 0 },
1609 { "accg50", 50, {0, {0}}, 0, 0 },
1610 { "accg51", 51, {0, {0}}, 0, 0 },
1611 { "accg52", 52, {0, {0}}, 0, 0 },
1612 { "accg53", 53, {0, {0}}, 0, 0 },
1613 { "accg54", 54, {0, {0}}, 0, 0 },
1614 { "accg55", 55, {0, {0}}, 0, 0 },
1615 { "accg56", 56, {0, {0}}, 0, 0 },
1616 { "accg57", 57, {0, {0}}, 0, 0 },
1617 { "accg58", 58, {0, {0}}, 0, 0 },
1618 { "accg59", 59, {0, {0}}, 0, 0 },
1619 { "accg60", 60, {0, {0}}, 0, 0 },
1620 { "accg61", 61, {0, {0}}, 0, 0 },
1621 { "accg62", 62, {0, {0}}, 0, 0 },
1622 { "accg63", 63, {0, {0}}, 0, 0 }
1623 };
1624
1625 CGEN_KEYWORD frv_cgen_opval_accg_names =
1626 {
1627 & frv_cgen_opval_accg_names_entries[0],
1628 64,
1629 0, 0, 0, 0, ""
1630 };
1631
1632 static CGEN_KEYWORD_ENTRY frv_cgen_opval_acc_names_entries[] =
1633 {
1634 { "acc0", 0, {0, {0}}, 0, 0 },
1635 { "acc1", 1, {0, {0}}, 0, 0 },
1636 { "acc2", 2, {0, {0}}, 0, 0 },
1637 { "acc3", 3, {0, {0}}, 0, 0 },
1638 { "acc4", 4, {0, {0}}, 0, 0 },
1639 { "acc5", 5, {0, {0}}, 0, 0 },
1640 { "acc6", 6, {0, {0}}, 0, 0 },
1641 { "acc7", 7, {0, {0}}, 0, 0 },
1642 { "acc8", 8, {0, {0}}, 0, 0 },
1643 { "acc9", 9, {0, {0}}, 0, 0 },
1644 { "acc10", 10, {0, {0}}, 0, 0 },
1645 { "acc11", 11, {0, {0}}, 0, 0 },
1646 { "acc12", 12, {0, {0}}, 0, 0 },
1647 { "acc13", 13, {0, {0}}, 0, 0 },
1648 { "acc14", 14, {0, {0}}, 0, 0 },
1649 { "acc15", 15, {0, {0}}, 0, 0 },
1650 { "acc16", 16, {0, {0}}, 0, 0 },
1651 { "acc17", 17, {0, {0}}, 0, 0 },
1652 { "acc18", 18, {0, {0}}, 0, 0 },
1653 { "acc19", 19, {0, {0}}, 0, 0 },
1654 { "acc20", 20, {0, {0}}, 0, 0 },
1655 { "acc21", 21, {0, {0}}, 0, 0 },
1656 { "acc22", 22, {0, {0}}, 0, 0 },
1657 { "acc23", 23, {0, {0}}, 0, 0 },
1658 { "acc24", 24, {0, {0}}, 0, 0 },
1659 { "acc25", 25, {0, {0}}, 0, 0 },
1660 { "acc26", 26, {0, {0}}, 0, 0 },
1661 { "acc27", 27, {0, {0}}, 0, 0 },
1662 { "acc28", 28, {0, {0}}, 0, 0 },
1663 { "acc29", 29, {0, {0}}, 0, 0 },
1664 { "acc30", 30, {0, {0}}, 0, 0 },
1665 { "acc31", 31, {0, {0}}, 0, 0 },
1666 { "acc32", 32, {0, {0}}, 0, 0 },
1667 { "acc33", 33, {0, {0}}, 0, 0 },
1668 { "acc34", 34, {0, {0}}, 0, 0 },
1669 { "acc35", 35, {0, {0}}, 0, 0 },
1670 { "acc36", 36, {0, {0}}, 0, 0 },
1671 { "acc37", 37, {0, {0}}, 0, 0 },
1672 { "acc38", 38, {0, {0}}, 0, 0 },
1673 { "acc39", 39, {0, {0}}, 0, 0 },
1674 { "acc40", 40, {0, {0}}, 0, 0 },
1675 { "acc41", 41, {0, {0}}, 0, 0 },
1676 { "acc42", 42, {0, {0}}, 0, 0 },
1677 { "acc43", 43, {0, {0}}, 0, 0 },
1678 { "acc44", 44, {0, {0}}, 0, 0 },
1679 { "acc45", 45, {0, {0}}, 0, 0 },
1680 { "acc46", 46, {0, {0}}, 0, 0 },
1681 { "acc47", 47, {0, {0}}, 0, 0 },
1682 { "acc48", 48, {0, {0}}, 0, 0 },
1683 { "acc49", 49, {0, {0}}, 0, 0 },
1684 { "acc50", 50, {0, {0}}, 0, 0 },
1685 { "acc51", 51, {0, {0}}, 0, 0 },
1686 { "acc52", 52, {0, {0}}, 0, 0 },
1687 { "acc53", 53, {0, {0}}, 0, 0 },
1688 { "acc54", 54, {0, {0}}, 0, 0 },
1689 { "acc55", 55, {0, {0}}, 0, 0 },
1690 { "acc56", 56, {0, {0}}, 0, 0 },
1691 { "acc57", 57, {0, {0}}, 0, 0 },
1692 { "acc58", 58, {0, {0}}, 0, 0 },
1693 { "acc59", 59, {0, {0}}, 0, 0 },
1694 { "acc60", 60, {0, {0}}, 0, 0 },
1695 { "acc61", 61, {0, {0}}, 0, 0 },
1696 { "acc62", 62, {0, {0}}, 0, 0 },
1697 { "acc63", 63, {0, {0}}, 0, 0 }
1698 };
1699
1700 CGEN_KEYWORD frv_cgen_opval_acc_names =
1701 {
1702 & frv_cgen_opval_acc_names_entries[0],
1703 64,
1704 0, 0, 0, 0, ""
1705 };
1706
1707 static CGEN_KEYWORD_ENTRY frv_cgen_opval_iacc0_names_entries[] =
1708 {
1709 { "iacc0", 0, {0, {0}}, 0, 0 }
1710 };
1711
1712 CGEN_KEYWORD frv_cgen_opval_iacc0_names =
1713 {
1714 & frv_cgen_opval_iacc0_names_entries[0],
1715 1,
1716 0, 0, 0, 0, ""
1717 };
1718
1719 static CGEN_KEYWORD_ENTRY frv_cgen_opval_iccr_names_entries[] =
1720 {
1721 { "icc0", 0, {0, {0}}, 0, 0 },
1722 { "icc1", 1, {0, {0}}, 0, 0 },
1723 { "icc2", 2, {0, {0}}, 0, 0 },
1724 { "icc3", 3, {0, {0}}, 0, 0 }
1725 };
1726
1727 CGEN_KEYWORD frv_cgen_opval_iccr_names =
1728 {
1729 & frv_cgen_opval_iccr_names_entries[0],
1730 4,
1731 0, 0, 0, 0, ""
1732 };
1733
1734 static CGEN_KEYWORD_ENTRY frv_cgen_opval_fccr_names_entries[] =
1735 {
1736 { "fcc0", 0, {0, {0}}, 0, 0 },
1737 { "fcc1", 1, {0, {0}}, 0, 0 },
1738 { "fcc2", 2, {0, {0}}, 0, 0 },
1739 { "fcc3", 3, {0, {0}}, 0, 0 }
1740 };
1741
1742 CGEN_KEYWORD frv_cgen_opval_fccr_names =
1743 {
1744 & frv_cgen_opval_fccr_names_entries[0],
1745 4,
1746 0, 0, 0, 0, ""
1747 };
1748
1749 static CGEN_KEYWORD_ENTRY frv_cgen_opval_cccr_names_entries[] =
1750 {
1751 { "cc0", 0, {0, {0}}, 0, 0 },
1752 { "cc1", 1, {0, {0}}, 0, 0 },
1753 { "cc2", 2, {0, {0}}, 0, 0 },
1754 { "cc3", 3, {0, {0}}, 0, 0 },
1755 { "cc4", 4, {0, {0}}, 0, 0 },
1756 { "cc5", 5, {0, {0}}, 0, 0 },
1757 { "cc6", 6, {0, {0}}, 0, 0 },
1758 { "cc7", 7, {0, {0}}, 0, 0 }
1759 };
1760
1761 CGEN_KEYWORD frv_cgen_opval_cccr_names =
1762 {
1763 & frv_cgen_opval_cccr_names_entries[0],
1764 8,
1765 0, 0, 0, 0, ""
1766 };
1767
1768 static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_pack_entries[] =
1769 {
1770 { "", 1, {0, {0}}, 0, 0 },
1771 { ".p", 0, {0, {0}}, 0, 0 },
1772 { ".P", 0, {0, {0}}, 0, 0 }
1773 };
1774
1775 CGEN_KEYWORD frv_cgen_opval_h_pack =
1776 {
1777 & frv_cgen_opval_h_pack_entries[0],
1778 3,
1779 0, 0, 0, 0, ""
1780 };
1781
1782 static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_taken_entries[] =
1783 {
1784 { "", 2, {0, {0}}, 0, 0 },
1785 { "", 0, {0, {0}}, 0, 0 },
1786 { "", 1, {0, {0}}, 0, 0 },
1787 { "", 3, {0, {0}}, 0, 0 }
1788 };
1789
1790 CGEN_KEYWORD frv_cgen_opval_h_hint_taken =
1791 {
1792 & frv_cgen_opval_h_hint_taken_entries[0],
1793 4,
1794 0, 0, 0, 0, ""
1795 };
1796
1797 static CGEN_KEYWORD_ENTRY frv_cgen_opval_h_hint_not_taken_entries[] =
1798 {
1799 { "", 0, {0, {0}}, 0, 0 },
1800 { "", 1, {0, {0}}, 0, 0 },
1801 { "", 2, {0, {0}}, 0, 0 },
1802 { "", 3, {0, {0}}, 0, 0 }
1803 };
1804
1805 CGEN_KEYWORD frv_cgen_opval_h_hint_not_taken =
1806 {
1807 & frv_cgen_opval_h_hint_not_taken_entries[0],
1808 4,
1809 0, 0, 0, 0, ""
1810 };
1811
1812
1813 /* The hardware table. */
1814
1815 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1816 #define A(a) (1 << CGEN_HW_##a)
1817 #else
1818 #define A(a) (1 << CGEN_HW_/**/a)
1819 #endif
1820
1821 const CGEN_HW_ENTRY frv_cgen_hw_table[] =
1822 {
1823 { "h-memory", HW_H_MEMORY, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1824 { "h-sint", HW_H_SINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1825 { "h-uint", HW_H_UINT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1826 { "h-addr", HW_H_ADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1827 { "h-iaddr", HW_H_IADDR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1828 { "h-reloc-ann", HW_H_RELOC_ANN, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1829 { "h-pc", HW_H_PC, CGEN_ASM_NONE, 0, { 0|A(PROFILE)|A(PC), { (1<<MACH_BASE) } } },
1830 { "h-psr_imple", HW_H_PSR_IMPLE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1831 { "h-psr_ver", HW_H_PSR_VER, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1832 { "h-psr_ice", HW_H_PSR_ICE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1833 { "h-psr_nem", HW_H_PSR_NEM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1834 { "h-psr_cm", HW_H_PSR_CM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1835 { "h-psr_be", HW_H_PSR_BE, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1836 { "h-psr_esr", HW_H_PSR_ESR, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1837 { "h-psr_ef", HW_H_PSR_EF, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1838 { "h-psr_em", HW_H_PSR_EM, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1839 { "h-psr_pil", HW_H_PSR_PIL, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1840 { "h-psr_ps", HW_H_PSR_PS, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1841 { "h-psr_et", HW_H_PSR_ET, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1842 { "h-psr_s", HW_H_PSR_S, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1843 { "h-tbr_tba", HW_H_TBR_TBA, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1844 { "h-tbr_tt", HW_H_TBR_TT, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1845 { "h-bpsr_bs", HW_H_BPSR_BS, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1846 { "h-bpsr_bet", HW_H_BPSR_BET, CGEN_ASM_NONE, 0, { 0, { (1<<MACH_BASE) } } },
1847 { "h-gr", HW_H_GR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1848 { "h-gr_double", HW_H_GR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1849 { "h-gr_hi", HW_H_GR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1850 { "h-gr_lo", HW_H_GR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_gr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1851 { "h-fr", HW_H_FR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1852 { "h-fr_double", HW_H_FR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1853 { "h-fr_int", HW_H_FR_INT, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1854 { "h-fr_hi", HW_H_FR_HI, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1855 { "h-fr_lo", HW_H_FR_LO, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1856 { "h-fr_0", HW_H_FR_0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1857 { "h-fr_1", HW_H_FR_1, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1858 { "h-fr_2", HW_H_FR_2, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1859 { "h-fr_3", HW_H_FR_3, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1860 { "h-cpr", HW_H_CPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(PROFILE), { (1<<MACH_FRV) } } },
1861 { "h-cpr_double", HW_H_CPR_DOUBLE, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cpr_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_FRV) } } },
1862 { "h-spr", HW_H_SPR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_spr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1863 { "h-accg", HW_H_ACCG, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_accg_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1864 { "h-acc40S", HW_H_ACC40S, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1865 { "h-acc40U", HW_H_ACC40U, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_acc_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_BASE) } } },
1866 { "h-iacc0", HW_H_IACC0, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iacc0_names, { 0|A(VIRTUAL)|A(PROFILE), { (1<<MACH_FR400)|(1<<MACH_FR450) } } },
1867 { "h-iccr", HW_H_ICCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_iccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1868 { "h-fccr", HW_H_FCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_fccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1869 { "h-cccr", HW_H_CCCR, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_cccr_names, { 0|A(PROFILE), { (1<<MACH_BASE) } } },
1870 { "h-pack", HW_H_PACK, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_pack, { 0, { (1<<MACH_BASE) } } },
1871 { "h-hint-taken", HW_H_HINT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_taken, { 0, { (1<<MACH_BASE) } } },
1872 { "h-hint-not-taken", HW_H_HINT_NOT_TAKEN, CGEN_ASM_KEYWORD, (PTR) & frv_cgen_opval_h_hint_not_taken, { 0, { (1<<MACH_BASE) } } },
1873 { 0, 0, CGEN_ASM_NONE, 0, {0, {0}} }
1874 };
1875
1876 #undef A
1877
1878
1879 /* The instruction field table. */
1880
1881 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
1882 #define A(a) (1 << CGEN_IFLD_##a)
1883 #else
1884 #define A(a) (1 << CGEN_IFLD_/**/a)
1885 #endif
1886
1887 const CGEN_IFLD frv_cgen_ifld_table[] =
1888 {
1889 { FRV_F_NIL, "f-nil", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
1890 { FRV_F_ANYOF, "f-anyof", 0, 0, 0, 0, { 0, { (1<<MACH_BASE) } } },
1891 { FRV_F_PACK, "f-pack", 0, 32, 31, 1, { 0, { (1<<MACH_BASE) } } },
1892 { FRV_F_OP, "f-op", 0, 32, 24, 7, { 0, { (1<<MACH_BASE) } } },
1893 { FRV_F_OPE1, "f-ope1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE) } } },
1894 { FRV_F_OPE2, "f-ope2", 0, 32, 9, 4, { 0, { (1<<MACH_BASE) } } },
1895 { FRV_F_OPE3, "f-ope3", 0, 32, 15, 3, { 0, { (1<<MACH_BASE) } } },
1896 { FRV_F_OPE4, "f-ope4", 0, 32, 7, 2, { 0, { (1<<MACH_BASE) } } },
1897 { FRV_F_GRI, "f-GRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1898 { FRV_F_GRJ, "f-GRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1899 { FRV_F_GRK, "f-GRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1900 { FRV_F_FRI, "f-FRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1901 { FRV_F_FRJ, "f-FRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1902 { FRV_F_FRK, "f-FRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1903 { FRV_F_CPRI, "f-CPRi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1904 { FRV_F_CPRJ, "f-CPRj", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1905 { FRV_F_CPRK, "f-CPRk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1906 { FRV_F_ACCGI, "f-ACCGi", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1907 { FRV_F_ACCGK, "f-ACCGk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1908 { FRV_F_ACC40SI, "f-ACC40Si", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1909 { FRV_F_ACC40UI, "f-ACC40Ui", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1910 { FRV_F_ACC40SK, "f-ACC40Sk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1911 { FRV_F_ACC40UK, "f-ACC40Uk", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1912 { FRV_F_CRI, "f-CRi", 0, 32, 14, 3, { 0, { (1<<MACH_BASE) } } },
1913 { FRV_F_CRJ, "f-CRj", 0, 32, 2, 3, { 0, { (1<<MACH_BASE) } } },
1914 { FRV_F_CRK, "f-CRk", 0, 32, 27, 3, { 0, { (1<<MACH_BASE) } } },
1915 { FRV_F_CCI, "f-CCi", 0, 32, 11, 3, { 0, { (1<<MACH_BASE) } } },
1916 { FRV_F_CRJ_INT, "f-CRj_int", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1917 { FRV_F_CRJ_FLOAT, "f-CRj_float", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1918 { FRV_F_ICCI_1, "f-ICCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE) } } },
1919 { FRV_F_ICCI_2, "f-ICCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1920 { FRV_F_ICCI_3, "f-ICCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE) } } },
1921 { FRV_F_FCCI_1, "f-FCCi_1", 0, 32, 11, 2, { 0, { (1<<MACH_BASE) } } },
1922 { FRV_F_FCCI_2, "f-FCCi_2", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1923 { FRV_F_FCCI_3, "f-FCCi_3", 0, 32, 1, 2, { 0, { (1<<MACH_BASE) } } },
1924 { FRV_F_FCCK, "f-FCCk", 0, 32, 26, 2, { 0, { (1<<MACH_BASE) } } },
1925 { FRV_F_EIR, "f-eir", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1926 { FRV_F_S10, "f-s10", 0, 32, 9, 10, { 0, { (1<<MACH_BASE) } } },
1927 { FRV_F_S12, "f-s12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE) } } },
1928 { FRV_F_D12, "f-d12", 0, 32, 11, 12, { 0, { (1<<MACH_BASE) } } },
1929 { FRV_F_U16, "f-u16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
1930 { FRV_F_S16, "f-s16", 0, 32, 15, 16, { 0, { (1<<MACH_BASE) } } },
1931 { FRV_F_S6, "f-s6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1932 { FRV_F_S6_1, "f-s6_1", 0, 32, 11, 6, { 0, { (1<<MACH_BASE) } } },
1933 { FRV_F_U6, "f-u6", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1934 { FRV_F_S5, "f-s5", 0, 32, 4, 5, { 0, { (1<<MACH_BASE) } } },
1935 { FRV_F_U12_H, "f-u12-h", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1936 { FRV_F_U12_L, "f-u12-l", 0, 32, 5, 6, { 0, { (1<<MACH_BASE) } } },
1937 { FRV_F_U12, "f-u12", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
1938 { FRV_F_INT_CC, "f-int-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE) } } },
1939 { FRV_F_FLT_CC, "f-flt-cc", 0, 32, 30, 4, { 0, { (1<<MACH_BASE) } } },
1940 { FRV_F_COND, "f-cond", 0, 32, 8, 1, { 0, { (1<<MACH_BASE) } } },
1941 { FRV_F_CCOND, "f-ccond", 0, 32, 12, 1, { 0, { (1<<MACH_BASE) } } },
1942 { FRV_F_HINT, "f-hint", 0, 32, 17, 2, { 0, { (1<<MACH_BASE) } } },
1943 { FRV_F_LI, "f-LI", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1944 { FRV_F_LOCK, "f-lock", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1945 { FRV_F_DEBUG, "f-debug", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1946 { FRV_F_A, "f-A", 0, 32, 17, 1, { 0, { (1<<MACH_BASE) } } },
1947 { FRV_F_AE, "f-ae", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1948 { FRV_F_SPR_H, "f-spr-h", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1949 { FRV_F_SPR_L, "f-spr-l", 0, 32, 17, 6, { 0, { (1<<MACH_BASE) } } },
1950 { FRV_F_SPR, "f-spr", 0, 0, 0, 0,{ 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
1951 { FRV_F_LABEL16, "f-label16", 0, 32, 15, 16, { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
1952 { FRV_F_LABELH6, "f-labelH6", 0, 32, 30, 6, { 0, { (1<<MACH_BASE) } } },
1953 { FRV_F_LABELL18, "f-labelL18", 0, 32, 17, 18, { 0, { (1<<MACH_BASE) } } },
1954 { FRV_F_LABEL24, "f-label24", 0, 0, 0, 0,{ 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } } },
1955 { FRV_F_LRAE, "f-LRAE", 0, 32, 5, 1, { 0, { (1<<MACH_BASE) } } },
1956 { FRV_F_LRAD, "f-LRAD", 0, 32, 4, 1, { 0, { (1<<MACH_BASE) } } },
1957 { FRV_F_LRAS, "f-LRAS", 0, 32, 3, 1, { 0, { (1<<MACH_BASE) } } },
1958 { FRV_F_TLBPROPX, "f-TLBPRopx", 0, 32, 28, 3, { 0, { (1<<MACH_BASE) } } },
1959 { FRV_F_TLBPRL, "f-TLBPRL", 0, 32, 25, 1, { 0, { (1<<MACH_BASE) } } },
1960 { FRV_F_ICCI_1_NULL, "f-ICCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1961 { FRV_F_ICCI_2_NULL, "f-ICCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1962 { FRV_F_ICCI_3_NULL, "f-ICCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1963 { FRV_F_FCCI_1_NULL, "f-FCCi_1-null", 0, 32, 11, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1964 { FRV_F_FCCI_2_NULL, "f-FCCi_2-null", 0, 32, 26, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1965 { FRV_F_FCCI_3_NULL, "f-FCCi_3-null", 0, 32, 1, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1966 { FRV_F_RS_NULL, "f-rs-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1967 { FRV_F_GRI_NULL, "f-GRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1968 { FRV_F_GRJ_NULL, "f-GRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1969 { FRV_F_GRK_NULL, "f-GRk-null", 0, 32, 30, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1970 { FRV_F_FRI_NULL, "f-FRi-null", 0, 32, 17, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1971 { FRV_F_FRJ_NULL, "f-FRj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1972 { FRV_F_ACCJ_NULL, "f-ACCj-null", 0, 32, 5, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1973 { FRV_F_RD_NULL, "f-rd-null", 0, 32, 30, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1974 { FRV_F_COND_NULL, "f-cond-null", 0, 32, 30, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1975 { FRV_F_CCOND_NULL, "f-ccond-null", 0, 32, 12, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1976 { FRV_F_S12_NULL, "f-s12-null", 0, 32, 11, 12, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1977 { FRV_F_LABEL16_NULL, "f-label16-null", 0, 32, 15, 16, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1978 { FRV_F_MISC_NULL_1, "f-misc-null-1", 0, 32, 30, 5, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1979 { FRV_F_MISC_NULL_2, "f-misc-null-2", 0, 32, 11, 6, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1980 { FRV_F_MISC_NULL_3, "f-misc-null-3", 0, 32, 11, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1981 { FRV_F_MISC_NULL_4, "f-misc-null-4", 0, 32, 17, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1982 { FRV_F_MISC_NULL_5, "f-misc-null-5", 0, 32, 17, 16, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1983 { FRV_F_MISC_NULL_6, "f-misc-null-6", 0, 32, 30, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1984 { FRV_F_MISC_NULL_7, "f-misc-null-7", 0, 32, 17, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1985 { FRV_F_MISC_NULL_8, "f-misc-null-8", 0, 32, 5, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1986 { FRV_F_MISC_NULL_9, "f-misc-null-9", 0, 32, 5, 4, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1987 { FRV_F_MISC_NULL_10, "f-misc-null-10", 0, 32, 16, 5, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1988 { FRV_F_MISC_NULL_11, "f-misc-null-11", 0, 32, 5, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1989 { FRV_F_LRA_NULL, "f-LRA-null", 0, 32, 2, 3, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1990 { FRV_F_TLBPR_NULL, "f-TLBPR-null", 0, 32, 30, 2, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1991 { FRV_F_LI_OFF, "f-LI-off", 0, 32, 25, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1992 { FRV_F_LI_ON, "f-LI-on", 0, 32, 25, 1, { 0|A(RESERVED), { (1<<MACH_BASE) } } },
1993 { FRV_F_RELOC_ANN, "f-reloc-ann", 0, 32, 0, 0, { 0, { (1<<MACH_BASE) } } },
1994 { 0, 0, 0, 0, 0, 0, {0, {0}} }
1995 };
1996
1997 #undef A
1998
1999
2000
2001 /* multi ifield declarations */
2002
2003 const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD [];
2004 const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD [];
2005 const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [];
2006
2007
2008 /* multi ifield definitions */
2009
2010 const CGEN_MAYBE_MULTI_IFLD FRV_F_U12_MULTI_IFIELD [] =
2011 {
2012 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U12_H] } },
2013 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U12_L] } },
2014 { 0, { (const PTR) 0 } }
2015 };
2016 const CGEN_MAYBE_MULTI_IFLD FRV_F_SPR_MULTI_IFIELD [] =
2017 {
2018 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_SPR_H] } },
2019 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_SPR_L] } },
2020 { 0, { (const PTR) 0 } }
2021 };
2022 const CGEN_MAYBE_MULTI_IFLD FRV_F_LABEL24_MULTI_IFIELD [] =
2023 {
2024 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABELH6] } },
2025 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABELL18] } },
2026 { 0, { (const PTR) 0 } }
2027 };
2028
2029 /* The operand table. */
2030
2031 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
2032 #define A(a) (1 << CGEN_OPERAND_##a)
2033 #else
2034 #define A(a) (1 << CGEN_OPERAND_/**/a)
2035 #endif
2036 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
2037 #define OPERAND(op) FRV_OPERAND_##op
2038 #else
2039 #define OPERAND(op) FRV_OPERAND_/**/op
2040 #endif
2041
2042 const CGEN_OPERAND frv_cgen_operand_table[] =
2043 {
2044 /* pc: program counter */
2045 { "pc", FRV_OPERAND_PC, HW_H_PC, 0, 0,
2046 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_NIL] } },
2047 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2048 /* pack: packing bit */
2049 { "pack", FRV_OPERAND_PACK, HW_H_PACK, 31, 1,
2050 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_PACK] } },
2051 { 0, { (1<<MACH_BASE) } } },
2052 /* GRi: source register 1 */
2053 { "GRi", FRV_OPERAND_GRI, HW_H_GR, 17, 6,
2054 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRI] } },
2055 { 0, { (1<<MACH_BASE) } } },
2056 /* GRj: source register 2 */
2057 { "GRj", FRV_OPERAND_GRJ, HW_H_GR, 5, 6,
2058 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRJ] } },
2059 { 0, { (1<<MACH_BASE) } } },
2060 /* GRk: destination register */
2061 { "GRk", FRV_OPERAND_GRK, HW_H_GR, 30, 6,
2062 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
2063 { 0, { (1<<MACH_BASE) } } },
2064 /* GRkhi: destination register */
2065 { "GRkhi", FRV_OPERAND_GRKHI, HW_H_GR_HI, 30, 6,
2066 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
2067 { 0, { (1<<MACH_BASE) } } },
2068 /* GRklo: destination register */
2069 { "GRklo", FRV_OPERAND_GRKLO, HW_H_GR_LO, 30, 6,
2070 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
2071 { 0, { (1<<MACH_BASE) } } },
2072 /* GRdoublek: destination register */
2073 { "GRdoublek", FRV_OPERAND_GRDOUBLEK, HW_H_GR_DOUBLE, 30, 6,
2074 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_GRK] } },
2075 { 0, { (1<<MACH_BASE) } } },
2076 /* ACC40Si: signed accumulator */
2077 { "ACC40Si", FRV_OPERAND_ACC40SI, HW_H_ACC40S, 17, 6,
2078 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SI] } },
2079 { 0, { (1<<MACH_BASE) } } },
2080 /* ACC40Ui: unsigned accumulator */
2081 { "ACC40Ui", FRV_OPERAND_ACC40UI, HW_H_ACC40U, 17, 6,
2082 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UI] } },
2083 { 0, { (1<<MACH_BASE) } } },
2084 /* ACC40Sk: target accumulator */
2085 { "ACC40Sk", FRV_OPERAND_ACC40SK, HW_H_ACC40S, 30, 6,
2086 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40SK] } },
2087 { 0, { (1<<MACH_BASE) } } },
2088 /* ACC40Uk: target accumulator */
2089 { "ACC40Uk", FRV_OPERAND_ACC40UK, HW_H_ACC40U, 30, 6,
2090 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACC40UK] } },
2091 { 0, { (1<<MACH_BASE) } } },
2092 /* ACCGi: source register */
2093 { "ACCGi", FRV_OPERAND_ACCGI, HW_H_ACCG, 17, 6,
2094 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGI] } },
2095 { 0, { (1<<MACH_BASE) } } },
2096 /* ACCGk: target register */
2097 { "ACCGk", FRV_OPERAND_ACCGK, HW_H_ACCG, 30, 6,
2098 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ACCGK] } },
2099 { 0, { (1<<MACH_BASE) } } },
2100 /* CPRi: source register */
2101 { "CPRi", FRV_OPERAND_CPRI, HW_H_CPR, 17, 6,
2102 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRI] } },
2103 { 0, { (1<<MACH_FRV) } } },
2104 /* CPRj: source register */
2105 { "CPRj", FRV_OPERAND_CPRJ, HW_H_CPR, 5, 6,
2106 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRJ] } },
2107 { 0, { (1<<MACH_FRV) } } },
2108 /* CPRk: destination register */
2109 { "CPRk", FRV_OPERAND_CPRK, HW_H_CPR, 30, 6,
2110 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
2111 { 0, { (1<<MACH_FRV) } } },
2112 /* CPRdoublek: destination register */
2113 { "CPRdoublek", FRV_OPERAND_CPRDOUBLEK, HW_H_CPR_DOUBLE, 30, 6,
2114 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CPRK] } },
2115 { 0, { (1<<MACH_FRV) } } },
2116 /* FRinti: source register 1 */
2117 { "FRinti", FRV_OPERAND_FRINTI, HW_H_FR_INT, 17, 6,
2118 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
2119 { 0, { (1<<MACH_BASE) } } },
2120 /* FRintj: source register 2 */
2121 { "FRintj", FRV_OPERAND_FRINTJ, HW_H_FR_INT, 5, 6,
2122 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
2123 { 0, { (1<<MACH_BASE) } } },
2124 /* FRintk: target register */
2125 { "FRintk", FRV_OPERAND_FRINTK, HW_H_FR_INT, 30, 6,
2126 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
2127 { 0, { (1<<MACH_BASE) } } },
2128 /* FRi: source register 1 */
2129 { "FRi", FRV_OPERAND_FRI, HW_H_FR, 17, 6,
2130 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
2131 { 0, { (1<<MACH_BASE) } } },
2132 /* FRj: source register 2 */
2133 { "FRj", FRV_OPERAND_FRJ, HW_H_FR, 5, 6,
2134 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
2135 { 0, { (1<<MACH_BASE) } } },
2136 /* FRk: destination register */
2137 { "FRk", FRV_OPERAND_FRK, HW_H_FR, 30, 6,
2138 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
2139 { 0, { (1<<MACH_BASE) } } },
2140 /* FRkhi: destination register */
2141 { "FRkhi", FRV_OPERAND_FRKHI, HW_H_FR_HI, 30, 6,
2142 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
2143 { 0, { (1<<MACH_BASE) } } },
2144 /* FRklo: destination register */
2145 { "FRklo", FRV_OPERAND_FRKLO, HW_H_FR_LO, 30, 6,
2146 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
2147 { 0, { (1<<MACH_BASE) } } },
2148 /* FRdoublei: source register 1 */
2149 { "FRdoublei", FRV_OPERAND_FRDOUBLEI, HW_H_FR_DOUBLE, 17, 6,
2150 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
2151 { 0, { (1<<MACH_BASE) } } },
2152 /* FRdoublej: source register 2 */
2153 { "FRdoublej", FRV_OPERAND_FRDOUBLEJ, HW_H_FR_DOUBLE, 5, 6,
2154 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
2155 { 0, { (1<<MACH_BASE) } } },
2156 /* FRdoublek: target register */
2157 { "FRdoublek", FRV_OPERAND_FRDOUBLEK, HW_H_FR_DOUBLE, 30, 6,
2158 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
2159 { 0, { (1<<MACH_BASE) } } },
2160 /* CRi: source register 1 */
2161 { "CRi", FRV_OPERAND_CRI, HW_H_CCCR, 14, 3,
2162 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRI] } },
2163 { 0, { (1<<MACH_BASE) } } },
2164 /* CRj: source register 2 */
2165 { "CRj", FRV_OPERAND_CRJ, HW_H_CCCR, 2, 3,
2166 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ] } },
2167 { 0, { (1<<MACH_BASE) } } },
2168 /* CRj_int: destination register */
2169 { "CRj_int", FRV_OPERAND_CRJ_INT, HW_H_CCCR, 26, 2,
2170 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_INT] } },
2171 { 0, { (1<<MACH_BASE) } } },
2172 /* CRj_float: destination register */
2173 { "CRj_float", FRV_OPERAND_CRJ_FLOAT, HW_H_CCCR, 26, 2,
2174 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRJ_FLOAT] } },
2175 { 0, { (1<<MACH_BASE) } } },
2176 /* CRk: destination register */
2177 { "CRk", FRV_OPERAND_CRK, HW_H_CCCR, 27, 3,
2178 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CRK] } },
2179 { 0, { (1<<MACH_BASE) } } },
2180 /* CCi: condition register */
2181 { "CCi", FRV_OPERAND_CCI, HW_H_CCCR, 11, 3,
2182 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCI] } },
2183 { 0, { (1<<MACH_BASE) } } },
2184 /* ICCi_1: condition register */
2185 { "ICCi_1", FRV_OPERAND_ICCI_1, HW_H_ICCR, 11, 2,
2186 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_1] } },
2187 { 0, { (1<<MACH_BASE) } } },
2188 /* ICCi_2: condition register */
2189 { "ICCi_2", FRV_OPERAND_ICCI_2, HW_H_ICCR, 26, 2,
2190 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_2] } },
2191 { 0, { (1<<MACH_BASE) } } },
2192 /* ICCi_3: condition register */
2193 { "ICCi_3", FRV_OPERAND_ICCI_3, HW_H_ICCR, 1, 2,
2194 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_ICCI_3] } },
2195 { 0, { (1<<MACH_BASE) } } },
2196 /* FCCi_1: condition register */
2197 { "FCCi_1", FRV_OPERAND_FCCI_1, HW_H_FCCR, 11, 2,
2198 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_1] } },
2199 { 0, { (1<<MACH_BASE) } } },
2200 /* FCCi_2: condition register */
2201 { "FCCi_2", FRV_OPERAND_FCCI_2, HW_H_FCCR, 26, 2,
2202 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_2] } },
2203 { 0, { (1<<MACH_BASE) } } },
2204 /* FCCi_3: condition register */
2205 { "FCCi_3", FRV_OPERAND_FCCI_3, HW_H_FCCR, 1, 2,
2206 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCI_3] } },
2207 { 0, { (1<<MACH_BASE) } } },
2208 /* FCCk: condition register */
2209 { "FCCk", FRV_OPERAND_FCCK, HW_H_FCCR, 26, 2,
2210 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FCCK] } },
2211 { 0, { (1<<MACH_BASE) } } },
2212 /* eir: exception insn reg */
2213 { "eir", FRV_OPERAND_EIR, HW_H_UINT, 17, 6,
2214 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_EIR] } },
2215 { 0, { (1<<MACH_BASE) } } },
2216 /* s10: 10 bit signed immediate */
2217 { "s10", FRV_OPERAND_S10, HW_H_SINT, 9, 10,
2218 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S10] } },
2219 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2220 /* u16: 16 bit unsigned immediate */
2221 { "u16", FRV_OPERAND_U16, HW_H_UINT, 15, 16,
2222 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
2223 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2224 /* s16: 16 bit signed immediate */
2225 { "s16", FRV_OPERAND_S16, HW_H_SINT, 15, 16,
2226 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
2227 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2228 /* s6: 6 bit signed immediate */
2229 { "s6", FRV_OPERAND_S6, HW_H_SINT, 5, 6,
2230 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6] } },
2231 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2232 /* s6_1: 6 bit signed immediate */
2233 { "s6_1", FRV_OPERAND_S6_1, HW_H_SINT, 11, 6,
2234 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S6_1] } },
2235 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2236 /* u6: 6 bit unsigned immediate */
2237 { "u6", FRV_OPERAND_U6, HW_H_UINT, 5, 6,
2238 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U6] } },
2239 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2240 /* s5: 5 bit signed immediate */
2241 { "s5", FRV_OPERAND_S5, HW_H_SINT, 4, 5,
2242 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S5] } },
2243 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2244 /* cond: conditional arithmetic */
2245 { "cond", FRV_OPERAND_COND, HW_H_UINT, 8, 1,
2246 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_COND] } },
2247 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2248 /* ccond: lr branch condition */
2249 { "ccond", FRV_OPERAND_CCOND, HW_H_UINT, 12, 1,
2250 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_CCOND] } },
2251 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2252 /* hint: 2 bit branch predictor */
2253 { "hint", FRV_OPERAND_HINT, HW_H_UINT, 17, 2,
2254 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
2255 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2256 /* hint_taken: 2 bit branch predictor */
2257 { "hint_taken", FRV_OPERAND_HINT_TAKEN, HW_H_HINT_TAKEN, 17, 2,
2258 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
2259 { 0, { (1<<MACH_BASE) } } },
2260 /* hint_not_taken: 2 bit branch predictor */
2261 { "hint_not_taken", FRV_OPERAND_HINT_NOT_TAKEN, HW_H_HINT_NOT_TAKEN, 17, 2,
2262 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_HINT] } },
2263 { 0, { (1<<MACH_BASE) } } },
2264 /* LI: link indicator */
2265 { "LI", FRV_OPERAND_LI, HW_H_UINT, 25, 1,
2266 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LI] } },
2267 { 0, { (1<<MACH_BASE) } } },
2268 /* lock: cache lock indicator */
2269 { "lock", FRV_OPERAND_LOCK, HW_H_UINT, 25, 1,
2270 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LOCK] } },
2271 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2272 /* debug: debug mode indicator */
2273 { "debug", FRV_OPERAND_DEBUG, HW_H_UINT, 25, 1,
2274 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_DEBUG] } },
2275 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2276 /* ae: all entries indicator */
2277 { "ae", FRV_OPERAND_AE, HW_H_UINT, 25, 1,
2278 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_AE] } },
2279 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2280 /* label16: 18 bit pc relative address */
2281 { "label16", FRV_OPERAND_LABEL16, HW_H_IADDR, 15, 16,
2282 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LABEL16] } },
2283 { 0|A(PCREL_ADDR), { (1<<MACH_BASE) } } },
2284 /* LRAE: Load Real Address E flag */
2285 { "LRAE", FRV_OPERAND_LRAE, HW_H_UINT, 5, 1,
2286 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAE] } },
2287 { 0, { (1<<MACH_BASE) } } },
2288 /* LRAD: Load Real Address D flag */
2289 { "LRAD", FRV_OPERAND_LRAD, HW_H_UINT, 4, 1,
2290 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAD] } },
2291 { 0, { (1<<MACH_BASE) } } },
2292 /* LRAS: Load Real Address S flag */
2293 { "LRAS", FRV_OPERAND_LRAS, HW_H_UINT, 3, 1,
2294 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_LRAS] } },
2295 { 0, { (1<<MACH_BASE) } } },
2296 /* TLBPRopx: TLB Probe operation number */
2297 { "TLBPRopx", FRV_OPERAND_TLBPROPX, HW_H_UINT, 28, 3,
2298 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPROPX] } },
2299 { 0, { (1<<MACH_BASE) } } },
2300 /* TLBPRL: TLB Probe L flag */
2301 { "TLBPRL", FRV_OPERAND_TLBPRL, HW_H_UINT, 25, 1,
2302 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_TLBPRL] } },
2303 { 0, { (1<<MACH_BASE) } } },
2304 /* A0: A==0 operand of mclracc */
2305 { "A0", FRV_OPERAND_A0, HW_H_UINT, 17, 1,
2306 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
2307 { 0, { (1<<MACH_BASE) } } },
2308 /* A1: A==1 operand of mclracc */
2309 { "A1", FRV_OPERAND_A1, HW_H_UINT, 17, 1,
2310 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_A] } },
2311 { 0, { (1<<MACH_BASE) } } },
2312 /* FRintieven: (even) source register 1 */
2313 { "FRintieven", FRV_OPERAND_FRINTIEVEN, HW_H_FR_INT, 17, 6,
2314 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRI] } },
2315 { 0, { (1<<MACH_BASE) } } },
2316 /* FRintjeven: (even) source register 2 */
2317 { "FRintjeven", FRV_OPERAND_FRINTJEVEN, HW_H_FR_INT, 5, 6,
2318 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRJ] } },
2319 { 0, { (1<<MACH_BASE) } } },
2320 /* FRintkeven: (even) target register */
2321 { "FRintkeven", FRV_OPERAND_FRINTKEVEN, HW_H_FR_INT, 30, 6,
2322 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_FRK] } },
2323 { 0, { (1<<MACH_BASE) } } },
2324 /* d12: 12 bit signed immediate */
2325 { "d12", FRV_OPERAND_D12, HW_H_SINT, 11, 12,
2326 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
2327 { 0, { (1<<MACH_BASE) } } },
2328 /* s12: 12 bit signed immediate */
2329 { "s12", FRV_OPERAND_S12, HW_H_SINT, 11, 12,
2330 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_D12] } },
2331 { 0|A(HASH_PREFIX), { (1<<MACH_BASE) } } },
2332 /* u12: 12 bit signed immediate */
2333 { "u12", FRV_OPERAND_U12, HW_H_SINT, 5, 12,
2334 { 2, { (const PTR) &FRV_F_U12_MULTI_IFIELD[0] } },
2335 { 0|A(HASH_PREFIX)|A(VIRTUAL), { (1<<MACH_BASE) } } },
2336 /* spr: special purpose register */
2337 { "spr", FRV_OPERAND_SPR, HW_H_SPR, 17, 12,
2338 { 2, { (const PTR) &FRV_F_SPR_MULTI_IFIELD[0] } },
2339 { 0|A(VIRTUAL), { (1<<MACH_BASE) } } },
2340 /* ulo16: 16 bit unsigned immediate, for #lo() */
2341 { "ulo16", FRV_OPERAND_ULO16, HW_H_UINT, 15, 16,
2342 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
2343 { 0, { (1<<MACH_BASE) } } },
2344 /* slo16: 16 bit unsigned immediate, for #lo() */
2345 { "slo16", FRV_OPERAND_SLO16, HW_H_SINT, 15, 16,
2346 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_S16] } },
2347 { 0, { (1<<MACH_BASE) } } },
2348 /* uhi16: 16 bit unsigned immediate, for #hi() */
2349 { "uhi16", FRV_OPERAND_UHI16, HW_H_UINT, 15, 16,
2350 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_U16] } },
2351 { 0, { (1<<MACH_BASE) } } },
2352 /* label24: 26 bit pc relative address */
2353 { "label24", FRV_OPERAND_LABEL24, HW_H_IADDR, 17, 24,
2354 { 2, { (const PTR) &FRV_F_LABEL24_MULTI_IFIELD[0] } },
2355 { 0|A(PCREL_ADDR)|A(VIRTUAL), { (1<<MACH_BASE) } } },
2356 /* psr_esr: PSR.ESR bit */
2357 { "psr_esr", FRV_OPERAND_PSR_ESR, HW_H_PSR_ESR, 0, 0,
2358 { 0, { (const PTR) 0 } },
2359 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2360 /* psr_s: PSR.S bit */
2361 { "psr_s", FRV_OPERAND_PSR_S, HW_H_PSR_S, 0, 0,
2362 { 0, { (const PTR) 0 } },
2363 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2364 /* psr_ps: PSR.PS bit */
2365 { "psr_ps", FRV_OPERAND_PSR_PS, HW_H_PSR_PS, 0, 0,
2366 { 0, { (const PTR) 0 } },
2367 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2368 /* psr_et: PSR.ET bit */
2369 { "psr_et", FRV_OPERAND_PSR_ET, HW_H_PSR_ET, 0, 0,
2370 { 0, { (const PTR) 0 } },
2371 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2372 /* bpsr_bs: BPSR.BS bit */
2373 { "bpsr_bs", FRV_OPERAND_BPSR_BS, HW_H_BPSR_BS, 0, 0,
2374 { 0, { (const PTR) 0 } },
2375 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2376 /* bpsr_bet: BPSR.BET bit */
2377 { "bpsr_bet", FRV_OPERAND_BPSR_BET, HW_H_BPSR_BET, 0, 0,
2378 { 0, { (const PTR) 0 } },
2379 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2380 /* tbr_tba: TBR.TBA */
2381 { "tbr_tba", FRV_OPERAND_TBR_TBA, HW_H_TBR_TBA, 0, 0,
2382 { 0, { (const PTR) 0 } },
2383 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2384 /* tbr_tt: TBR.TT */
2385 { "tbr_tt", FRV_OPERAND_TBR_TT, HW_H_TBR_TT, 0, 0,
2386 { 0, { (const PTR) 0 } },
2387 { 0|A(SEM_ONLY), { (1<<MACH_BASE) } } },
2388 /* ldann: ld annotation */
2389 { "ldann", FRV_OPERAND_LDANN, HW_H_RELOC_ANN, 0, 0,
2390 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
2391 { 0, { (1<<MACH_BASE) } } },
2392 /* lddann: ldd annotation */
2393 { "lddann", FRV_OPERAND_LDDANN, HW_H_RELOC_ANN, 0, 0,
2394 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
2395 { 0, { (1<<MACH_BASE) } } },
2396 /* callann: call annotation */
2397 { "callann", FRV_OPERAND_CALLANN, HW_H_RELOC_ANN, 0, 0,
2398 { 0, { (const PTR) &frv_cgen_ifld_table[FRV_F_RELOC_ANN] } },
2399 { 0, { (1<<MACH_BASE) } } },
2400 /* sentinel */
2401 { 0, 0, 0, 0, 0,
2402 { 0, { (const PTR) 0 } },
2403 { 0, { 0 } } }
2404 };
2405
2406 #undef A
2407
2408
2409 /* The instruction table. */
2410
2411 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
2412 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
2413 #define A(a) (1 << CGEN_INSN_##a)
2414 #else
2415 #define A(a) (1 << CGEN_INSN_/**/a)
2416 #endif
2417
2418 static const CGEN_IBASE frv_cgen_insn_table[MAX_INSNS] =
2419 {
2420 /* Special null first entry.
2421 A `num' value of zero is thus invalid.
2422 Also, the special `invalid' insn resides here. */
2423 { 0, 0, 0, 0, {0, {0}} },
2424 /* add$pack $GRi,$GRj,$GRk */
2425 {
2426 FRV_INSN_ADD, "add", "add", 32,
2427 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2428 },
2429 /* sub$pack $GRi,$GRj,$GRk */
2430 {
2431 FRV_INSN_SUB, "sub", "sub", 32,
2432 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2433 },
2434 /* and$pack $GRi,$GRj,$GRk */
2435 {
2436 FRV_INSN_AND, "and", "and", 32,
2437 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2438 },
2439 /* or$pack $GRi,$GRj,$GRk */
2440 {
2441 FRV_INSN_OR, "or", "or", 32,
2442 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2443 },
2444 /* xor$pack $GRi,$GRj,$GRk */
2445 {
2446 FRV_INSN_XOR, "xor", "xor", 32,
2447 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2448 },
2449 /* not$pack $GRj,$GRk */
2450 {
2451 FRV_INSN_NOT, "not", "not", 32,
2452 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2453 },
2454 /* sdiv$pack $GRi,$GRj,$GRk */
2455 {
2456 FRV_INSN_SDIV, "sdiv", "sdiv", 32,
2457 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2458 },
2459 /* nsdiv$pack $GRi,$GRj,$GRk */
2460 {
2461 FRV_INSN_NSDIV, "nsdiv", "nsdiv", 32,
2462 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2463 },
2464 /* udiv$pack $GRi,$GRj,$GRk */
2465 {
2466 FRV_INSN_UDIV, "udiv", "udiv", 32,
2467 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2468 },
2469 /* nudiv$pack $GRi,$GRj,$GRk */
2470 {
2471 FRV_INSN_NUDIV, "nudiv", "nudiv", 32,
2472 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2473 },
2474 /* smul$pack $GRi,$GRj,$GRdoublek */
2475 {
2476 FRV_INSN_SMUL, "smul", "smul", 32,
2477 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2478 },
2479 /* umul$pack $GRi,$GRj,$GRdoublek */
2480 {
2481 FRV_INSN_UMUL, "umul", "umul", 32,
2482 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2483 },
2484 /* smu$pack $GRi,$GRj */
2485 {
2486 FRV_INSN_SMU, "smu", "smu", 32,
2487 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IACC, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2488 },
2489 /* smass$pack $GRi,$GRj */
2490 {
2491 FRV_INSN_SMASS, "smass", "smass", 32,
2492 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IACC, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2493 },
2494 /* smsss$pack $GRi,$GRj */
2495 {
2496 FRV_INSN_SMSSS, "smsss", "smsss", 32,
2497 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IACC, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2498 },
2499 /* sll$pack $GRi,$GRj,$GRk */
2500 {
2501 FRV_INSN_SLL, "sll", "sll", 32,
2502 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2503 },
2504 /* srl$pack $GRi,$GRj,$GRk */
2505 {
2506 FRV_INSN_SRL, "srl", "srl", 32,
2507 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2508 },
2509 /* sra$pack $GRi,$GRj,$GRk */
2510 {
2511 FRV_INSN_SRA, "sra", "sra", 32,
2512 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2513 },
2514 /* slass$pack $GRi,$GRj,$GRk */
2515 {
2516 FRV_INSN_SLASS, "slass", "slass", 32,
2517 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2518 },
2519 /* scutss$pack $GRj,$GRk */
2520 {
2521 FRV_INSN_SCUTSS, "scutss", "scutss", 32,
2522 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_I0, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2523 },
2524 /* scan$pack $GRi,$GRj,$GRk */
2525 {
2526 FRV_INSN_SCAN, "scan", "scan", 32,
2527 { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2528 },
2529 /* cadd$pack $GRi,$GRj,$GRk,$CCi,$cond */
2530 {
2531 FRV_INSN_CADD, "cadd", "cadd", 32,
2532 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2533 },
2534 /* csub$pack $GRi,$GRj,$GRk,$CCi,$cond */
2535 {
2536 FRV_INSN_CSUB, "csub", "csub", 32,
2537 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2538 },
2539 /* cand$pack $GRi,$GRj,$GRk,$CCi,$cond */
2540 {
2541 FRV_INSN_CAND, "cand", "cand", 32,
2542 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2543 },
2544 /* cor$pack $GRi,$GRj,$GRk,$CCi,$cond */
2545 {
2546 FRV_INSN_COR, "cor", "cor", 32,
2547 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2548 },
2549 /* cxor$pack $GRi,$GRj,$GRk,$CCi,$cond */
2550 {
2551 FRV_INSN_CXOR, "cxor", "cxor", 32,
2552 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2553 },
2554 /* cnot$pack $GRj,$GRk,$CCi,$cond */
2555 {
2556 FRV_INSN_CNOT, "cnot", "cnot", 32,
2557 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2558 },
2559 /* csmul$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
2560 {
2561 FRV_INSN_CSMUL, "csmul", "csmul", 32,
2562 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2563 },
2564 /* csdiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
2565 {
2566 FRV_INSN_CSDIV, "csdiv", "csdiv", 32,
2567 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2568 },
2569 /* cudiv$pack $GRi,$GRj,$GRk,$CCi,$cond */
2570 {
2571 FRV_INSN_CUDIV, "cudiv", "cudiv", 32,
2572 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2573 },
2574 /* csll$pack $GRi,$GRj,$GRk,$CCi,$cond */
2575 {
2576 FRV_INSN_CSLL, "csll", "csll", 32,
2577 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2578 },
2579 /* csrl$pack $GRi,$GRj,$GRk,$CCi,$cond */
2580 {
2581 FRV_INSN_CSRL, "csrl", "csrl", 32,
2582 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2583 },
2584 /* csra$pack $GRi,$GRj,$GRk,$CCi,$cond */
2585 {
2586 FRV_INSN_CSRA, "csra", "csra", 32,
2587 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2588 },
2589 /* cscan$pack $GRi,$GRj,$GRk,$CCi,$cond */
2590 {
2591 FRV_INSN_CSCAN, "cscan", "cscan", 32,
2592 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2593 },
2594 /* addcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2595 {
2596 FRV_INSN_ADDCC, "addcc", "addcc", 32,
2597 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2598 },
2599 /* subcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2600 {
2601 FRV_INSN_SUBCC, "subcc", "subcc", 32,
2602 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2603 },
2604 /* andcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2605 {
2606 FRV_INSN_ANDCC, "andcc", "andcc", 32,
2607 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2608 },
2609 /* orcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2610 {
2611 FRV_INSN_ORCC, "orcc", "orcc", 32,
2612 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2613 },
2614 /* xorcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2615 {
2616 FRV_INSN_XORCC, "xorcc", "xorcc", 32,
2617 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2618 },
2619 /* sllcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2620 {
2621 FRV_INSN_SLLCC, "sllcc", "sllcc", 32,
2622 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2623 },
2624 /* srlcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2625 {
2626 FRV_INSN_SRLCC, "srlcc", "srlcc", 32,
2627 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2628 },
2629 /* sracc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2630 {
2631 FRV_INSN_SRACC, "sracc", "sracc", 32,
2632 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2633 },
2634 /* smulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
2635 {
2636 FRV_INSN_SMULCC, "smulcc", "smulcc", 32,
2637 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2638 },
2639 /* umulcc$pack $GRi,$GRj,$GRdoublek,$ICCi_1 */
2640 {
2641 FRV_INSN_UMULCC, "umulcc", "umulcc", 32,
2642 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2643 },
2644 /* caddcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2645 {
2646 FRV_INSN_CADDCC, "caddcc", "caddcc", 32,
2647 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2648 },
2649 /* csubcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2650 {
2651 FRV_INSN_CSUBCC, "csubcc", "csubcc", 32,
2652 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2653 },
2654 /* csmulcc$pack $GRi,$GRj,$GRdoublek,$CCi,$cond */
2655 {
2656 FRV_INSN_CSMULCC, "csmulcc", "csmulcc", 32,
2657 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2658 },
2659 /* candcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2660 {
2661 FRV_INSN_CANDCC, "candcc", "candcc", 32,
2662 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2663 },
2664 /* corcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2665 {
2666 FRV_INSN_CORCC, "corcc", "corcc", 32,
2667 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2668 },
2669 /* cxorcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2670 {
2671 FRV_INSN_CXORCC, "cxorcc", "cxorcc", 32,
2672 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2673 },
2674 /* csllcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2675 {
2676 FRV_INSN_CSLLCC, "csllcc", "csllcc", 32,
2677 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2678 },
2679 /* csrlcc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2680 {
2681 FRV_INSN_CSRLCC, "csrlcc", "csrlcc", 32,
2682 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2683 },
2684 /* csracc$pack $GRi,$GRj,$GRk,$CCi,$cond */
2685 {
2686 FRV_INSN_CSRACC, "csracc", "csracc", 32,
2687 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2688 },
2689 /* addx$pack $GRi,$GRj,$GRk,$ICCi_1 */
2690 {
2691 FRV_INSN_ADDX, "addx", "addx", 32,
2692 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2693 },
2694 /* subx$pack $GRi,$GRj,$GRk,$ICCi_1 */
2695 {
2696 FRV_INSN_SUBX, "subx", "subx", 32,
2697 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2698 },
2699 /* addxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2700 {
2701 FRV_INSN_ADDXCC, "addxcc", "addxcc", 32,
2702 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2703 },
2704 /* subxcc$pack $GRi,$GRj,$GRk,$ICCi_1 */
2705 {
2706 FRV_INSN_SUBXCC, "subxcc", "subxcc", 32,
2707 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2708 },
2709 /* addss$pack $GRi,$GRj,$GRk */
2710 {
2711 FRV_INSN_ADDSS, "addss", "addss", 32,
2712 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2713 },
2714 /* subss$pack $GRi,$GRj,$GRk */
2715 {
2716 FRV_INSN_SUBSS, "subss", "subss", 32,
2717 { 0|A(AUDIO), { (1<<MACH_FR400)|(1<<MACH_FR450), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
2718 },
2719 /* addi$pack $GRi,$s12,$GRk */
2720 {
2721 FRV_INSN_ADDI, "addi", "addi", 32,
2722 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2723 },
2724 /* subi$pack $GRi,$s12,$GRk */
2725 {
2726 FRV_INSN_SUBI, "subi", "subi", 32,
2727 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2728 },
2729 /* andi$pack $GRi,$s12,$GRk */
2730 {
2731 FRV_INSN_ANDI, "andi", "andi", 32,
2732 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2733 },
2734 /* ori$pack $GRi,$s12,$GRk */
2735 {
2736 FRV_INSN_ORI, "ori", "ori", 32,
2737 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2738 },
2739 /* xori$pack $GRi,$s12,$GRk */
2740 {
2741 FRV_INSN_XORI, "xori", "xori", 32,
2742 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2743 },
2744 /* sdivi$pack $GRi,$s12,$GRk */
2745 {
2746 FRV_INSN_SDIVI, "sdivi", "sdivi", 32,
2747 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2748 },
2749 /* nsdivi$pack $GRi,$s12,$GRk */
2750 {
2751 FRV_INSN_NSDIVI, "nsdivi", "nsdivi", 32,
2752 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2753 },
2754 /* udivi$pack $GRi,$s12,$GRk */
2755 {
2756 FRV_INSN_UDIVI, "udivi", "udivi", 32,
2757 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2758 },
2759 /* nudivi$pack $GRi,$s12,$GRk */
2760 {
2761 FRV_INSN_NUDIVI, "nudivi", "nudivi", 32,
2762 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_MULT_DIV, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2763 },
2764 /* smuli$pack $GRi,$s12,$GRdoublek */
2765 {
2766 FRV_INSN_SMULI, "smuli", "smuli", 32,
2767 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2768 },
2769 /* umuli$pack $GRi,$s12,$GRdoublek */
2770 {
2771 FRV_INSN_UMULI, "umuli", "umuli", 32,
2772 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2773 },
2774 /* slli$pack $GRi,$s12,$GRk */
2775 {
2776 FRV_INSN_SLLI, "slli", "slli", 32,
2777 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2778 },
2779 /* srli$pack $GRi,$s12,$GRk */
2780 {
2781 FRV_INSN_SRLI, "srli", "srli", 32,
2782 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2783 },
2784 /* srai$pack $GRi,$s12,$GRk */
2785 {
2786 FRV_INSN_SRAI, "srai", "srai", 32,
2787 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2788 },
2789 /* scani$pack $GRi,$s12,$GRk */
2790 {
2791 FRV_INSN_SCANI, "scani", "scani", 32,
2792 { 0, { (1<<MACH_BASE), UNIT_SCAN, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2793 },
2794 /* addicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2795 {
2796 FRV_INSN_ADDICC, "addicc", "addicc", 32,
2797 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2798 },
2799 /* subicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2800 {
2801 FRV_INSN_SUBICC, "subicc", "subicc", 32,
2802 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2803 },
2804 /* andicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2805 {
2806 FRV_INSN_ANDICC, "andicc", "andicc", 32,
2807 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2808 },
2809 /* oricc$pack $GRi,$s10,$GRk,$ICCi_1 */
2810 {
2811 FRV_INSN_ORICC, "oricc", "oricc", 32,
2812 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2813 },
2814 /* xoricc$pack $GRi,$s10,$GRk,$ICCi_1 */
2815 {
2816 FRV_INSN_XORICC, "xoricc", "xoricc", 32,
2817 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2818 },
2819 /* smulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
2820 {
2821 FRV_INSN_SMULICC, "smulicc", "smulicc", 32,
2822 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2823 },
2824 /* umulicc$pack $GRi,$s10,$GRdoublek,$ICCi_1 */
2825 {
2826 FRV_INSN_UMULICC, "umulicc", "umulicc", 32,
2827 { 0, { (1<<MACH_BASE), UNIT_MULT_DIV, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_2 } }
2828 },
2829 /* sllicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2830 {
2831 FRV_INSN_SLLICC, "sllicc", "sllicc", 32,
2832 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2833 },
2834 /* srlicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2835 {
2836 FRV_INSN_SRLICC, "srlicc", "srlicc", 32,
2837 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2838 },
2839 /* sraicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2840 {
2841 FRV_INSN_SRAICC, "sraicc", "sraicc", 32,
2842 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2843 },
2844 /* addxi$pack $GRi,$s10,$GRk,$ICCi_1 */
2845 {
2846 FRV_INSN_ADDXI, "addxi", "addxi", 32,
2847 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2848 },
2849 /* subxi$pack $GRi,$s10,$GRk,$ICCi_1 */
2850 {
2851 FRV_INSN_SUBXI, "subxi", "subxi", 32,
2852 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2853 },
2854 /* addxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2855 {
2856 FRV_INSN_ADDXICC, "addxicc", "addxicc", 32,
2857 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2858 },
2859 /* subxicc$pack $GRi,$s10,$GRk,$ICCi_1 */
2860 {
2861 FRV_INSN_SUBXICC, "subxicc", "subxicc", 32,
2862 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2863 },
2864 /* cmpb$pack $GRi,$GRj,$ICCi_1 */
2865 {
2866 FRV_INSN_CMPB, "cmpb", "cmpb", 32,
2867 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_I_1 } }
2868 },
2869 /* cmpba$pack $GRi,$GRj,$ICCi_1 */
2870 {
2871 FRV_INSN_CMPBA, "cmpba", "cmpba", 32,
2872 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_NONE, FR550_MAJOR_I_1 } }
2873 },
2874 /* setlo$pack $ulo16,$GRklo */
2875 {
2876 FRV_INSN_SETLO, "setlo", "setlo", 32,
2877 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2878 },
2879 /* sethi$pack $uhi16,$GRkhi */
2880 {
2881 FRV_INSN_SETHI, "sethi", "sethi", 32,
2882 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2883 },
2884 /* setlos$pack $slo16,$GRk */
2885 {
2886 FRV_INSN_SETLOS, "setlos", "setlos", 32,
2887 { 0, { (1<<MACH_BASE), UNIT_IALL, FR400_MAJOR_I_1, FR450_MAJOR_I_1, FR500_MAJOR_I_1, FR550_MAJOR_I_1 } }
2888 },
2889 /* ldsb$pack @($GRi,$GRj),$GRk */
2890 {
2891 FRV_INSN_LDSB, "ldsb", "ldsb", 32,
2892 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2893 },
2894 /* ldub$pack @($GRi,$GRj),$GRk */
2895 {
2896 FRV_INSN_LDUB, "ldub", "ldub", 32,
2897 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2898 },
2899 /* ldsh$pack @($GRi,$GRj),$GRk */
2900 {
2901 FRV_INSN_LDSH, "ldsh", "ldsh", 32,
2902 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2903 },
2904 /* lduh$pack @($GRi,$GRj),$GRk */
2905 {
2906 FRV_INSN_LDUH, "lduh", "lduh", 32,
2907 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2908 },
2909 /* ld$pack $ldann($GRi,$GRj),$GRk */
2910 {
2911 FRV_INSN_LD, "ld", "ld", 32,
2912 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2913 },
2914 /* ldbf$pack @($GRi,$GRj),$FRintk */
2915 {
2916 FRV_INSN_LDBF, "ldbf", "ldbf", 32,
2917 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2918 },
2919 /* ldhf$pack @($GRi,$GRj),$FRintk */
2920 {
2921 FRV_INSN_LDHF, "ldhf", "ldhf", 32,
2922 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2923 },
2924 /* ldf$pack @($GRi,$GRj),$FRintk */
2925 {
2926 FRV_INSN_LDF, "ldf", "ldf", 32,
2927 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2928 },
2929 /* ldc$pack @($GRi,$GRj),$CPRk */
2930 {
2931 FRV_INSN_LDC, "ldc", "ldc", 32,
2932 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
2933 },
2934 /* nldsb$pack @($GRi,$GRj),$GRk */
2935 {
2936 FRV_INSN_NLDSB, "nldsb", "nldsb", 32,
2937 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2938 },
2939 /* nldub$pack @($GRi,$GRj),$GRk */
2940 {
2941 FRV_INSN_NLDUB, "nldub", "nldub", 32,
2942 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2943 },
2944 /* nldsh$pack @($GRi,$GRj),$GRk */
2945 {
2946 FRV_INSN_NLDSH, "nldsh", "nldsh", 32,
2947 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2948 },
2949 /* nlduh$pack @($GRi,$GRj),$GRk */
2950 {
2951 FRV_INSN_NLDUH, "nlduh", "nlduh", 32,
2952 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2953 },
2954 /* nld$pack @($GRi,$GRj),$GRk */
2955 {
2956 FRV_INSN_NLD, "nld", "nld", 32,
2957 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2958 },
2959 /* nldbf$pack @($GRi,$GRj),$FRintk */
2960 {
2961 FRV_INSN_NLDBF, "nldbf", "nldbf", 32,
2962 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2963 },
2964 /* nldhf$pack @($GRi,$GRj),$FRintk */
2965 {
2966 FRV_INSN_NLDHF, "nldhf", "nldhf", 32,
2967 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2968 },
2969 /* nldf$pack @($GRi,$GRj),$FRintk */
2970 {
2971 FRV_INSN_NLDF, "nldf", "nldf", 32,
2972 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2973 },
2974 /* ldd$pack $lddann($GRi,$GRj),$GRdoublek */
2975 {
2976 FRV_INSN_LDD, "ldd", "ldd", 32,
2977 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2978 },
2979 /* lddf$pack @($GRi,$GRj),$FRdoublek */
2980 {
2981 FRV_INSN_LDDF, "lddf", "lddf", 32,
2982 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2983 },
2984 /* lddc$pack @($GRi,$GRj),$CPRdoublek */
2985 {
2986 FRV_INSN_LDDC, "lddc", "lddc", 32,
2987 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2988 },
2989 /* nldd$pack @($GRi,$GRj),$GRdoublek */
2990 {
2991 FRV_INSN_NLDD, "nldd", "nldd", 32,
2992 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2993 },
2994 /* nlddf$pack @($GRi,$GRj),$FRdoublek */
2995 {
2996 FRV_INSN_NLDDF, "nlddf", "nlddf", 32,
2997 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
2998 },
2999 /* ldq$pack @($GRi,$GRj),$GRk */
3000 {
3001 FRV_INSN_LDQ, "ldq", "ldq", 32,
3002 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3003 },
3004 /* ldqf$pack @($GRi,$GRj),$FRintk */
3005 {
3006 FRV_INSN_LDQF, "ldqf", "ldqf", 32,
3007 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3008 },
3009 /* ldqc$pack @($GRi,$GRj),$CPRk */
3010 {
3011 FRV_INSN_LDQC, "ldqc", "ldqc", 32,
3012 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3013 },
3014 /* nldq$pack @($GRi,$GRj),$GRk */
3015 {
3016 FRV_INSN_NLDQ, "nldq", "nldq", 32,
3017 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3018 },
3019 /* nldqf$pack @($GRi,$GRj),$FRintk */
3020 {
3021 FRV_INSN_NLDQF, "nldqf", "nldqf", 32,
3022 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3023 },
3024 /* ldsbu$pack @($GRi,$GRj),$GRk */
3025 {
3026 FRV_INSN_LDSBU, "ldsbu", "ldsbu", 32,
3027 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3028 },
3029 /* ldubu$pack @($GRi,$GRj),$GRk */
3030 {
3031 FRV_INSN_LDUBU, "ldubu", "ldubu", 32,
3032 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3033 },
3034 /* ldshu$pack @($GRi,$GRj),$GRk */
3035 {
3036 FRV_INSN_LDSHU, "ldshu", "ldshu", 32,
3037 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3038 },
3039 /* lduhu$pack @($GRi,$GRj),$GRk */
3040 {
3041 FRV_INSN_LDUHU, "lduhu", "lduhu", 32,
3042 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3043 },
3044 /* ldu$pack @($GRi,$GRj),$GRk */
3045 {
3046 FRV_INSN_LDU, "ldu", "ldu", 32,
3047 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3048 },
3049 /* nldsbu$pack @($GRi,$GRj),$GRk */
3050 {
3051 FRV_INSN_NLDSBU, "nldsbu", "nldsbu", 32,
3052 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3053 },
3054 /* nldubu$pack @($GRi,$GRj),$GRk */
3055 {
3056 FRV_INSN_NLDUBU, "nldubu", "nldubu", 32,
3057 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3058 },
3059 /* nldshu$pack @($GRi,$GRj),$GRk */
3060 {
3061 FRV_INSN_NLDSHU, "nldshu", "nldshu", 32,
3062 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3063 },
3064 /* nlduhu$pack @($GRi,$GRj),$GRk */
3065 {
3066 FRV_INSN_NLDUHU, "nlduhu", "nlduhu", 32,
3067 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3068 },
3069 /* nldu$pack @($GRi,$GRj),$GRk */
3070 {
3071 FRV_INSN_NLDU, "nldu", "nldu", 32,
3072 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3073 },
3074 /* ldbfu$pack @($GRi,$GRj),$FRintk */
3075 {
3076 FRV_INSN_LDBFU, "ldbfu", "ldbfu", 32,
3077 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3078 },
3079 /* ldhfu$pack @($GRi,$GRj),$FRintk */
3080 {
3081 FRV_INSN_LDHFU, "ldhfu", "ldhfu", 32,
3082 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3083 },
3084 /* ldfu$pack @($GRi,$GRj),$FRintk */
3085 {
3086 FRV_INSN_LDFU, "ldfu", "ldfu", 32,
3087 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3088 },
3089 /* ldcu$pack @($GRi,$GRj),$CPRk */
3090 {
3091 FRV_INSN_LDCU, "ldcu", "ldcu", 32,
3092 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3093 },
3094 /* nldbfu$pack @($GRi,$GRj),$FRintk */
3095 {
3096 FRV_INSN_NLDBFU, "nldbfu", "nldbfu", 32,
3097 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3098 },
3099 /* nldhfu$pack @($GRi,$GRj),$FRintk */
3100 {
3101 FRV_INSN_NLDHFU, "nldhfu", "nldhfu", 32,
3102 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3103 },
3104 /* nldfu$pack @($GRi,$GRj),$FRintk */
3105 {
3106 FRV_INSN_NLDFU, "nldfu", "nldfu", 32,
3107 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3108 },
3109 /* lddu$pack @($GRi,$GRj),$GRdoublek */
3110 {
3111 FRV_INSN_LDDU, "lddu", "lddu", 32,
3112 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3113 },
3114 /* nlddu$pack @($GRi,$GRj),$GRdoublek */
3115 {
3116 FRV_INSN_NLDDU, "nlddu", "nlddu", 32,
3117 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3118 },
3119 /* lddfu$pack @($GRi,$GRj),$FRdoublek */
3120 {
3121 FRV_INSN_LDDFU, "lddfu", "lddfu", 32,
3122 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3123 },
3124 /* lddcu$pack @($GRi,$GRj),$CPRdoublek */
3125 {
3126 FRV_INSN_LDDCU, "lddcu", "lddcu", 32,
3127 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3128 },
3129 /* nlddfu$pack @($GRi,$GRj),$FRdoublek */
3130 {
3131 FRV_INSN_NLDDFU, "nlddfu", "nlddfu", 32,
3132 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3133 },
3134 /* ldqu$pack @($GRi,$GRj),$GRk */
3135 {
3136 FRV_INSN_LDQU, "ldqu", "ldqu", 32,
3137 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3138 },
3139 /* nldqu$pack @($GRi,$GRj),$GRk */
3140 {
3141 FRV_INSN_NLDQU, "nldqu", "nldqu", 32,
3142 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3143 },
3144 /* ldqfu$pack @($GRi,$GRj),$FRintk */
3145 {
3146 FRV_INSN_LDQFU, "ldqfu", "ldqfu", 32,
3147 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3148 },
3149 /* ldqcu$pack @($GRi,$GRj),$CPRk */
3150 {
3151 FRV_INSN_LDQCU, "ldqcu", "ldqcu", 32,
3152 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3153 },
3154 /* nldqfu$pack @($GRi,$GRj),$FRintk */
3155 {
3156 FRV_INSN_NLDQFU, "nldqfu", "nldqfu", 32,
3157 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3158 },
3159 /* ldsbi$pack @($GRi,$d12),$GRk */
3160 {
3161 FRV_INSN_LDSBI, "ldsbi", "ldsbi", 32,
3162 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3163 },
3164 /* ldshi$pack @($GRi,$d12),$GRk */
3165 {
3166 FRV_INSN_LDSHI, "ldshi", "ldshi", 32,
3167 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3168 },
3169 /* ldi$pack @($GRi,$d12),$GRk */
3170 {
3171 FRV_INSN_LDI, "ldi", "ldi", 32,
3172 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3173 },
3174 /* ldubi$pack @($GRi,$d12),$GRk */
3175 {
3176 FRV_INSN_LDUBI, "ldubi", "ldubi", 32,
3177 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3178 },
3179 /* lduhi$pack @($GRi,$d12),$GRk */
3180 {
3181 FRV_INSN_LDUHI, "lduhi", "lduhi", 32,
3182 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3183 },
3184 /* ldbfi$pack @($GRi,$d12),$FRintk */
3185 {
3186 FRV_INSN_LDBFI, "ldbfi", "ldbfi", 32,
3187 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3188 },
3189 /* ldhfi$pack @($GRi,$d12),$FRintk */
3190 {
3191 FRV_INSN_LDHFI, "ldhfi", "ldhfi", 32,
3192 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3193 },
3194 /* ldfi$pack @($GRi,$d12),$FRintk */
3195 {
3196 FRV_INSN_LDFI, "ldfi", "ldfi", 32,
3197 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3198 },
3199 /* nldsbi$pack @($GRi,$d12),$GRk */
3200 {
3201 FRV_INSN_NLDSBI, "nldsbi", "nldsbi", 32,
3202 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3203 },
3204 /* nldubi$pack @($GRi,$d12),$GRk */
3205 {
3206 FRV_INSN_NLDUBI, "nldubi", "nldubi", 32,
3207 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3208 },
3209 /* nldshi$pack @($GRi,$d12),$GRk */
3210 {
3211 FRV_INSN_NLDSHI, "nldshi", "nldshi", 32,
3212 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3213 },
3214 /* nlduhi$pack @($GRi,$d12),$GRk */
3215 {
3216 FRV_INSN_NLDUHI, "nlduhi", "nlduhi", 32,
3217 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3218 },
3219 /* nldi$pack @($GRi,$d12),$GRk */
3220 {
3221 FRV_INSN_NLDI, "nldi", "nldi", 32,
3222 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3223 },
3224 /* nldbfi$pack @($GRi,$d12),$FRintk */
3225 {
3226 FRV_INSN_NLDBFI, "nldbfi", "nldbfi", 32,
3227 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3228 },
3229 /* nldhfi$pack @($GRi,$d12),$FRintk */
3230 {
3231 FRV_INSN_NLDHFI, "nldhfi", "nldhfi", 32,
3232 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3233 },
3234 /* nldfi$pack @($GRi,$d12),$FRintk */
3235 {
3236 FRV_INSN_NLDFI, "nldfi", "nldfi", 32,
3237 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3238 },
3239 /* lddi$pack @($GRi,$d12),$GRdoublek */
3240 {
3241 FRV_INSN_LDDI, "lddi", "lddi", 32,
3242 { 0, { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3243 },
3244 /* lddfi$pack @($GRi,$d12),$FRdoublek */
3245 {
3246 FRV_INSN_LDDFI, "lddfi", "lddfi", 32,
3247 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3248 },
3249 /* nlddi$pack @($GRi,$d12),$GRdoublek */
3250 {
3251 FRV_INSN_NLDDI, "nlddi", "nlddi", 32,
3252 { 0|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3253 },
3254 /* nlddfi$pack @($GRi,$d12),$FRdoublek */
3255 {
3256 FRV_INSN_NLDDFI, "nlddfi", "nlddfi", 32,
3257 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3258 },
3259 /* ldqi$pack @($GRi,$d12),$GRk */
3260 {
3261 FRV_INSN_LDQI, "ldqi", "ldqi", 32,
3262 { 0, { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3263 },
3264 /* ldqfi$pack @($GRi,$d12),$FRintk */
3265 {
3266 FRV_INSN_LDQFI, "ldqfi", "ldqfi", 32,
3267 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3268 },
3269 /* nldqfi$pack @($GRi,$d12),$FRintk */
3270 {
3271 FRV_INSN_NLDQFI, "nldqfi", "nldqfi", 32,
3272 { 0|A(FR_ACCESS)|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3273 },
3274 /* stb$pack $GRk,@($GRi,$GRj) */
3275 {
3276 FRV_INSN_STB, "stb", "stb", 32,
3277 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3278 },
3279 /* sth$pack $GRk,@($GRi,$GRj) */
3280 {
3281 FRV_INSN_STH, "sth", "sth", 32,
3282 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3283 },
3284 /* st$pack $GRk,@($GRi,$GRj) */
3285 {
3286 FRV_INSN_ST, "st", "st", 32,
3287 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3288 },
3289 /* stbf$pack $FRintk,@($GRi,$GRj) */
3290 {
3291 FRV_INSN_STBF, "stbf", "stbf", 32,
3292 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3293 },
3294 /* sthf$pack $FRintk,@($GRi,$GRj) */
3295 {
3296 FRV_INSN_STHF, "sthf", "sthf", 32,
3297 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3298 },
3299 /* stf$pack $FRintk,@($GRi,$GRj) */
3300 {
3301 FRV_INSN_STF, "stf", "stf", 32,
3302 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3303 },
3304 /* stc$pack $CPRk,@($GRi,$GRj) */
3305 {
3306 FRV_INSN_STC, "stc", "stc", 32,
3307 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3308 },
3309 /* std$pack $GRdoublek,@($GRi,$GRj) */
3310 {
3311 FRV_INSN_STD, "std", "std", 32,
3312 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3313 },
3314 /* stdf$pack $FRdoublek,@($GRi,$GRj) */
3315 {
3316 FRV_INSN_STDF, "stdf", "stdf", 32,
3317 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3318 },
3319 /* stdc$pack $CPRdoublek,@($GRi,$GRj) */
3320 {
3321 FRV_INSN_STDC, "stdc", "stdc", 32,
3322 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3323 },
3324 /* stq$pack $GRk,@($GRi,$GRj) */
3325 {
3326 FRV_INSN_STQ, "stq", "stq", 32,
3327 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3328 },
3329 /* stqf$pack $FRintk,@($GRi,$GRj) */
3330 {
3331 FRV_INSN_STQF, "stqf", "stqf", 32,
3332 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3333 },
3334 /* stqc$pack $CPRk,@($GRi,$GRj) */
3335 {
3336 FRV_INSN_STQC, "stqc", "stqc", 32,
3337 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3338 },
3339 /* stbu$pack $GRk,@($GRi,$GRj) */
3340 {
3341 FRV_INSN_STBU, "stbu", "stbu", 32,
3342 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3343 },
3344 /* sthu$pack $GRk,@($GRi,$GRj) */
3345 {
3346 FRV_INSN_STHU, "sthu", "sthu", 32,
3347 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3348 },
3349 /* stu$pack $GRk,@($GRi,$GRj) */
3350 {
3351 FRV_INSN_STU, "stu", "stu", 32,
3352 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3353 },
3354 /* stbfu$pack $FRintk,@($GRi,$GRj) */
3355 {
3356 FRV_INSN_STBFU, "stbfu", "stbfu", 32,
3357 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3358 },
3359 /* sthfu$pack $FRintk,@($GRi,$GRj) */
3360 {
3361 FRV_INSN_STHFU, "sthfu", "sthfu", 32,
3362 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3363 },
3364 /* stfu$pack $FRintk,@($GRi,$GRj) */
3365 {
3366 FRV_INSN_STFU, "stfu", "stfu", 32,
3367 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3368 },
3369 /* stcu$pack $CPRk,@($GRi,$GRj) */
3370 {
3371 FRV_INSN_STCU, "stcu", "stcu", 32,
3372 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3373 },
3374 /* stdu$pack $GRdoublek,@($GRi,$GRj) */
3375 {
3376 FRV_INSN_STDU, "stdu", "stdu", 32,
3377 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3378 },
3379 /* stdfu$pack $FRdoublek,@($GRi,$GRj) */
3380 {
3381 FRV_INSN_STDFU, "stdfu", "stdfu", 32,
3382 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3383 },
3384 /* stdcu$pack $CPRdoublek,@($GRi,$GRj) */
3385 {
3386 FRV_INSN_STDCU, "stdcu", "stdcu", 32,
3387 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3388 },
3389 /* stqu$pack $GRk,@($GRi,$GRj) */
3390 {
3391 FRV_INSN_STQU, "stqu", "stqu", 32,
3392 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3393 },
3394 /* stqfu$pack $FRintk,@($GRi,$GRj) */
3395 {
3396 FRV_INSN_STQFU, "stqfu", "stqfu", 32,
3397 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3398 },
3399 /* stqcu$pack $CPRk,@($GRi,$GRj) */
3400 {
3401 FRV_INSN_STQCU, "stqcu", "stqcu", 32,
3402 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3403 },
3404 /* cldsb$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3405 {
3406 FRV_INSN_CLDSB, "cldsb", "cldsb", 32,
3407 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3408 },
3409 /* cldub$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3410 {
3411 FRV_INSN_CLDUB, "cldub", "cldub", 32,
3412 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3413 },
3414 /* cldsh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3415 {
3416 FRV_INSN_CLDSH, "cldsh", "cldsh", 32,
3417 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3418 },
3419 /* clduh$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3420 {
3421 FRV_INSN_CLDUH, "clduh", "clduh", 32,
3422 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3423 },
3424 /* cld$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3425 {
3426 FRV_INSN_CLD, "cld", "cld", 32,
3427 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3428 },
3429 /* cldbf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3430 {
3431 FRV_INSN_CLDBF, "cldbf", "cldbf", 32,
3432 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3433 },
3434 /* cldhf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3435 {
3436 FRV_INSN_CLDHF, "cldhf", "cldhf", 32,
3437 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3438 },
3439 /* cldf$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3440 {
3441 FRV_INSN_CLDF, "cldf", "cldf", 32,
3442 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3443 },
3444 /* cldd$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
3445 {
3446 FRV_INSN_CLDD, "cldd", "cldd", 32,
3447 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3448 },
3449 /* clddf$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
3450 {
3451 FRV_INSN_CLDDF, "clddf", "clddf", 32,
3452 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3453 },
3454 /* cldq$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3455 {
3456 FRV_INSN_CLDQ, "cldq", "cldq", 32,
3457 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3458 },
3459 /* cldsbu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3460 {
3461 FRV_INSN_CLDSBU, "cldsbu", "cldsbu", 32,
3462 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3463 },
3464 /* cldubu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3465 {
3466 FRV_INSN_CLDUBU, "cldubu", "cldubu", 32,
3467 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3468 },
3469 /* cldshu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3470 {
3471 FRV_INSN_CLDSHU, "cldshu", "cldshu", 32,
3472 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3473 },
3474 /* clduhu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3475 {
3476 FRV_INSN_CLDUHU, "clduhu", "clduhu", 32,
3477 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3478 },
3479 /* cldu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3480 {
3481 FRV_INSN_CLDU, "cldu", "cldu", 32,
3482 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3483 },
3484 /* cldbfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3485 {
3486 FRV_INSN_CLDBFU, "cldbfu", "cldbfu", 32,
3487 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3488 },
3489 /* cldhfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3490 {
3491 FRV_INSN_CLDHFU, "cldhfu", "cldhfu", 32,
3492 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3493 },
3494 /* cldfu$pack @($GRi,$GRj),$FRintk,$CCi,$cond */
3495 {
3496 FRV_INSN_CLDFU, "cldfu", "cldfu", 32,
3497 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3498 },
3499 /* clddu$pack @($GRi,$GRj),$GRdoublek,$CCi,$cond */
3500 {
3501 FRV_INSN_CLDDU, "clddu", "clddu", 32,
3502 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3503 },
3504 /* clddfu$pack @($GRi,$GRj),$FRdoublek,$CCi,$cond */
3505 {
3506 FRV_INSN_CLDDFU, "clddfu", "clddfu", 32,
3507 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_LOAD, FR400_MAJOR_I_2, FR450_MAJOR_I_2, FR500_MAJOR_I_2, FR550_MAJOR_I_3 } }
3508 },
3509 /* cldqu$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3510 {
3511 FRV_INSN_CLDQU, "cldqu", "cldqu", 32,
3512 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_LOAD, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_2, FR550_MAJOR_NONE } }
3513 },
3514 /* cstb$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3515 {
3516 FRV_INSN_CSTB, "cstb", "cstb", 32,
3517 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3518 },
3519 /* csth$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3520 {
3521 FRV_INSN_CSTH, "csth", "csth", 32,
3522 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3523 },
3524 /* cst$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3525 {
3526 FRV_INSN_CST, "cst", "cst", 32,
3527 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3528 },
3529 /* cstbf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3530 {
3531 FRV_INSN_CSTBF, "cstbf", "cstbf", 32,
3532 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3533 },
3534 /* csthf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3535 {
3536 FRV_INSN_CSTHF, "csthf", "csthf", 32,
3537 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3538 },
3539 /* cstf$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3540 {
3541 FRV_INSN_CSTF, "cstf", "cstf", 32,
3542 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3543 },
3544 /* cstd$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
3545 {
3546 FRV_INSN_CSTD, "cstd", "cstd", 32,
3547 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3548 },
3549 /* cstdf$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
3550 {
3551 FRV_INSN_CSTDF, "cstdf", "cstdf", 32,
3552 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3553 },
3554 /* cstq$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3555 {
3556 FRV_INSN_CSTQ, "cstq", "cstq", 32,
3557 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3558 },
3559 /* cstbu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3560 {
3561 FRV_INSN_CSTBU, "cstbu", "cstbu", 32,
3562 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3563 },
3564 /* csthu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3565 {
3566 FRV_INSN_CSTHU, "csthu", "csthu", 32,
3567 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3568 },
3569 /* cstu$pack $GRk,@($GRi,$GRj),$CCi,$cond */
3570 {
3571 FRV_INSN_CSTU, "cstu", "cstu", 32,
3572 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3573 },
3574 /* cstbfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3575 {
3576 FRV_INSN_CSTBFU, "cstbfu", "cstbfu", 32,
3577 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3578 },
3579 /* csthfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3580 {
3581 FRV_INSN_CSTHFU, "csthfu", "csthfu", 32,
3582 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3583 },
3584 /* cstfu$pack $FRintk,@($GRi,$GRj),$CCi,$cond */
3585 {
3586 FRV_INSN_CSTFU, "cstfu", "cstfu", 32,
3587 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3588 },
3589 /* cstdu$pack $GRdoublek,@($GRi,$GRj),$CCi,$cond */
3590 {
3591 FRV_INSN_CSTDU, "cstdu", "cstdu", 32,
3592 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3593 },
3594 /* cstdfu$pack $FRdoublek,@($GRi,$GRj),$CCi,$cond */
3595 {
3596 FRV_INSN_CSTDFU, "cstdfu", "cstdfu", 32,
3597 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3598 },
3599 /* stbi$pack $GRk,@($GRi,$d12) */
3600 {
3601 FRV_INSN_STBI, "stbi", "stbi", 32,
3602 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3603 },
3604 /* sthi$pack $GRk,@($GRi,$d12) */
3605 {
3606 FRV_INSN_STHI, "sthi", "sthi", 32,
3607 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3608 },
3609 /* sti$pack $GRk,@($GRi,$d12) */
3610 {
3611 FRV_INSN_STI, "sti", "sti", 32,
3612 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3613 },
3614 /* stbfi$pack $FRintk,@($GRi,$d12) */
3615 {
3616 FRV_INSN_STBFI, "stbfi", "stbfi", 32,
3617 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3618 },
3619 /* sthfi$pack $FRintk,@($GRi,$d12) */
3620 {
3621 FRV_INSN_STHFI, "sthfi", "sthfi", 32,
3622 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3623 },
3624 /* stfi$pack $FRintk,@($GRi,$d12) */
3625 {
3626 FRV_INSN_STFI, "stfi", "stfi", 32,
3627 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3628 },
3629 /* stdi$pack $GRdoublek,@($GRi,$d12) */
3630 {
3631 FRV_INSN_STDI, "stdi", "stdi", 32,
3632 { 0, { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3633 },
3634 /* stdfi$pack $FRdoublek,@($GRi,$d12) */
3635 {
3636 FRV_INSN_STDFI, "stdfi", "stdfi", 32,
3637 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_STORE, FR400_MAJOR_I_3, FR450_MAJOR_I_3, FR500_MAJOR_I_3, FR550_MAJOR_I_4 } }
3638 },
3639 /* stqi$pack $GRk,@($GRi,$d12) */
3640 {
3641 FRV_INSN_STQI, "stqi", "stqi", 32,
3642 { 0, { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3643 },
3644 /* stqfi$pack $FRintk,@($GRi,$d12) */
3645 {
3646 FRV_INSN_STQFI, "stqfi", "stqfi", 32,
3647 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_STORE, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_3, FR550_MAJOR_NONE } }
3648 },
3649 /* swap$pack @($GRi,$GRj),$GRk */
3650 {
3651 FRV_INSN_SWAP, "swap", "swap", 32,
3652 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
3653 },
3654 /* swapi$pack @($GRi,$d12),$GRk */
3655 {
3656 FRV_INSN_SWAPI, "swapi", "swapi", 32,
3657 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
3658 },
3659 /* cswap$pack @($GRi,$GRj),$GRk,$CCi,$cond */
3660 {
3661 FRV_INSN_CSWAP, "cswap", "cswap", 32,
3662 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
3663 },
3664 /* movgf$pack $GRj,$FRintk */
3665 {
3666 FRV_INSN_MOVGF, "movgf", "movgf", 32,
3667 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3668 },
3669 /* movfg$pack $FRintk,$GRj */
3670 {
3671 FRV_INSN_MOVFG, "movfg", "movfg", 32,
3672 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3673 },
3674 /* movgfd$pack $GRj,$FRintk */
3675 {
3676 FRV_INSN_MOVGFD, "movgfd", "movgfd", 32,
3677 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3678 },
3679 /* movfgd$pack $FRintk,$GRj */
3680 {
3681 FRV_INSN_MOVFGD, "movfgd", "movfgd", 32,
3682 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3683 },
3684 /* movgfq$pack $GRj,$FRintk */
3685 {
3686 FRV_INSN_MOVGFQ, "movgfq", "movgfq", 32,
3687 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_4, FR550_MAJOR_NONE } }
3688 },
3689 /* movfgq$pack $FRintk,$GRj */
3690 {
3691 FRV_INSN_MOVFGQ, "movfgq", "movfgq", 32,
3692 { 0|A(FR_ACCESS), { (1<<MACH_FRV), UNIT_I0, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_4, FR550_MAJOR_NONE } }
3693 },
3694 /* cmovgf$pack $GRj,$FRintk,$CCi,$cond */
3695 {
3696 FRV_INSN_CMOVGF, "cmovgf", "cmovgf", 32,
3697 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3698 },
3699 /* cmovfg$pack $FRintk,$GRj,$CCi,$cond */
3700 {
3701 FRV_INSN_CMOVFG, "cmovfg", "cmovfg", 32,
3702 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3703 },
3704 /* cmovgfd$pack $GRj,$FRintk,$CCi,$cond */
3705 {
3706 FRV_INSN_CMOVGFD, "cmovgfd", "cmovgfd", 32,
3707 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3708 },
3709 /* cmovfgd$pack $FRintk,$GRj,$CCi,$cond */
3710 {
3711 FRV_INSN_CMOVFGD, "cmovfgd", "cmovfgd", 32,
3712 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_4, FR450_MAJOR_I_4, FR500_MAJOR_I_4, FR550_MAJOR_I_5 } }
3713 },
3714 /* movgs$pack $GRj,$spr */
3715 {
3716 FRV_INSN_MOVGS, "movgs", "movgs", 32,
3717 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
3718 },
3719 /* movsg$pack $spr,$GRj */
3720 {
3721 FRV_INSN_MOVSG, "movsg", "movsg", 32,
3722 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
3723 },
3724 /* bra$pack $hint_taken$label16 */
3725 {
3726 FRV_INSN_BRA, "bra", "bra", 32,
3727 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3728 },
3729 /* bno$pack$hint_not_taken */
3730 {
3731 FRV_INSN_BNO, "bno", "bno", 32,
3732 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3733 },
3734 /* beq$pack $ICCi_2,$hint,$label16 */
3735 {
3736 FRV_INSN_BEQ, "beq", "beq", 32,
3737 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3738 },
3739 /* bne$pack $ICCi_2,$hint,$label16 */
3740 {
3741 FRV_INSN_BNE, "bne", "bne", 32,
3742 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3743 },
3744 /* ble$pack $ICCi_2,$hint,$label16 */
3745 {
3746 FRV_INSN_BLE, "ble", "ble", 32,
3747 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3748 },
3749 /* bgt$pack $ICCi_2,$hint,$label16 */
3750 {
3751 FRV_INSN_BGT, "bgt", "bgt", 32,
3752 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3753 },
3754 /* blt$pack $ICCi_2,$hint,$label16 */
3755 {
3756 FRV_INSN_BLT, "blt", "blt", 32,
3757 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3758 },
3759 /* bge$pack $ICCi_2,$hint,$label16 */
3760 {
3761 FRV_INSN_BGE, "bge", "bge", 32,
3762 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3763 },
3764 /* bls$pack $ICCi_2,$hint,$label16 */
3765 {
3766 FRV_INSN_BLS, "bls", "bls", 32,
3767 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3768 },
3769 /* bhi$pack $ICCi_2,$hint,$label16 */
3770 {
3771 FRV_INSN_BHI, "bhi", "bhi", 32,
3772 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3773 },
3774 /* bc$pack $ICCi_2,$hint,$label16 */
3775 {
3776 FRV_INSN_BC, "bc", "bc", 32,
3777 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3778 },
3779 /* bnc$pack $ICCi_2,$hint,$label16 */
3780 {
3781 FRV_INSN_BNC, "bnc", "bnc", 32,
3782 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3783 },
3784 /* bn$pack $ICCi_2,$hint,$label16 */
3785 {
3786 FRV_INSN_BN, "bn", "bn", 32,
3787 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3788 },
3789 /* bp$pack $ICCi_2,$hint,$label16 */
3790 {
3791 FRV_INSN_BP, "bp", "bp", 32,
3792 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3793 },
3794 /* bv$pack $ICCi_2,$hint,$label16 */
3795 {
3796 FRV_INSN_BV, "bv", "bv", 32,
3797 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3798 },
3799 /* bnv$pack $ICCi_2,$hint,$label16 */
3800 {
3801 FRV_INSN_BNV, "bnv", "bnv", 32,
3802 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3803 },
3804 /* fbra$pack $hint_taken$label16 */
3805 {
3806 FRV_INSN_FBRA, "fbra", "fbra", 32,
3807 { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3808 },
3809 /* fbno$pack$hint_not_taken */
3810 {
3811 FRV_INSN_FBNO, "fbno", "fbno", 32,
3812 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3813 },
3814 /* fbne$pack $FCCi_2,$hint,$label16 */
3815 {
3816 FRV_INSN_FBNE, "fbne", "fbne", 32,
3817 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3818 },
3819 /* fbeq$pack $FCCi_2,$hint,$label16 */
3820 {
3821 FRV_INSN_FBEQ, "fbeq", "fbeq", 32,
3822 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3823 },
3824 /* fblg$pack $FCCi_2,$hint,$label16 */
3825 {
3826 FRV_INSN_FBLG, "fblg", "fblg", 32,
3827 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3828 },
3829 /* fbue$pack $FCCi_2,$hint,$label16 */
3830 {
3831 FRV_INSN_FBUE, "fbue", "fbue", 32,
3832 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3833 },
3834 /* fbul$pack $FCCi_2,$hint,$label16 */
3835 {
3836 FRV_INSN_FBUL, "fbul", "fbul", 32,
3837 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3838 },
3839 /* fbge$pack $FCCi_2,$hint,$label16 */
3840 {
3841 FRV_INSN_FBGE, "fbge", "fbge", 32,
3842 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3843 },
3844 /* fblt$pack $FCCi_2,$hint,$label16 */
3845 {
3846 FRV_INSN_FBLT, "fblt", "fblt", 32,
3847 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3848 },
3849 /* fbuge$pack $FCCi_2,$hint,$label16 */
3850 {
3851 FRV_INSN_FBUGE, "fbuge", "fbuge", 32,
3852 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3853 },
3854 /* fbug$pack $FCCi_2,$hint,$label16 */
3855 {
3856 FRV_INSN_FBUG, "fbug", "fbug", 32,
3857 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3858 },
3859 /* fble$pack $FCCi_2,$hint,$label16 */
3860 {
3861 FRV_INSN_FBLE, "fble", "fble", 32,
3862 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3863 },
3864 /* fbgt$pack $FCCi_2,$hint,$label16 */
3865 {
3866 FRV_INSN_FBGT, "fbgt", "fbgt", 32,
3867 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3868 },
3869 /* fbule$pack $FCCi_2,$hint,$label16 */
3870 {
3871 FRV_INSN_FBULE, "fbule", "fbule", 32,
3872 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3873 },
3874 /* fbu$pack $FCCi_2,$hint,$label16 */
3875 {
3876 FRV_INSN_FBU, "fbu", "fbu", 32,
3877 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3878 },
3879 /* fbo$pack $FCCi_2,$hint,$label16 */
3880 {
3881 FRV_INSN_FBO, "fbo", "fbo", 32,
3882 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_1, FR450_MAJOR_B_1, FR500_MAJOR_B_1, FR550_MAJOR_B_1 } }
3883 },
3884 /* bctrlr$pack $ccond,$hint */
3885 {
3886 FRV_INSN_BCTRLR, "bctrlr", "bctrlr", 32,
3887 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
3888 },
3889 /* bralr$pack$hint_taken */
3890 {
3891 FRV_INSN_BRALR, "bralr", "bralr", 32,
3892 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3893 },
3894 /* bnolr$pack$hint_not_taken */
3895 {
3896 FRV_INSN_BNOLR, "bnolr", "bnolr", 32,
3897 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3898 },
3899 /* beqlr$pack $ICCi_2,$hint */
3900 {
3901 FRV_INSN_BEQLR, "beqlr", "beqlr", 32,
3902 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3903 },
3904 /* bnelr$pack $ICCi_2,$hint */
3905 {
3906 FRV_INSN_BNELR, "bnelr", "bnelr", 32,
3907 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3908 },
3909 /* blelr$pack $ICCi_2,$hint */
3910 {
3911 FRV_INSN_BLELR, "blelr", "blelr", 32,
3912 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3913 },
3914 /* bgtlr$pack $ICCi_2,$hint */
3915 {
3916 FRV_INSN_BGTLR, "bgtlr", "bgtlr", 32,
3917 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3918 },
3919 /* bltlr$pack $ICCi_2,$hint */
3920 {
3921 FRV_INSN_BLTLR, "bltlr", "bltlr", 32,
3922 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3923 },
3924 /* bgelr$pack $ICCi_2,$hint */
3925 {
3926 FRV_INSN_BGELR, "bgelr", "bgelr", 32,
3927 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3928 },
3929 /* blslr$pack $ICCi_2,$hint */
3930 {
3931 FRV_INSN_BLSLR, "blslr", "blslr", 32,
3932 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3933 },
3934 /* bhilr$pack $ICCi_2,$hint */
3935 {
3936 FRV_INSN_BHILR, "bhilr", "bhilr", 32,
3937 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3938 },
3939 /* bclr$pack $ICCi_2,$hint */
3940 {
3941 FRV_INSN_BCLR, "bclr", "bclr", 32,
3942 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3943 },
3944 /* bnclr$pack $ICCi_2,$hint */
3945 {
3946 FRV_INSN_BNCLR, "bnclr", "bnclr", 32,
3947 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3948 },
3949 /* bnlr$pack $ICCi_2,$hint */
3950 {
3951 FRV_INSN_BNLR, "bnlr", "bnlr", 32,
3952 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3953 },
3954 /* bplr$pack $ICCi_2,$hint */
3955 {
3956 FRV_INSN_BPLR, "bplr", "bplr", 32,
3957 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3958 },
3959 /* bvlr$pack $ICCi_2,$hint */
3960 {
3961 FRV_INSN_BVLR, "bvlr", "bvlr", 32,
3962 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3963 },
3964 /* bnvlr$pack $ICCi_2,$hint */
3965 {
3966 FRV_INSN_BNVLR, "bnvlr", "bnvlr", 32,
3967 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3968 },
3969 /* fbralr$pack$hint_taken */
3970 {
3971 FRV_INSN_FBRALR, "fbralr", "fbralr", 32,
3972 { 0|A(FR_ACCESS)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3973 },
3974 /* fbnolr$pack$hint_not_taken */
3975 {
3976 FRV_INSN_FBNOLR, "fbnolr", "fbnolr", 32,
3977 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3978 },
3979 /* fbeqlr$pack $FCCi_2,$hint */
3980 {
3981 FRV_INSN_FBEQLR, "fbeqlr", "fbeqlr", 32,
3982 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3983 },
3984 /* fbnelr$pack $FCCi_2,$hint */
3985 {
3986 FRV_INSN_FBNELR, "fbnelr", "fbnelr", 32,
3987 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3988 },
3989 /* fblglr$pack $FCCi_2,$hint */
3990 {
3991 FRV_INSN_FBLGLR, "fblglr", "fblglr", 32,
3992 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3993 },
3994 /* fbuelr$pack $FCCi_2,$hint */
3995 {
3996 FRV_INSN_FBUELR, "fbuelr", "fbuelr", 32,
3997 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
3998 },
3999 /* fbullr$pack $FCCi_2,$hint */
4000 {
4001 FRV_INSN_FBULLR, "fbullr", "fbullr", 32,
4002 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4003 },
4004 /* fbgelr$pack $FCCi_2,$hint */
4005 {
4006 FRV_INSN_FBGELR, "fbgelr", "fbgelr", 32,
4007 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4008 },
4009 /* fbltlr$pack $FCCi_2,$hint */
4010 {
4011 FRV_INSN_FBLTLR, "fbltlr", "fbltlr", 32,
4012 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4013 },
4014 /* fbugelr$pack $FCCi_2,$hint */
4015 {
4016 FRV_INSN_FBUGELR, "fbugelr", "fbugelr", 32,
4017 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4018 },
4019 /* fbuglr$pack $FCCi_2,$hint */
4020 {
4021 FRV_INSN_FBUGLR, "fbuglr", "fbuglr", 32,
4022 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4023 },
4024 /* fblelr$pack $FCCi_2,$hint */
4025 {
4026 FRV_INSN_FBLELR, "fblelr", "fblelr", 32,
4027 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4028 },
4029 /* fbgtlr$pack $FCCi_2,$hint */
4030 {
4031 FRV_INSN_FBGTLR, "fbgtlr", "fbgtlr", 32,
4032 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4033 },
4034 /* fbulelr$pack $FCCi_2,$hint */
4035 {
4036 FRV_INSN_FBULELR, "fbulelr", "fbulelr", 32,
4037 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4038 },
4039 /* fbulr$pack $FCCi_2,$hint */
4040 {
4041 FRV_INSN_FBULR, "fbulr", "fbulr", 32,
4042 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4043 },
4044 /* fbolr$pack $FCCi_2,$hint */
4045 {
4046 FRV_INSN_FBOLR, "fbolr", "fbolr", 32,
4047 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_3, FR450_MAJOR_B_3, FR500_MAJOR_B_3, FR550_MAJOR_B_3 } }
4048 },
4049 /* bcralr$pack $ccond$hint_taken */
4050 {
4051 FRV_INSN_BCRALR, "bcralr", "bcralr", 32,
4052 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4053 },
4054 /* bcnolr$pack$hint_not_taken */
4055 {
4056 FRV_INSN_BCNOLR, "bcnolr", "bcnolr", 32,
4057 { 0, { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4058 },
4059 /* bceqlr$pack $ICCi_2,$ccond,$hint */
4060 {
4061 FRV_INSN_BCEQLR, "bceqlr", "bceqlr", 32,
4062 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4063 },
4064 /* bcnelr$pack $ICCi_2,$ccond,$hint */
4065 {
4066 FRV_INSN_BCNELR, "bcnelr", "bcnelr", 32,
4067 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4068 },
4069 /* bclelr$pack $ICCi_2,$ccond,$hint */
4070 {
4071 FRV_INSN_BCLELR, "bclelr", "bclelr", 32,
4072 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4073 },
4074 /* bcgtlr$pack $ICCi_2,$ccond,$hint */
4075 {
4076 FRV_INSN_BCGTLR, "bcgtlr", "bcgtlr", 32,
4077 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4078 },
4079 /* bcltlr$pack $ICCi_2,$ccond,$hint */
4080 {
4081 FRV_INSN_BCLTLR, "bcltlr", "bcltlr", 32,
4082 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4083 },
4084 /* bcgelr$pack $ICCi_2,$ccond,$hint */
4085 {
4086 FRV_INSN_BCGELR, "bcgelr", "bcgelr", 32,
4087 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4088 },
4089 /* bclslr$pack $ICCi_2,$ccond,$hint */
4090 {
4091 FRV_INSN_BCLSLR, "bclslr", "bclslr", 32,
4092 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4093 },
4094 /* bchilr$pack $ICCi_2,$ccond,$hint */
4095 {
4096 FRV_INSN_BCHILR, "bchilr", "bchilr", 32,
4097 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4098 },
4099 /* bcclr$pack $ICCi_2,$ccond,$hint */
4100 {
4101 FRV_INSN_BCCLR, "bcclr", "bcclr", 32,
4102 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4103 },
4104 /* bcnclr$pack $ICCi_2,$ccond,$hint */
4105 {
4106 FRV_INSN_BCNCLR, "bcnclr", "bcnclr", 32,
4107 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4108 },
4109 /* bcnlr$pack $ICCi_2,$ccond,$hint */
4110 {
4111 FRV_INSN_BCNLR, "bcnlr", "bcnlr", 32,
4112 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4113 },
4114 /* bcplr$pack $ICCi_2,$ccond,$hint */
4115 {
4116 FRV_INSN_BCPLR, "bcplr", "bcplr", 32,
4117 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4118 },
4119 /* bcvlr$pack $ICCi_2,$ccond,$hint */
4120 {
4121 FRV_INSN_BCVLR, "bcvlr", "bcvlr", 32,
4122 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4123 },
4124 /* bcnvlr$pack $ICCi_2,$ccond,$hint */
4125 {
4126 FRV_INSN_BCNVLR, "bcnvlr", "bcnvlr", 32,
4127 { 0|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4128 },
4129 /* fcbralr$pack $ccond$hint_taken */
4130 {
4131 FRV_INSN_FCBRALR, "fcbralr", "fcbralr", 32,
4132 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4133 },
4134 /* fcbnolr$pack$hint_not_taken */
4135 {
4136 FRV_INSN_FCBNOLR, "fcbnolr", "fcbnolr", 32,
4137 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4138 },
4139 /* fcbeqlr$pack $FCCi_2,$ccond,$hint */
4140 {
4141 FRV_INSN_FCBEQLR, "fcbeqlr", "fcbeqlr", 32,
4142 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4143 },
4144 /* fcbnelr$pack $FCCi_2,$ccond,$hint */
4145 {
4146 FRV_INSN_FCBNELR, "fcbnelr", "fcbnelr", 32,
4147 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4148 },
4149 /* fcblglr$pack $FCCi_2,$ccond,$hint */
4150 {
4151 FRV_INSN_FCBLGLR, "fcblglr", "fcblglr", 32,
4152 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4153 },
4154 /* fcbuelr$pack $FCCi_2,$ccond,$hint */
4155 {
4156 FRV_INSN_FCBUELR, "fcbuelr", "fcbuelr", 32,
4157 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4158 },
4159 /* fcbullr$pack $FCCi_2,$ccond,$hint */
4160 {
4161 FRV_INSN_FCBULLR, "fcbullr", "fcbullr", 32,
4162 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4163 },
4164 /* fcbgelr$pack $FCCi_2,$ccond,$hint */
4165 {
4166 FRV_INSN_FCBGELR, "fcbgelr", "fcbgelr", 32,
4167 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4168 },
4169 /* fcbltlr$pack $FCCi_2,$ccond,$hint */
4170 {
4171 FRV_INSN_FCBLTLR, "fcbltlr", "fcbltlr", 32,
4172 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4173 },
4174 /* fcbugelr$pack $FCCi_2,$ccond,$hint */
4175 {
4176 FRV_INSN_FCBUGELR, "fcbugelr", "fcbugelr", 32,
4177 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4178 },
4179 /* fcbuglr$pack $FCCi_2,$ccond,$hint */
4180 {
4181 FRV_INSN_FCBUGLR, "fcbuglr", "fcbuglr", 32,
4182 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4183 },
4184 /* fcblelr$pack $FCCi_2,$ccond,$hint */
4185 {
4186 FRV_INSN_FCBLELR, "fcblelr", "fcblelr", 32,
4187 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4188 },
4189 /* fcbgtlr$pack $FCCi_2,$ccond,$hint */
4190 {
4191 FRV_INSN_FCBGTLR, "fcbgtlr", "fcbgtlr", 32,
4192 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4193 },
4194 /* fcbulelr$pack $FCCi_2,$ccond,$hint */
4195 {
4196 FRV_INSN_FCBULELR, "fcbulelr", "fcbulelr", 32,
4197 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4198 },
4199 /* fcbulr$pack $FCCi_2,$ccond,$hint */
4200 {
4201 FRV_INSN_FCBULR, "fcbulr", "fcbulr", 32,
4202 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4203 },
4204 /* fcbolr$pack $FCCi_2,$ccond,$hint */
4205 {
4206 FRV_INSN_FCBOLR, "fcbolr", "fcbolr", 32,
4207 { 0|A(FR_ACCESS)|A(COND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_2, FR450_MAJOR_B_2, FR500_MAJOR_B_2, FR550_MAJOR_B_2 } }
4208 },
4209 /* jmpl$pack @($GRi,$GRj) */
4210 {
4211 FRV_INSN_JMPL, "jmpl", "jmpl", 32,
4212 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
4213 },
4214 /* calll$pack $callann($GRi,$GRj) */
4215 {
4216 FRV_INSN_CALLL, "calll", "calll", 32,
4217 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
4218 },
4219 /* jmpil$pack @($GRi,$s12) */
4220 {
4221 FRV_INSN_JMPIL, "jmpil", "jmpil", 32,
4222 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
4223 },
4224 /* callil$pack @($GRi,$s12) */
4225 {
4226 FRV_INSN_CALLIL, "callil", "callil", 32,
4227 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
4228 },
4229 /* call$pack $label24 */
4230 {
4231 FRV_INSN_CALL, "call", "call", 32,
4232 { 0|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_B0, FR400_MAJOR_B_4, FR450_MAJOR_B_4, FR500_MAJOR_B_4, FR550_MAJOR_B_4 } }
4233 },
4234 /* rett$pack $debug */
4235 {
4236 FRV_INSN_RETT, "rett", "rett", 32,
4237 { 0|A(PRIVILEGED)|A(UNCOND_CTI), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
4238 },
4239 /* rei$pack $eir */
4240 {
4241 FRV_INSN_REI, "rei", "rei", 32,
4242 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_1, FR550_MAJOR_NONE } }
4243 },
4244 /* tra$pack $GRi,$GRj */
4245 {
4246 FRV_INSN_TRA, "tra", "tra", 32,
4247 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4248 },
4249 /* tno$pack */
4250 {
4251 FRV_INSN_TNO, "tno", "tno", 32,
4252 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4253 },
4254 /* teq$pack $ICCi_2,$GRi,$GRj */
4255 {
4256 FRV_INSN_TEQ, "teq", "teq", 32,
4257 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4258 },
4259 /* tne$pack $ICCi_2,$GRi,$GRj */
4260 {
4261 FRV_INSN_TNE, "tne", "tne", 32,
4262 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4263 },
4264 /* tle$pack $ICCi_2,$GRi,$GRj */
4265 {
4266 FRV_INSN_TLE, "tle", "tle", 32,
4267 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4268 },
4269 /* tgt$pack $ICCi_2,$GRi,$GRj */
4270 {
4271 FRV_INSN_TGT, "tgt", "tgt", 32,
4272 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4273 },
4274 /* tlt$pack $ICCi_2,$GRi,$GRj */
4275 {
4276 FRV_INSN_TLT, "tlt", "tlt", 32,
4277 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4278 },
4279 /* tge$pack $ICCi_2,$GRi,$GRj */
4280 {
4281 FRV_INSN_TGE, "tge", "tge", 32,
4282 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4283 },
4284 /* tls$pack $ICCi_2,$GRi,$GRj */
4285 {
4286 FRV_INSN_TLS, "tls", "tls", 32,
4287 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4288 },
4289 /* thi$pack $ICCi_2,$GRi,$GRj */
4290 {
4291 FRV_INSN_THI, "thi", "thi", 32,
4292 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4293 },
4294 /* tc$pack $ICCi_2,$GRi,$GRj */
4295 {
4296 FRV_INSN_TC, "tc", "tc", 32,
4297 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4298 },
4299 /* tnc$pack $ICCi_2,$GRi,$GRj */
4300 {
4301 FRV_INSN_TNC, "tnc", "tnc", 32,
4302 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4303 },
4304 /* tn$pack $ICCi_2,$GRi,$GRj */
4305 {
4306 FRV_INSN_TN, "tn", "tn", 32,
4307 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4308 },
4309 /* tp$pack $ICCi_2,$GRi,$GRj */
4310 {
4311 FRV_INSN_TP, "tp", "tp", 32,
4312 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4313 },
4314 /* tv$pack $ICCi_2,$GRi,$GRj */
4315 {
4316 FRV_INSN_TV, "tv", "tv", 32,
4317 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4318 },
4319 /* tnv$pack $ICCi_2,$GRi,$GRj */
4320 {
4321 FRV_INSN_TNV, "tnv", "tnv", 32,
4322 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4323 },
4324 /* ftra$pack $GRi,$GRj */
4325 {
4326 FRV_INSN_FTRA, "ftra", "ftra", 32,
4327 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4328 },
4329 /* ftno$pack */
4330 {
4331 FRV_INSN_FTNO, "ftno", "ftno", 32,
4332 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4333 },
4334 /* ftne$pack $FCCi_2,$GRi,$GRj */
4335 {
4336 FRV_INSN_FTNE, "ftne", "ftne", 32,
4337 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4338 },
4339 /* fteq$pack $FCCi_2,$GRi,$GRj */
4340 {
4341 FRV_INSN_FTEQ, "fteq", "fteq", 32,
4342 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4343 },
4344 /* ftlg$pack $FCCi_2,$GRi,$GRj */
4345 {
4346 FRV_INSN_FTLG, "ftlg", "ftlg", 32,
4347 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4348 },
4349 /* ftue$pack $FCCi_2,$GRi,$GRj */
4350 {
4351 FRV_INSN_FTUE, "ftue", "ftue", 32,
4352 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4353 },
4354 /* ftul$pack $FCCi_2,$GRi,$GRj */
4355 {
4356 FRV_INSN_FTUL, "ftul", "ftul", 32,
4357 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4358 },
4359 /* ftge$pack $FCCi_2,$GRi,$GRj */
4360 {
4361 FRV_INSN_FTGE, "ftge", "ftge", 32,
4362 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4363 },
4364 /* ftlt$pack $FCCi_2,$GRi,$GRj */
4365 {
4366 FRV_INSN_FTLT, "ftlt", "ftlt", 32,
4367 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4368 },
4369 /* ftuge$pack $FCCi_2,$GRi,$GRj */
4370 {
4371 FRV_INSN_FTUGE, "ftuge", "ftuge", 32,
4372 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4373 },
4374 /* ftug$pack $FCCi_2,$GRi,$GRj */
4375 {
4376 FRV_INSN_FTUG, "ftug", "ftug", 32,
4377 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4378 },
4379 /* ftle$pack $FCCi_2,$GRi,$GRj */
4380 {
4381 FRV_INSN_FTLE, "ftle", "ftle", 32,
4382 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4383 },
4384 /* ftgt$pack $FCCi_2,$GRi,$GRj */
4385 {
4386 FRV_INSN_FTGT, "ftgt", "ftgt", 32,
4387 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4388 },
4389 /* ftule$pack $FCCi_2,$GRi,$GRj */
4390 {
4391 FRV_INSN_FTULE, "ftule", "ftule", 32,
4392 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4393 },
4394 /* ftu$pack $FCCi_2,$GRi,$GRj */
4395 {
4396 FRV_INSN_FTU, "ftu", "ftu", 32,
4397 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4398 },
4399 /* fto$pack $FCCi_2,$GRi,$GRj */
4400 {
4401 FRV_INSN_FTO, "fto", "fto", 32,
4402 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4403 },
4404 /* tira$pack $GRi,$s12 */
4405 {
4406 FRV_INSN_TIRA, "tira", "tira", 32,
4407 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4408 },
4409 /* tino$pack */
4410 {
4411 FRV_INSN_TINO, "tino", "tino", 32,
4412 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4413 },
4414 /* tieq$pack $ICCi_2,$GRi,$s12 */
4415 {
4416 FRV_INSN_TIEQ, "tieq", "tieq", 32,
4417 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4418 },
4419 /* tine$pack $ICCi_2,$GRi,$s12 */
4420 {
4421 FRV_INSN_TINE, "tine", "tine", 32,
4422 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4423 },
4424 /* tile$pack $ICCi_2,$GRi,$s12 */
4425 {
4426 FRV_INSN_TILE, "tile", "tile", 32,
4427 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4428 },
4429 /* tigt$pack $ICCi_2,$GRi,$s12 */
4430 {
4431 FRV_INSN_TIGT, "tigt", "tigt", 32,
4432 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4433 },
4434 /* tilt$pack $ICCi_2,$GRi,$s12 */
4435 {
4436 FRV_INSN_TILT, "tilt", "tilt", 32,
4437 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4438 },
4439 /* tige$pack $ICCi_2,$GRi,$s12 */
4440 {
4441 FRV_INSN_TIGE, "tige", "tige", 32,
4442 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4443 },
4444 /* tils$pack $ICCi_2,$GRi,$s12 */
4445 {
4446 FRV_INSN_TILS, "tils", "tils", 32,
4447 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4448 },
4449 /* tihi$pack $ICCi_2,$GRi,$s12 */
4450 {
4451 FRV_INSN_TIHI, "tihi", "tihi", 32,
4452 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4453 },
4454 /* tic$pack $ICCi_2,$GRi,$s12 */
4455 {
4456 FRV_INSN_TIC, "tic", "tic", 32,
4457 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4458 },
4459 /* tinc$pack $ICCi_2,$GRi,$s12 */
4460 {
4461 FRV_INSN_TINC, "tinc", "tinc", 32,
4462 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4463 },
4464 /* tin$pack $ICCi_2,$GRi,$s12 */
4465 {
4466 FRV_INSN_TIN, "tin", "tin", 32,
4467 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4468 },
4469 /* tip$pack $ICCi_2,$GRi,$s12 */
4470 {
4471 FRV_INSN_TIP, "tip", "tip", 32,
4472 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4473 },
4474 /* tiv$pack $ICCi_2,$GRi,$s12 */
4475 {
4476 FRV_INSN_TIV, "tiv", "tiv", 32,
4477 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4478 },
4479 /* tinv$pack $ICCi_2,$GRi,$s12 */
4480 {
4481 FRV_INSN_TINV, "tinv", "tinv", 32,
4482 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4483 },
4484 /* ftira$pack $GRi,$s12 */
4485 {
4486 FRV_INSN_FTIRA, "ftira", "ftira", 32,
4487 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4488 },
4489 /* ftino$pack */
4490 {
4491 FRV_INSN_FTINO, "ftino", "ftino", 32,
4492 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4493 },
4494 /* ftine$pack $FCCi_2,$GRi,$s12 */
4495 {
4496 FRV_INSN_FTINE, "ftine", "ftine", 32,
4497 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4498 },
4499 /* ftieq$pack $FCCi_2,$GRi,$s12 */
4500 {
4501 FRV_INSN_FTIEQ, "ftieq", "ftieq", 32,
4502 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4503 },
4504 /* ftilg$pack $FCCi_2,$GRi,$s12 */
4505 {
4506 FRV_INSN_FTILG, "ftilg", "ftilg", 32,
4507 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4508 },
4509 /* ftiue$pack $FCCi_2,$GRi,$s12 */
4510 {
4511 FRV_INSN_FTIUE, "ftiue", "ftiue", 32,
4512 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4513 },
4514 /* ftiul$pack $FCCi_2,$GRi,$s12 */
4515 {
4516 FRV_INSN_FTIUL, "ftiul", "ftiul", 32,
4517 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4518 },
4519 /* ftige$pack $FCCi_2,$GRi,$s12 */
4520 {
4521 FRV_INSN_FTIGE, "ftige", "ftige", 32,
4522 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4523 },
4524 /* ftilt$pack $FCCi_2,$GRi,$s12 */
4525 {
4526 FRV_INSN_FTILT, "ftilt", "ftilt", 32,
4527 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4528 },
4529 /* ftiuge$pack $FCCi_2,$GRi,$s12 */
4530 {
4531 FRV_INSN_FTIUGE, "ftiuge", "ftiuge", 32,
4532 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4533 },
4534 /* ftiug$pack $FCCi_2,$GRi,$s12 */
4535 {
4536 FRV_INSN_FTIUG, "ftiug", "ftiug", 32,
4537 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4538 },
4539 /* ftile$pack $FCCi_2,$GRi,$s12 */
4540 {
4541 FRV_INSN_FTILE, "ftile", "ftile", 32,
4542 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4543 },
4544 /* ftigt$pack $FCCi_2,$GRi,$s12 */
4545 {
4546 FRV_INSN_FTIGT, "ftigt", "ftigt", 32,
4547 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4548 },
4549 /* ftiule$pack $FCCi_2,$GRi,$s12 */
4550 {
4551 FRV_INSN_FTIULE, "ftiule", "ftiule", 32,
4552 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4553 },
4554 /* ftiu$pack $FCCi_2,$GRi,$s12 */
4555 {
4556 FRV_INSN_FTIU, "ftiu", "ftiu", 32,
4557 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4558 },
4559 /* ftio$pack $FCCi_2,$GRi,$s12 */
4560 {
4561 FRV_INSN_FTIO, "ftio", "ftio", 32,
4562 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4563 },
4564 /* break$pack */
4565 {
4566 FRV_INSN_BREAK, "break", "break", 32,
4567 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4568 },
4569 /* mtrap$pack */
4570 {
4571 FRV_INSN_MTRAP, "mtrap", "mtrap", 32,
4572 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_1, FR450_MAJOR_C_1, FR500_MAJOR_C_1, FR550_MAJOR_C_1 } }
4573 },
4574 /* andcr$pack $CRi,$CRj,$CRk */
4575 {
4576 FRV_INSN_ANDCR, "andcr", "andcr", 32,
4577 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4578 },
4579 /* orcr$pack $CRi,$CRj,$CRk */
4580 {
4581 FRV_INSN_ORCR, "orcr", "orcr", 32,
4582 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4583 },
4584 /* xorcr$pack $CRi,$CRj,$CRk */
4585 {
4586 FRV_INSN_XORCR, "xorcr", "xorcr", 32,
4587 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4588 },
4589 /* nandcr$pack $CRi,$CRj,$CRk */
4590 {
4591 FRV_INSN_NANDCR, "nandcr", "nandcr", 32,
4592 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4593 },
4594 /* norcr$pack $CRi,$CRj,$CRk */
4595 {
4596 FRV_INSN_NORCR, "norcr", "norcr", 32,
4597 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4598 },
4599 /* andncr$pack $CRi,$CRj,$CRk */
4600 {
4601 FRV_INSN_ANDNCR, "andncr", "andncr", 32,
4602 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4603 },
4604 /* orncr$pack $CRi,$CRj,$CRk */
4605 {
4606 FRV_INSN_ORNCR, "orncr", "orncr", 32,
4607 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4608 },
4609 /* nandncr$pack $CRi,$CRj,$CRk */
4610 {
4611 FRV_INSN_NANDNCR, "nandncr", "nandncr", 32,
4612 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4613 },
4614 /* norncr$pack $CRi,$CRj,$CRk */
4615 {
4616 FRV_INSN_NORNCR, "norncr", "norncr", 32,
4617 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4618 },
4619 /* notcr$pack $CRj,$CRk */
4620 {
4621 FRV_INSN_NOTCR, "notcr", "notcr", 32,
4622 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_6, FR450_MAJOR_B_6, FR500_MAJOR_B_6, FR550_MAJOR_B_6 } }
4623 },
4624 /* ckra$pack $CRj_int */
4625 {
4626 FRV_INSN_CKRA, "ckra", "ckra", 32,
4627 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4628 },
4629 /* ckno$pack $CRj_int */
4630 {
4631 FRV_INSN_CKNO, "ckno", "ckno", 32,
4632 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4633 },
4634 /* ckeq$pack $ICCi_3,$CRj_int */
4635 {
4636 FRV_INSN_CKEQ, "ckeq", "ckeq", 32,
4637 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4638 },
4639 /* ckne$pack $ICCi_3,$CRj_int */
4640 {
4641 FRV_INSN_CKNE, "ckne", "ckne", 32,
4642 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4643 },
4644 /* ckle$pack $ICCi_3,$CRj_int */
4645 {
4646 FRV_INSN_CKLE, "ckle", "ckle", 32,
4647 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4648 },
4649 /* ckgt$pack $ICCi_3,$CRj_int */
4650 {
4651 FRV_INSN_CKGT, "ckgt", "ckgt", 32,
4652 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4653 },
4654 /* cklt$pack $ICCi_3,$CRj_int */
4655 {
4656 FRV_INSN_CKLT, "cklt", "cklt", 32,
4657 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4658 },
4659 /* ckge$pack $ICCi_3,$CRj_int */
4660 {
4661 FRV_INSN_CKGE, "ckge", "ckge", 32,
4662 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4663 },
4664 /* ckls$pack $ICCi_3,$CRj_int */
4665 {
4666 FRV_INSN_CKLS, "ckls", "ckls", 32,
4667 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4668 },
4669 /* ckhi$pack $ICCi_3,$CRj_int */
4670 {
4671 FRV_INSN_CKHI, "ckhi", "ckhi", 32,
4672 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4673 },
4674 /* ckc$pack $ICCi_3,$CRj_int */
4675 {
4676 FRV_INSN_CKC, "ckc", "ckc", 32,
4677 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4678 },
4679 /* cknc$pack $ICCi_3,$CRj_int */
4680 {
4681 FRV_INSN_CKNC, "cknc", "cknc", 32,
4682 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4683 },
4684 /* ckn$pack $ICCi_3,$CRj_int */
4685 {
4686 FRV_INSN_CKN, "ckn", "ckn", 32,
4687 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4688 },
4689 /* ckp$pack $ICCi_3,$CRj_int */
4690 {
4691 FRV_INSN_CKP, "ckp", "ckp", 32,
4692 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4693 },
4694 /* ckv$pack $ICCi_3,$CRj_int */
4695 {
4696 FRV_INSN_CKV, "ckv", "ckv", 32,
4697 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4698 },
4699 /* cknv$pack $ICCi_3,$CRj_int */
4700 {
4701 FRV_INSN_CKNV, "cknv", "cknv", 32,
4702 { 0, { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4703 },
4704 /* fckra$pack $CRj_float */
4705 {
4706 FRV_INSN_FCKRA, "fckra", "fckra", 32,
4707 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4708 },
4709 /* fckno$pack $CRj_float */
4710 {
4711 FRV_INSN_FCKNO, "fckno", "fckno", 32,
4712 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4713 },
4714 /* fckne$pack $FCCi_3,$CRj_float */
4715 {
4716 FRV_INSN_FCKNE, "fckne", "fckne", 32,
4717 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4718 },
4719 /* fckeq$pack $FCCi_3,$CRj_float */
4720 {
4721 FRV_INSN_FCKEQ, "fckeq", "fckeq", 32,
4722 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4723 },
4724 /* fcklg$pack $FCCi_3,$CRj_float */
4725 {
4726 FRV_INSN_FCKLG, "fcklg", "fcklg", 32,
4727 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4728 },
4729 /* fckue$pack $FCCi_3,$CRj_float */
4730 {
4731 FRV_INSN_FCKUE, "fckue", "fckue", 32,
4732 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4733 },
4734 /* fckul$pack $FCCi_3,$CRj_float */
4735 {
4736 FRV_INSN_FCKUL, "fckul", "fckul", 32,
4737 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4738 },
4739 /* fckge$pack $FCCi_3,$CRj_float */
4740 {
4741 FRV_INSN_FCKGE, "fckge", "fckge", 32,
4742 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4743 },
4744 /* fcklt$pack $FCCi_3,$CRj_float */
4745 {
4746 FRV_INSN_FCKLT, "fcklt", "fcklt", 32,
4747 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4748 },
4749 /* fckuge$pack $FCCi_3,$CRj_float */
4750 {
4751 FRV_INSN_FCKUGE, "fckuge", "fckuge", 32,
4752 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4753 },
4754 /* fckug$pack $FCCi_3,$CRj_float */
4755 {
4756 FRV_INSN_FCKUG, "fckug", "fckug", 32,
4757 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4758 },
4759 /* fckle$pack $FCCi_3,$CRj_float */
4760 {
4761 FRV_INSN_FCKLE, "fckle", "fckle", 32,
4762 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4763 },
4764 /* fckgt$pack $FCCi_3,$CRj_float */
4765 {
4766 FRV_INSN_FCKGT, "fckgt", "fckgt", 32,
4767 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4768 },
4769 /* fckule$pack $FCCi_3,$CRj_float */
4770 {
4771 FRV_INSN_FCKULE, "fckule", "fckule", 32,
4772 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4773 },
4774 /* fcku$pack $FCCi_3,$CRj_float */
4775 {
4776 FRV_INSN_FCKU, "fcku", "fcku", 32,
4777 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4778 },
4779 /* fcko$pack $FCCi_3,$CRj_float */
4780 {
4781 FRV_INSN_FCKO, "fcko", "fcko", 32,
4782 { 0|A(FR_ACCESS), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4783 },
4784 /* cckra$pack $CRj_int,$CCi,$cond */
4785 {
4786 FRV_INSN_CCKRA, "cckra", "cckra", 32,
4787 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4788 },
4789 /* cckno$pack $CRj_int,$CCi,$cond */
4790 {
4791 FRV_INSN_CCKNO, "cckno", "cckno", 32,
4792 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4793 },
4794 /* cckeq$pack $ICCi_3,$CRj_int,$CCi,$cond */
4795 {
4796 FRV_INSN_CCKEQ, "cckeq", "cckeq", 32,
4797 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4798 },
4799 /* cckne$pack $ICCi_3,$CRj_int,$CCi,$cond */
4800 {
4801 FRV_INSN_CCKNE, "cckne", "cckne", 32,
4802 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4803 },
4804 /* cckle$pack $ICCi_3,$CRj_int,$CCi,$cond */
4805 {
4806 FRV_INSN_CCKLE, "cckle", "cckle", 32,
4807 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4808 },
4809 /* cckgt$pack $ICCi_3,$CRj_int,$CCi,$cond */
4810 {
4811 FRV_INSN_CCKGT, "cckgt", "cckgt", 32,
4812 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4813 },
4814 /* ccklt$pack $ICCi_3,$CRj_int,$CCi,$cond */
4815 {
4816 FRV_INSN_CCKLT, "ccklt", "ccklt", 32,
4817 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4818 },
4819 /* cckge$pack $ICCi_3,$CRj_int,$CCi,$cond */
4820 {
4821 FRV_INSN_CCKGE, "cckge", "cckge", 32,
4822 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4823 },
4824 /* cckls$pack $ICCi_3,$CRj_int,$CCi,$cond */
4825 {
4826 FRV_INSN_CCKLS, "cckls", "cckls", 32,
4827 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4828 },
4829 /* cckhi$pack $ICCi_3,$CRj_int,$CCi,$cond */
4830 {
4831 FRV_INSN_CCKHI, "cckhi", "cckhi", 32,
4832 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4833 },
4834 /* cckc$pack $ICCi_3,$CRj_int,$CCi,$cond */
4835 {
4836 FRV_INSN_CCKC, "cckc", "cckc", 32,
4837 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4838 },
4839 /* ccknc$pack $ICCi_3,$CRj_int,$CCi,$cond */
4840 {
4841 FRV_INSN_CCKNC, "ccknc", "ccknc", 32,
4842 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4843 },
4844 /* cckn$pack $ICCi_3,$CRj_int,$CCi,$cond */
4845 {
4846 FRV_INSN_CCKN, "cckn", "cckn", 32,
4847 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4848 },
4849 /* cckp$pack $ICCi_3,$CRj_int,$CCi,$cond */
4850 {
4851 FRV_INSN_CCKP, "cckp", "cckp", 32,
4852 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4853 },
4854 /* cckv$pack $ICCi_3,$CRj_int,$CCi,$cond */
4855 {
4856 FRV_INSN_CCKV, "cckv", "cckv", 32,
4857 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4858 },
4859 /* ccknv$pack $ICCi_3,$CRj_int,$CCi,$cond */
4860 {
4861 FRV_INSN_CCKNV, "ccknv", "ccknv", 32,
4862 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4863 },
4864 /* cfckra$pack $CRj_float,$CCi,$cond */
4865 {
4866 FRV_INSN_CFCKRA, "cfckra", "cfckra", 32,
4867 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4868 },
4869 /* cfckno$pack $CRj_float,$CCi,$cond */
4870 {
4871 FRV_INSN_CFCKNO, "cfckno", "cfckno", 32,
4872 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4873 },
4874 /* cfckne$pack $FCCi_3,$CRj_float,$CCi,$cond */
4875 {
4876 FRV_INSN_CFCKNE, "cfckne", "cfckne", 32,
4877 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4878 },
4879 /* cfckeq$pack $FCCi_3,$CRj_float,$CCi,$cond */
4880 {
4881 FRV_INSN_CFCKEQ, "cfckeq", "cfckeq", 32,
4882 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4883 },
4884 /* cfcklg$pack $FCCi_3,$CRj_float,$CCi,$cond */
4885 {
4886 FRV_INSN_CFCKLG, "cfcklg", "cfcklg", 32,
4887 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4888 },
4889 /* cfckue$pack $FCCi_3,$CRj_float,$CCi,$cond */
4890 {
4891 FRV_INSN_CFCKUE, "cfckue", "cfckue", 32,
4892 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4893 },
4894 /* cfckul$pack $FCCi_3,$CRj_float,$CCi,$cond */
4895 {
4896 FRV_INSN_CFCKUL, "cfckul", "cfckul", 32,
4897 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4898 },
4899 /* cfckge$pack $FCCi_3,$CRj_float,$CCi,$cond */
4900 {
4901 FRV_INSN_CFCKGE, "cfckge", "cfckge", 32,
4902 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4903 },
4904 /* cfcklt$pack $FCCi_3,$CRj_float,$CCi,$cond */
4905 {
4906 FRV_INSN_CFCKLT, "cfcklt", "cfcklt", 32,
4907 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4908 },
4909 /* cfckuge$pack $FCCi_3,$CRj_float,$CCi,$cond */
4910 {
4911 FRV_INSN_CFCKUGE, "cfckuge", "cfckuge", 32,
4912 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4913 },
4914 /* cfckug$pack $FCCi_3,$CRj_float,$CCi,$cond */
4915 {
4916 FRV_INSN_CFCKUG, "cfckug", "cfckug", 32,
4917 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4918 },
4919 /* cfckle$pack $FCCi_3,$CRj_float,$CCi,$cond */
4920 {
4921 FRV_INSN_CFCKLE, "cfckle", "cfckle", 32,
4922 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4923 },
4924 /* cfckgt$pack $FCCi_3,$CRj_float,$CCi,$cond */
4925 {
4926 FRV_INSN_CFCKGT, "cfckgt", "cfckgt", 32,
4927 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4928 },
4929 /* cfckule$pack $FCCi_3,$CRj_float,$CCi,$cond */
4930 {
4931 FRV_INSN_CFCKULE, "cfckule", "cfckule", 32,
4932 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4933 },
4934 /* cfcku$pack $FCCi_3,$CRj_float,$CCi,$cond */
4935 {
4936 FRV_INSN_CFCKU, "cfcku", "cfcku", 32,
4937 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4938 },
4939 /* cfcko$pack $FCCi_3,$CRj_float,$CCi,$cond */
4940 {
4941 FRV_INSN_CFCKO, "cfcko", "cfcko", 32,
4942 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_B01, FR400_MAJOR_B_5, FR450_MAJOR_B_5, FR500_MAJOR_B_5, FR550_MAJOR_B_5 } }
4943 },
4944 /* cjmpl$pack @($GRi,$GRj),$CCi,$cond */
4945 {
4946 FRV_INSN_CJMPL, "cjmpl", "cjmpl", 32,
4947 { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
4948 },
4949 /* ccalll$pack @($GRi,$GRj),$CCi,$cond */
4950 {
4951 FRV_INSN_CCALLL, "ccalll", "ccalll", 32,
4952 { 0|A(CONDITIONAL)|A(COND_CTI), { (1<<MACH_BASE), UNIT_I0, FR400_MAJOR_I_5, FR450_MAJOR_I_5, FR500_MAJOR_I_5, FR550_MAJOR_I_6 } }
4953 },
4954 /* ici$pack @($GRi,$GRj) */
4955 {
4956 FRV_INSN_ICI, "ici", "ici", 32,
4957 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
4958 },
4959 /* dci$pack @($GRi,$GRj) */
4960 {
4961 FRV_INSN_DCI, "dci", "dci", 32,
4962 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
4963 },
4964 /* icei$pack @($GRi,$GRj),$ae */
4965 {
4966 FRV_INSN_ICEI, "icei", "icei", 32,
4967 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
4968 },
4969 /* dcei$pack @($GRi,$GRj),$ae */
4970 {
4971 FRV_INSN_DCEI, "dcei", "dcei", 32,
4972 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
4973 },
4974 /* dcf$pack @($GRi,$GRj) */
4975 {
4976 FRV_INSN_DCF, "dcf", "dcf", 32,
4977 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
4978 },
4979 /* dcef$pack @($GRi,$GRj),$ae */
4980 {
4981 FRV_INSN_DCEF, "dcef", "dcef", 32,
4982 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_C_2 } }
4983 },
4984 /* witlb$pack $GRk,@($GRi,$GRj) */
4985 {
4986 FRV_INSN_WITLB, "witlb", "witlb", 32,
4987 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
4988 },
4989 /* wdtlb$pack $GRk,@($GRi,$GRj) */
4990 {
4991 FRV_INSN_WDTLB, "wdtlb", "wdtlb", 32,
4992 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
4993 },
4994 /* itlbi$pack @($GRi,$GRj) */
4995 {
4996 FRV_INSN_ITLBI, "itlbi", "itlbi", 32,
4997 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
4998 },
4999 /* dtlbi$pack @($GRi,$GRj) */
5000 {
5001 FRV_INSN_DTLBI, "dtlbi", "dtlbi", 32,
5002 { 0|A(PRIVILEGED), { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
5003 },
5004 /* icpl$pack $GRi,$GRj,$lock */
5005 {
5006 FRV_INSN_ICPL, "icpl", "icpl", 32,
5007 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
5008 },
5009 /* dcpl$pack $GRi,$GRj,$lock */
5010 {
5011 FRV_INSN_DCPL, "dcpl", "dcpl", 32,
5012 { 0, { (1<<MACH_BASE), UNIT_DCPL, FR400_MAJOR_C_2, FR450_MAJOR_I_2, FR500_MAJOR_C_2, FR550_MAJOR_I_8 } }
5013 },
5014 /* icul$pack $GRi */
5015 {
5016 FRV_INSN_ICUL, "icul", "icul", 32,
5017 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
5018 },
5019 /* dcul$pack $GRi */
5020 {
5021 FRV_INSN_DCUL, "dcul", "dcul", 32,
5022 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
5023 },
5024 /* bar$pack */
5025 {
5026 FRV_INSN_BAR, "bar", "bar", 32,
5027 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
5028 },
5029 /* membar$pack */
5030 {
5031 FRV_INSN_MEMBAR, "membar", "membar", 32,
5032 { 0, { (1<<MACH_BASE), UNIT_C, FR400_MAJOR_C_2, FR450_MAJOR_C_2, FR500_MAJOR_C_2, FR550_MAJOR_C_2 } }
5033 },
5034 /* lrai$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
5035 {
5036 FRV_INSN_LRAI, "lrai", "lrai", 32,
5037 { 0, { (1<<MACH_FR450), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5038 },
5039 /* lrad$pack $GRi,$GRk,$LRAE,$LRAD,$LRAS */
5040 {
5041 FRV_INSN_LRAD, "lrad", "lrad", 32,
5042 { 0, { (1<<MACH_FR450), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5043 },
5044 /* tlbpr$pack $GRi,$GRj,$TLBPRopx,$TLBPRL */
5045 {
5046 FRV_INSN_TLBPR, "tlbpr", "tlbpr", 32,
5047 { 0, { (1<<MACH_FR450), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_C_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5048 },
5049 /* cop1$pack $s6_1,$CPRi,$CPRj,$CPRk */
5050 {
5051 FRV_INSN_COP1, "cop1", "cop1", 32,
5052 { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
5053 },
5054 /* cop2$pack $s6_1,$CPRi,$CPRj,$CPRk */
5055 {
5056 FRV_INSN_COP2, "cop2", "cop2", 32,
5057 { 0, { (1<<MACH_FRV), UNIT_C, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_C_2, FR550_MAJOR_NONE } }
5058 },
5059 /* clrgr$pack $GRk */
5060 {
5061 FRV_INSN_CLRGR, "clrgr", "clrgr", 32,
5062 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5063 },
5064 /* clrfr$pack $FRk */
5065 {
5066 FRV_INSN_CLRFR, "clrfr", "clrfr", 32,
5067 { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5068 },
5069 /* clrga$pack */
5070 {
5071 FRV_INSN_CLRGA, "clrga", "clrga", 32,
5072 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5073 },
5074 /* clrfa$pack */
5075 {
5076 FRV_INSN_CLRFA, "clrfa", "clrfa", 32,
5077 { 0|A(FR_ACCESS), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5078 },
5079 /* commitgr$pack $GRk */
5080 {
5081 FRV_INSN_COMMITGR, "commitgr", "commitgr", 32,
5082 { 0, { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5083 },
5084 /* commitfr$pack $FRk */
5085 {
5086 FRV_INSN_COMMITFR, "commitfr", "commitfr", 32,
5087 { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5088 },
5089 /* commitga$pack */
5090 {
5091 FRV_INSN_COMMITGA, "commitga", "commitga", 32,
5092 { 0, { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5093 },
5094 /* commitfa$pack */
5095 {
5096 FRV_INSN_COMMITFA, "commitfa", "commitfa", 32,
5097 { 0|A(FR_ACCESS), { (1<<MACH_FRV)|(1<<MACH_FR500)|(1<<MACH_FR550), UNIT_I01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_I_6, FR550_MAJOR_I_7 } }
5098 },
5099 /* fitos$pack $FRintj,$FRk */
5100 {
5101 FRV_INSN_FITOS, "fitos", "fitos", 32,
5102 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5103 },
5104 /* fstoi$pack $FRj,$FRintk */
5105 {
5106 FRV_INSN_FSTOI, "fstoi", "fstoi", 32,
5107 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5108 },
5109 /* fitod$pack $FRintj,$FRdoublek */
5110 {
5111 FRV_INSN_FITOD, "fitod", "fitod", 32,
5112 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5113 },
5114 /* fdtoi$pack $FRdoublej,$FRintk */
5115 {
5116 FRV_INSN_FDTOI, "fdtoi", "fdtoi", 32,
5117 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5118 },
5119 /* fditos$pack $FRintj,$FRk */
5120 {
5121 FRV_INSN_FDITOS, "fditos", "fditos", 32,
5122 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5123 },
5124 /* fdstoi$pack $FRj,$FRintk */
5125 {
5126 FRV_INSN_FDSTOI, "fdstoi", "fdstoi", 32,
5127 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5128 },
5129 /* nfditos$pack $FRintj,$FRk */
5130 {
5131 FRV_INSN_NFDITOS, "nfditos", "nfditos", 32,
5132 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5133 },
5134 /* nfdstoi$pack $FRj,$FRintk */
5135 {
5136 FRV_INSN_NFDSTOI, "nfdstoi", "nfdstoi", 32,
5137 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5138 },
5139 /* cfitos$pack $FRintj,$FRk,$CCi,$cond */
5140 {
5141 FRV_INSN_CFITOS, "cfitos", "cfitos", 32,
5142 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5143 },
5144 /* cfstoi$pack $FRj,$FRintk,$CCi,$cond */
5145 {
5146 FRV_INSN_CFSTOI, "cfstoi", "cfstoi", 32,
5147 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5148 },
5149 /* nfitos$pack $FRintj,$FRk */
5150 {
5151 FRV_INSN_NFITOS, "nfitos", "nfitos", 32,
5152 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5153 },
5154 /* nfstoi$pack $FRj,$FRintk */
5155 {
5156 FRV_INSN_NFSTOI, "nfstoi", "nfstoi", 32,
5157 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5158 },
5159 /* fmovs$pack $FRj,$FRk */
5160 {
5161 FRV_INSN_FMOVS, "fmovs", "fmovs", 32,
5162 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5163 },
5164 /* fmovd$pack $FRdoublej,$FRdoublek */
5165 {
5166 FRV_INSN_FMOVD, "fmovd", "fmovd", 32,
5167 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5168 },
5169 /* fdmovs$pack $FRj,$FRk */
5170 {
5171 FRV_INSN_FDMOVS, "fdmovs", "fdmovs", 32,
5172 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5173 },
5174 /* cfmovs$pack $FRj,$FRk,$CCi,$cond */
5175 {
5176 FRV_INSN_CFMOVS, "cfmovs", "cfmovs", 32,
5177 { 0|A(FR_ACCESS)|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5178 },
5179 /* fnegs$pack $FRj,$FRk */
5180 {
5181 FRV_INSN_FNEGS, "fnegs", "fnegs", 32,
5182 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5183 },
5184 /* fnegd$pack $FRdoublej,$FRdoublek */
5185 {
5186 FRV_INSN_FNEGD, "fnegd", "fnegd", 32,
5187 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5188 },
5189 /* fdnegs$pack $FRj,$FRk */
5190 {
5191 FRV_INSN_FDNEGS, "fdnegs", "fdnegs", 32,
5192 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5193 },
5194 /* cfnegs$pack $FRj,$FRk,$CCi,$cond */
5195 {
5196 FRV_INSN_CFNEGS, "cfnegs", "cfnegs", 32,
5197 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5198 },
5199 /* fabss$pack $FRj,$FRk */
5200 {
5201 FRV_INSN_FABSS, "fabss", "fabss", 32,
5202 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5203 },
5204 /* fabsd$pack $FRdoublej,$FRdoublek */
5205 {
5206 FRV_INSN_FABSD, "fabsd", "fabsd", 32,
5207 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5208 },
5209 /* fdabss$pack $FRj,$FRk */
5210 {
5211 FRV_INSN_FDABSS, "fdabss", "fdabss", 32,
5212 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_NONE } }
5213 },
5214 /* cfabss$pack $FRj,$FRk,$CCi,$cond */
5215 {
5216 FRV_INSN_CFABSS, "cfabss", "cfabss", 32,
5217 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_1, FR550_MAJOR_F_2 } }
5218 },
5219 /* fsqrts$pack $FRj,$FRk */
5220 {
5221 FRV_INSN_FSQRTS, "fsqrts", "fsqrts", 32,
5222 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
5223 },
5224 /* fdsqrts$pack $FRj,$FRk */
5225 {
5226 FRV_INSN_FDSQRTS, "fdsqrts", "fdsqrts", 32,
5227 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
5228 },
5229 /* nfdsqrts$pack $FRj,$FRk */
5230 {
5231 FRV_INSN_NFDSQRTS, "nfdsqrts", "nfdsqrts", 32,
5232 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
5233 },
5234 /* fsqrtd$pack $FRdoublej,$FRdoublek */
5235 {
5236 FRV_INSN_FSQRTD, "fsqrtd", "fsqrtd", 32,
5237 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
5238 },
5239 /* cfsqrts$pack $FRj,$FRk,$CCi,$cond */
5240 {
5241 FRV_INSN_CFSQRTS, "cfsqrts", "cfsqrts", 32,
5242 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
5243 },
5244 /* nfsqrts$pack $FRj,$FRk */
5245 {
5246 FRV_INSN_NFSQRTS, "nfsqrts", "nfsqrts", 32,
5247 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
5248 },
5249 /* fadds$pack $FRi,$FRj,$FRk */
5250 {
5251 FRV_INSN_FADDS, "fadds", "fadds", 32,
5252 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5253 },
5254 /* fsubs$pack $FRi,$FRj,$FRk */
5255 {
5256 FRV_INSN_FSUBS, "fsubs", "fsubs", 32,
5257 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5258 },
5259 /* fmuls$pack $FRi,$FRj,$FRk */
5260 {
5261 FRV_INSN_FMULS, "fmuls", "fmuls", 32,
5262 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
5263 },
5264 /* fdivs$pack $FRi,$FRj,$FRk */
5265 {
5266 FRV_INSN_FDIVS, "fdivs", "fdivs", 32,
5267 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
5268 },
5269 /* faddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5270 {
5271 FRV_INSN_FADDD, "faddd", "faddd", 32,
5272 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
5273 },
5274 /* fsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5275 {
5276 FRV_INSN_FSUBD, "fsubd", "fsubd", 32,
5277 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
5278 },
5279 /* fmuld$pack $FRdoublei,$FRdoublej,$FRdoublek */
5280 {
5281 FRV_INSN_FMULD, "fmuld", "fmuld", 32,
5282 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_NONE } }
5283 },
5284 /* fdivd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5285 {
5286 FRV_INSN_FDIVD, "fdivd", "fdivd", 32,
5287 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_NONE } }
5288 },
5289 /* cfadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
5290 {
5291 FRV_INSN_CFADDS, "cfadds", "cfadds", 32,
5292 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5293 },
5294 /* cfsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5295 {
5296 FRV_INSN_CFSUBS, "cfsubs", "cfsubs", 32,
5297 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5298 },
5299 /* cfmuls$pack $FRi,$FRj,$FRk,$CCi,$cond */
5300 {
5301 FRV_INSN_CFMULS, "cfmuls", "cfmuls", 32,
5302 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
5303 },
5304 /* cfdivs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5305 {
5306 FRV_INSN_CFDIVS, "cfdivs", "cfdivs", 32,
5307 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
5308 },
5309 /* nfadds$pack $FRi,$FRj,$FRk */
5310 {
5311 FRV_INSN_NFADDS, "nfadds", "nfadds", 32,
5312 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5313 },
5314 /* nfsubs$pack $FRi,$FRj,$FRk */
5315 {
5316 FRV_INSN_NFSUBS, "nfsubs", "nfsubs", 32,
5317 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5318 },
5319 /* nfmuls$pack $FRi,$FRj,$FRk */
5320 {
5321 FRV_INSN_NFMULS, "nfmuls", "nfmuls", 32,
5322 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_3, FR550_MAJOR_F_3 } }
5323 },
5324 /* nfdivs$pack $FRi,$FRj,$FRk */
5325 {
5326 FRV_INSN_NFDIVS, "nfdivs", "nfdivs", 32,
5327 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_4, FR550_MAJOR_F_3 } }
5328 },
5329 /* fcmps$pack $FRi,$FRj,$FCCi_2 */
5330 {
5331 FRV_INSN_FCMPS, "fcmps", "fcmps", 32,
5332 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5333 },
5334 /* fcmpd$pack $FRdoublei,$FRdoublej,$FCCi_2 */
5335 {
5336 FRV_INSN_FCMPD, "fcmpd", "fcmpd", 32,
5337 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_NONE } }
5338 },
5339 /* cfcmps$pack $FRi,$FRj,$FCCi_2,$CCi,$cond */
5340 {
5341 FRV_INSN_CFCMPS, "cfcmps", "cfcmps", 32,
5342 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_2, FR550_MAJOR_F_2 } }
5343 },
5344 /* fdcmps$pack $FRi,$FRj,$FCCi_2 */
5345 {
5346 FRV_INSN_FDCMPS, "fdcmps", "fdcmps", 32,
5347 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5348 },
5349 /* fmadds$pack $FRi,$FRj,$FRk */
5350 {
5351 FRV_INSN_FMADDS, "fmadds", "fmadds", 32,
5352 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5353 },
5354 /* fmsubs$pack $FRi,$FRj,$FRk */
5355 {
5356 FRV_INSN_FMSUBS, "fmsubs", "fmsubs", 32,
5357 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5358 },
5359 /* fmaddd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5360 {
5361 FRV_INSN_FMADDD, "fmaddd", "fmaddd", 32,
5362 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5363 },
5364 /* fmsubd$pack $FRdoublei,$FRdoublej,$FRdoublek */
5365 {
5366 FRV_INSN_FMSUBD, "fmsubd", "fmsubd", 32,
5367 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5368 },
5369 /* fdmadds$pack $FRi,$FRj,$FRk */
5370 {
5371 FRV_INSN_FDMADDS, "fdmadds", "fdmadds", 32,
5372 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5373 },
5374 /* nfdmadds$pack $FRi,$FRj,$FRk */
5375 {
5376 FRV_INSN_NFDMADDS, "nfdmadds", "nfdmadds", 32,
5377 { 0, { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5378 },
5379 /* cfmadds$pack $FRi,$FRj,$FRk,$CCi,$cond */
5380 {
5381 FRV_INSN_CFMADDS, "cfmadds", "cfmadds", 32,
5382 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5383 },
5384 /* cfmsubs$pack $FRi,$FRj,$FRk,$CCi,$cond */
5385 {
5386 FRV_INSN_CFMSUBS, "cfmsubs", "cfmsubs", 32,
5387 { 0|A(CONDITIONAL), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5388 },
5389 /* nfmadds$pack $FRi,$FRj,$FRk */
5390 {
5391 FRV_INSN_NFMADDS, "nfmadds", "nfmadds", 32,
5392 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5393 },
5394 /* nfmsubs$pack $FRi,$FRj,$FRk */
5395 {
5396 FRV_INSN_NFMSUBS, "nfmsubs", "nfmsubs", 32,
5397 { 0|A(NON_EXCEPTING), { (1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5398 },
5399 /* fmas$pack $FRi,$FRj,$FRk */
5400 {
5401 FRV_INSN_FMAS, "fmas", "fmas", 32,
5402 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
5403 },
5404 /* fmss$pack $FRi,$FRj,$FRk */
5405 {
5406 FRV_INSN_FMSS, "fmss", "fmss", 32,
5407 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
5408 },
5409 /* fdmas$pack $FRi,$FRj,$FRk */
5410 {
5411 FRV_INSN_FDMAS, "fdmas", "fdmas", 32,
5412 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5413 },
5414 /* fdmss$pack $FRi,$FRj,$FRk */
5415 {
5416 FRV_INSN_FDMSS, "fdmss", "fdmss", 32,
5417 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5418 },
5419 /* nfdmas$pack $FRi,$FRj,$FRk */
5420 {
5421 FRV_INSN_NFDMAS, "nfdmas", "nfdmas", 32,
5422 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5423 },
5424 /* nfdmss$pack $FRi,$FRj,$FRk */
5425 {
5426 FRV_INSN_NFDMSS, "nfdmss", "nfdmss", 32,
5427 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5428 },
5429 /* cfmas$pack $FRi,$FRj,$FRk,$CCi,$cond */
5430 {
5431 FRV_INSN_CFMAS, "cfmas", "cfmas", 32,
5432 { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
5433 },
5434 /* cfmss$pack $FRi,$FRj,$FRk,$CCi,$cond */
5435 {
5436 FRV_INSN_CFMSS, "cfmss", "cfmss", 32,
5437 { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
5438 },
5439 /* fmad$pack $FRi,$FRj,$FRk */
5440 {
5441 FRV_INSN_FMAD, "fmad", "fmad", 32,
5442 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5443 },
5444 /* fmsd$pack $FRi,$FRj,$FRk */
5445 {
5446 FRV_INSN_FMSD, "fmsd", "fmsd", 32,
5447 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_NONE } }
5448 },
5449 /* nfmas$pack $FRi,$FRj,$FRk */
5450 {
5451 FRV_INSN_NFMAS, "nfmas", "nfmas", 32,
5452 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
5453 },
5454 /* nfmss$pack $FRi,$FRj,$FRk */
5455 {
5456 FRV_INSN_NFMSS, "nfmss", "nfmss", 32,
5457 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_5, FR550_MAJOR_F_4 } }
5458 },
5459 /* fdadds$pack $FRi,$FRj,$FRk */
5460 {
5461 FRV_INSN_FDADDS, "fdadds", "fdadds", 32,
5462 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5463 },
5464 /* fdsubs$pack $FRi,$FRj,$FRk */
5465 {
5466 FRV_INSN_FDSUBS, "fdsubs", "fdsubs", 32,
5467 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5468 },
5469 /* fdmuls$pack $FRi,$FRj,$FRk */
5470 {
5471 FRV_INSN_FDMULS, "fdmuls", "fdmuls", 32,
5472 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
5473 },
5474 /* fddivs$pack $FRi,$FRj,$FRk */
5475 {
5476 FRV_INSN_FDDIVS, "fddivs", "fddivs", 32,
5477 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_NONE } }
5478 },
5479 /* fdsads$pack $FRi,$FRj,$FRk */
5480 {
5481 FRV_INSN_FDSADS, "fdsads", "fdsads", 32,
5482 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5483 },
5484 /* fdmulcs$pack $FRi,$FRj,$FRk */
5485 {
5486 FRV_INSN_FDMULCS, "fdmulcs", "fdmulcs", 32,
5487 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
5488 },
5489 /* nfdmulcs$pack $FRi,$FRj,$FRk */
5490 {
5491 FRV_INSN_NFDMULCS, "nfdmulcs", "nfdmulcs", 32,
5492 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
5493 },
5494 /* nfdadds$pack $FRi,$FRj,$FRk */
5495 {
5496 FRV_INSN_NFDADDS, "nfdadds", "nfdadds", 32,
5497 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5498 },
5499 /* nfdsubs$pack $FRi,$FRj,$FRk */
5500 {
5501 FRV_INSN_NFDSUBS, "nfdsubs", "nfdsubs", 32,
5502 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5503 },
5504 /* nfdmuls$pack $FRi,$FRj,$FRk */
5505 {
5506 FRV_INSN_NFDMULS, "nfdmuls", "nfdmuls", 32,
5507 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_F_4 } }
5508 },
5509 /* nfddivs$pack $FRi,$FRj,$FRk */
5510 {
5511 FRV_INSN_NFDDIVS, "nfddivs", "nfddivs", 32,
5512 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_7, FR550_MAJOR_NONE } }
5513 },
5514 /* nfdsads$pack $FRi,$FRj,$FRk */
5515 {
5516 FRV_INSN_NFDSADS, "nfdsads", "nfdsads", 32,
5517 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_F_4 } }
5518 },
5519 /* nfdcmps$pack $FRi,$FRj,$FCCi_2 */
5520 {
5521 FRV_INSN_NFDCMPS, "nfdcmps", "nfdcmps", 32,
5522 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_6, FR550_MAJOR_NONE } }
5523 },
5524 /* mhsetlos$pack $u12,$FRklo */
5525 {
5526 FRV_INSN_MHSETLOS, "mhsetlos", "mhsetlos", 32,
5527 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
5528 },
5529 /* mhsethis$pack $u12,$FRkhi */
5530 {
5531 FRV_INSN_MHSETHIS, "mhsethis", "mhsethis", 32,
5532 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
5533 },
5534 /* mhdsets$pack $u12,$FRintk */
5535 {
5536 FRV_INSN_MHDSETS, "mhdsets", "mhdsets", 32,
5537 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
5538 },
5539 /* mhsetloh$pack $s5,$FRklo */
5540 {
5541 FRV_INSN_MHSETLOH, "mhsetloh", "mhsetloh", 32,
5542 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
5543 },
5544 /* mhsethih$pack $s5,$FRkhi */
5545 {
5546 FRV_INSN_MHSETHIH, "mhsethih", "mhsethih", 32,
5547 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
5548 },
5549 /* mhdseth$pack $s5,$FRintk */
5550 {
5551 FRV_INSN_MHDSETH, "mhdseth", "mhdseth", 32,
5552 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_5 } }
5553 },
5554 /* mand$pack $FRinti,$FRintj,$FRintk */
5555 {
5556 FRV_INSN_MAND, "mand", "mand", 32,
5557 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5558 },
5559 /* mor$pack $FRinti,$FRintj,$FRintk */
5560 {
5561 FRV_INSN_MOR, "mor", "mor", 32,
5562 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5563 },
5564 /* mxor$pack $FRinti,$FRintj,$FRintk */
5565 {
5566 FRV_INSN_MXOR, "mxor", "mxor", 32,
5567 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5568 },
5569 /* cmand$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5570 {
5571 FRV_INSN_CMAND, "cmand", "cmand", 32,
5572 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5573 },
5574 /* cmor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5575 {
5576 FRV_INSN_CMOR, "cmor", "cmor", 32,
5577 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5578 },
5579 /* cmxor$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5580 {
5581 FRV_INSN_CMXOR, "cmxor", "cmxor", 32,
5582 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5583 },
5584 /* mnot$pack $FRintj,$FRintk */
5585 {
5586 FRV_INSN_MNOT, "mnot", "mnot", 32,
5587 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5588 },
5589 /* cmnot$pack $FRintj,$FRintk,$CCi,$cond */
5590 {
5591 FRV_INSN_CMNOT, "cmnot", "cmnot", 32,
5592 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5593 },
5594 /* mrotli$pack $FRinti,$u6,$FRintk */
5595 {
5596 FRV_INSN_MROTLI, "mrotli", "mrotli", 32,
5597 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5598 },
5599 /* mrotri$pack $FRinti,$u6,$FRintk */
5600 {
5601 FRV_INSN_MROTRI, "mrotri", "mrotri", 32,
5602 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5603 },
5604 /* mwcut$pack $FRinti,$FRintj,$FRintk */
5605 {
5606 FRV_INSN_MWCUT, "mwcut", "mwcut", 32,
5607 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5608 },
5609 /* mwcuti$pack $FRinti,$u6,$FRintk */
5610 {
5611 FRV_INSN_MWCUTI, "mwcuti", "mwcuti", 32,
5612 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5613 },
5614 /* mcut$pack $ACC40Si,$FRintj,$FRintk */
5615 {
5616 FRV_INSN_MCUT, "mcut", "mcut", 32,
5617 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5618 },
5619 /* mcuti$pack $ACC40Si,$s6,$FRintk */
5620 {
5621 FRV_INSN_MCUTI, "mcuti", "mcuti", 32,
5622 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5623 },
5624 /* mcutss$pack $ACC40Si,$FRintj,$FRintk */
5625 {
5626 FRV_INSN_MCUTSS, "mcutss", "mcutss", 32,
5627 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5628 },
5629 /* mcutssi$pack $ACC40Si,$s6,$FRintk */
5630 {
5631 FRV_INSN_MCUTSSI, "mcutssi", "mcutssi", 32,
5632 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5633 },
5634 /* mdcutssi$pack $ACC40Si,$s6,$FRintkeven */
5635 {
5636 FRV_INSN_MDCUTSSI, "mdcutssi", "mdcutssi", 32,
5637 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDCUTSSI, FR400_MAJOR_M_2, FR450_MAJOR_M_6, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
5638 },
5639 /* maveh$pack $FRinti,$FRintj,$FRintk */
5640 {
5641 FRV_INSN_MAVEH, "maveh", "maveh", 32,
5642 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5643 },
5644 /* msllhi$pack $FRinti,$u6,$FRintk */
5645 {
5646 FRV_INSN_MSLLHI, "msllhi", "msllhi", 32,
5647 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5648 },
5649 /* msrlhi$pack $FRinti,$u6,$FRintk */
5650 {
5651 FRV_INSN_MSRLHI, "msrlhi", "msrlhi", 32,
5652 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5653 },
5654 /* msrahi$pack $FRinti,$u6,$FRintk */
5655 {
5656 FRV_INSN_MSRAHI, "msrahi", "msrahi", 32,
5657 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
5658 },
5659 /* mdrotli$pack $FRintieven,$s6,$FRintkeven */
5660 {
5661 FRV_INSN_MDROTLI, "mdrotli", "mdrotli", 32,
5662 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
5663 },
5664 /* mcplhi$pack $FRinti,$u6,$FRintk */
5665 {
5666 FRV_INSN_MCPLHI, "mcplhi", "mcplhi", 32,
5667 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
5668 },
5669 /* mcpli$pack $FRinti,$u6,$FRintk */
5670 {
5671 FRV_INSN_MCPLI, "mcpli", "mcpli", 32,
5672 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMLOW, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_3 } }
5673 },
5674 /* msaths$pack $FRinti,$FRintj,$FRintk */
5675 {
5676 FRV_INSN_MSATHS, "msaths", "msaths", 32,
5677 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5678 },
5679 /* mqsaths$pack $FRintieven,$FRintjeven,$FRintkeven */
5680 {
5681 FRV_INSN_MQSATHS, "mqsaths", "mqsaths", 32,
5682 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_M_2 } }
5683 },
5684 /* msathu$pack $FRinti,$FRintj,$FRintk */
5685 {
5686 FRV_INSN_MSATHU, "msathu", "msathu", 32,
5687 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5688 },
5689 /* mcmpsh$pack $FRinti,$FRintj,$FCCk */
5690 {
5691 FRV_INSN_MCMPSH, "mcmpsh", "mcmpsh", 32,
5692 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5693 },
5694 /* mcmpuh$pack $FRinti,$FRintj,$FCCk */
5695 {
5696 FRV_INSN_MCMPUH, "mcmpuh", "mcmpuh", 32,
5697 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5698 },
5699 /* mabshs$pack $FRintj,$FRintk */
5700 {
5701 FRV_INSN_MABSHS, "mabshs", "mabshs", 32,
5702 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_NONE, FR550_MAJOR_M_2 } }
5703 },
5704 /* maddhss$pack $FRinti,$FRintj,$FRintk */
5705 {
5706 FRV_INSN_MADDHSS, "maddhss", "maddhss", 32,
5707 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5708 },
5709 /* maddhus$pack $FRinti,$FRintj,$FRintk */
5710 {
5711 FRV_INSN_MADDHUS, "maddhus", "maddhus", 32,
5712 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5713 },
5714 /* msubhss$pack $FRinti,$FRintj,$FRintk */
5715 {
5716 FRV_INSN_MSUBHSS, "msubhss", "msubhss", 32,
5717 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5718 },
5719 /* msubhus$pack $FRinti,$FRintj,$FRintk */
5720 {
5721 FRV_INSN_MSUBHUS, "msubhus", "msubhus", 32,
5722 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5723 },
5724 /* cmaddhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5725 {
5726 FRV_INSN_CMADDHSS, "cmaddhss", "cmaddhss", 32,
5727 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5728 },
5729 /* cmaddhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5730 {
5731 FRV_INSN_CMADDHUS, "cmaddhus", "cmaddhus", 32,
5732 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5733 },
5734 /* cmsubhss$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5735 {
5736 FRV_INSN_CMSUBHSS, "cmsubhss", "cmsubhss", 32,
5737 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5738 },
5739 /* cmsubhus$pack $FRinti,$FRintj,$FRintk,$CCi,$cond */
5740 {
5741 FRV_INSN_CMSUBHUS, "cmsubhus", "cmsubhus", 32,
5742 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5743 },
5744 /* mqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven */
5745 {
5746 FRV_INSN_MQADDHSS, "mqaddhss", "mqaddhss", 32,
5747 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5748 },
5749 /* mqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven */
5750 {
5751 FRV_INSN_MQADDHUS, "mqaddhus", "mqaddhus", 32,
5752 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5753 },
5754 /* mqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven */
5755 {
5756 FRV_INSN_MQSUBHSS, "mqsubhss", "mqsubhss", 32,
5757 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5758 },
5759 /* mqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven */
5760 {
5761 FRV_INSN_MQSUBHUS, "mqsubhus", "mqsubhus", 32,
5762 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5763 },
5764 /* cmqaddhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5765 {
5766 FRV_INSN_CMQADDHSS, "cmqaddhss", "cmqaddhss", 32,
5767 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5768 },
5769 /* cmqaddhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5770 {
5771 FRV_INSN_CMQADDHUS, "cmqaddhus", "cmqaddhus", 32,
5772 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5773 },
5774 /* cmqsubhss$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5775 {
5776 FRV_INSN_CMQSUBHSS, "cmqsubhss", "cmqsubhss", 32,
5777 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5778 },
5779 /* cmqsubhus$pack $FRintieven,$FRintjeven,$FRintkeven,$CCi,$cond */
5780 {
5781 FRV_INSN_CMQSUBHUS, "cmqsubhus", "cmqsubhus", 32,
5782 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_1, FR550_MAJOR_M_2 } }
5783 },
5784 /* mqlclrhs$pack $FRintieven,$FRintjeven,$FRintkeven */
5785 {
5786 FRV_INSN_MQLCLRHS, "mqlclrhs", "mqlclrhs", 32,
5787 { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5788 },
5789 /* mqlmths$pack $FRintieven,$FRintjeven,$FRintkeven */
5790 {
5791 FRV_INSN_MQLMTHS, "mqlmths", "mqlmths", 32,
5792 { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5793 },
5794 /* mqsllhi$pack $FRintieven,$u6,$FRintkeven */
5795 {
5796 FRV_INSN_MQSLLHI, "mqsllhi", "mqsllhi", 32,
5797 { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5798 },
5799 /* mqsrahi$pack $FRintieven,$u6,$FRintkeven */
5800 {
5801 FRV_INSN_MQSRAHI, "mqsrahi", "mqsrahi", 32,
5802 { 0, { (1<<MACH_FR450), UNIT_FM0, FR400_MAJOR_NONE, FR450_MAJOR_M_2, FR500_MAJOR_NONE, FR550_MAJOR_NONE } }
5803 },
5804 /* maddaccs$pack $ACC40Si,$ACC40Sk */
5805 {
5806 FRV_INSN_MADDACCS, "maddaccs", "maddaccs", 32,
5807 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5808 },
5809 /* msubaccs$pack $ACC40Si,$ACC40Sk */
5810 {
5811 FRV_INSN_MSUBACCS, "msubaccs", "msubaccs", 32,
5812 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5813 },
5814 /* mdaddaccs$pack $ACC40Si,$ACC40Sk */
5815 {
5816 FRV_INSN_MDADDACCS, "mdaddaccs", "mdaddaccs", 32,
5817 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5818 },
5819 /* mdsubaccs$pack $ACC40Si,$ACC40Sk */
5820 {
5821 FRV_INSN_MDSUBACCS, "mdsubaccs", "mdsubaccs", 32,
5822 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5823 },
5824 /* masaccs$pack $ACC40Si,$ACC40Sk */
5825 {
5826 FRV_INSN_MASACCS, "masaccs", "masaccs", 32,
5827 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5828 },
5829 /* mdasaccs$pack $ACC40Si,$ACC40Sk */
5830 {
5831 FRV_INSN_MDASACCS, "mdasaccs", "mdasaccs", 32,
5832 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_MDUALACC, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5833 },
5834 /* mmulhs$pack $FRinti,$FRintj,$ACC40Sk */
5835 {
5836 FRV_INSN_MMULHS, "mmulhs", "mmulhs", 32,
5837 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5838 },
5839 /* mmulhu$pack $FRinti,$FRintj,$ACC40Sk */
5840 {
5841 FRV_INSN_MMULHU, "mmulhu", "mmulhu", 32,
5842 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5843 },
5844 /* mmulxhs$pack $FRinti,$FRintj,$ACC40Sk */
5845 {
5846 FRV_INSN_MMULXHS, "mmulxhs", "mmulxhs", 32,
5847 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5848 },
5849 /* mmulxhu$pack $FRinti,$FRintj,$ACC40Sk */
5850 {
5851 FRV_INSN_MMULXHU, "mmulxhu", "mmulxhu", 32,
5852 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5853 },
5854 /* cmmulhs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5855 {
5856 FRV_INSN_CMMULHS, "cmmulhs", "cmmulhs", 32,
5857 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5858 },
5859 /* cmmulhu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5860 {
5861 FRV_INSN_CMMULHU, "cmmulhu", "cmmulhu", 32,
5862 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5863 },
5864 /* mqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5865 {
5866 FRV_INSN_MQMULHS, "mqmulhs", "mqmulhs", 32,
5867 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5868 },
5869 /* mqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
5870 {
5871 FRV_INSN_MQMULHU, "mqmulhu", "mqmulhu", 32,
5872 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5873 },
5874 /* mqmulxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5875 {
5876 FRV_INSN_MQMULXHS, "mqmulxhs", "mqmulxhs", 32,
5877 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5878 },
5879 /* mqmulxhu$pack $FRintieven,$FRintjeven,$ACC40Sk */
5880 {
5881 FRV_INSN_MQMULXHU, "mqmulxhu", "mqmulxhu", 32,
5882 { 0|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5883 },
5884 /* cmqmulhs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
5885 {
5886 FRV_INSN_CMQMULHS, "cmqmulhs", "cmqmulhs", 32,
5887 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5888 },
5889 /* cmqmulhu$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
5890 {
5891 FRV_INSN_CMQMULHU, "cmqmulhu", "cmqmulhu", 32,
5892 { 0|A(CONDITIONAL)|A(PRESERVE_OVF), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5893 },
5894 /* mmachs$pack $FRinti,$FRintj,$ACC40Sk */
5895 {
5896 FRV_INSN_MMACHS, "mmachs", "mmachs", 32,
5897 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5898 },
5899 /* mmachu$pack $FRinti,$FRintj,$ACC40Uk */
5900 {
5901 FRV_INSN_MMACHU, "mmachu", "mmachu", 32,
5902 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5903 },
5904 /* mmrdhs$pack $FRinti,$FRintj,$ACC40Sk */
5905 {
5906 FRV_INSN_MMRDHS, "mmrdhs", "mmrdhs", 32,
5907 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5908 },
5909 /* mmrdhu$pack $FRinti,$FRintj,$ACC40Uk */
5910 {
5911 FRV_INSN_MMRDHU, "mmrdhu", "mmrdhu", 32,
5912 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5913 },
5914 /* cmmachs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5915 {
5916 FRV_INSN_CMMACHS, "cmmachs", "cmmachs", 32,
5917 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5918 },
5919 /* cmmachu$pack $FRinti,$FRintj,$ACC40Uk,$CCi,$cond */
5920 {
5921 FRV_INSN_CMMACHU, "cmmachu", "cmmachu", 32,
5922 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5923 },
5924 /* mqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5925 {
5926 FRV_INSN_MQMACHS, "mqmachs", "mqmachs", 32,
5927 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5928 },
5929 /* mqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk */
5930 {
5931 FRV_INSN_MQMACHU, "mqmachu", "mqmachu", 32,
5932 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5933 },
5934 /* cmqmachs$pack $FRintieven,$FRintjeven,$ACC40Sk,$CCi,$cond */
5935 {
5936 FRV_INSN_CMQMACHS, "cmqmachs", "cmqmachs", 32,
5937 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5938 },
5939 /* cmqmachu$pack $FRintieven,$FRintjeven,$ACC40Uk,$CCi,$cond */
5940 {
5941 FRV_INSN_CMQMACHU, "cmqmachu", "cmqmachu", 32,
5942 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5943 },
5944 /* mqxmachs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5945 {
5946 FRV_INSN_MQXMACHS, "mqxmachs", "mqxmachs", 32,
5947 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5948 },
5949 /* mqxmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5950 {
5951 FRV_INSN_MQXMACXHS, "mqxmacxhs", "mqxmacxhs", 32,
5952 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5953 },
5954 /* mqmacxhs$pack $FRintieven,$FRintjeven,$ACC40Sk */
5955 {
5956 FRV_INSN_MQMACXHS, "mqmacxhs", "mqmacxhs", 32,
5957 { 0, { (1<<MACH_FR400)|(1<<MACH_FR450)|(1<<MACH_FR550), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_NONE, FR550_MAJOR_M_4 } }
5958 },
5959 /* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
5960 {
5961 FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
5962 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5963 },
5964 /* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
5965 {
5966 FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
5967 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5968 },
5969 /* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
5970 {
5971 FRV_INSN_MCPXIS, "mcpxis", "mcpxis", 32,
5972 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5973 },
5974 /* mcpxiu$pack $FRinti,$FRintj,$ACC40Sk */
5975 {
5976 FRV_INSN_MCPXIU, "mcpxiu", "mcpxiu", 32,
5977 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5978 },
5979 /* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5980 {
5981 FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
5982 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5983 },
5984 /* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5985 {
5986 FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
5987 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5988 },
5989 /* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5990 {
5991 FRV_INSN_CMCPXIS, "cmcpxis", "cmcpxis", 32,
5992 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5993 },
5994 /* cmcpxiu$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
5995 {
5996 FRV_INSN_CMCPXIU, "cmcpxiu", "cmcpxiu", 32,
5997 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
5998 },
5999 /* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
6000 {
6001 FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
6002 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
6003 },
6004 /* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
6005 {
6006 FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
6007 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
6008 },
6009 /* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
6010 {
6011 FRV_INSN_MQCPXIS, "mqcpxis", "mqcpxis", 32,
6012 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
6013 },
6014 /* mqcpxiu$pack $FRintieven,$FRintjeven,$ACC40Sk */
6015 {
6016 FRV_INSN_MQCPXIU, "mqcpxiu", "mqcpxiu", 32,
6017 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_4, FR550_MAJOR_M_4 } }
6018 },
6019 /* mexpdhw$pack $FRinti,$u6,$FRintk */
6020 {
6021 FRV_INSN_MEXPDHW, "mexpdhw", "mexpdhw", 32,
6022 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6023 },
6024 /* cmexpdhw$pack $FRinti,$u6,$FRintk,$CCi,$cond */
6025 {
6026 FRV_INSN_CMEXPDHW, "cmexpdhw", "cmexpdhw", 32,
6027 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6028 },
6029 /* mexpdhd$pack $FRinti,$u6,$FRintkeven */
6030 {
6031 FRV_INSN_MEXPDHD, "mexpdhd", "mexpdhd", 32,
6032 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6033 },
6034 /* cmexpdhd$pack $FRinti,$u6,$FRintkeven,$CCi,$cond */
6035 {
6036 FRV_INSN_CMEXPDHD, "cmexpdhd", "cmexpdhd", 32,
6037 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6038 },
6039 /* mpackh$pack $FRinti,$FRintj,$FRintk */
6040 {
6041 FRV_INSN_MPACKH, "mpackh", "mpackh", 32,
6042 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6043 },
6044 /* mdpackh$pack $FRintieven,$FRintjeven,$FRintkeven */
6045 {
6046 FRV_INSN_MDPACKH, "mdpackh", "mdpackh", 32,
6047 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_5, FR550_MAJOR_M_3 } }
6048 },
6049 /* munpackh$pack $FRinti,$FRintkeven */
6050 {
6051 FRV_INSN_MUNPACKH, "munpackh", "munpackh", 32,
6052 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6053 },
6054 /* mdunpackh$pack $FRintieven,$FRintk */
6055 {
6056 FRV_INSN_MDUNPACKH, "mdunpackh", "mdunpackh", 32,
6057 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
6058 },
6059 /* mbtoh$pack $FRintj,$FRintkeven */
6060 {
6061 FRV_INSN_MBTOH, "mbtoh", "mbtoh", 32,
6062 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6063 },
6064 /* cmbtoh$pack $FRintj,$FRintkeven,$CCi,$cond */
6065 {
6066 FRV_INSN_CMBTOH, "cmbtoh", "cmbtoh", 32,
6067 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6068 },
6069 /* mhtob$pack $FRintjeven,$FRintk */
6070 {
6071 FRV_INSN_MHTOB, "mhtob", "mhtob", 32,
6072 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6073 },
6074 /* cmhtob$pack $FRintjeven,$FRintk,$CCi,$cond */
6075 {
6076 FRV_INSN_CMHTOB, "cmhtob", "cmhtob", 32,
6077 { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR450_MAJOR_M_2, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6078 },
6079 /* mbtohe$pack $FRintj,$FRintk */
6080 {
6081 FRV_INSN_MBTOHE, "mbtohe", "mbtohe", 32,
6082 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
6083 },
6084 /* cmbtohe$pack $FRintj,$FRintk,$CCi,$cond */
6085 {
6086 FRV_INSN_CMBTOHE, "cmbtohe", "cmbtohe", 32,
6087 { 0|A(CONDITIONAL), { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_7, FR550_MAJOR_NONE } }
6088 },
6089 /* mnop$pack */
6090 {
6091 FRV_INSN_MNOP, "mnop", "mnop", 32,
6092 { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR450_MAJOR_M_1, FR500_MAJOR_M_1, FR550_MAJOR_M_1 } }
6093 },
6094 /* mclracc$pack $ACC40Sk,$A0 */
6095 {
6096 FRV_INSN_MCLRACC_0, "mclracc-0", "mclracc", 32,
6097 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
6098 },
6099 /* mclracc$pack $ACC40Sk,$A1 */
6100 {
6101 FRV_INSN_MCLRACC_1, "mclracc-1", "mclracc", 32,
6102 { 0, { (1<<MACH_BASE), UNIT_MCLRACC_1, FR400_MAJOR_M_2, FR450_MAJOR_M_4, FR500_MAJOR_M_6, FR550_MAJOR_M_3 } }
6103 },
6104 /* mrdacc$pack $ACC40Si,$FRintk */
6105 {
6106 FRV_INSN_MRDACC, "mrdacc", "mrdacc", 32,
6107 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6108 },
6109 /* mrdaccg$pack $ACCGi,$FRintk */
6110 {
6111 FRV_INSN_MRDACCG, "mrdaccg", "mrdaccg", 32,
6112 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_5, FR500_MAJOR_M_2, FR550_MAJOR_M_3 } }
6113 },
6114 /* mwtacc$pack $FRinti,$ACC40Sk */
6115 {
6116 FRV_INSN_MWTACC, "mwtacc", "mwtacc", 32,
6117 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
6118 },
6119 /* mwtaccg$pack $FRinti,$ACCGk */
6120 {
6121 FRV_INSN_MWTACCG, "mwtaccg", "mwtaccg", 32,
6122 { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR450_MAJOR_M_3, FR500_MAJOR_M_3, FR550_MAJOR_M_3 } }
6123 },
6124 /* mcop1$pack $FRi,$FRj,$FRk */
6125 {
6126 FRV_INSN_MCOP1, "mcop1", "mcop1", 32,
6127 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_1, FR550_MAJOR_NONE } }
6128 },
6129 /* mcop2$pack $FRi,$FRj,$FRk */
6130 {
6131 FRV_INSN_MCOP2, "mcop2", "mcop2", 32,
6132 { 0, { (1<<MACH_FRV), UNIT_FM01, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_M_1, FR550_MAJOR_NONE } }
6133 },
6134 /* fnop$pack */
6135 {
6136 FRV_INSN_FNOP, "fnop", "fnop", 32,
6137 { 0, { (1<<MACH_SIMPLE)|(1<<MACH_TOMCAT)|(1<<MACH_FR500)|(1<<MACH_FR550)|(1<<MACH_FRV), UNIT_FMALL, FR400_MAJOR_NONE, FR450_MAJOR_NONE, FR500_MAJOR_F_8, FR550_MAJOR_F_1 } }
6138 },
6139 };
6140
6141 #undef OP
6142 #undef A
6143
6144 /* Initialize anything needed to be done once, before any cpu_open call. */
6145 static void init_tables PARAMS ((void));
6146
6147 static void
init_tables()6148 init_tables ()
6149 {
6150 }
6151
6152 static const CGEN_MACH * lookup_mach_via_bfd_name
6153 PARAMS ((const CGEN_MACH *, const char *));
6154 static void build_hw_table PARAMS ((CGEN_CPU_TABLE *));
6155 static void build_ifield_table PARAMS ((CGEN_CPU_TABLE *));
6156 static void build_operand_table PARAMS ((CGEN_CPU_TABLE *));
6157 static void build_insn_table PARAMS ((CGEN_CPU_TABLE *));
6158 static void frv_cgen_rebuild_tables PARAMS ((CGEN_CPU_TABLE *));
6159
6160 /* Subroutine of frv_cgen_cpu_open to look up a mach via its bfd name. */
6161
6162 static const CGEN_MACH *
lookup_mach_via_bfd_name(table,name)6163 lookup_mach_via_bfd_name (table, name)
6164 const CGEN_MACH *table;
6165 const char *name;
6166 {
6167 while (table->name)
6168 {
6169 if (strcmp (name, table->bfd_name) == 0)
6170 return table;
6171 ++table;
6172 }
6173 abort ();
6174 }
6175
6176 /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6177
6178 static void
build_hw_table(cd)6179 build_hw_table (cd)
6180 CGEN_CPU_TABLE *cd;
6181 {
6182 int i;
6183 int machs = cd->machs;
6184 const CGEN_HW_ENTRY *init = & frv_cgen_hw_table[0];
6185 /* MAX_HW is only an upper bound on the number of selected entries.
6186 However each entry is indexed by it's enum so there can be holes in
6187 the table. */
6188 const CGEN_HW_ENTRY **selected =
6189 (const CGEN_HW_ENTRY **) xmalloc (MAX_HW * sizeof (CGEN_HW_ENTRY *));
6190
6191 cd->hw_table.init_entries = init;
6192 cd->hw_table.entry_size = sizeof (CGEN_HW_ENTRY);
6193 memset (selected, 0, MAX_HW * sizeof (CGEN_HW_ENTRY *));
6194 /* ??? For now we just use machs to determine which ones we want. */
6195 for (i = 0; init[i].name != NULL; ++i)
6196 if (CGEN_HW_ATTR_VALUE (&init[i], CGEN_HW_MACH)
6197 & machs)
6198 selected[init[i].type] = &init[i];
6199 cd->hw_table.entries = selected;
6200 cd->hw_table.num_entries = MAX_HW;
6201 }
6202
6203 /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6204
6205 static void
build_ifield_table(cd)6206 build_ifield_table (cd)
6207 CGEN_CPU_TABLE *cd;
6208 {
6209 cd->ifld_table = & frv_cgen_ifld_table[0];
6210 }
6211
6212 /* Subroutine of frv_cgen_cpu_open to build the hardware table. */
6213
6214 static void
build_operand_table(cd)6215 build_operand_table (cd)
6216 CGEN_CPU_TABLE *cd;
6217 {
6218 int i;
6219 int machs = cd->machs;
6220 const CGEN_OPERAND *init = & frv_cgen_operand_table[0];
6221 /* MAX_OPERANDS is only an upper bound on the number of selected entries.
6222 However each entry is indexed by it's enum so there can be holes in
6223 the table. */
6224 const CGEN_OPERAND **selected =
6225 (const CGEN_OPERAND **) xmalloc (MAX_OPERANDS * sizeof (CGEN_OPERAND *));
6226
6227 cd->operand_table.init_entries = init;
6228 cd->operand_table.entry_size = sizeof (CGEN_OPERAND);
6229 memset (selected, 0, MAX_OPERANDS * sizeof (CGEN_OPERAND *));
6230 /* ??? For now we just use mach to determine which ones we want. */
6231 for (i = 0; init[i].name != NULL; ++i)
6232 if (CGEN_OPERAND_ATTR_VALUE (&init[i], CGEN_OPERAND_MACH)
6233 & machs)
6234 selected[init[i].type] = &init[i];
6235 cd->operand_table.entries = selected;
6236 cd->operand_table.num_entries = MAX_OPERANDS;
6237 }
6238
6239 /* Subroutine of frv_cgen_cpu_open to build the hardware table.
6240 ??? This could leave out insns not supported by the specified mach/isa,
6241 but that would cause errors like "foo only supported by bar" to become
6242 "unknown insn", so for now we include all insns and require the app to
6243 do the checking later.
6244 ??? On the other hand, parsing of such insns may require their hardware or
6245 operand elements to be in the table [which they mightn't be]. */
6246
6247 static void
build_insn_table(cd)6248 build_insn_table (cd)
6249 CGEN_CPU_TABLE *cd;
6250 {
6251 int i;
6252 const CGEN_IBASE *ib = & frv_cgen_insn_table[0];
6253 CGEN_INSN *insns = (CGEN_INSN *) xmalloc (MAX_INSNS * sizeof (CGEN_INSN));
6254
6255 memset (insns, 0, MAX_INSNS * sizeof (CGEN_INSN));
6256 for (i = 0; i < MAX_INSNS; ++i)
6257 insns[i].base = &ib[i];
6258 cd->insn_table.init_entries = insns;
6259 cd->insn_table.entry_size = sizeof (CGEN_IBASE);
6260 cd->insn_table.num_init_entries = MAX_INSNS;
6261 }
6262
6263 /* Subroutine of frv_cgen_cpu_open to rebuild the tables. */
6264
6265 static void
frv_cgen_rebuild_tables(cd)6266 frv_cgen_rebuild_tables (cd)
6267 CGEN_CPU_TABLE *cd;
6268 {
6269 int i;
6270 unsigned int isas = cd->isas;
6271 unsigned int machs = cd->machs;
6272
6273 cd->int_insn_p = CGEN_INT_INSN_P;
6274
6275 /* Data derived from the isa spec. */
6276 #define UNSET (CGEN_SIZE_UNKNOWN + 1)
6277 cd->default_insn_bitsize = UNSET;
6278 cd->base_insn_bitsize = UNSET;
6279 cd->min_insn_bitsize = 65535; /* some ridiculously big number */
6280 cd->max_insn_bitsize = 0;
6281 for (i = 0; i < MAX_ISAS; ++i)
6282 if (((1 << i) & isas) != 0)
6283 {
6284 const CGEN_ISA *isa = & frv_cgen_isa_table[i];
6285
6286 /* Default insn sizes of all selected isas must be
6287 equal or we set the result to 0, meaning "unknown". */
6288 if (cd->default_insn_bitsize == UNSET)
6289 cd->default_insn_bitsize = isa->default_insn_bitsize;
6290 else if (isa->default_insn_bitsize == cd->default_insn_bitsize)
6291 ; /* this is ok */
6292 else
6293 cd->default_insn_bitsize = CGEN_SIZE_UNKNOWN;
6294
6295 /* Base insn sizes of all selected isas must be equal
6296 or we set the result to 0, meaning "unknown". */
6297 if (cd->base_insn_bitsize == UNSET)
6298 cd->base_insn_bitsize = isa->base_insn_bitsize;
6299 else if (isa->base_insn_bitsize == cd->base_insn_bitsize)
6300 ; /* this is ok */
6301 else
6302 cd->base_insn_bitsize = CGEN_SIZE_UNKNOWN;
6303
6304 /* Set min,max insn sizes. */
6305 if (isa->min_insn_bitsize < cd->min_insn_bitsize)
6306 cd->min_insn_bitsize = isa->min_insn_bitsize;
6307 if (isa->max_insn_bitsize > cd->max_insn_bitsize)
6308 cd->max_insn_bitsize = isa->max_insn_bitsize;
6309 }
6310
6311 /* Data derived from the mach spec. */
6312 for (i = 0; i < MAX_MACHS; ++i)
6313 if (((1 << i) & machs) != 0)
6314 {
6315 const CGEN_MACH *mach = & frv_cgen_mach_table[i];
6316
6317 if (mach->insn_chunk_bitsize != 0)
6318 {
6319 if (cd->insn_chunk_bitsize != 0 && cd->insn_chunk_bitsize != mach->insn_chunk_bitsize)
6320 {
6321 fprintf (stderr, "frv_cgen_rebuild_tables: conflicting insn-chunk-bitsize values: `%d' vs. `%d'\n",
6322 cd->insn_chunk_bitsize, mach->insn_chunk_bitsize);
6323 abort ();
6324 }
6325
6326 cd->insn_chunk_bitsize = mach->insn_chunk_bitsize;
6327 }
6328 }
6329
6330 /* Determine which hw elements are used by MACH. */
6331 build_hw_table (cd);
6332
6333 /* Build the ifield table. */
6334 build_ifield_table (cd);
6335
6336 /* Determine which operands are used by MACH/ISA. */
6337 build_operand_table (cd);
6338
6339 /* Build the instruction table. */
6340 build_insn_table (cd);
6341 }
6342
6343 /* Initialize a cpu table and return a descriptor.
6344 It's much like opening a file, and must be the first function called.
6345 The arguments are a set of (type/value) pairs, terminated with
6346 CGEN_CPU_OPEN_END.
6347
6348 Currently supported values:
6349 CGEN_CPU_OPEN_ISAS: bitmap of values in enum isa_attr
6350 CGEN_CPU_OPEN_MACHS: bitmap of values in enum mach_attr
6351 CGEN_CPU_OPEN_BFDMACH: specify 1 mach using bfd name
6352 CGEN_CPU_OPEN_ENDIAN: specify endian choice
6353 CGEN_CPU_OPEN_END: terminates arguments
6354
6355 ??? Simultaneous multiple isas might not make sense, but it's not (yet)
6356 precluded.
6357
6358 ??? We only support ISO C stdargs here, not K&R.
6359 Laziness, plus experiment to see if anything requires K&R - eventually
6360 K&R will no longer be supported - e.g. GDB is currently trying this. */
6361
6362 CGEN_CPU_DESC
frv_cgen_cpu_open(enum cgen_cpu_open_arg arg_type,...)6363 frv_cgen_cpu_open (enum cgen_cpu_open_arg arg_type, ...)
6364 {
6365 CGEN_CPU_TABLE *cd = (CGEN_CPU_TABLE *) xmalloc (sizeof (CGEN_CPU_TABLE));
6366 static int init_p;
6367 unsigned int isas = 0; /* 0 = "unspecified" */
6368 unsigned int machs = 0; /* 0 = "unspecified" */
6369 enum cgen_endian endian = CGEN_ENDIAN_UNKNOWN;
6370 va_list ap;
6371
6372 if (! init_p)
6373 {
6374 init_tables ();
6375 init_p = 1;
6376 }
6377
6378 memset (cd, 0, sizeof (*cd));
6379
6380 va_start (ap, arg_type);
6381 while (arg_type != CGEN_CPU_OPEN_END)
6382 {
6383 switch (arg_type)
6384 {
6385 case CGEN_CPU_OPEN_ISAS :
6386 isas = va_arg (ap, unsigned int);
6387 break;
6388 case CGEN_CPU_OPEN_MACHS :
6389 machs = va_arg (ap, unsigned int);
6390 break;
6391 case CGEN_CPU_OPEN_BFDMACH :
6392 {
6393 const char *name = va_arg (ap, const char *);
6394 const CGEN_MACH *mach =
6395 lookup_mach_via_bfd_name (frv_cgen_mach_table, name);
6396
6397 machs |= 1 << mach->num;
6398 break;
6399 }
6400 case CGEN_CPU_OPEN_ENDIAN :
6401 endian = va_arg (ap, enum cgen_endian);
6402 break;
6403 default :
6404 fprintf (stderr, "frv_cgen_cpu_open: unsupported argument `%d'\n",
6405 arg_type);
6406 abort (); /* ??? return NULL? */
6407 }
6408 arg_type = va_arg (ap, enum cgen_cpu_open_arg);
6409 }
6410 va_end (ap);
6411
6412 /* mach unspecified means "all" */
6413 if (machs == 0)
6414 machs = (1 << MAX_MACHS) - 1;
6415 /* base mach is always selected */
6416 machs |= 1;
6417 /* isa unspecified means "all" */
6418 if (isas == 0)
6419 isas = (1 << MAX_ISAS) - 1;
6420 if (endian == CGEN_ENDIAN_UNKNOWN)
6421 {
6422 /* ??? If target has only one, could have a default. */
6423 fprintf (stderr, "frv_cgen_cpu_open: no endianness specified\n");
6424 abort ();
6425 }
6426
6427 cd->isas = isas;
6428 cd->machs = machs;
6429 cd->endian = endian;
6430 /* FIXME: for the sparc case we can determine insn-endianness statically.
6431 The worry here is where both data and insn endian can be independently
6432 chosen, in which case this function will need another argument.
6433 Actually, will want to allow for more arguments in the future anyway. */
6434 cd->insn_endian = endian;
6435
6436 /* Table (re)builder. */
6437 cd->rebuild_tables = frv_cgen_rebuild_tables;
6438 frv_cgen_rebuild_tables (cd);
6439
6440 /* Default to not allowing signed overflow. */
6441 cd->signed_overflow_ok_p = 0;
6442
6443 return (CGEN_CPU_DESC) cd;
6444 }
6445
6446 /* Cover fn to frv_cgen_cpu_open to handle the simple case of 1 isa, 1 mach.
6447 MACH_NAME is the bfd name of the mach. */
6448
6449 CGEN_CPU_DESC
frv_cgen_cpu_open_1(mach_name,endian)6450 frv_cgen_cpu_open_1 (mach_name, endian)
6451 const char *mach_name;
6452 enum cgen_endian endian;
6453 {
6454 return frv_cgen_cpu_open (CGEN_CPU_OPEN_BFDMACH, mach_name,
6455 CGEN_CPU_OPEN_ENDIAN, endian,
6456 CGEN_CPU_OPEN_END);
6457 }
6458
6459 /* Close a cpu table.
6460 ??? This can live in a machine independent file, but there's currently
6461 no place to put this file (there's no libcgen). libopcodes is the wrong
6462 place as some simulator ports use this but they don't use libopcodes. */
6463
6464 void
frv_cgen_cpu_close(cd)6465 frv_cgen_cpu_close (cd)
6466 CGEN_CPU_DESC cd;
6467 {
6468 unsigned int i;
6469 const CGEN_INSN *insns;
6470
6471 if (cd->macro_insn_table.init_entries)
6472 {
6473 insns = cd->macro_insn_table.init_entries;
6474 for (i = 0; i < cd->macro_insn_table.num_init_entries; ++i, ++insns)
6475 {
6476 if (CGEN_INSN_RX ((insns)))
6477 regfree (CGEN_INSN_RX (insns));
6478 }
6479 }
6480
6481 if (cd->insn_table.init_entries)
6482 {
6483 insns = cd->insn_table.init_entries;
6484 for (i = 0; i < cd->insn_table.num_init_entries; ++i, ++insns)
6485 {
6486 if (CGEN_INSN_RX (insns))
6487 regfree (CGEN_INSN_RX (insns));
6488 }
6489 }
6490
6491
6492
6493 if (cd->macro_insn_table.init_entries)
6494 free ((CGEN_INSN *) cd->macro_insn_table.init_entries);
6495
6496 if (cd->insn_table.init_entries)
6497 free ((CGEN_INSN *) cd->insn_table.init_entries);
6498
6499 if (cd->hw_table.entries)
6500 free ((CGEN_HW_ENTRY *) cd->hw_table.entries);
6501
6502 if (cd->operand_table.entries)
6503 free ((CGEN_HW_ENTRY *) cd->operand_table.entries);
6504
6505 free (cd);
6506 }
6507
6508