1 /*
2 * Copyright (c) 2008-2015 ARM Ltd
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. The name of the company may not be used to endorse or promote
14 * products derived from this software without specific prior written
15 * permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
18 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
22 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
23 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
24 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
26 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include "arm_asm.h"
30 #include <_ansi.h>
31 #include <string.h>
32 #include <limits.h>
33
34 #if defined __OPTIMIZE_SIZE__ || defined PREFER_SIZE_OVER_SPEED
35 #if __ARM_ARCH_ISA_THUMB == 2
36 /* Implemented in strlen.S. */
37
38 #elif defined (__ARM_ARCH_ISA_THUMB)
39 /* Implemented in strlen.S. */
40
41 #else
42 #include "../../string/strlen.c"
43
44 #endif
45
46 #else /* defined __OPTIMIZE_SIZE__ || defined PREFER_SIZE_OVER_SPEED */
47 #if defined __thumb__ && ! defined __thumb2__
48 #include "../../string/strlen.c"
49
50 #elif __ARM_ARCH_ISA_THUMB >= 2 && defined __ARM_FEATURE_DSP
51 /* Implemented in strlen.S. */
52
53 #else
54 size_t __attribute__((naked))
strlen(const char * str)55 strlen (const char* str)
56 {
57 asm ("len .req r0\n\t"
58 "data .req r3\n\t"
59 "addr .req r1\n\t"
60
61 #ifdef _ISA_ARM_7
62 "pld [r0]\n\t"
63 #endif
64 /* Word-align address */
65 "bic addr, r0, #3\n\t"
66 /* Get adjustment for start ... */
67 "ands len, r0, #3\n\t"
68 "neg len, len\n\t"
69 /* First word of data */
70 "ldr data, [addr], #4\n\t"
71 /* Ensure bytes preceeding start ... */
72 "add ip, len, #4\n\t"
73 "mov ip, ip, asl #3\n\t"
74 "mvn r2, #0\n\t"
75 /* ... are masked out */
76 #ifdef __thumb__
77 "itt ne\n\t"
78 # ifdef __ARMEB__
79 "lslne r2, ip\n\t"
80 # else
81 "lsrne r2, ip\n\t"
82 # endif
83 "orrne data, data, r2\n\t"
84 #else
85 "it ne\n\t"
86 # ifdef __ARMEB__
87 "orrne data, data, r2, lsl ip\n\t"
88 # else
89 "orrne data, data, r2, lsr ip\n\t"
90 # endif
91 #endif
92 /* Magic const 0x01010101 */
93 #ifdef _ISA_ARM_7
94 "movw ip, #0x101\n\t"
95 #else
96 "mov ip, #0x1\n\t"
97 "orr ip, ip, ip, lsl #8\n\t"
98 #endif
99 "orr ip, ip, ip, lsl #16\n"
100
101 /* This is the main loop. We subtract one from each byte in
102 the word: the sign bit changes iff the byte was zero or
103 0x80 -- we eliminate the latter case by anding the result
104 with the 1-s complement of the data. */
105 "1:\n\t"
106 /* test (data - 0x01010101) */
107 "sub r2, data, ip\n\t"
108 /* ... & ~data */
109 "bic r2, r2, data\n\t"
110 /* ... & 0x80808080 == 0? */
111 "ands r2, r2, ip, lsl #7\n\t"
112 #ifdef _ISA_ARM_7
113 /* yes, get more data... */
114 "itt eq\n\t"
115 "ldreq data, [addr], #4\n\t"
116 /* and 4 more bytes */
117 "addeq len, len, #4\n\t"
118 /* Unroll the loop a bit. */
119 "pld [addr, #8]\n\t"
120 /* test (data - 0x01010101) */
121 "ittt eq\n\t"
122 "subeq r2, data, ip\n\t"
123 /* ... & ~data */
124 "biceq r2, r2, data\n\t"
125 /* ... & 0x80808080 == 0? */
126 "andeqs r2, r2, ip, lsl #7\n\t"
127 #endif
128 "itt eq\n\t"
129 /* yes, get more data... */
130 "ldreq data, [addr], #4\n\t"
131 /* and 4 more bytes */
132 "addeq len, len, #4\n\t"
133 "beq 1b\n\t"
134 #ifdef __ARMEB__
135 "tst data, #0xff000000\n\t"
136 "itttt ne\n\t"
137 "addne len, len, #1\n\t"
138 "tstne data, #0xff0000\n\t"
139 "addne len, len, #1\n\t"
140 "tstne data, #0xff00\n\t"
141 "it ne\n\t"
142 "addne len, len, #1\n\t"
143 #else
144 # ifdef _ISA_ARM_5
145 /* R2 is the residual sign bits from the above test. All we
146 need to do now is establish the position of the first zero
147 byte... */
148 /* Little-endian is harder, we need the number of trailing
149 zeros / 8 */
150 # ifdef _ISA_ARM_7
151 "rbit r2, r2\n\t"
152 "clz r2, r2\n\t"
153 # else
154 "rsb r1, r2, #0\n\t"
155 "and r2, r2, r1\n\t"
156 "clz r2, r2\n\t"
157 "rsb r2, r2, #31\n\t"
158 # endif
159 "add len, len, r2, lsr #3\n\t"
160 # else /* No CLZ instruction */
161 "tst data, #0xff\n\t"
162 "itttt ne\n\t"
163 "addne len, len, #1\n\t"
164 "tstne data, #0xff00\n\t"
165 "addne len, len, #1\n\t"
166 "tstne data, #0xff0000\n\t"
167 "it ne\n\t"
168 "addne len, len, #1\n\t"
169 # endif
170 #endif
171 "bx lr\n\t");
172 }
173 #endif
174 #endif
175