1 //===-- MipsAsmBackend.h - Mips Asm Backend ------------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file defines the MipsAsmBackend class. 10 // 11 //===----------------------------------------------------------------------===// 12 // 13 14 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H 15 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H 16 17 #include "MCTargetDesc/MipsFixupKinds.h" 18 #include "llvm/ADT/Triple.h" 19 #include "llvm/MC/MCAsmBackend.h" 20 21 namespace llvm { 22 23 class MCAssembler; 24 struct MCFixupKindInfo; 25 class MCObjectWriter; 26 class MCRegisterInfo; 27 class MCSymbolELF; 28 class Target; 29 30 class MipsAsmBackend : public MCAsmBackend { 31 Triple TheTriple; 32 bool IsN32; 33 34 public: MipsAsmBackend(const Target & T,const MCRegisterInfo & MRI,const Triple & TT,StringRef CPU,bool N32)35 MipsAsmBackend(const Target &T, const MCRegisterInfo &MRI, const Triple &TT, 36 StringRef CPU, bool N32) 37 : MCAsmBackend(TT.isLittleEndian() ? support::little : support::big), 38 TheTriple(TT), IsN32(N32) {} 39 40 std::unique_ptr<MCObjectTargetWriter> 41 createObjectTargetWriter() const override; 42 43 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 44 const MCValue &Target, MutableArrayRef<char> Data, 45 uint64_t Value, bool IsResolved, 46 const MCSubtargetInfo *STI) const override; 47 48 Optional<MCFixupKind> getFixupKind(StringRef Name) const override; 49 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override; 50 getNumFixupKinds()51 unsigned getNumFixupKinds() const override { 52 return Mips::NumTargetFixupKinds; 53 } 54 55 /// @name Target Relaxation Interfaces 56 /// @{ 57 58 /// MayNeedRelaxation - Check whether the given instruction may need 59 /// relaxation. 60 /// 61 /// \param Inst - The instruction to test. mayNeedRelaxation(const MCInst & Inst,const MCSubtargetInfo & STI)62 bool mayNeedRelaxation(const MCInst &Inst, 63 const MCSubtargetInfo &STI) const override { 64 return false; 65 } 66 67 /// fixupNeedsRelaxation - Target specific predicate for whether a given 68 /// fixup requires the associated instruction to be relaxed. fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout)69 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value, 70 const MCRelaxableFragment *DF, 71 const MCAsmLayout &Layout) const override { 72 // FIXME. 73 llvm_unreachable("RelaxInstruction() unimplemented"); 74 return false; 75 } 76 77 /// RelaxInstruction - Relax the instruction in the given fragment 78 /// to the next wider instruction. 79 /// 80 /// \param Inst - The instruction to relax, which may be the same 81 /// as the output. 82 /// \param [out] Res On return, the relaxed instruction. relaxInstruction(const MCInst & Inst,const MCSubtargetInfo & STI,MCInst & Res)83 void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI, 84 MCInst &Res) const override {} 85 86 /// @} 87 88 bool writeNopData(raw_ostream &OS, uint64_t Count) const override; 89 90 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 91 const MCValue &Target) override; 92 93 bool isMicroMips(const MCSymbol *Sym) const override; 94 }; // class MipsAsmBackend 95 96 } // namespace 97 98 #endif 99