1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-BE \
4; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6; RUN:   -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-LE \
7; RUN:  --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8
9@glob = local_unnamed_addr global i64 0, align 8
10
11define signext i32 @test_inesll(i64 %a, i64 %b) {
12; CHECK-LABEL: test_inesll:
13; CHECK:       # %bb.0: # %entry
14; CHECK-NEXT:    xor r3, r3, r4
15; CHECK-NEXT:    addic r4, r3, -1
16; CHECK-NEXT:    subfe r3, r4, r3
17; CHECK-NEXT:    blr
18; CHECK-BE-LABEL: test_inesll:
19; CHECK-BE:       # %bb.0: # %entry
20; CHECK-BE-NEXT:    xor r3, r3, r4
21; CHECK-BE-NEXT:    addic r4, r3, -1
22; CHECK-BE-NEXT:    subfe r3, r4, r3
23; CHECK-BE-NEXT:    blr
24;
25; CHECK-LE-LABEL: test_inesll:
26; CHECK-LE:       # %bb.0: # %entry
27; CHECK-LE-NEXT:    xor r3, r3, r4
28; CHECK-LE-NEXT:    addic r4, r3, -1
29; CHECK-LE-NEXT:    subfe r3, r4, r3
30; CHECK-LE-NEXT:    blr
31entry:
32  %cmp = icmp ne i64 %a, %b
33  %conv = zext i1 %cmp to i32
34  ret i32 %conv
35}
36
37define signext i32 @test_inesll_sext(i64 %a, i64 %b) {
38; CHECK-LABEL: test_inesll_sext:
39; CHECK:       # %bb.0: # %entry
40; CHECK-NEXT:    xor r3, r3, r4
41; CHECK-NEXT:    subfic r3, r3, 0
42; CHECK-NEXT:    subfe r3, r3, r3
43; CHECK-NEXT:    blr
44; CHECK-BE-LABEL: test_inesll_sext:
45; CHECK-BE:       # %bb.0: # %entry
46; CHECK-BE-NEXT:    xor r3, r3, r4
47; CHECK-BE-NEXT:    subfic r3, r3, 0
48; CHECK-BE-NEXT:    subfe r3, r3, r3
49; CHECK-BE-NEXT:    blr
50;
51; CHECK-LE-LABEL: test_inesll_sext:
52; CHECK-LE:       # %bb.0: # %entry
53; CHECK-LE-NEXT:    xor r3, r3, r4
54; CHECK-LE-NEXT:    subfic r3, r3, 0
55; CHECK-LE-NEXT:    subfe r3, r3, r3
56; CHECK-LE-NEXT:    blr
57entry:
58  %cmp = icmp ne i64 %a, %b
59  %sub = sext i1 %cmp to i32
60  ret i32 %sub
61}
62
63define signext i32 @test_inesll_z(i64 %a) {
64; CHECK-LABEL: test_inesll_z:
65; CHECK:       # %bb.0: # %entry
66; CHECK-NEXT:    addic r4, r3, -1
67; CHECK-NEXT:    subfe r3, r4, r3
68; CHECK-NEXT:    blr
69; CHECK-BE-LABEL: test_inesll_z:
70; CHECK-BE:       # %bb.0: # %entry
71; CHECK-BE-NEXT:    addic r4, r3, -1
72; CHECK-BE-NEXT:    subfe r3, r4, r3
73; CHECK-BE-NEXT:    blr
74;
75; CHECK-LE-LABEL: test_inesll_z:
76; CHECK-LE:       # %bb.0: # %entry
77; CHECK-LE-NEXT:    addic r4, r3, -1
78; CHECK-LE-NEXT:    subfe r3, r4, r3
79; CHECK-LE-NEXT:    blr
80entry:
81  %cmp = icmp ne i64 %a, 0
82  %conv = zext i1 %cmp to i32
83  ret i32 %conv
84}
85
86define signext i32 @test_inesll_sext_z(i64 %a) {
87; CHECK-LABEL: test_inesll_sext_z:
88; CHECK:       # %bb.0: # %entry
89; CHECK-NEXT:    subfic r3, r3, 0
90; CHECK-NEXT:    subfe r3, r3, r3
91; CHECK-NEXT:    blr
92; CHECK-BE-LABEL: test_inesll_sext_z:
93; CHECK-BE:       # %bb.0: # %entry
94; CHECK-BE-NEXT:    subfic r3, r3, 0
95; CHECK-BE-NEXT:    subfe r3, r3, r3
96; CHECK-BE-NEXT:    blr
97;
98; CHECK-LE-LABEL: test_inesll_sext_z:
99; CHECK-LE:       # %bb.0: # %entry
100; CHECK-LE-NEXT:    subfic r3, r3, 0
101; CHECK-LE-NEXT:    subfe r3, r3, r3
102; CHECK-LE-NEXT:    blr
103entry:
104  %cmp = icmp ne i64 %a, 0
105  %sub = sext i1 %cmp to i32
106  ret i32 %sub
107}
108
109define void @test_inesll_store(i64 %a, i64 %b) {
110; CHECK-LABEL: test_inesll_store:
111; CHECK:       # %bb.0: # %entry
112; CHECK-NEXT:    xor r3, r3, r4
113; CHECK-NEXT:    addis r5, r2, glob@toc@ha
114; CHECK-NEXT:    addic r4, r3, -1
115; CHECK-NEXT:    subfe r3, r4, r3
116; CHECK-NEXT:    std r3, glob@toc@l(r5)
117; CHECK-NEXT:    blr
118; CHECK-BE-LABEL: test_inesll_store:
119; CHECK-BE:       # %bb.0: # %entry
120; CHECK-BE-NEXT:    addis r5, r2, .LC0@toc@ha
121; CHECK-BE-NEXT:    xor r3, r3, r4
122; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r5)
123; CHECK-BE-NEXT:    addic r5, r3, -1
124; CHECK-BE-NEXT:    subfe r3, r5, r3
125; CHECK-BE-NEXT:    std r3, 0(r4)
126; CHECK-BE-NEXT:    blr
127;
128; CHECK-LE-LABEL: test_inesll_store:
129; CHECK-LE:       # %bb.0: # %entry
130; CHECK-LE-NEXT:    xor r3, r3, r4
131; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
132; CHECK-LE-NEXT:    addic r4, r3, -1
133; CHECK-LE-NEXT:    subfe r3, r4, r3
134; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
135; CHECK-LE-NEXT:    blr
136entry:
137  %cmp = icmp ne i64 %a, %b
138  %conv1 = zext i1 %cmp to i64
139  store i64 %conv1, i64* @glob, align 8
140  ret void
141}
142
143define void @test_inesll_sext_store(i64 %a, i64 %b) {
144; CHECK-LABEL: test_inesll_sext_store:
145; CHECK:       # %bb.0: # %entry
146; CHECK-NEXT:    xor r3, r3, r4
147; CHECK-NEXT:    addis r5, r2, glob@toc@ha
148; CHECK-NEXT:    subfic r3, r3, 0
149; CHECK-NEXT:    subfe r3, r3, r3
150; CHECK-NEXT:    std r3, glob@toc@l(r5)
151; CHECK-NEXT:    blr
152; CHECK-BE-LABEL: test_inesll_sext_store:
153; CHECK-BE:       # %bb.0: # %entry
154; CHECK-BE-NEXT:    addis r5, r2, .LC0@toc@ha
155; CHECK-BE-NEXT:    xor r3, r3, r4
156; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r5)
157; CHECK-BE-NEXT:    subfic r3, r3, 0
158; CHECK-BE-NEXT:    subfe r3, r3, r3
159; CHECK-BE-NEXT:    std r3, 0(r4)
160; CHECK-BE-NEXT:    blr
161;
162; CHECK-LE-LABEL: test_inesll_sext_store:
163; CHECK-LE:       # %bb.0: # %entry
164; CHECK-LE-NEXT:    xor r3, r3, r4
165; CHECK-LE-NEXT:    addis r5, r2, glob@toc@ha
166; CHECK-LE-NEXT:    subfic r3, r3, 0
167; CHECK-LE-NEXT:    subfe r3, r3, r3
168; CHECK-LE-NEXT:    std r3, glob@toc@l(r5)
169; CHECK-LE-NEXT:    blr
170entry:
171  %cmp = icmp ne i64 %a, %b
172  %conv1 = sext i1 %cmp to i64
173  store i64 %conv1, i64* @glob, align 8
174  ret void
175}
176
177define void @test_inesll_z_store(i64 %a) {
178; CHECK-LABEL: test_inesll_z_store:
179; CHECK:       # %bb.0: # %entry
180; CHECK-NEXT:    addic r5, r3, -1
181; CHECK-NEXT:    addis r4, r2, glob@toc@ha
182; CHECK-NEXT:    subfe r3, r5, r3
183; CHECK-NEXT:    std r3, glob@toc@l(r4)
184; CHECK-NEXT:    blr
185; CHECK-BE-LABEL: test_inesll_z_store:
186; CHECK-BE:       # %bb.0: # %entry
187; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
188; CHECK-BE-NEXT:    addic r5, r3, -1
189; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
190; CHECK-BE-NEXT:    subfe r3, r5, r3
191; CHECK-BE-NEXT:    std r3, 0(r4)
192; CHECK-BE-NEXT:    blr
193;
194; CHECK-LE-LABEL: test_inesll_z_store:
195; CHECK-LE:       # %bb.0: # %entry
196; CHECK-LE-NEXT:    addic r5, r3, -1
197; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
198; CHECK-LE-NEXT:    subfe r3, r5, r3
199; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
200; CHECK-LE-NEXT:    blr
201entry:
202  %cmp = icmp ne i64 %a, 0
203  %conv1 = zext i1 %cmp to i64
204  store i64 %conv1, i64* @glob, align 8
205  ret void
206}
207
208define void @test_inesll_sext_z_store(i64 %a) {
209; CHECK-LABEL: test_inesll_sext_z_store:
210; CHECK:       # %bb.0: # %entry
211; CHECK-NEXT:    subfic r3, r3, 0
212; CHECK-NEXT:    addis r4, r2, glob@toc@ha
213; CHECK-NEXT:    subfe r3, r3, r3
214; CHECK-NEXT:    std r3, glob@toc@l(r4)
215; CHECK-NEXT:    blr
216; CHECK-BE-LABEL: test_inesll_sext_z_store:
217; CHECK-BE:       # %bb.0: # %entry
218; CHECK-BE-NEXT:    addis r4, r2, .LC0@toc@ha
219; CHECK-BE-NEXT:    subfic r3, r3, 0
220; CHECK-BE-NEXT:    ld r4, .LC0@toc@l(r4)
221; CHECK-BE-NEXT:    subfe r3, r3, r3
222; CHECK-BE-NEXT:    std r3, 0(r4)
223; CHECK-BE-NEXT:    blr
224;
225; CHECK-LE-LABEL: test_inesll_sext_z_store:
226; CHECK-LE:       # %bb.0: # %entry
227; CHECK-LE-NEXT:    subfic r3, r3, 0
228; CHECK-LE-NEXT:    addis r4, r2, glob@toc@ha
229; CHECK-LE-NEXT:    subfe r3, r3, r3
230; CHECK-LE-NEXT:    std r3, glob@toc@l(r4)
231; CHECK-LE-NEXT:    blr
232entry:
233  %cmp = icmp ne i64 %a, 0
234  %conv1 = sext i1 %cmp to i64
235  store i64 %conv1, i64* @glob, align 8
236  ret void
237}
238