1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \ 3; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 4; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \ 5; RUN: --check-prefixes=CHECK,BE 6; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \ 7; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \ 8; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl \ 9; RUN: --check-prefixes=CHECK,LE 10 11@glob = local_unnamed_addr global i8 0, align 1 12 13; Function Attrs: norecurse nounwind readnone 14define i64 @test_llleuc(i8 zeroext %a, i8 zeroext %b) { 15; CHECK-LABEL: test_llleuc: 16; CHECK: # %bb.0: # %entry 17; CHECK-NEXT: sub r3, r4, r3 18; CHECK-NEXT: not r3, r3 19; CHECK-NEXT: rldicl r3, r3, 1, 63 20; CHECK-NEXT: blr 21entry: 22 %cmp = icmp ule i8 %a, %b 23 %conv3 = zext i1 %cmp to i64 24 ret i64 %conv3 25} 26 27; Function Attrs: norecurse nounwind readnone 28define i64 @test_llleuc_sext(i8 zeroext %a, i8 zeroext %b) { 29; CHECK-LABEL: test_llleuc_sext: 30; CHECK: # %bb.0: # %entry 31; CHECK-NEXT: sub r3, r4, r3 32; CHECK-NEXT: rldicl r3, r3, 1, 63 33; CHECK-NEXT: addi r3, r3, -1 34; CHECK-NEXT: blr 35entry: 36 %cmp = icmp ule i8 %a, %b 37 %conv3 = sext i1 %cmp to i64 38 ret i64 %conv3 39} 40 41; Function Attrs: norecurse nounwind readnone 42define i64 @test_llleuc_z(i8 zeroext %a) { 43; CHECK-LABEL: test_llleuc_z: 44; CHECK: # %bb.0: # %entry 45; CHECK-NEXT: cntlzw r3, r3 46; CHECK-NEXT: srwi r3, r3, 5 47; CHECK-NEXT: blr 48entry: 49 %cmp = icmp ule i8 %a, 0 50 %conv2 = zext i1 %cmp to i64 51 ret i64 %conv2 52} 53 54; Function Attrs: norecurse nounwind readnone 55define i64 @test_llleuc_sext_z(i8 zeroext %a) { 56; CHECK-LABEL: test_llleuc_sext_z: 57; CHECK: # %bb.0: # %entry 58; CHECK-NEXT: cntlzw r3, r3 59; CHECK-NEXT: srwi r3, r3, 5 60; CHECK-NEXT: neg r3, r3 61; CHECK-NEXT: blr 62entry: 63 %cmp = icmp ule i8 %a, 0 64 %conv2 = sext i1 %cmp to i64 65 ret i64 %conv2 66} 67 68; Function Attrs: norecurse nounwind 69define void @test_llleuc_store(i8 zeroext %a, i8 zeroext %b) { 70; BE-LABEL: test_llleuc_store: 71; BE: # %bb.0: # %entry 72; BE-NEXT: addis r5, r2, .LC0@toc@ha 73; BE-NEXT: sub r3, r4, r3 74; BE-NEXT: ld r4, .LC0@toc@l(r5) 75; BE-NEXT: not r3, r3 76; BE-NEXT: rldicl r3, r3, 1, 63 77; BE-NEXT: stb r3, 0(r4) 78; BE-NEXT: blr 79; 80; LE-LABEL: test_llleuc_store: 81; LE: # %bb.0: # %entry 82; LE-NEXT: sub r3, r4, r3 83; LE-NEXT: addis r5, r2, glob@toc@ha 84; LE-NEXT: not r3, r3 85; LE-NEXT: rldicl r3, r3, 1, 63 86; LE-NEXT: stb r3, glob@toc@l(r5) 87; LE-NEXT: blr 88entry: 89 %cmp = icmp ule i8 %a, %b 90 %conv3 = zext i1 %cmp to i8 91 store i8 %conv3, i8* @glob 92 ret void 93} 94 95; Function Attrs: norecurse nounwind 96define void @test_llleuc_sext_store(i8 zeroext %a, i8 zeroext %b) { 97; BE-LABEL: test_llleuc_sext_store: 98; BE: # %bb.0: # %entry 99; BE-NEXT: addis r5, r2, .LC0@toc@ha 100; BE-NEXT: sub r3, r4, r3 101; BE-NEXT: ld r4, .LC0@toc@l(r5) 102; BE-NEXT: rldicl r3, r3, 1, 63 103; BE-NEXT: addi r3, r3, -1 104; BE-NEXT: stb r3, 0(r4) 105; BE-NEXT: blr 106; 107; LE-LABEL: test_llleuc_sext_store: 108; LE: # %bb.0: # %entry 109; LE-NEXT: sub r3, r4, r3 110; LE-NEXT: addis r5, r2, glob@toc@ha 111; LE-NEXT: rldicl r3, r3, 1, 63 112; LE-NEXT: addi r3, r3, -1 113; LE-NEXT: stb r3, glob@toc@l(r5) 114; LE-NEXT: blr 115entry: 116 %cmp = icmp ule i8 %a, %b 117 %conv3 = sext i1 %cmp to i8 118 store i8 %conv3, i8* @glob 119 ret void 120} 121 122; Function Attrs: norecurse nounwind 123define void @test_llleuc_z_store(i8 zeroext %a) { 124; BE-LABEL: test_llleuc_z_store: 125; BE: # %bb.0: # %entry 126; BE-NEXT: addis r4, r2, .LC0@toc@ha 127; BE-NEXT: cntlzw r3, r3 128; BE-NEXT: ld r4, .LC0@toc@l(r4) 129; BE-NEXT: srwi r3, r3, 5 130; BE-NEXT: stb r3, 0(r4) 131; BE-NEXT: blr 132; 133; LE-LABEL: test_llleuc_z_store: 134; LE: # %bb.0: # %entry 135; LE-NEXT: cntlzw r3, r3 136; LE-NEXT: addis r4, r2, glob@toc@ha 137; LE-NEXT: srwi r3, r3, 5 138; LE-NEXT: stb r3, glob@toc@l(r4) 139; LE-NEXT: blr 140entry: 141 %cmp = icmp ule i8 %a, 0 142 %conv2 = zext i1 %cmp to i8 143 store i8 %conv2, i8* @glob 144 ret void 145} 146 147; Function Attrs: norecurse nounwind 148define void @test_llleuc_sext_z_store(i8 zeroext %a) { 149; BE-LABEL: test_llleuc_sext_z_store: 150; BE: # %bb.0: # %entry 151; BE-NEXT: addis r4, r2, .LC0@toc@ha 152; BE-NEXT: cntlzw r3, r3 153; BE-NEXT: ld r4, .LC0@toc@l(r4) 154; BE-NEXT: srwi r3, r3, 5 155; BE-NEXT: neg r3, r3 156; BE-NEXT: stb r3, 0(r4) 157; BE-NEXT: blr 158; 159; LE-LABEL: test_llleuc_sext_z_store: 160; LE: # %bb.0: # %entry 161; LE-NEXT: cntlzw r3, r3 162; LE-NEXT: addis r4, r2, glob@toc@ha 163; LE-NEXT: srwi r3, r3, 5 164; LE-NEXT: neg r3, r3 165; LE-NEXT: stb r3, glob@toc@l(r4) 166; LE-NEXT: blr 167entry: 168 %cmp = icmp ule i8 %a, 0 169 %conv2 = sext i1 %cmp to i8 170 store i8 %conv2, i8* @glob 171 ret void 172} 173