1; RUN: llc -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s -mtriple=powerpc64-linux-gnu -mcpu=pwr8 -mattr=+vsx | FileCheck %s -check-prefix=CHECK-VSX 2; RUN: llc -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s -mtriple=powerpc64-linux-gnu -mcpu=pwr8 -mattr=-vsx | FileCheck %s -check-prefix=CHECK-NOVSX 3; RUN: llc -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s -mtriple=powerpc64le-linux-gnu -mcpu=pwr8 -mattr=+vsx | FileCheck %s -check-prefix=CHECK-VSX 4; RUN: llc -verify-machineinstrs -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s -mtriple=powerpc64le-linux-gnu -mcpu=pwr8 -mattr=-vsx | FileCheck %s -check-prefix=CHECK-NOVSX 5 6define <4 x float> @test1(<4 x float> %a, <4 x float> %b, <4 x float> %c, <4 x float> %d) { 7entry: 8 %m = fcmp oeq <4 x float> %c, %d 9 %v = select <4 x i1> %m, <4 x float> %a, <4 x float> %b 10 ret <4 x float> %v 11} 12; CHECK-VSX-LABLE: test1 13; CHECK-VSX: xvcmpeqsp [[REG1:(vs|v)[0-9]+]], v4, v5 14; CHECK-VSX: xxsel v2, v3, v2, [[REG1]] 15; CHECK-VSX: blr 16 17; CHECK-NOVSX-LABLE: test1 18; CHECK-NOVSX: vcmpeqfp v[[REG1:[0-9]+]], v4, v5 19; CHECK-NOVSX: vsel v2, v3, v2, v[[REG1]] 20; CHECK-NOVSX: blr 21 22define <2 x double> @test2(<2 x double> %a, <2 x double> %b, <2 x double> %c, <2 x double> %d) { 23entry: 24 %m = fcmp oeq <2 x double> %c, %d 25 %v = select <2 x i1> %m, <2 x double> %a, <2 x double> %b 26 ret <2 x double> %v 27} 28; CHECK-VSX-LABLE: test2 29; CHECK-VSX: xvcmpeqdp [[REG1:(vs|v)[0-9]+]], v4, v5 30; CHECK-VSX: xxsel v2, v3, v2, [[REG1]] 31; CHECK-VSX: blr 32 33; CHECK-NOVSX-LABLE: test2 34; CHECK-NOVSX: fcmp 35; CHECK-NOVSX: fcmp 36; CHECK-NOVSX: blr 37 38define <16 x i8> @test3(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) { 39entry: 40 %m = icmp eq <16 x i8> %c, %d 41 %v = select <16 x i1> %m, <16 x i8> %a, <16 x i8> %b 42 ret <16 x i8> %v 43} 44; CHECK-VSX-LABLE: test3 45; CHECK-VSX: vcmpequb v[[REG1:[0-9]+]], v4, v5 46; CHECK-VSX: xxsel v2, v3, v2, v[[REG1]] 47; CHECK-VSX: blr 48 49; CHECK-NOVSX-LABLE: test3 50; CHECK-NOVSX: vcmpequb v[[REG1:[0-9]+]], v4, v5 51; CHECK-NOVSX: vsel v2, v3, v2, v[[REG1]] 52; CHECK-NOVSX: blr 53 54define <8 x i16> @test4(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, <8 x i16> %d) { 55entry: 56 %m = icmp eq <8 x i16> %c, %d 57 %v = select <8 x i1> %m, <8 x i16> %a, <8 x i16> %b 58 ret <8 x i16> %v 59} 60; CHECK-VSX-LABLE: test4 61; CHECK-VSX: vcmpequh v[[REG1:[0-9]+]], v4, v5 62; CHECK-VSX: xxsel v2, v3, v2, v[[REG1]] 63; CHECK-VSX: blr 64 65; CHECK-NOVSX-LABLE: test4 66; CHECK-NOVSX: vcmpequh v[[REG1:[0-9]+]], v4, v5 67; CHECK-NOVSX: vsel v2, v3, v2, v[[REG1]] 68; CHECK-NOVSX: blr 69 70define <4 x i32> @test5(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) { 71entry: 72 %m = icmp eq <4 x i32> %c, %d 73 %v = select <4 x i1> %m, <4 x i32> %a, <4 x i32> %b 74 ret <4 x i32> %v 75} 76; CHECK-VSX-LABLE: test5 77; CHECK-VSX: vcmpequw v[[REG1:[0-9]+]], v4, v5 78; CHECK-VSX: xxsel v2, v3, v2, v[[REG1]] 79; CHECK-VSX: blr 80 81; CHECK-NOVSX-LABLE: test5 82; CHECK-NOVSX: vcmpequw v[[REG1:[0-9]+]], v4, v5 83; CHECK-NOVSX: vsel v2, v3, v2, v[[REG1]] 84; CHECK-NOVSX: blr 85 86define <2 x i64> @test6(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, <2 x i64> %d) { 87entry: 88 %m = icmp eq <2 x i64> %c, %d 89 %v = select <2 x i1> %m, <2 x i64> %a, <2 x i64> %b 90 ret <2 x i64> %v 91} 92; CHECK-VSX-LABLE: test6 93; CHECK-VSX: vcmpequd v[[REG1:[0-9]+]], v4, v5 94; CHECK-VSX: xxsel v2, v3, v2, v[[REG1]] 95; CHECK-VSX: blr 96 97; CHECK-NOVSX-LABLE: test6 98; CHECK-NOVSX: vcmpequd v[[REG1:[0-9]+]], v4, v5 99; CHECK-NOVSX: vsel v2, v3, v2, v[[REG1]] 100; CHECK-NOVSX: blr 101