1 /// @file xed-encoder-iforms-init.c 2 3 // This file was automatically generated. 4 // Do not edit this file. 5 6 /*BEGIN_LEGAL 7 8 Copyright (c) 2018 Intel Corporation 9 10 Licensed under the Apache License, Version 2.0 (the "License"); 11 you may not use this file except in compliance with the License. 12 You may obtain a copy of the License at 13 14 http://www.apache.org/licenses/LICENSE-2.0 15 16 Unless required by applicable law or agreed to in writing, software 17 distributed under the License is distributed on an "AS IS" BASIS, 18 WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 19 See the License for the specific language governing permissions and 20 limitations under the License. 21 22 END_LEGAL */ 23 #include "xed-internal-header.h" 24 #include "xed-ild.h" 25 const xed_encoder_iform_t xed_encode_iform_db[XED_ENCODE_MAX_IFORMS] = { 26 /*( 0) SLDT*/ { 0, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 27 /*( 1) SLDT*/ { 1, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 28 /*( 2) VMOVMSKPD*/ { 2, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 29 /*( 3) VMOVMSKPD*/ { 2, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 30 /*( 4) UNPCKHPS*/ { 3, 0, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 31 /*( 5) UNPCKHPS*/ { 4, 1, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 32 /*( 6) UNPCKHPD*/ { 3, 3, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 33 /*( 7) UNPCKHPD*/ { 4, 4, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 34 /*( 8) POPCNT*/ { 5, 0, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 35 /*( 9) POPCNT*/ { 6, 1, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 36 /*( 10) VMOVMSKPS*/ { 2, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 37 /*( 11) VMOVMSKPS*/ { 2, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 38 /*( 12) VPMULHUW*/ { 7, 5, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 25}, 39 /*( 13) VPMULHUW*/ { 8, 2, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 40 /*( 14) VPMULHUW*/ { 7, 5, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 41 /*( 15) VPMULHUW*/ { 8, 2, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 42 /*( 16) VPMULHUW*/ { 9, 2, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 43 /*( 17) VPMULHUW*/ { 10, 6, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 44 /*( 18) VPMULHUW*/ { 9, 2, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 45 /*( 19) VPMULHUW*/ { 10, 6, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 46 /*( 20) VPMULHUW*/ { 9, 2, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 47 /*( 21) VPMULHUW*/ { 10, 6, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 48 /*( 22) VPMOVM2B*/ { 11, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 49 /*( 23) VPMOVM2B*/ { 11, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 50 /*( 24) VPMOVM2B*/ { 11, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 51 /*( 25) VPROLVD*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 52 /*( 26) VPROLVD*/ { 13, 7, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 53 /*( 27) VPROLVD*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 54 /*( 28) VPROLVD*/ { 13, 7, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 55 /*( 29) VPROLVD*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 56 /*( 30) VPROLVD*/ { 13, 7, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 57 /*( 31) FUCOM*/ { 1, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 58 /*( 32) WRGSBASE*/ { 14, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 62}, 59 /*( 33) VPROLVQ*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 60 /*( 34) VPROLVQ*/ { 13, 8, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 61 /*( 35) VPROLVQ*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 62 /*( 36) VPROLVQ*/ { 13, 8, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 63 /*( 37) VPROLVQ*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 64 /*( 38) VPROLVQ*/ { 13, 8, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 65 /*( 39) V4FNMADDPS*/ { 15, 9, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 77}, 66 /*( 40) VRCPSS*/ { 7, 5, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 67 /*( 41) VRCPSS*/ { 8, 2, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 68 /*( 42) JNS*/ { 16, 10, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 69 /*( 43) JNS*/ { 16, 11, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 70 /*( 44) JNS*/ { 16, 12, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 71 /*( 45) JNS*/ { 16, 13, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 72 /*( 46) VPTERNLOGQ*/ { 12, 14, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 73 /*( 47) VPTERNLOGQ*/ { 13, 15, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 74 /*( 48) VPTERNLOGQ*/ { 12, 14, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 75 /*( 49) VPTERNLOGQ*/ { 13, 15, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 76 /*( 50) VPTERNLOGQ*/ { 12, 14, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 77 /*( 51) VPTERNLOGQ*/ { 13, 15, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 78 /*( 52) JNP*/ { 16, 10, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 79 /*( 53) JNP*/ { 16, 11, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 80 /*( 54) JNP*/ { 16, 12, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 81 /*( 55) JNP*/ { 16, 13, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 82 /*( 56) JNZ*/ { 16, 10, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 83 /*( 57) JNZ*/ { 16, 11, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 84 /*( 58) JNZ*/ { 16, 12, 0x85, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 85 /*( 59) JNZ*/ { 16, 13, 0x85, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 86 /*( 60) JNB*/ { 16, 10, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 87 /*( 61) JNB*/ { 16, 11, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 88 /*( 62) JNB*/ { 16, 12, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 89 /*( 63) JNB*/ { 16, 13, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 90 /*( 64) PMOVSXWD*/ { 3, 16, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 91 /*( 65) PMOVSXWD*/ { 4, 17, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 92 /*( 66) VPTERNLOGD*/ { 12, 14, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 93 /*( 67) VPTERNLOGD*/ { 13, 18, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 94 /*( 68) VPTERNLOGD*/ { 12, 14, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 95 /*( 69) VPTERNLOGD*/ { 13, 18, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 96 /*( 70) VPTERNLOGD*/ { 12, 14, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 97 /*( 71) VPTERNLOGD*/ { 13, 18, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 98 /*( 72) SYSEXIT*/ { 16, 19, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 99 /*( 73) SYSEXIT*/ { 16, 19, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 100 /*( 74) JNO*/ { 16, 10, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 101 /*( 75) JNO*/ { 16, 11, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 102 /*( 76) JNO*/ { 16, 12, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 103 /*( 77) JNO*/ { 16, 13, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 104 /*( 78) JNL*/ { 16, 10, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 105 /*( 79) JNL*/ { 16, 11, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 106 /*( 80) JNL*/ { 16, 12, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 107 /*( 81) JNL*/ { 16, 13, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 108 /*( 82) NOP9*/ { 16, 20, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 109 /*( 83) NOP8*/ { 16, 21, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 110 /*( 84) PHSUBD*/ { 3, 0, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 111 /*( 85) PHSUBD*/ { 4, 1, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 112 /*( 86) PHSUBD*/ { 3, 3, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 113 /*( 87) PHSUBD*/ { 4, 4, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 114 /*( 88) NOP3*/ { 16, 22, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 115 /*( 89) NOP2*/ { 16, 23, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 116 /*( 90) BNDCL*/ { 5, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 117 /*( 91) BNDCL*/ { 17, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 118 /*( 92) BNDCL*/ { 17, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 119 /*( 93) NOP4*/ { 16, 24, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 120 /*( 94) NOP7*/ { 16, 25, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 121 /*( 95) NOP6*/ { 16, 26, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 122 /*( 96) SLWPCB*/ { 18, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 101}, 123 /*( 97) PMULHRSW*/ { 3, 0, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 124 /*( 98) PMULHRSW*/ { 4, 1, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 125 /*( 99) PMULHRSW*/ { 3, 3, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 126 /*( 100) PMULHRSW*/ { 4, 4, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 127 /*( 101) PHSUBW*/ { 3, 0, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 128 /*( 102) PHSUBW*/ { 4, 1, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 129 /*( 103) PHSUBW*/ { 3, 3, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 130 /*( 104) PHSUBW*/ { 4, 4, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 131 /*( 105) VPHSUBWD*/ { 19, 5, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 132 /*( 106) VPHSUBWD*/ { 20, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 133 /*( 107) LSL*/ { 16, 0, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 134 /*( 108) LSL*/ { 21, 1, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 135 /*( 109) LSS*/ { 16, 0, 0xb2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 136 /*( 110) VINSERTF64X2*/ { 12, 14, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 137 /*( 111) VINSERTF64X2*/ { 15, 27, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 138 /*( 112) VINSERTF64X2*/ { 12, 14, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 139 /*( 113) VINSERTF64X2*/ { 15, 27, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 140 /*( 114) MOVSD*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 141 /*( 115) VPUNPCKLBW*/ { 7, 5, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 142 /*( 116) VPUNPCKLBW*/ { 8, 2, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 143 /*( 117) VPUNPCKLBW*/ { 7, 5, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 144 /*( 118) VPUNPCKLBW*/ { 8, 2, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 145 /*( 119) VPUNPCKLBW*/ { 9, 2, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 146 /*( 120) VPUNPCKLBW*/ { 10, 29, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 147 /*( 121) VPUNPCKLBW*/ { 9, 2, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 148 /*( 122) VPUNPCKLBW*/ { 10, 29, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 149 /*( 123) VPUNPCKLBW*/ { 9, 2, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 150 /*( 124) VPUNPCKLBW*/ { 10, 29, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 151 /*( 125) VINSERTF64X4*/ { 12, 14, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 152 /*( 126) VINSERTF64X4*/ { 15, 30, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 153 /*( 127) VPMOVSDB*/ { 22, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 154 /*( 128) VPMOVSDB*/ { 23, 31, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 155 /*( 129) VPMOVSDB*/ { 22, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 156 /*( 130) VPMOVSDB*/ { 23, 31, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 157 /*( 131) VPMOVSDB*/ { 22, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 158 /*( 132) VPMOVSDB*/ { 23, 31, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 159 /*( 133) BLSMSK*/ { 24, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 151}, 160 /*( 134) BLSMSK*/ { 25, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 155}, 161 /*( 135) BLSMSK*/ { 26, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 161}, 162 /*( 136) BLSMSK*/ { 27, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 166}, 163 /*( 137) BLSMSK*/ { 25, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 173}, 164 /*( 138) BLSMSK*/ { 27, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 179}, 165 /*( 139) ADOX*/ { 28, 32, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 95}, 166 /*( 140) ADOX*/ { 29, 33, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 1}, 167 /*( 141) ADOX*/ { 28, 32, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 88}, 168 /*( 142) ADOX*/ { 29, 33, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 29}, 169 /*( 143) VPMOVSDW*/ { 22, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 170 /*( 144) VPMOVSDW*/ { 23, 34, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 171 /*( 145) VPMOVSDW*/ { 22, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 172 /*( 146) VPMOVSDW*/ { 23, 34, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 173 /*( 147) VPMOVSDW*/ { 22, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 174 /*( 148) VPMOVSDW*/ { 23, 34, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 175 /*( 149) CVTPI2PD*/ { 3, 3, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 176 /*( 150) CVTPI2PD*/ { 4, 4, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 177 /*( 151) VPERMILPS*/ { 13, 5, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 178 /*( 152) VPERMILPS*/ { 30, 2, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 179 /*( 153) VPERMILPS*/ { 13, 5, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 180 /*( 154) VPERMILPS*/ { 30, 2, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 181 /*( 155) VPERMILPS*/ { 19, 35, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 182 /*( 156) VPERMILPS*/ { 20, 14, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 183 /*( 157) VPERMILPS*/ { 19, 35, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 184 /*( 158) VPERMILPS*/ { 20, 14, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 185 /*( 159) VPERMILPS*/ { 22, 14, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 186 /*( 160) VPERMILPS*/ { 31, 18, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 187 /*( 161) VPERMILPS*/ { 12, 2, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 188 /*( 162) VPERMILPS*/ { 13, 7, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 189 /*( 163) VPERMILPS*/ { 22, 14, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 190 /*( 164) VPERMILPS*/ { 31, 18, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 191 /*( 165) VPERMILPS*/ { 12, 2, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 192 /*( 166) VPERMILPS*/ { 13, 7, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 193 /*( 167) VPERMILPS*/ { 22, 14, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 194 /*( 168) VPERMILPS*/ { 31, 18, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 195 /*( 169) VPERMILPS*/ { 12, 2, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 196 /*( 170) VPERMILPS*/ { 13, 7, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 197 /*( 171) HLT*/ { 16, 36, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 198 /*( 172) FCMOVNU*/ { 1, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 199 /*( 173) VGATHERQPD*/ { 32, 37, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 200 /*( 174) VGATHERQPD*/ { 32, 38, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 201 /*( 175) VGATHERQPD*/ { 33, 39, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 202 /*( 176) VGATHERQPD*/ { 33, 40, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 203 /*( 177) VGATHERQPD*/ { 33, 41, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 204 /*( 178) FCOMIP*/ { 1, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 205 /*( 179) CVTPI2PS*/ { 3, 0, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 206 /*( 180) CVTPI2PS*/ { 4, 1, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 207 /*( 181) PACKUSWB*/ { 3, 0, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 208 /*( 182) PACKUSWB*/ { 4, 1, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 209 /*( 183) PACKUSWB*/ { 3, 3, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 210 /*( 184) PACKUSWB*/ { 4, 4, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 211 /*( 185) VAESDEC*/ { 8, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 212 /*( 186) VAESDEC*/ { 7, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 213 /*( 187) VAESDEC*/ { 34, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 214 /*( 188) VAESDEC*/ { 35, 42, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 215 /*( 189) VAESDEC*/ { 34, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 216 /*( 190) VAESDEC*/ { 35, 42, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 217 /*( 191) VAESDEC*/ { 34, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 218 /*( 192) VAESDEC*/ { 35, 42, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 219 /*( 193) VAESDEC*/ { 8, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 220 /*( 194) VAESDEC*/ { 7, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 221 /*( 195) PUSHF*/ { 16, 43, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 222 /*( 196) NOT*/ { 36, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 223 /*( 197) NOT*/ { 1, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 224 /*( 198) NOT*/ { 36, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 225 /*( 199) NOT*/ { 1, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 226 /*( 200) VGATHERQPS*/ { 32, 37, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 227 /*( 201) VGATHERQPS*/ { 32, 38, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 228 /*( 202) VGATHERQPS*/ { 33, 44, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 229 /*( 203) VGATHERQPS*/ { 33, 45, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 230 /*( 204) VGATHERQPS*/ { 33, 46, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 231 /*( 205) FCMOVNB*/ { 1, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 232 /*( 206) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 233 /*( 207) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 4}, 234 /*( 208) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 235 /*( 209) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 236 /*( 210) NOP*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 61}, 237 /*( 211) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 60}, 238 /*( 212) NOP*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 269}, 239 /*( 213) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 270}, 240 /*( 214) NOP*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 239}, 241 /*( 215) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 238}, 242 /*( 216) NOP*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 6}, 243 /*( 217) NOP*/ { 1, 1, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 47}, 244 /*( 218) NOP*/ { 16, 0, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 245 /*( 219) NOP*/ { 21, 1, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 246 /*( 220) NOP*/ { 16, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 247 /*( 221) NOP*/ { 21, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 248 /*( 222) NOP*/ { 16, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 249 /*( 223) NOP*/ { 21, 1, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 250 /*( 224) NOP*/ { 16, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 251 /*( 225) NOP*/ { 21, 1, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 252 /*( 226) NOP*/ { 16, 0, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 253 /*( 227) NOP*/ { 21, 1, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 254 /*( 228) NOP*/ { 16, 0, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 255 /*( 229) NOP*/ { 21, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 256 /*( 230) NOP*/ { 16, 0, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 257 /*( 231) NOP*/ { 21, 1, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 258 /*( 232) NOP*/ { 37, 47, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 259 /*( 233) NOP*/ { 38, 47, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 260 /*( 234) NOP*/ { 21, 1, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 261 /*( 235) NOP*/ { 4, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 262 /*( 236) NOP*/ { 4, 1, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 263 /*( 237) NOP*/ { 6, 1, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 264 /*( 238) NOP*/ { 21, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 265 /*( 239) NOP*/ { 21, 1, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 266 /*( 240) NOP*/ { 16, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 267 /*( 241) NOP*/ { 16, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 268 /*( 242) NOP*/ { 16, 0, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 269 /*( 243) NOP*/ { 4, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 270 /*( 244) NOP*/ { 6, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 271 /*( 245) NOP*/ { 4, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 272 /*( 246) NOP*/ { 14, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 124}, 273 /*( 247) NOP*/ { 14, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 272}, 274 /*( 248) NOP*/ { 14, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 62}, 275 /*( 249) NOP*/ { 14, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 60}, 276 /*( 250) NOP*/ { 14, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 270}, 277 /*( 251) NOP*/ { 14, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 275}, 278 /*( 252) NOP*/ { 39, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 278}, 279 /*( 253) NOP*/ { 39, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 282}, 280 /*( 254) NOP*/ { 39, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 286}, 281 /*( 255) NOP*/ { 39, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 290}, 282 /*( 256) NOP*/ { 39, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 294}, 283 /*( 257) NOP*/ { 39, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 298}, 284 /*( 258) NOP*/ { 40, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 302}, 285 /*( 259) NOP*/ { 40, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 307}, 286 /*( 260) NOP*/ { 41, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 312}, 287 /*( 261) NOP*/ { 41, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 318}, 288 /*( 262) NOP*/ { 42, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 41}, 289 /*( 263) NOP*/ { 42, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 290 /*( 264) NOP*/ { 43, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 291 /*( 265) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 292 /*( 266) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 293 /*( 267) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 294 /*( 268) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 61}, 295 /*( 269) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 269}, 296 /*( 270) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 239}, 297 /*( 271) NOP*/ { 0, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 6}, 298 /*( 272) NOP*/ { 21, 1, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 299 /*( 273) NOP*/ { 44, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 324}, 300 /*( 274) FCMOVNE*/ { 1, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 301 /*( 275) VPERMILPD*/ { 13, 5, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 302 /*( 276) VPERMILPD*/ { 30, 2, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 303 /*( 277) VPERMILPD*/ { 13, 5, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 304 /*( 278) VPERMILPD*/ { 30, 2, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 305 /*( 279) VPERMILPD*/ { 19, 35, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 306 /*( 280) VPERMILPD*/ { 20, 14, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 307 /*( 281) VPERMILPD*/ { 19, 35, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 308 /*( 282) VPERMILPD*/ { 20, 14, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 309 /*( 283) VPERMILPD*/ { 22, 14, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 310 /*( 284) VPERMILPD*/ { 31, 15, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 311 /*( 285) VPERMILPD*/ { 12, 2, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 312 /*( 286) VPERMILPD*/ { 13, 8, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 313 /*( 287) VPERMILPD*/ { 22, 14, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 314 /*( 288) VPERMILPD*/ { 31, 15, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 315 /*( 289) VPERMILPD*/ { 12, 2, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 316 /*( 290) VPERMILPD*/ { 13, 8, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 317 /*( 291) VPERMILPD*/ { 22, 14, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 318 /*( 292) VPERMILPD*/ { 31, 15, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 319 /*( 293) VPERMILPD*/ { 12, 2, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 320 /*( 294) VPERMILPD*/ { 13, 8, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 321 /*( 295) VPCMPEQW*/ { 7, 5, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 322 /*( 296) VPCMPEQW*/ { 8, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 323 /*( 297) VPCMPEQW*/ { 7, 5, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 324 /*( 298) VPCMPEQW*/ { 8, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 325 /*( 299) VPCMPEQW*/ { 45, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 326 /*( 300) VPCMPEQW*/ { 46, 6, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 327 /*( 301) VPCMPEQW*/ { 45, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 328 /*( 302) VPCMPEQW*/ { 46, 6, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 329 /*( 303) VPCMPEQW*/ { 45, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 330 /*( 304) VPCMPEQW*/ { 46, 6, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 331 /*( 305) VPCMPEQQ*/ { 7, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 332 /*( 306) VPCMPEQQ*/ { 8, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 333 /*( 307) VPCMPEQQ*/ { 7, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 334 /*( 308) VPCMPEQQ*/ { 8, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 335 /*( 309) VPCMPEQQ*/ { 47, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 336 /*( 310) VPCMPEQQ*/ { 48, 8, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 337 /*( 311) VPCMPEQQ*/ { 47, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 338 /*( 312) VPCMPEQQ*/ { 48, 8, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 339 /*( 313) VPCMPEQQ*/ { 47, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 340 /*( 314) VPCMPEQQ*/ { 48, 8, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 341 /*( 315) ADC_LOCK*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 342 /*( 316) ADC_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 343 /*( 317) ADC_LOCK*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 344 /*( 318) ADC_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 345 /*( 319) ADC_LOCK*/ { 49, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 346 /*( 320) ADC_LOCK*/ { 49, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 347 /*( 321) ADDSUBPS*/ { 5, 50, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 348 /*( 322) ADDSUBPS*/ { 6, 51, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 349 /*( 323) VPCMPEQD*/ { 7, 5, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 350 /*( 324) VPCMPEQD*/ { 8, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 351 /*( 325) VPCMPEQD*/ { 7, 5, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 352 /*( 326) VPCMPEQD*/ { 8, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 353 /*( 327) VPCMPEQD*/ { 47, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 354 /*( 328) VPCMPEQD*/ { 48, 7, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 355 /*( 329) VPCMPEQD*/ { 47, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 356 /*( 330) VPCMPEQD*/ { 48, 7, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 357 /*( 331) VPCMPEQD*/ { 47, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 358 /*( 332) VPCMPEQD*/ { 48, 7, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 359 /*( 333) VPCMPEQB*/ { 7, 5, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 360 /*( 334) VPCMPEQB*/ { 8, 2, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 361 /*( 335) VPCMPEQB*/ { 7, 5, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 362 /*( 336) VPCMPEQB*/ { 8, 2, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 363 /*( 337) VPCMPEQB*/ { 45, 2, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 364 /*( 338) VPCMPEQB*/ { 46, 29, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 365 /*( 339) VPCMPEQB*/ { 45, 2, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 366 /*( 340) VPCMPEQB*/ { 46, 29, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 367 /*( 341) VPCMPEQB*/ { 45, 2, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 368 /*( 342) VPCMPEQB*/ { 46, 29, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 369 /*( 343) ADDSUBPD*/ { 3, 3, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 370 /*( 344) ADDSUBPD*/ { 4, 4, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 371 /*( 345) VBROADCASTI64X4*/ { 50, 52, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 360}, 372 /*( 346) VBROADCASTI64X2*/ { 50, 53, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 370}, 373 /*( 347) VBROADCASTI64X2*/ { 50, 53, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 380}, 374 /*( 348) VANDPD*/ { 7, 5, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 375 /*( 349) VANDPD*/ { 8, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 376 /*( 350) VANDPD*/ { 7, 5, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 377 /*( 351) VANDPD*/ { 8, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 378 /*( 352) VANDPD*/ { 12, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 379 /*( 353) VANDPD*/ { 13, 8, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 380 /*( 354) VANDPD*/ { 12, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 381 /*( 355) VANDPD*/ { 13, 8, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 382 /*( 356) VANDPD*/ { 12, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 383 /*( 357) VANDPD*/ { 13, 8, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 384 /*( 358) WRUSSD*/ { 51, 0, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 402}, 385 /*( 359) WRUSSQ*/ { 51, 0, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 354}, 386 /*( 360) SHRX*/ { 7, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 71}, 387 /*( 361) SHRX*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 406}, 388 /*( 362) SHRX*/ { 8, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 179}, 389 /*( 363) SHRX*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 411}, 390 /*( 364) SHRX*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 417}, 391 /*( 365) SHRX*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 422}, 392 /*( 366) VANDPS*/ { 7, 5, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 393 /*( 367) VANDPS*/ { 8, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 394 /*( 368) VANDPS*/ { 7, 5, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 395 /*( 369) VANDPS*/ { 8, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 396 /*( 370) VANDPS*/ { 12, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 397 /*( 371) VANDPS*/ { 13, 7, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 398 /*( 372) VANDPS*/ { 12, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 399 /*( 373) VANDPS*/ { 13, 7, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 400 /*( 374) VANDPS*/ { 12, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 401 /*( 375) VANDPS*/ { 13, 7, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 402 /*( 376) DEC_LOCK*/ { 36, 5, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 403 /*( 377) DEC_LOCK*/ { 36, 5, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 404 /*( 378) MOVDIRI*/ { 51, 0, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 440}, 405 /*( 379) MOVDIRI*/ { 51, 0, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 444}, 406 /*( 380) PSLLDQ*/ { 52, 54, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 448}, 407 /*( 381) VPROTQ*/ { 19, 35, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 452}, 408 /*( 382) VPROTQ*/ { 20, 14, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 459}, 409 /*( 383) VPROTQ*/ { 13, 5, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 410 /*( 384) VPROTQ*/ { 30, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 411 /*( 385) VPROTQ*/ { 13, 5, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 412 /*( 386) VPROTQ*/ { 30, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 413 /*( 387) RCL*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 414 /*( 388) RCL*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 415 /*( 389) RCL*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 416 /*( 390) RCL*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 417 /*( 391) RCL*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 418 /*( 392) RCL*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 419 /*( 393) RCL*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 420 /*( 394) RCL*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 421 /*( 395) RCL*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 422 /*( 396) RCL*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 423 /*( 397) RCL*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 424 /*( 398) RCL*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 425 /*( 399) VPROTW*/ { 19, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 452}, 426 /*( 400) VPROTW*/ { 20, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 459}, 427 /*( 401) VPROTW*/ { 13, 5, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 428 /*( 402) VPROTW*/ { 30, 2, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 429 /*( 403) VPROTW*/ { 13, 5, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 430 /*( 404) VPROTW*/ { 30, 2, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 431 /*( 405) FCOMI*/ { 1, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 432 /*( 406) VPSHUFHW*/ { 53, 35, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 433 /*( 407) VPSHUFHW*/ { 2, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 434 /*( 408) VPSHUFHW*/ { 53, 35, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 435 /*( 409) VPSHUFHW*/ { 2, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 436 /*( 410) VPSHUFHW*/ { 54, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 500}, 437 /*( 411) VPSHUFHW*/ { 55, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 45}, 438 /*( 412) VPSHUFHW*/ { 54, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 500}, 439 /*( 413) VPSHUFHW*/ { 55, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 45}, 440 /*( 414) VPSHUFHW*/ { 54, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 500}, 441 /*( 415) VPSHUFHW*/ { 55, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 45}, 442 /*( 416) VPROTB*/ { 19, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 452}, 443 /*( 417) VPROTB*/ { 20, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 459}, 444 /*( 418) VPROTB*/ { 13, 5, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 445 /*( 419) VPROTB*/ { 30, 2, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 446 /*( 420) VPROTB*/ { 13, 5, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 447 /*( 421) VPROTB*/ { 30, 2, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 448 /*( 422) VPROTD*/ { 19, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 452}, 449 /*( 423) VPROTD*/ { 20, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 459}, 450 /*( 424) VPROTD*/ { 13, 5, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 451 /*( 425) VPROTD*/ { 30, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 452 /*( 426) VPROTD*/ { 13, 5, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 453 /*( 427) VPROTD*/ { 30, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 454 /*( 428) FCOMP*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 455 /*( 429) FCOMP*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 456 /*( 430) FCOMP*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 457 /*( 431) FCOMP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 458 /*( 432) FCOMP*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 459 /*( 433) UMWAIT*/ { 56, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 508}, 460 /*( 434) UMWAIT*/ { 56, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 513}, 461 /*( 435) UNPCKLPS*/ { 3, 0, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 462 /*( 436) UNPCKLPS*/ { 4, 1, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 463 /*( 437) VPANDNQ*/ { 12, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 464 /*( 438) VPANDNQ*/ { 13, 8, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 465 /*( 439) VPANDNQ*/ { 12, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 466 /*( 440) VPANDNQ*/ { 13, 8, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 467 /*( 441) VPANDNQ*/ { 12, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 468 /*( 442) VPANDNQ*/ { 13, 8, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 469 /*( 443) UNPCKLPD*/ { 3, 3, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 470 /*( 444) UNPCKLPD*/ { 4, 4, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 471 /*( 445) CDQE*/ { 57, 36, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 472 /*( 446) VFMSUB213PS*/ { 13, 5, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 473 /*( 447) VFMSUB213PS*/ { 30, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 474 /*( 448) VFMSUB213PS*/ { 13, 5, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 475 /*( 449) VFMSUB213PS*/ { 30, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 476 /*( 450) VFMSUB213PS*/ { 12, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 477 /*( 451) VFMSUB213PS*/ { 12, 58, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 478 /*( 452) VFMSUB213PS*/ { 13, 7, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 479 /*( 453) VFMSUB213PS*/ { 12, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 480 /*( 454) VFMSUB213PS*/ { 13, 7, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 481 /*( 455) VFMSUB213PS*/ { 12, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 482 /*( 456) VFMSUB213PS*/ { 13, 7, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 483 /*( 457) VPMULUDQ*/ { 7, 5, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 484 /*( 458) VPMULUDQ*/ { 8, 2, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 485 /*( 459) VPMULUDQ*/ { 7, 5, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 486 /*( 460) VPMULUDQ*/ { 8, 2, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 487 /*( 461) VPMULUDQ*/ { 12, 2, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 488 /*( 462) VPMULUDQ*/ { 13, 8, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 489 /*( 463) VPMULUDQ*/ { 12, 2, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 490 /*( 464) VPMULUDQ*/ { 13, 8, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 491 /*( 465) VPMULUDQ*/ { 12, 2, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 492 /*( 466) VPMULUDQ*/ { 13, 8, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 493 /*( 467) VFMSUB213PD*/ { 13, 5, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 494 /*( 468) VFMSUB213PD*/ { 30, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 495 /*( 469) VFMSUB213PD*/ { 13, 5, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 496 /*( 470) VFMSUB213PD*/ { 30, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 497 /*( 471) VFMSUB213PD*/ { 12, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 498 /*( 472) VFMSUB213PD*/ { 12, 58, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 499 /*( 473) VFMSUB213PD*/ { 13, 8, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 500 /*( 474) VFMSUB213PD*/ { 12, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 501 /*( 475) VFMSUB213PD*/ { 13, 8, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 502 /*( 476) VFMSUB213PD*/ { 12, 2, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 503 /*( 477) VFMSUB213PD*/ { 13, 8, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 504 /*( 478) VPSHUFBITQMB*/ { 47, 2, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 505 /*( 479) VPSHUFBITQMB*/ { 58, 29, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 506 /*( 480) VPSHUFBITQMB*/ { 47, 2, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 507 /*( 481) VPSHUFBITQMB*/ { 58, 29, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 508 /*( 482) VPSHUFBITQMB*/ { 47, 2, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 509 /*( 483) VPSHUFBITQMB*/ { 58, 29, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 510 /*( 484) FSUBRP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 511 /*( 485) MOVDQA*/ { 3, 3, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 512 /*( 486) MOVDQA*/ { 4, 4, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 513 /*( 487) MOVDQA*/ { 3, 3, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 514 /*( 488) MOVDQA*/ { 4, 4, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 515 /*( 489) LDMXCSR*/ { 43, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 41}, 516 /*( 490) VPERMI2Q*/ { 12, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 517 /*( 491) VPERMI2Q*/ { 13, 8, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 518 /*( 492) VPERMI2Q*/ { 12, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 519 /*( 493) VPERMI2Q*/ { 13, 8, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 520 /*( 494) VPERMI2Q*/ { 12, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 521 /*( 495) VPERMI2Q*/ { 13, 8, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 522 /*( 496) VUNPCKHPS*/ { 7, 5, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 523 /*( 497) VUNPCKHPS*/ { 8, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 524 /*( 498) VUNPCKHPS*/ { 7, 5, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 525 /*( 499) VUNPCKHPS*/ { 8, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 526 /*( 500) VUNPCKHPS*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 527 /*( 501) VUNPCKHPS*/ { 13, 7, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 528 /*( 502) VUNPCKHPS*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 529 /*( 503) VUNPCKHPS*/ { 13, 7, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 530 /*( 504) VUNPCKHPS*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 531 /*( 505) VUNPCKHPS*/ { 13, 7, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 532 /*( 506) VSHUFF32X4*/ { 12, 14, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 533 /*( 507) VSHUFF32X4*/ { 13, 18, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 534 /*( 508) VSHUFF32X4*/ { 12, 14, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 535 /*( 509) VSHUFF32X4*/ { 13, 18, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 536 /*( 510) INCSSPQ*/ { 56, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 553}, 537 /*( 511) VUNPCKHPD*/ { 7, 5, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 538 /*( 512) VUNPCKHPD*/ { 8, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 539 /*( 513) VUNPCKHPD*/ { 7, 5, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 540 /*( 514) VUNPCKHPD*/ { 8, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 541 /*( 515) VUNPCKHPD*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 542 /*( 516) VUNPCKHPD*/ { 13, 8, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 543 /*( 517) VUNPCKHPD*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 544 /*( 518) VUNPCKHPD*/ { 13, 8, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 545 /*( 519) VUNPCKHPD*/ { 12, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 546 /*( 520) VUNPCKHPD*/ { 13, 8, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 547 /*( 521) NOT_LOCK*/ { 36, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 548 /*( 522) NOT_LOCK*/ { 36, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 549 /*( 523) VCOMISD*/ { 53, 5, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 550 /*( 524) VCOMISD*/ { 2, 2, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 551 /*( 525) VCOMISD*/ { 11, 2, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 558}, 552 /*( 526) VCOMISD*/ { 11, 59, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 570}, 553 /*( 527) VCOMISD*/ { 59, 60, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 554 /*( 528) VCOMISS*/ { 53, 5, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 555 /*( 529) VCOMISS*/ { 2, 2, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 556 /*( 530) VCOMISS*/ { 11, 2, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 598}, 557 /*( 531) VCOMISS*/ { 11, 59, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 610}, 558 /*( 532) VCOMISS*/ { 59, 61, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 559 /*( 533) VPHADDBQ*/ { 19, 5, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 560 /*( 534) VPHADDBQ*/ { 20, 2, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 561 /*( 535) VCVTUSI2SS*/ { 34, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 633}, 562 /*( 536) VCVTUSI2SS*/ { 60, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 640}, 563 /*( 537) VCVTUSI2SS*/ { 34, 62, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 649}, 564 /*( 538) VCVTUSI2SS*/ { 60, 62, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 656}, 565 /*( 539) VCVTUSI2SS*/ { 35, 63, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 665}, 566 /*( 540) VCVTUSI2SS*/ { 61, 63, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 671}, 567 /*( 541) VCVTUSI2SS*/ { 60, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 679}, 568 /*( 542) VCVTUSI2SS*/ { 60, 62, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 688}, 569 /*( 543) VCVTUSI2SS*/ { 61, 64, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 697}, 570 /*( 544) VPMOVB2M*/ { 11, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 571 /*( 545) VPMOVB2M*/ { 11, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 572 /*( 546) VPMOVB2M*/ { 11, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 573 /*( 547) VPHADDBW*/ { 19, 5, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 574 /*( 548) VPHADDBW*/ { 20, 2, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 575 /*( 549) STOSW*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 576 /*( 550) VPHADDBD*/ { 19, 5, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 577 /*( 551) VPHADDBD*/ { 20, 2, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 578 /*( 552) SAR*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 579 /*( 553) SAR*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 580 /*( 554) SAR*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 581 /*( 555) SAR*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 582 /*( 556) SAR*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 583 /*( 557) SAR*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 584 /*( 558) SAR*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 585 /*( 559) SAR*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 586 /*( 560) SAR*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 587 /*( 561) SAR*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 588 /*( 562) SAR*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 589 /*( 563) SAR*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 590 /*( 564) XEND*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 705}, 591 /*( 565) STOSQ*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 592 /*( 566) PMULLW*/ { 3, 0, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 593 /*( 567) PMULLW*/ { 4, 1, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 594 /*( 568) PMULLW*/ { 3, 3, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 595 /*( 569) PMULLW*/ { 4, 4, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 596 /*( 570) PMOVSXWQ*/ { 3, 16, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 597 /*( 571) PMOVSXWQ*/ { 4, 17, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 598 /*( 572) PMULLD*/ { 3, 16, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 599 /*( 573) PMULLD*/ { 4, 17, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 600 /*( 574) VFPCLASSPS*/ { 63, 14, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 710}, 601 /*( 575) VFPCLASSPS*/ { 64, 18, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 712}, 602 /*( 576) VFPCLASSPS*/ { 63, 14, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 710}, 603 /*( 577) VFPCLASSPS*/ { 64, 18, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 712}, 604 /*( 578) VFPCLASSPS*/ { 63, 14, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 710}, 605 /*( 579) VFPCLASSPS*/ { 64, 18, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 712}, 606 /*( 580) VFNMADDPS*/ { 13, 65, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 607 /*( 581) VFNMADDPS*/ { 30, 66, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 608 /*( 582) VFNMADDPS*/ { 13, 65, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 609 /*( 583) VFNMADDPS*/ { 30, 66, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 610 /*( 584) VFNMADDPS*/ { 13, 65, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 611 /*( 585) VFNMADDPS*/ { 30, 66, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 612 /*( 586) VFNMADDPS*/ { 13, 65, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 613 /*( 587) VFNMADDPS*/ { 30, 66, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 614 /*( 588) VFMSUB132SS*/ { 13, 5, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 615 /*( 589) VFMSUB132SS*/ { 30, 2, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 616 /*( 590) VFMSUB132SS*/ { 12, 2, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 617 /*( 591) VFMSUB132SS*/ { 12, 62, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 618 /*( 592) VFMSUB132SS*/ { 15, 61, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 619 /*( 593) VPSLLD*/ { 7, 5, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 620 /*( 594) VPSLLD*/ { 8, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 621 /*( 595) VPSLLD*/ { 26, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 733}, 622 /*( 596) VPSLLD*/ { 7, 5, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 623 /*( 597) VPSLLD*/ { 8, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 624 /*( 598) VPSLLD*/ { 26, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 733}, 625 /*( 599) VPSLLD*/ { 12, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 626 /*( 600) VPSLLD*/ { 15, 67, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 627 /*( 601) VPSLLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 738}, 628 /*( 602) VPSLLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 629 /*( 603) VPSLLD*/ { 12, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 630 /*( 604) VPSLLD*/ { 15, 67, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 631 /*( 605) VPSLLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 738}, 632 /*( 606) VPSLLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 633 /*( 607) VPSLLD*/ { 12, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 634 /*( 608) VPSLLD*/ { 15, 67, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 635 /*( 609) VPSLLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 738}, 636 /*( 610) VPSLLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 637 /*( 611) REPNE_CMPSW*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 638 /*( 612) VFNMADDPD*/ { 13, 65, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 639 /*( 613) VFNMADDPD*/ { 30, 66, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 640 /*( 614) VFNMADDPD*/ { 13, 65, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 641 /*( 615) VFNMADDPD*/ { 30, 66, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 642 /*( 616) VFNMADDPD*/ { 13, 65, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 643 /*( 617) VFNMADDPD*/ { 30, 66, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 644 /*( 618) VFNMADDPD*/ { 13, 65, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 645 /*( 619) VFNMADDPD*/ { 30, 66, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 646 /*( 620) VPSLLQ*/ { 7, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 647 /*( 621) VPSLLQ*/ { 8, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 648 /*( 622) VPSLLQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 733}, 649 /*( 623) VPSLLQ*/ { 7, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 650 /*( 624) VPSLLQ*/ { 8, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 651 /*( 625) VPSLLQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 733}, 652 /*( 626) VPSLLQ*/ { 12, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 653 /*( 627) VPSLLQ*/ { 15, 69, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 654 /*( 628) VPSLLQ*/ { 65, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 758}, 655 /*( 629) VPSLLQ*/ { 25, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 766}, 656 /*( 630) VPSLLQ*/ { 12, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 657 /*( 631) VPSLLQ*/ { 15, 69, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 658 /*( 632) VPSLLQ*/ { 65, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 758}, 659 /*( 633) VPSLLQ*/ { 25, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 766}, 660 /*( 634) VPSLLQ*/ { 12, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 661 /*( 635) VPSLLQ*/ { 15, 69, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 662 /*( 636) VPSLLQ*/ { 65, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 758}, 663 /*( 637) VPSLLQ*/ { 25, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 766}, 664 /*( 638) FXAM*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 772}, 665 /*( 639) REPNE_CMPSB*/ { 5, 68, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 666 /*( 640) REPNE_CMPSD*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 667 /*( 641) VPSLLW*/ { 7, 5, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 668 /*( 642) VPSLLW*/ { 8, 2, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 669 /*( 643) VPSLLW*/ { 26, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 733}, 670 /*( 644) VPSLLW*/ { 7, 5, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 671 /*( 645) VPSLLW*/ { 8, 2, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 672 /*( 646) VPSLLW*/ { 26, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 733}, 673 /*( 647) VPSLLW*/ { 9, 2, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 674 /*( 648) VPSLLW*/ { 10, 70, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 675 /*( 649) VPSLLW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 775}, 676 /*( 650) VPSLLW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 781}, 677 /*( 651) VPSLLW*/ { 9, 2, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 678 /*( 652) VPSLLW*/ { 10, 70, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 679 /*( 653) VPSLLW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 775}, 680 /*( 654) VPSLLW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 781}, 681 /*( 655) VPSLLW*/ { 9, 2, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 682 /*( 656) VPSLLW*/ { 10, 70, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 683 /*( 657) VPSLLW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 775}, 684 /*( 658) VPSLLW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 781}, 685 /*( 659) VFMSUB132SD*/ { 13, 5, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 686 /*( 660) VFMSUB132SD*/ { 30, 2, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 687 /*( 661) VFMSUB132SD*/ { 12, 2, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 688 /*( 662) VFMSUB132SD*/ { 12, 62, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 689 /*( 663) VFMSUB132SD*/ { 15, 60, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 690 /*( 664) VRCP28PD*/ { 22, 2, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 691 /*( 665) VRCP28PD*/ { 22, 71, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 802}, 692 /*( 666) VRCP28PD*/ { 31, 8, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 693 /*( 667) VSUBSD*/ { 7, 5, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 694 /*( 668) VSUBSD*/ { 8, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 695 /*( 669) VSUBSD*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 696 /*( 670) VSUBSD*/ { 12, 62, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 697 /*( 671) VSUBSD*/ { 15, 60, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 698 /*( 672) VRCP28PS*/ { 22, 2, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 699 /*( 673) VRCP28PS*/ { 22, 71, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 846}, 700 /*( 674) VRCP28PS*/ { 31, 7, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 701 /*( 675) VSUBSS*/ { 7, 5, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 702 /*( 676) VSUBSS*/ { 8, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 703 /*( 677) VSUBSS*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 704 /*( 678) VSUBSS*/ { 12, 62, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 705 /*( 679) VSUBSS*/ { 15, 61, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 706 /*( 680) VSCATTERDPD*/ { 33, 41, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 707 /*( 681) VSCATTERDPD*/ { 33, 40, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 708 /*( 682) VSCATTERDPD*/ { 33, 40, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 709 /*( 683) VDBPSADBW*/ { 12, 14, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 710 /*( 684) VDBPSADBW*/ { 15, 57, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 711 /*( 685) VDBPSADBW*/ { 12, 14, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 712 /*( 686) VDBPSADBW*/ { 15, 57, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 713 /*( 687) VDBPSADBW*/ { 12, 14, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 714 /*( 688) VDBPSADBW*/ { 15, 57, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 715 /*( 689) CLRSSBSY*/ { 42, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 276}, 716 /*( 690) VGATHERDPS*/ { 32, 37, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 717 /*( 691) VGATHERDPS*/ { 32, 38, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 718 /*( 692) VGATHERDPS*/ { 33, 44, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 719 /*( 693) VGATHERDPS*/ { 33, 45, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 720 /*( 694) VGATHERDPS*/ { 33, 46, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 721 /*( 695) AESENCLAST*/ { 4, 4, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 722 /*( 696) AESENCLAST*/ { 3, 3, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 723 /*( 697) VGATHERDPD*/ { 32, 38, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 724 /*( 698) VGATHERDPD*/ { 32, 38, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 725 /*( 699) VGATHERDPD*/ { 33, 41, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 726 /*( 700) VGATHERDPD*/ { 33, 40, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 727 /*( 701) VGATHERDPD*/ { 33, 40, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 728 /*( 702) BTS*/ { 36, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 268}, 729 /*( 703) BTS*/ { 1, 73, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 270}, 730 /*( 704) BTS*/ { 49, 0, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 731 /*( 705) BTS*/ { 21, 1, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 732 /*( 706) BTR*/ { 36, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 359}, 733 /*( 707) BTR*/ { 1, 73, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 238}, 734 /*( 708) BTR*/ { 49, 0, 0xb3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 735 /*( 709) BTR*/ { 21, 1, 0xb3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 736 /*( 710) VBROADCASTF64X4*/ { 50, 52, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 360}, 737 /*( 711) PACKUSDW*/ { 3, 16, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 738 /*( 712) PACKUSDW*/ { 4, 17, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 739 /*( 713) BTC*/ { 36, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 21}, 740 /*( 714) BTC*/ { 1, 73, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 47}, 741 /*( 715) BTC*/ { 49, 0, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 742 /*( 716) BTC*/ { 21, 1, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 743 /*( 717) PUSHFQ*/ { 16, 43, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 744 /*( 718) PUSHFD*/ { 16, 43, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 745 /*( 719) VPADDSW*/ { 7, 5, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 746 /*( 720) VPADDSW*/ { 8, 2, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 747 /*( 721) VPADDSW*/ { 7, 5, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 748 /*( 722) VPADDSW*/ { 8, 2, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 749 /*( 723) VPADDSW*/ { 9, 2, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 750 /*( 724) VPADDSW*/ { 10, 6, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 751 /*( 725) VPADDSW*/ { 9, 2, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 752 /*( 726) VPADDSW*/ { 10, 6, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 753 /*( 727) VPADDSW*/ { 9, 2, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 754 /*( 728) VPADDSW*/ { 10, 6, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 755 /*( 729) VMASKMOVPD*/ { 13, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 756 /*( 730) VMASKMOVPD*/ { 13, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 757 /*( 731) VMASKMOVPD*/ { 13, 5, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 758 /*( 732) VMASKMOVPD*/ { 13, 5, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 759 /*( 733) VPDPWSSDS*/ { 12, 2, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 760 /*( 734) VPDPWSSDS*/ { 13, 7, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 761 /*( 735) VPDPWSSDS*/ { 12, 2, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 762 /*( 736) VPDPWSSDS*/ { 13, 7, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 763 /*( 737) VPDPWSSDS*/ { 12, 2, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 764 /*( 738) VPDPWSSDS*/ { 13, 7, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 765 /*( 739) FFREE*/ { 1, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 766 /*( 740) FFREEP*/ { 1, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 767 /*( 741) VMASKMOVPS*/ { 13, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 768 /*( 742) VMASKMOVPS*/ { 13, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 769 /*( 743) VMASKMOVPS*/ { 13, 5, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 770 /*( 744) VMASKMOVPS*/ { 13, 5, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 771 /*( 745) VPADDSB*/ { 7, 5, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 772 /*( 746) VPADDSB*/ { 8, 2, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 773 /*( 747) VPADDSB*/ { 7, 5, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 774 /*( 748) VPADDSB*/ { 8, 2, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 775 /*( 749) VPADDSB*/ { 9, 2, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 776 /*( 750) VPADDSB*/ { 10, 29, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 777 /*( 751) VPADDSB*/ { 9, 2, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 778 /*( 752) VPADDSB*/ { 10, 29, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 779 /*( 753) VPADDSB*/ { 9, 2, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 780 /*( 754) VPADDSB*/ { 10, 29, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 781 /*( 755) SETNO*/ { 16, 0, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 782 /*( 756) SETNO*/ { 21, 1, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 783 /*( 757) XGETBV*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 890}, 784 /*( 758) SETNL*/ { 16, 0, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 785 /*( 759) SETNL*/ { 21, 1, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 786 /*( 760) FPREM1*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 895}, 787 /*( 761) NOP5*/ { 16, 74, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 788 /*( 762) SETNB*/ { 16, 0, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 789 /*( 763) SETNB*/ { 21, 1, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 790 /*( 764) XORPD*/ { 3, 3, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 791 /*( 765) XORPD*/ { 4, 4, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 792 /*( 766) KORTESTD*/ { 20, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 898}, 793 /*( 767) RDSEED*/ { 14, 1, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 300}, 794 /*( 768) BNDCN*/ { 5, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 795 /*( 769) BNDCN*/ { 17, 1, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 796 /*( 770) BNDCN*/ { 17, 1, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 797 /*( 771) KORTESTB*/ { 20, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 798 /*( 772) XORPS*/ { 3, 0, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 799 /*( 773) XORPS*/ { 4, 1, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 800 /*( 774) SETNS*/ { 16, 0, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 801 /*( 775) SETNS*/ { 21, 1, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 802 /*( 776) SETNP*/ { 16, 0, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 803 /*( 777) SETNP*/ { 21, 1, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 804 /*( 778) VPUNPCKHQDQ*/ { 7, 5, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 805 /*( 779) VPUNPCKHQDQ*/ { 8, 2, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 806 /*( 780) VPUNPCKHQDQ*/ { 7, 5, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 807 /*( 781) VPUNPCKHQDQ*/ { 8, 2, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 808 /*( 782) VPUNPCKHQDQ*/ { 12, 2, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 809 /*( 783) VPUNPCKHQDQ*/ { 13, 8, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 810 /*( 784) VPUNPCKHQDQ*/ { 12, 2, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 811 /*( 785) VPUNPCKHQDQ*/ { 13, 8, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 812 /*( 786) VPUNPCKHQDQ*/ { 12, 2, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 813 /*( 787) VPUNPCKHQDQ*/ { 13, 8, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 814 /*( 788) VFRCZSD*/ { 19, 5, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 815 /*( 789) VFRCZSD*/ { 20, 2, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 816 /*( 790) LLDT*/ { 0, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 817 /*( 791) LLDT*/ { 1, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 818 /*( 792) VFNMSUB132PD*/ { 13, 5, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 819 /*( 793) VFNMSUB132PD*/ { 30, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 820 /*( 794) VFNMSUB132PD*/ { 13, 5, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 821 /*( 795) VFNMSUB132PD*/ { 30, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 822 /*( 796) VFNMSUB132PD*/ { 12, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 823 /*( 797) VFNMSUB132PD*/ { 12, 58, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 824 /*( 798) VFNMSUB132PD*/ { 13, 8, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 825 /*( 799) VFNMSUB132PD*/ { 12, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 826 /*( 800) VFNMSUB132PD*/ { 13, 8, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 827 /*( 801) VFNMSUB132PD*/ { 12, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 828 /*( 802) VFNMSUB132PD*/ { 13, 8, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 829 /*( 803) KANDB*/ { 30, 2, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 830 /*( 804) VEXTRACTF32X4*/ { 22, 14, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 831 /*( 805) VEXTRACTF32X4*/ { 23, 75, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 832 /*( 806) VEXTRACTF32X4*/ { 22, 14, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 833 /*( 807) VEXTRACTF32X4*/ { 23, 75, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 834 /*( 808) VFRCZSS*/ { 19, 5, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 835 /*( 809) VFRCZSS*/ { 20, 2, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 836 /*( 810) KANDW*/ { 30, 2, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 837 /*( 811) VFNMSUB132PS*/ { 13, 5, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 838 /*( 812) VFNMSUB132PS*/ { 30, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 839 /*( 813) VFNMSUB132PS*/ { 13, 5, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 840 /*( 814) VFNMSUB132PS*/ { 30, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 841 /*( 815) VFNMSUB132PS*/ { 12, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 842 /*( 816) VFNMSUB132PS*/ { 12, 58, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 843 /*( 817) VFNMSUB132PS*/ { 13, 7, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 844 /*( 818) VFNMSUB132PS*/ { 12, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 845 /*( 819) VFNMSUB132PS*/ { 13, 7, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 846 /*( 820) VFNMSUB132PS*/ { 12, 2, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 847 /*( 821) VFNMSUB132PS*/ { 13, 7, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 848 /*( 822) KANDQ*/ { 30, 2, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 849 /*( 823) BNDCU*/ { 5, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 850 /*( 824) BNDCU*/ { 17, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 851 /*( 825) BNDCU*/ { 17, 1, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 852 /*( 826) BLCS*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 928}, 853 /*( 827) BLCS*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 928}, 854 /*( 828) BLCS*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 932}, 855 /*( 829) BLCS*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 932}, 856 /*( 830) VAESENCLAST*/ { 8, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 857 /*( 831) VAESENCLAST*/ { 7, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 858 /*( 832) VAESENCLAST*/ { 34, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 859 /*( 833) VAESENCLAST*/ { 35, 42, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 860 /*( 834) VAESENCLAST*/ { 34, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 861 /*( 835) VAESENCLAST*/ { 35, 42, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 862 /*( 836) VAESENCLAST*/ { 34, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 863 /*( 837) VAESENCLAST*/ { 35, 42, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 864 /*( 838) VAESENCLAST*/ { 8, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 865 /*( 839) VAESENCLAST*/ { 7, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 866 /*( 840) PUNPCKHQDQ*/ { 3, 3, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 867 /*( 841) PUNPCKHQDQ*/ { 4, 4, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 868 /*( 842) VGATHERPF0QPD*/ { 69, 39, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 937}, 869 /*( 843) CMPSD_XMM*/ { 5, 76, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 870 /*( 844) CMPSD_XMM*/ { 6, 77, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 871 /*( 845) VGATHERPF0QPS*/ { 69, 44, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 948}, 872 /*( 846) CLGI*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 959}, 873 /*( 847) BLCI*/ { 24, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 962}, 874 /*( 848) BLCI*/ { 24, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 962}, 875 /*( 849) BLCI*/ { 26, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 966}, 876 /*( 850) BLCI*/ { 26, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 966}, 877 /*( 851) CVTTSD2SI*/ { 29, 50, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 878 /*( 852) CVTTSD2SI*/ { 28, 51, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 879 /*( 853) CVTTSD2SI*/ { 29, 50, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 72}, 880 /*( 854) CVTTSD2SI*/ { 28, 51, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 180}, 881 /*( 855) VFMADD231PD*/ { 13, 5, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 882 /*( 856) VFMADD231PD*/ { 30, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 883 /*( 857) VFMADD231PD*/ { 13, 5, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 884 /*( 858) VFMADD231PD*/ { 30, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 885 /*( 859) VFMADD231PD*/ { 12, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 886 /*( 860) VFMADD231PD*/ { 12, 58, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 887 /*( 861) VFMADD231PD*/ { 13, 8, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 888 /*( 862) VFMADD231PD*/ { 12, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 889 /*( 863) VFMADD231PD*/ { 13, 8, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 890 /*( 864) VFMADD231PD*/ { 12, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 891 /*( 865) VFMADD231PD*/ { 13, 8, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 892 /*( 866) ADDPD*/ { 3, 3, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 893 /*( 867) ADDPD*/ { 4, 4, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 894 /*( 868) VXORPD*/ { 7, 5, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 895 /*( 869) VXORPD*/ { 8, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 896 /*( 870) VXORPD*/ { 7, 5, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 897 /*( 871) VXORPD*/ { 8, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 898 /*( 872) VXORPD*/ { 12, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 899 /*( 873) VXORPD*/ { 13, 8, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 900 /*( 874) VXORPD*/ { 12, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 901 /*( 875) VXORPD*/ { 13, 8, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 902 /*( 876) VXORPD*/ { 12, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 903 /*( 877) VXORPD*/ { 13, 8, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 904 /*( 878) POR*/ { 3, 0, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 905 /*( 879) POR*/ { 4, 1, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 906 /*( 880) POR*/ { 3, 3, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 907 /*( 881) POR*/ { 4, 4, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 908 /*( 882) LOOPE*/ { 5, 78, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 909 /*( 883) LOOPE*/ { 5, 78, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 910 /*( 884) LOOPE*/ { 16, 78, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 911 /*( 885) LOOPE*/ { 5, 78, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 912 /*( 886) VROUNDSD*/ { 7, 35, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 913 /*( 887) VROUNDSD*/ { 8, 14, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 914 /*( 888) VFMADD231PS*/ { 13, 5, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 915 /*( 889) VFMADD231PS*/ { 30, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 916 /*( 890) VFMADD231PS*/ { 13, 5, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 917 /*( 891) VFMADD231PS*/ { 30, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 918 /*( 892) VFMADD231PS*/ { 12, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 919 /*( 893) VFMADD231PS*/ { 12, 58, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 920 /*( 894) VFMADD231PS*/ { 13, 7, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 921 /*( 895) VFMADD231PS*/ { 12, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 922 /*( 896) VFMADD231PS*/ { 13, 7, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 923 /*( 897) VFMADD231PS*/ { 12, 2, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 924 /*( 898) VFMADD231PS*/ { 13, 7, 0xb8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 925 /*( 899) VROUNDSS*/ { 7, 35, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 926 /*( 900) VROUNDSS*/ { 8, 14, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 927 /*( 901) VPMADDUBSW*/ { 7, 5, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 928 /*( 902) VPMADDUBSW*/ { 8, 2, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 929 /*( 903) VPMADDUBSW*/ { 7, 5, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 930 /*( 904) VPMADDUBSW*/ { 8, 2, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 931 /*( 905) VPMADDUBSW*/ { 9, 2, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 932 /*( 906) VPMADDUBSW*/ { 10, 6, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 933 /*( 907) VPMADDUBSW*/ { 9, 2, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 934 /*( 908) VPMADDUBSW*/ { 10, 6, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 935 /*( 909) VPMADDUBSW*/ { 9, 2, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 936 /*( 910) VPMADDUBSW*/ { 10, 6, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 937 /*( 911) VXORPS*/ { 7, 5, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 938 /*( 912) VXORPS*/ { 8, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 939 /*( 913) VXORPS*/ { 7, 5, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 940 /*( 914) VXORPS*/ { 8, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 941 /*( 915) VXORPS*/ { 12, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 942 /*( 916) VXORPS*/ { 13, 7, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 943 /*( 917) VXORPS*/ { 12, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 944 /*( 918) VXORPS*/ { 13, 7, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 945 /*( 919) VXORPS*/ { 12, 2, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 946 /*( 920) VXORPS*/ { 13, 7, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 947 /*( 921) ADDPS*/ { 3, 0, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 948 /*( 922) ADDPS*/ { 4, 1, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 949 /*( 923) PFMUL*/ { 16, 79, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 950 /*( 924) PFMUL*/ { 21, 80, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 951 /*( 925) FLDPI*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 952 /*( 926) VHADDPS*/ { 7, 5, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 953 /*( 927) VHADDPS*/ { 8, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 954 /*( 928) VHADDPS*/ { 7, 5, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 955 /*( 929) VHADDPS*/ { 8, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 956 /*( 930) VRNDSCALESD*/ { 12, 14, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 957 /*( 931) VRNDSCALESD*/ { 12, 81, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 958 /*( 932) VRNDSCALESD*/ { 15, 82, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 959 /*( 933) CWD*/ { 16, 36, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 960 /*( 934) FNSTSW*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 961 /*( 935) FNSTSW*/ { 66, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 983}, 962 /*( 936) AND_LOCK*/ { 36, 35, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 223}, 963 /*( 937) AND_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 223}, 964 /*( 938) AND_LOCK*/ { 36, 35, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 223}, 965 /*( 939) AND_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 223}, 966 /*( 940) AND_LOCK*/ { 49, 5, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 967 /*( 941) AND_LOCK*/ { 49, 5, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 968 /*( 942) PSLLD*/ { 52, 73, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 986}, 969 /*( 943) PSLLD*/ { 52, 54, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 990}, 970 /*( 944) PSLLD*/ { 3, 0, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 971 /*( 945) PSLLD*/ { 4, 1, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 972 /*( 946) PSLLD*/ { 3, 3, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 973 /*( 947) PSLLD*/ { 4, 4, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 974 /*( 948) VCVTTPS2DQ*/ { 53, 5, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 975 /*( 949) VCVTTPS2DQ*/ { 2, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 976 /*( 950) VCVTTPS2DQ*/ { 53, 5, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 977 /*( 951) VCVTTPS2DQ*/ { 2, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 978 /*( 952) VCVTTPS2DQ*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 979 /*( 953) VCVTTPS2DQ*/ { 22, 71, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1004}, 980 /*( 954) VCVTTPS2DQ*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 981 /*( 955) VCVTTPS2DQ*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 982 /*( 956) VCVTTPS2DQ*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 983 /*( 957) VCVTTPS2DQ*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 984 /*( 958) VCVTTPS2DQ*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 985 /*( 959) PSLLW*/ { 52, 73, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 986}, 986 /*( 960) PSLLW*/ { 52, 54, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 990}, 987 /*( 961) PSLLW*/ { 3, 0, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 988 /*( 962) PSLLW*/ { 4, 1, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 989 /*( 963) PSLLW*/ { 3, 3, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 990 /*( 964) PSLLW*/ { 4, 4, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 991 /*( 965) PSLLQ*/ { 52, 73, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 986}, 992 /*( 966) PSLLQ*/ { 52, 54, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 990}, 993 /*( 967) PSLLQ*/ { 3, 0, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 994 /*( 968) PSLLQ*/ { 4, 1, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 995 /*( 969) PSLLQ*/ { 3, 3, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 996 /*( 970) PSLLQ*/ { 4, 4, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 997 /*( 971) VPHADDUDQ*/ { 19, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 998 /*( 972) VPHADDUDQ*/ { 20, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 999 /*( 973) UMONITOR*/ { 14, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 275}, 1000 /*( 974) RSQRTSS*/ { 5, 50, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1001 /*( 975) RSQRTSS*/ { 6, 51, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 1002 /*( 976) VBROADCASTSS*/ { 70, 5, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1022}, 1003 /*( 977) VBROADCASTSS*/ { 70, 5, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1030}, 1004 /*( 978) VBROADCASTSS*/ { 71, 2, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1038}, 1005 /*( 979) VBROADCASTSS*/ { 71, 2, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1047}, 1006 /*( 980) VBROADCASTSS*/ { 50, 83, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1056}, 1007 /*( 981) VBROADCASTSS*/ { 72, 2, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1066}, 1008 /*( 982) VBROADCASTSS*/ { 50, 83, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1077}, 1009 /*( 983) VBROADCASTSS*/ { 72, 2, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1087}, 1010 /*( 984) VBROADCASTSS*/ { 50, 83, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1098}, 1011 /*( 985) VBROADCASTSS*/ { 72, 2, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1108}, 1012 /*( 986) T1MSKC*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1119}, 1013 /*( 987) T1MSKC*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1119}, 1014 /*( 988) T1MSKC*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1123}, 1015 /*( 989) T1MSKC*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1123}, 1016 /*( 990) FWAIT*/ { 16, 36, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1017 /*( 991) VHADDPD*/ { 7, 5, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1018 /*( 992) VHADDPD*/ { 8, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1019 /*( 993) VHADDPD*/ { 7, 5, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1020 /*( 994) VHADDPD*/ { 8, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1021 /*( 995) PUNPCKLDQ*/ { 3, 0, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1022 /*( 996) PUNPCKLDQ*/ { 4, 1, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1023 /*( 997) PUNPCKLDQ*/ { 3, 3, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1024 /*( 998) PUNPCKLDQ*/ { 4, 4, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1025 /*( 999) VBROADCASTI32X8*/ { 50, 84, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1128}, 1026 /*(1000) MULSS*/ { 5, 50, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1027 /*(1001) MULSS*/ { 6, 51, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 1028 /*(1002) VPSHRDW*/ { 12, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1029 /*(1003) VPSHRDW*/ { 15, 57, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1030 /*(1004) VPSHRDW*/ { 12, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1031 /*(1005) VPSHRDW*/ { 15, 57, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1032 /*(1006) VPSHRDW*/ { 12, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1033 /*(1007) VPSHRDW*/ { 15, 57, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1034 /*(1008) VPSHRDQ*/ { 12, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1035 /*(1009) VPSHRDQ*/ { 13, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1036 /*(1010) VPSHRDQ*/ { 12, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1037 /*(1011) VPSHRDQ*/ { 13, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1038 /*(1012) VPSHRDQ*/ { 12, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1039 /*(1013) VPSHRDQ*/ { 13, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1040 /*(1014) VMINSS*/ { 7, 5, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1041 /*(1015) VMINSS*/ { 8, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 1042 /*(1016) VMINSS*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 1043 /*(1017) VMINSS*/ { 12, 59, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 1044 /*(1018) VMINSS*/ { 15, 61, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 1045 /*(1019) VBROADCASTI32X4*/ { 50, 85, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1138}, 1046 /*(1020) VBROADCASTI32X4*/ { 50, 85, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1148}, 1047 /*(1021) VPSHRDD*/ { 12, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1048 /*(1022) VPSHRDD*/ { 13, 18, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 1049 /*(1023) VPSHRDD*/ { 12, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1050 /*(1024) VPSHRDD*/ { 13, 18, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 1051 /*(1025) VPSHRDD*/ { 12, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1052 /*(1026) VPSHRDD*/ { 13, 18, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 1053 /*(1027) FXRSTOR64*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 353}, 1054 /*(1028) MULSD*/ { 5, 50, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 1055 /*(1029) MULSD*/ { 6, 51, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 1056 /*(1030) MOVBE*/ { 5, 0, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 0}, 1057 /*(1031) MOVBE*/ { 5, 0, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 0}, 1058 /*(1032) VMINSD*/ { 7, 5, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 1059 /*(1033) VMINSD*/ { 8, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 1060 /*(1034) VMINSD*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 1061 /*(1035) VMINSD*/ { 12, 59, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 1062 /*(1036) VMINSD*/ { 15, 60, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 1063 /*(1037) VFMADDSS*/ { 13, 65, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1064 /*(1038) VFMADDSS*/ { 30, 66, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1065 /*(1039) VFMADDSS*/ { 13, 65, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1066 /*(1040) VFMADDSS*/ { 30, 66, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1067 /*(1041) PANDN*/ { 3, 0, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1068 /*(1042) PANDN*/ { 4, 1, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1069 /*(1043) PANDN*/ { 3, 3, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1070 /*(1044) PANDN*/ { 4, 4, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1071 /*(1045) VFMADDSD*/ { 13, 65, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1072 /*(1046) VFMADDSD*/ { 30, 66, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1073 /*(1047) VFMADDSD*/ { 13, 65, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1074 /*(1048) VFMADDSD*/ { 30, 66, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1075 /*(1049) SHA256MSG2*/ { 4, 1, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 1076 /*(1050) SHA256MSG2*/ { 3, 0, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 1077 /*(1051) SHA256MSG1*/ { 4, 1, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 1078 /*(1052) SHA256MSG1*/ { 3, 0, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 1079 /*(1053) LIDT*/ { 0, 86, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1080 /*(1054) LIDT*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1081 /*(1055) F2XM1*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 1082 /*(1056) PREFETCH_RESERVED*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 1083 /*(1057) PREFETCH_RESERVED*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 61}, 1084 /*(1058) PREFETCH_RESERVED*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 269}, 1085 /*(1059) PREFETCH_RESERVED*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 239}, 1086 /*(1060) PREFETCH_RESERVED*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 6}, 1087 /*(1061) VFMSUB213SS*/ { 13, 5, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1088 /*(1062) VFMSUB213SS*/ { 30, 2, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1089 /*(1063) VFMSUB213SS*/ { 12, 2, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1090 /*(1064) VFMSUB213SS*/ { 12, 62, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 1091 /*(1065) VFMSUB213SS*/ { 15, 61, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1092 /*(1066) VPADDQ*/ { 7, 5, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1093 /*(1067) VPADDQ*/ { 8, 2, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1094 /*(1068) VPADDQ*/ { 7, 5, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1095 /*(1069) VPADDQ*/ { 8, 2, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1096 /*(1070) VPADDQ*/ { 12, 2, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 1097 /*(1071) VPADDQ*/ { 13, 8, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 1098 /*(1072) VPADDQ*/ { 12, 2, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 1099 /*(1073) VPADDQ*/ { 13, 8, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 1100 /*(1074) VPADDQ*/ { 12, 2, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 1101 /*(1075) VPADDQ*/ { 13, 8, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 1102 /*(1076) FPREM*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 300}, 1103 /*(1077) VPADDW*/ { 7, 5, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1104 /*(1078) VPADDW*/ { 8, 2, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1105 /*(1079) VPADDW*/ { 7, 5, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1106 /*(1080) VPADDW*/ { 8, 2, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1107 /*(1081) VPADDW*/ { 9, 2, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1108 /*(1082) VPADDW*/ { 10, 6, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1109 /*(1083) VPADDW*/ { 9, 2, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1110 /*(1084) VPADDW*/ { 10, 6, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1111 /*(1085) VPADDW*/ { 9, 2, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1112 /*(1086) VPADDW*/ { 10, 6, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1113 /*(1087) VRSQRT28PS*/ { 22, 2, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1114 /*(1088) VRSQRT28PS*/ { 22, 71, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 846}, 1115 /*(1089) VRSQRT28PS*/ { 31, 7, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 1116 /*(1090) REP_OUTSW*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1117 /*(1091) REP_OUTSW*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1118 /*(1092) PMINSB*/ { 3, 16, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1119 /*(1093) PMINSB*/ { 4, 17, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1120 /*(1094) KXNORW*/ { 30, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 1121 /*(1095) PMINSD*/ { 3, 16, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1122 /*(1096) PMINSD*/ { 4, 17, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1123 /*(1097) VPCMPUB*/ { 47, 14, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 1124 /*(1098) VPCMPUB*/ { 58, 87, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1166}, 1125 /*(1099) VPCMPUB*/ { 47, 14, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 1126 /*(1100) VPCMPUB*/ { 58, 87, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1166}, 1127 /*(1101) VPCMPUB*/ { 47, 14, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 1128 /*(1102) VPCMPUB*/ { 58, 87, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1166}, 1129 /*(1103) VPADDB*/ { 7, 5, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1130 /*(1104) VPADDB*/ { 8, 2, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1131 /*(1105) VPADDB*/ { 7, 5, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1132 /*(1106) VPADDB*/ { 8, 2, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1133 /*(1107) VPADDB*/ { 9, 2, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1134 /*(1108) VPADDB*/ { 10, 29, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1135 /*(1109) VPADDB*/ { 9, 2, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1136 /*(1110) VPADDB*/ { 10, 29, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1137 /*(1111) VPADDB*/ { 9, 2, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1138 /*(1112) VPADDB*/ { 10, 29, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1139 /*(1113) VRSQRT28PD*/ { 22, 2, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 1140 /*(1114) VRSQRT28PD*/ { 22, 71, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 802}, 1141 /*(1115) VRSQRT28PD*/ { 31, 8, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 1142 /*(1116) PMULHW*/ { 3, 0, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1143 /*(1117) PMULHW*/ { 4, 1, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1144 /*(1118) PMULHW*/ { 3, 3, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1145 /*(1119) PMULHW*/ { 4, 4, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1146 /*(1120) RET_FAR*/ { 16, 88, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1147 /*(1121) RET_FAR*/ { 16, 36, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1148 /*(1122) VPCMPUD*/ { 47, 14, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 1149 /*(1123) VPCMPUD*/ { 48, 18, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 348}, 1150 /*(1124) VPCMPUD*/ { 47, 14, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 1151 /*(1125) VPCMPUD*/ { 48, 18, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 348}, 1152 /*(1126) VPCMPUD*/ { 47, 14, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 1153 /*(1127) VPCMPUD*/ { 48, 18, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 348}, 1154 /*(1128) VPADDD*/ { 7, 5, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1155 /*(1129) VPADDD*/ { 8, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1156 /*(1130) VPADDD*/ { 7, 5, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1157 /*(1131) VPADDD*/ { 8, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1158 /*(1132) VPADDD*/ { 12, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 1159 /*(1133) VPADDD*/ { 13, 7, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 1160 /*(1134) VPADDD*/ { 12, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 1161 /*(1135) VPADDD*/ { 13, 7, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 1162 /*(1136) VPADDD*/ { 12, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 1163 /*(1137) VPADDD*/ { 13, 7, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 1164 /*(1138) FINCSTP*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1173}, 1165 /*(1139) MOVDQ2Q*/ { 6, 51, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 1166 /*(1140) PMINSW*/ { 3, 0, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1167 /*(1141) PMINSW*/ { 4, 1, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1168 /*(1142) PMINSW*/ { 3, 3, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1169 /*(1143) PMINSW*/ { 4, 4, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1170 /*(1144) VPABSB*/ { 53, 5, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 1171 /*(1145) VPABSB*/ { 2, 2, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 1172 /*(1146) VPABSB*/ { 53, 5, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 1173 /*(1147) VPABSB*/ { 2, 2, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 1174 /*(1148) VPABSB*/ { 54, 2, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 1175 /*(1149) VPABSB*/ { 55, 29, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 1176 /*(1150) VPABSB*/ { 54, 2, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 1177 /*(1151) VPABSB*/ { 55, 29, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 1178 /*(1152) VPABSB*/ { 54, 2, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 1179 /*(1153) VPABSB*/ { 55, 29, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 1180 /*(1154) VSHUFF64X2*/ { 12, 14, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1181 /*(1155) VSHUFF64X2*/ { 13, 15, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1182 /*(1156) VSHUFF64X2*/ { 12, 14, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1183 /*(1157) VSHUFF64X2*/ { 13, 15, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1184 /*(1158) VGATHERPF1DPD*/ { 69, 41, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1202}, 1185 /*(1159) MOV*/ { 1, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1186 /*(1160) MOV*/ { 0, 35, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1187 /*(1161) MOV*/ { 1, 89, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1188 /*(1162) MOV*/ { 0, 49, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1189 /*(1163) MOV*/ { 21, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1190 /*(1164) MOV*/ { 16, 5, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1191 /*(1165) MOV*/ { 16, 5, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1192 /*(1166) MOV*/ { 21, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1193 /*(1167) MOV*/ { 16, 5, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1194 /*(1168) MOV*/ { 21, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1195 /*(1169) MOV*/ { 16, 5, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1196 /*(1170) MOV*/ { 21, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1197 /*(1171) MOV*/ { 16, 5, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1198 /*(1172) MOV*/ { 21, 2, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1199 /*(1173) MOV*/ { 16, 5, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1200 /*(1174) MOV*/ { 21, 2, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1201 /*(1175) MOV*/ { 16, 90, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1202 /*(1176) MOV*/ { 16, 90, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1203 /*(1177) MOV*/ { 16, 90, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1204 /*(1178) MOV*/ { 16, 90, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1205 /*(1179) MOV*/ { 16, 91, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1206 /*(1180) MOV*/ { 16, 92, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1207 /*(1181) KANDNW*/ { 30, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 1208 /*(1182) JLE*/ { 16, 10, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1209 /*(1183) JLE*/ { 16, 11, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1210 /*(1184) JLE*/ { 16, 12, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1211 /*(1185) JLE*/ { 16, 13, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1212 /*(1186) BNDMK*/ { 5, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1213 /*(1187) VPTESTMQ*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 1214 /*(1188) VPTESTMQ*/ { 48, 8, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1215 /*(1189) VPTESTMQ*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 1216 /*(1190) VPTESTMQ*/ { 48, 8, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1217 /*(1191) VPTESTMQ*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 1218 /*(1192) VPTESTMQ*/ { 48, 8, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1219 /*(1193) VCVTPD2QQ*/ { 22, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 1220 /*(1194) VCVTPD2QQ*/ { 31, 8, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 1221 /*(1195) VCVTPD2QQ*/ { 22, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 1222 /*(1196) VCVTPD2QQ*/ { 31, 8, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 1223 /*(1197) VCVTPD2QQ*/ { 22, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 1224 /*(1198) VCVTPD2QQ*/ { 22, 58, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 1225 /*(1199) VCVTPD2QQ*/ { 31, 8, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 1226 /*(1200) FDIVR*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 1227 /*(1201) FDIVR*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 1228 /*(1202) FDIVR*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 1229 /*(1203) FDIVR*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 1230 /*(1204) VFNMSUB132SD*/ { 13, 5, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1231 /*(1205) VFNMSUB132SD*/ { 30, 2, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1232 /*(1206) VFNMSUB132SD*/ { 12, 2, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1233 /*(1207) VFNMSUB132SD*/ { 12, 62, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 1234 /*(1208) VFNMSUB132SD*/ { 15, 60, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1235 /*(1209) FBLD*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 1236 /*(1210) VFNMSUB132SS*/ { 13, 5, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1237 /*(1211) VFNMSUB132SS*/ { 30, 2, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1238 /*(1212) VFNMSUB132SS*/ { 12, 2, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1239 /*(1213) VFNMSUB132SS*/ { 12, 62, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 1240 /*(1214) VFNMSUB132SS*/ { 15, 61, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1241 /*(1215) VRCP28SD*/ { 12, 2, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1242 /*(1216) VRCP28SD*/ { 12, 59, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 1243 /*(1217) VRCP28SD*/ { 15, 60, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1244 /*(1218) MAXSD*/ { 5, 50, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 1245 /*(1219) MAXSD*/ { 6, 51, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 1246 /*(1220) VUCOMISS*/ { 53, 5, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 1247 /*(1221) VUCOMISS*/ { 2, 2, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 1248 /*(1222) VUCOMISS*/ { 11, 2, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 598}, 1249 /*(1223) VUCOMISS*/ { 11, 59, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 610}, 1250 /*(1224) VUCOMISS*/ { 59, 61, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 1251 /*(1225) VPHADDWQ*/ { 19, 5, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 1252 /*(1226) VPHADDWQ*/ { 20, 2, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 1253 /*(1227) ADD_LOCK*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 1254 /*(1228) ADD_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 1255 /*(1229) ADD_LOCK*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 1256 /*(1230) ADD_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 1257 /*(1231) ADD_LOCK*/ { 49, 5, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1258 /*(1232) ADD_LOCK*/ { 49, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1259 /*(1233) VRCP28SS*/ { 12, 2, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1260 /*(1234) VRCP28SS*/ { 12, 59, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 1261 /*(1235) VRCP28SS*/ { 15, 61, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1262 /*(1236) VPHADDWD*/ { 19, 5, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 1263 /*(1237) VPHADDWD*/ { 20, 2, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 1264 /*(1238) PSRLQ*/ { 52, 73, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 705}, 1265 /*(1239) PSRLQ*/ { 52, 54, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 34}, 1266 /*(1240) PSRLQ*/ { 3, 0, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1267 /*(1241) PSRLQ*/ { 4, 1, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1268 /*(1242) PSRLQ*/ { 3, 3, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1269 /*(1243) PSRLQ*/ { 4, 4, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1270 /*(1244) PSRLW*/ { 52, 73, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 705}, 1271 /*(1245) PSRLW*/ { 52, 54, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 34}, 1272 /*(1246) PSRLW*/ { 3, 0, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1273 /*(1247) PSRLW*/ { 4, 1, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1274 /*(1248) PSRLW*/ { 3, 3, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1275 /*(1249) PSRLW*/ { 4, 4, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1276 /*(1250) VPUNPCKLWD*/ { 7, 5, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1277 /*(1251) VPUNPCKLWD*/ { 8, 2, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1278 /*(1252) VPUNPCKLWD*/ { 7, 5, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1279 /*(1253) VPUNPCKLWD*/ { 8, 2, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1280 /*(1254) VPUNPCKLWD*/ { 9, 2, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1281 /*(1255) VPUNPCKLWD*/ { 10, 6, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1282 /*(1256) VPUNPCKLWD*/ { 9, 2, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1283 /*(1257) VPUNPCKLWD*/ { 10, 6, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1284 /*(1258) VPUNPCKLWD*/ { 9, 2, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 1285 /*(1259) VPUNPCKLWD*/ { 10, 6, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 1286 /*(1260) PSRLD*/ { 52, 73, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 705}, 1287 /*(1261) PSRLD*/ { 52, 54, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 34}, 1288 /*(1262) PSRLD*/ { 3, 0, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1289 /*(1263) PSRLD*/ { 4, 1, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1290 /*(1264) PSRLD*/ { 3, 3, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1291 /*(1265) PSRLD*/ { 4, 4, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1292 /*(1266) VFNMSUB213SS*/ { 13, 5, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1293 /*(1267) VFNMSUB213SS*/ { 30, 2, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1294 /*(1268) VFNMSUB213SS*/ { 12, 2, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1295 /*(1269) VFNMSUB213SS*/ { 12, 62, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 1296 /*(1270) VFNMSUB213SS*/ { 15, 61, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1297 /*(1271) CRC32*/ { 5, 0, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 36}, 1298 /*(1272) CRC32*/ { 6, 1, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 162}, 1299 /*(1273) CRC32*/ { 5, 0, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 36}, 1300 /*(1274) CRC32*/ { 6, 1, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 162}, 1301 /*(1275) VALIGNQ*/ { 12, 14, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1302 /*(1276) VALIGNQ*/ { 13, 15, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1303 /*(1277) VALIGNQ*/ { 12, 14, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1304 /*(1278) VALIGNQ*/ { 13, 15, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1305 /*(1279) VALIGNQ*/ { 12, 14, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1306 /*(1280) VALIGNQ*/ { 13, 15, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1307 /*(1281) VREDUCESD*/ { 12, 14, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1308 /*(1282) VREDUCESD*/ { 12, 81, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 1309 /*(1283) VREDUCESD*/ { 15, 82, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1310 /*(1284) IMUL*/ { 0, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 1311 /*(1285) IMUL*/ { 1, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 1312 /*(1286) IMUL*/ { 0, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 1313 /*(1287) IMUL*/ { 1, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 1314 /*(1288) IMUL*/ { 16, 49, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1315 /*(1289) IMUL*/ { 21, 89, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1316 /*(1290) IMUL*/ { 16, 48, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1317 /*(1291) IMUL*/ { 21, 93, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1318 /*(1292) IMUL*/ { 16, 0, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1319 /*(1293) IMUL*/ { 21, 1, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1320 /*(1294) VALIGND*/ { 12, 14, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1321 /*(1295) VALIGND*/ { 13, 18, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 1322 /*(1296) VALIGND*/ { 12, 14, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1323 /*(1297) VALIGND*/ { 13, 18, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 1324 /*(1298) VALIGND*/ { 12, 14, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1325 /*(1299) VALIGND*/ { 13, 18, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 1326 /*(1300) VPMADCSWD*/ { 13, 65, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 1327 /*(1301) VPMADCSWD*/ { 30, 66, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 1328 /*(1302) VREDUCESS*/ { 12, 14, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1329 /*(1303) VREDUCESS*/ { 12, 81, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 1330 /*(1304) VREDUCESS*/ { 15, 94, 0x57, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 1331 /*(1305) PUSHA*/ { 16, 36, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1332 /*(1306) FABS*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1259}, 1333 /*(1307) FNCLEX*/ { 66, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1262}, 1334 /*(1308) VPSHUFB*/ { 7, 5, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1335 /*(1309) VPSHUFB*/ { 8, 2, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 1336 /*(1310) VPSHUFB*/ { 7, 5, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1337 /*(1311) VPSHUFB*/ { 8, 2, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 1338 /*(1312) VPSHUFB*/ { 9, 2, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 1339 /*(1313) VPSHUFB*/ { 10, 29, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 1340 /*(1314) VPSHUFB*/ { 9, 2, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 1341 /*(1315) VPSHUFB*/ { 10, 29, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 1342 /*(1316) VPSHUFB*/ { 9, 2, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 1343 /*(1317) VPSHUFB*/ { 10, 29, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 1344 /*(1318) FLDCW*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 1345 /*(1319) LFENCE*/ { 52, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1265}, 1346 /*(1320) VFNMSUB213SD*/ { 13, 5, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1347 /*(1321) VFNMSUB213SD*/ { 30, 2, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1348 /*(1322) VFNMSUB213SD*/ { 12, 2, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1349 /*(1323) VFNMSUB213SD*/ { 12, 62, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 1350 /*(1324) VFNMSUB213SD*/ { 15, 60, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1351 /*(1325) MOVD*/ { 51, 3, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 402}, 1352 /*(1326) MOVD*/ { 74, 4, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1269}, 1353 /*(1327) MOVD*/ { 3, 3, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1354 /*(1328) MOVD*/ { 4, 4, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1355 /*(1329) MOVD*/ { 51, 3, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 402}, 1356 /*(1330) MOVD*/ { 74, 4, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1269}, 1357 /*(1331) MOVD*/ { 3, 3, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1358 /*(1332) MOVD*/ { 4, 4, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1359 /*(1333) MOVD*/ { 51, 0, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 440}, 1360 /*(1334) MOVD*/ { 74, 1, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1274}, 1361 /*(1335) MOVD*/ { 3, 0, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1362 /*(1336) MOVD*/ { 4, 1, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1363 /*(1337) MOVD*/ { 51, 0, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 440}, 1364 /*(1338) MOVD*/ { 74, 1, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1274}, 1365 /*(1339) MOVD*/ { 3, 0, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1366 /*(1340) MOVD*/ { 4, 1, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1367 /*(1341) MOVHPS*/ { 3, 0, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1368 /*(1342) MOVHPS*/ { 3, 0, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1369 /*(1343) MULPS*/ { 3, 0, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1370 /*(1344) MULPS*/ { 4, 1, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1371 /*(1345) XRSTORS*/ { 73, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1279}, 1372 /*(1346) MULPD*/ { 3, 3, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1373 /*(1347) MULPD*/ { 4, 4, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1374 /*(1348) INVLPG*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 6}, 1375 /*(1349) MOVQ*/ { 51, 3, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 354}, 1376 /*(1350) MOVQ*/ { 74, 4, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1284}, 1377 /*(1351) MOVQ*/ { 51, 3, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 354}, 1378 /*(1352) MOVQ*/ { 74, 4, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1284}, 1379 /*(1353) MOVQ*/ { 3, 3, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1380 /*(1354) MOVQ*/ { 4, 4, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1381 /*(1355) MOVQ*/ { 5, 50, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1382 /*(1356) MOVQ*/ { 6, 51, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 1383 /*(1357) MOVQ*/ { 51, 0, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 444}, 1384 /*(1358) MOVQ*/ { 74, 1, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1289}, 1385 /*(1359) MOVQ*/ { 51, 0, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 444}, 1386 /*(1360) MOVQ*/ { 74, 1, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1289}, 1387 /*(1361) MOVQ*/ { 3, 0, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1388 /*(1362) MOVQ*/ { 4, 1, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1389 /*(1363) MOVQ*/ { 3, 0, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1390 /*(1364) MOVQ*/ { 4, 1, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1391 /*(1365) VMINPD*/ { 7, 5, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1392 /*(1366) VMINPD*/ { 8, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1393 /*(1367) VMINPD*/ { 7, 5, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 1394 /*(1368) VMINPD*/ { 8, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 1395 /*(1369) VMINPD*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 1396 /*(1370) VMINPD*/ { 12, 71, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1294}, 1397 /*(1371) VMINPD*/ { 13, 8, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 1398 /*(1372) VMINPD*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 1399 /*(1373) VMINPD*/ { 13, 8, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 1400 /*(1374) VMINPD*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 1401 /*(1375) VMINPD*/ { 13, 8, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 1402 /*(1376) VPTESTMB*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 1403 /*(1377) VPTESTMB*/ { 58, 29, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1404 /*(1378) VPTESTMB*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 1405 /*(1379) VPTESTMB*/ { 58, 29, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1406 /*(1380) VPTESTMB*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 1407 /*(1381) VPTESTMB*/ { 58, 29, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 1408 /*(1382) VPTESTMD*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 1409 /*(1383) VPTESTMD*/ { 48, 7, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1410 /*(1384) VPTESTMD*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 1411 /*(1385) VPTESTMD*/ { 48, 7, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1412 /*(1386) VPTESTMD*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 538}, 1413 /*(1387) VPTESTMD*/ { 48, 7, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1414 /*(1388) KORTESTW*/ { 20, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1301}, 1415 /*(1389) FDIVP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 1416 /*(1390) CVTSS2SD*/ { 5, 50, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1417 /*(1391) CVTSS2SD*/ { 6, 51, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 1418 /*(1392) VPTESTMW*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 1419 /*(1393) VPTESTMW*/ { 58, 6, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1420 /*(1394) VPTESTMW*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 1421 /*(1395) VPTESTMW*/ { 58, 6, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1422 /*(1396) VPTESTMW*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 1423 /*(1397) VPTESTMW*/ { 58, 6, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1424 /*(1398) VMINPS*/ { 7, 5, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 1425 /*(1399) VMINPS*/ { 8, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 1426 /*(1400) VMINPS*/ { 7, 5, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 1427 /*(1401) VMINPS*/ { 8, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 1428 /*(1402) VMINPS*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 1429 /*(1403) VMINPS*/ { 12, 71, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1309}, 1430 /*(1404) VMINPS*/ { 13, 7, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 1431 /*(1405) VMINPS*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 1432 /*(1406) VMINPS*/ { 13, 7, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 1433 /*(1407) VMINPS*/ { 12, 2, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 1434 /*(1408) VMINPS*/ { 13, 7, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 1435 /*(1409) INT1*/ { 16, 36, 0xf1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1436 /*(1410) CVTSS2SI*/ { 29, 50, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1437 /*(1411) CVTSS2SI*/ { 28, 51, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 95}, 1438 /*(1412) CVTSS2SI*/ { 29, 50, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 29}, 1439 /*(1413) CVTSS2SI*/ { 28, 51, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 88}, 1440 /*(1414) MOVHPD*/ { 3, 3, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1441 /*(1415) MOVHPD*/ { 3, 3, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1442 /*(1416) CMOVZ*/ { 16, 0, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1443 /*(1417) CMOVZ*/ { 21, 1, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1444 /*(1418) CMOVP*/ { 16, 0, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1445 /*(1419) CMOVP*/ { 21, 1, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1446 /*(1420) CMOVS*/ { 16, 0, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1447 /*(1421) CMOVS*/ { 21, 1, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1448 /*(1422) VBROADCASTF128*/ { 70, 5, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1316}, 1449 /*(1423) CMOVL*/ { 16, 0, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1450 /*(1424) CMOVL*/ { 21, 1, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1451 /*(1425) CMOVO*/ { 16, 0, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1452 /*(1426) CMOVO*/ { 21, 1, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1453 /*(1427) CMOVB*/ { 16, 0, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1454 /*(1428) CMOVB*/ { 21, 1, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1455 /*(1429) VROUNDPD*/ { 53, 35, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 1456 /*(1430) VROUNDPD*/ { 2, 14, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 1457 /*(1431) VROUNDPD*/ { 53, 35, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 1458 /*(1432) VROUNDPD*/ { 2, 14, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 1459 /*(1433) VPBROADCASTMB2Q*/ { 75, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1330}, 1460 /*(1434) VPBROADCASTMB2Q*/ { 75, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1343}, 1461 /*(1435) VPBROADCASTMB2Q*/ { 75, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1356}, 1462 /*(1436) XOR_LOCK*/ { 36, 35, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 1463 /*(1437) XOR_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 1464 /*(1438) XOR_LOCK*/ { 36, 35, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 1465 /*(1439) XOR_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 746}, 1466 /*(1440) XOR_LOCK*/ { 49, 5, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1467 /*(1441) XOR_LOCK*/ { 49, 5, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1468 /*(1442) VROUNDPS*/ { 53, 35, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 1469 /*(1443) VROUNDPS*/ { 2, 14, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 1470 /*(1444) VROUNDPS*/ { 53, 35, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 1471 /*(1445) VROUNDPS*/ { 2, 14, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 1472 /*(1446) FRSTOR*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 1473 /*(1447) FRSTOR*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 1474 /*(1448) MOVZX*/ { 16, 0, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1475 /*(1449) MOVZX*/ { 21, 1, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1476 /*(1450) MOVZX*/ { 16, 0, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1477 /*(1451) MOVZX*/ { 21, 1, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1478 /*(1452) PMULUDQ*/ { 3, 0, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1479 /*(1453) PMULUDQ*/ { 4, 1, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1480 /*(1454) PMULUDQ*/ { 3, 3, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1481 /*(1455) PMULUDQ*/ { 4, 4, 0xf4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1482 /*(1456) VPHADDDQ*/ { 19, 5, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 1483 /*(1457) VPHADDDQ*/ { 20, 2, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 1484 /*(1458) VCVTSD2SS*/ { 7, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 1485 /*(1459) VCVTSD2SS*/ { 8, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 1486 /*(1460) VCVTSD2SS*/ { 12, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 1487 /*(1461) VCVTSD2SS*/ { 12, 62, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 1488 /*(1462) VCVTSD2SS*/ { 15, 60, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 1489 /*(1463) JMP*/ { 0, 95, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 1490 /*(1464) JMP*/ { 1, 96, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 1491 /*(1465) JMP*/ { 16, 97, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1492 /*(1466) JMP*/ { 16, 98, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1493 /*(1467) JMP*/ { 16, 99, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1494 /*(1468) JMP*/ { 16, 100, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1495 /*(1469) VRCPPS*/ { 53, 5, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 1496 /*(1470) VRCPPS*/ { 2, 2, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 1497 /*(1471) VRCPPS*/ { 53, 5, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 1498 /*(1472) VRCPPS*/ { 2, 2, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 1499 /*(1473) V4FNMADDSS*/ { 15, 9, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 77}, 1500 /*(1474) INVD*/ { 16, 19, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1501 /*(1475) VPMOVSWB*/ { 22, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 1502 /*(1476) VPMOVSWB*/ { 23, 101, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 1503 /*(1477) VPMOVSWB*/ { 22, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 1504 /*(1478) VPMOVSWB*/ { 23, 101, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 1505 /*(1479) VPMOVSWB*/ { 22, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 1506 /*(1480) VPMOVSWB*/ { 23, 101, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 1507 /*(1481) VCVTSD2SI*/ { 53, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 1508 /*(1482) VCVTSD2SI*/ { 2, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 1509 /*(1483) VCVTSD2SI*/ { 19, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1380}, 1510 /*(1484) VCVTSD2SI*/ { 20, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1387}, 1511 /*(1485) VCVTSD2SI*/ { 19, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1395}, 1512 /*(1486) VCVTSD2SI*/ { 20, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1402}, 1513 /*(1487) VCVTSD2SI*/ { 76, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1410}, 1514 /*(1488) VCVTSD2SI*/ { 77, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1420}, 1515 /*(1489) VCVTSD2SI*/ { 76, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1433}, 1516 /*(1490) VCVTSD2SI*/ { 77, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1443}, 1517 /*(1491) VCVTSD2SI*/ { 78, 102, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1456}, 1518 /*(1492) VCVTSD2SI*/ { 79, 102, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1465}, 1519 /*(1493) VCVTSD2SI*/ { 77, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1477}, 1520 /*(1494) VCVTSD2SI*/ { 77, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1490}, 1521 /*(1495) VCVTSD2SI*/ { 79, 102, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1503}, 1522 /*(1496) STMXCSR*/ { 43, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1523 /*(1497) XSAVE64*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1515}, 1524 /*(1498) PUNPCKHWD*/ { 3, 0, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1525 /*(1499) PUNPCKHWD*/ { 4, 1, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1526 /*(1500) PUNPCKHWD*/ { 3, 3, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1527 /*(1501) PUNPCKHWD*/ { 4, 4, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1528 /*(1502) VFMADDPD*/ { 13, 65, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1529 /*(1503) VFMADDPD*/ { 30, 66, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1530 /*(1504) VFMADDPD*/ { 13, 65, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1531 /*(1505) VFMADDPD*/ { 30, 66, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1532 /*(1506) VFMADDPD*/ { 13, 65, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1533 /*(1507) VFMADDPD*/ { 30, 66, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1534 /*(1508) VFMADDPD*/ { 13, 65, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1535 /*(1509) VFMADDPD*/ { 30, 66, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1536 /*(1510) VPMULTISHIFTQB*/ { 12, 2, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1537 /*(1511) VPMULTISHIFTQB*/ { 13, 8, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1538 /*(1512) VPMULTISHIFTQB*/ { 12, 2, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1539 /*(1513) VPMULTISHIFTQB*/ { 13, 8, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1540 /*(1514) VPMULTISHIFTQB*/ { 12, 2, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1541 /*(1515) VPMULTISHIFTQB*/ { 13, 8, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1542 /*(1516) GF2P8MULB*/ { 4, 1, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1543 /*(1517) GF2P8MULB*/ { 3, 0, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1544 /*(1518) VFMADDPS*/ { 13, 65, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1545 /*(1519) VFMADDPS*/ { 30, 66, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1546 /*(1520) VFMADDPS*/ { 13, 65, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1547 /*(1521) VFMADDPS*/ { 30, 66, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1548 /*(1522) VFMADDPS*/ { 13, 65, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1549 /*(1523) VFMADDPS*/ { 30, 66, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1550 /*(1524) VFMADDPS*/ { 13, 65, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1551 /*(1525) VFMADDPS*/ { 30, 66, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1552 /*(1526) RDTSCP*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 47}, 1553 /*(1527) VSCATTERDPS*/ { 33, 44, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 1554 /*(1528) VSCATTERDPS*/ { 33, 45, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 1555 /*(1529) VSCATTERDPS*/ { 33, 46, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 1556 /*(1530) FLDLG2*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1520}, 1557 /*(1531) SYSRET*/ { 16, 19, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1558 /*(1532) SYSRET*/ { 16, 19, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1559 /*(1533) SUB*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 268}, 1560 /*(1534) SUB*/ { 1, 93, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 1561 /*(1535) SUB*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 268}, 1562 /*(1536) SUB*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 1563 /*(1537) SUB*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 268}, 1564 /*(1538) SUB*/ { 1, 93, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 1565 /*(1539) SUB*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 268}, 1566 /*(1540) SUB*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 1567 /*(1541) SUB*/ { 49, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1568 /*(1542) SUB*/ { 21, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1569 /*(1543) SUB*/ { 49, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1570 /*(1544) SUB*/ { 21, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1571 /*(1545) SUB*/ { 21, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1572 /*(1546) SUB*/ { 16, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1573 /*(1547) SUB*/ { 21, 2, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1574 /*(1548) SUB*/ { 16, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1575 /*(1549) SUB*/ { 16, 103, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1576 /*(1550) SUB*/ { 16, 104, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1577 /*(1551) FXRSTOR*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 442}, 1578 /*(1552) AESKEYGENASSIST*/ { 4, 54, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 1579 /*(1553) AESKEYGENASSIST*/ { 3, 105, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 1580 /*(1554) MAXPD*/ { 3, 3, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1581 /*(1555) MAXPD*/ { 4, 4, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1582 /*(1556) CLAC*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 430}, 1583 /*(1557) SETNLE*/ { 16, 0, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1584 /*(1558) SETNLE*/ { 21, 1, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1585 /*(1559) MAXPS*/ { 3, 0, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1586 /*(1560) MAXPS*/ { 4, 1, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1587 /*(1561) V4FMADDSS*/ { 15, 9, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 77}, 1588 /*(1562) VMASKMOVDQU*/ { 2, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1589 /*(1563) KSHIFTRQ*/ { 20, 14, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 1590 /*(1564) KSHIFTRW*/ { 20, 14, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 1591 /*(1565) VPERMPS*/ { 13, 5, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1592 /*(1566) VPERMPS*/ { 30, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1593 /*(1567) VPERMPS*/ { 12, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1594 /*(1568) VPERMPS*/ { 13, 7, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1595 /*(1569) VPERMPS*/ { 12, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1596 /*(1570) VPERMPS*/ { 13, 7, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1597 /*(1571) IRETD*/ { 16, 36, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1598 /*(1572) KSHIFTRB*/ { 20, 14, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 1599 /*(1573) CMPXCHG8B*/ { 36, 106, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2}, 1600 /*(1574) CMPXCHG8B*/ { 80, 106, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 157}, 1601 /*(1575) KSHIFTRD*/ { 20, 14, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 1602 /*(1576) IRETQ*/ { 16, 36, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1603 /*(1577) VPERMPD*/ { 19, 35, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 899}, 1604 /*(1578) VPERMPD*/ { 20, 14, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 1605 /*(1579) VPERMPD*/ { 22, 14, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 1606 /*(1580) VPERMPD*/ { 31, 15, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 1607 /*(1581) VPERMPD*/ { 12, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1608 /*(1582) VPERMPD*/ { 13, 8, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1609 /*(1583) VPERMPD*/ { 22, 14, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 1610 /*(1584) VPERMPD*/ { 31, 15, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 1611 /*(1585) VPERMPD*/ { 12, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1612 /*(1586) VPERMPD*/ { 13, 8, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1613 /*(1587) BLENDVPS*/ { 3, 16, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1614 /*(1588) BLENDVPS*/ { 4, 17, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1615 /*(1589) ADD*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 1616 /*(1590) ADD*/ { 1, 93, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1617 /*(1591) ADD*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 1618 /*(1592) ADD*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1619 /*(1593) ADD*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 1620 /*(1594) ADD*/ { 1, 93, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1621 /*(1595) ADD*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 1622 /*(1596) ADD*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1623 /*(1597) ADD*/ { 49, 5, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1624 /*(1598) ADD*/ { 21, 2, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1625 /*(1599) ADD*/ { 49, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1626 /*(1600) ADD*/ { 21, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1627 /*(1601) ADD*/ { 16, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1628 /*(1602) ADD*/ { 21, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1629 /*(1603) ADD*/ { 16, 5, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1630 /*(1604) ADD*/ { 21, 2, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1631 /*(1605) ADD*/ { 16, 103, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1632 /*(1606) ADD*/ { 16, 104, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1633 /*(1607) ADC*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 1634 /*(1608) ADC*/ { 1, 93, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 1635 /*(1609) ADC*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 1636 /*(1610) ADC*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 1637 /*(1611) ADC*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 1638 /*(1612) ADC*/ { 1, 93, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 1639 /*(1613) ADC*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 1640 /*(1614) ADC*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 1641 /*(1615) ADC*/ { 49, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1642 /*(1616) ADC*/ { 21, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1643 /*(1617) ADC*/ { 49, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1644 /*(1618) ADC*/ { 21, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1645 /*(1619) ADC*/ { 16, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1646 /*(1620) ADC*/ { 21, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1647 /*(1621) ADC*/ { 16, 5, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1648 /*(1622) ADC*/ { 21, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1649 /*(1623) ADC*/ { 16, 103, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1650 /*(1624) ADC*/ { 16, 104, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1651 /*(1625) BLENDVPD*/ { 3, 16, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1652 /*(1626) BLENDVPD*/ { 4, 17, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1653 /*(1627) RDPMC*/ { 16, 19, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1654 /*(1628) FLDLN2*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1531}, 1655 /*(1629) KSHIFTLD*/ { 20, 14, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 1656 /*(1630) KSHIFTLB*/ { 20, 14, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 1657 /*(1631) VPDPBUSD*/ { 12, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1658 /*(1632) VPDPBUSD*/ { 13, 7, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1659 /*(1633) VPDPBUSD*/ { 12, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1660 /*(1634) VPDPBUSD*/ { 13, 7, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1661 /*(1635) VPDPBUSD*/ { 12, 2, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1662 /*(1636) VPDPBUSD*/ { 13, 7, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1663 /*(1637) KSHIFTLW*/ { 20, 14, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 1664 /*(1638) KSHIFTLQ*/ { 20, 14, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 1665 /*(1639) PSRAW*/ { 52, 73, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1534}, 1666 /*(1640) PSRAW*/ { 52, 54, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1538}, 1667 /*(1641) PSRAW*/ { 3, 0, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1668 /*(1642) PSRAW*/ { 4, 1, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1669 /*(1643) PSRAW*/ { 3, 3, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1670 /*(1644) PSRAW*/ { 4, 4, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1671 /*(1645) VFMADDSUB132PD*/ { 13, 5, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1672 /*(1646) VFMADDSUB132PD*/ { 30, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1673 /*(1647) VFMADDSUB132PD*/ { 13, 5, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1674 /*(1648) VFMADDSUB132PD*/ { 30, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1675 /*(1649) VFMADDSUB132PD*/ { 12, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1676 /*(1650) VFMADDSUB132PD*/ { 12, 58, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 1677 /*(1651) VFMADDSUB132PD*/ { 13, 8, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1678 /*(1652) VFMADDSUB132PD*/ { 12, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1679 /*(1653) VFMADDSUB132PD*/ { 13, 8, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1680 /*(1654) VFMADDSUB132PD*/ { 12, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1681 /*(1655) VFMADDSUB132PD*/ { 13, 8, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1682 /*(1656) PSRAD*/ { 52, 73, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1534}, 1683 /*(1657) PSRAD*/ { 52, 54, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1538}, 1684 /*(1658) PSRAD*/ { 3, 0, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1685 /*(1659) PSRAD*/ { 4, 1, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1686 /*(1660) PSRAD*/ { 3, 3, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1687 /*(1661) PSRAD*/ { 4, 4, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1688 /*(1662) PACKSSWB*/ { 3, 0, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1689 /*(1663) PACKSSWB*/ { 4, 1, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1690 /*(1664) PACKSSWB*/ { 3, 3, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1691 /*(1665) PACKSSWB*/ { 4, 4, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1692 /*(1666) VFMADDSUB132PS*/ { 13, 5, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1693 /*(1667) VFMADDSUB132PS*/ { 30, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1694 /*(1668) VFMADDSUB132PS*/ { 13, 5, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1695 /*(1669) VFMADDSUB132PS*/ { 30, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1696 /*(1670) VFMADDSUB132PS*/ { 12, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1697 /*(1671) VFMADDSUB132PS*/ { 12, 58, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 1698 /*(1672) VFMADDSUB132PS*/ { 13, 7, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1699 /*(1673) VFMADDSUB132PS*/ { 12, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1700 /*(1674) VFMADDSUB132PS*/ { 13, 7, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1701 /*(1675) VFMADDSUB132PS*/ { 12, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1702 /*(1676) VFMADDSUB132PS*/ { 13, 7, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1703 /*(1677) DEC*/ { 36, 5, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2}, 1704 /*(1678) DEC*/ { 1, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 1705 /*(1679) DEC*/ { 36, 5, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2}, 1706 /*(1680) DEC*/ { 1, 2, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 1707 /*(1681) DEC*/ { 16, 47, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1708 /*(1682) VPGATHERDD*/ { 32, 37, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 1709 /*(1683) VPGATHERDD*/ { 32, 38, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 1710 /*(1684) VPGATHERDD*/ { 33, 44, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 1711 /*(1685) VPGATHERDD*/ { 33, 45, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 1712 /*(1686) VPGATHERDD*/ { 33, 46, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 1713 /*(1687) SETBE*/ { 16, 0, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1714 /*(1688) SETBE*/ { 21, 1, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1715 /*(1689) VPGATHERDQ*/ { 32, 38, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 1716 /*(1690) VPGATHERDQ*/ { 32, 38, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 1717 /*(1691) VPGATHERDQ*/ { 33, 41, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 1718 /*(1692) VPGATHERDQ*/ { 33, 40, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 1719 /*(1693) VPGATHERDQ*/ { 33, 40, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 1720 /*(1694) VCVTTSD2SI*/ { 53, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 1721 /*(1695) VCVTTSD2SI*/ { 2, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 1722 /*(1696) VCVTTSD2SI*/ { 19, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1380}, 1723 /*(1697) VCVTTSD2SI*/ { 20, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1387}, 1724 /*(1698) VCVTTSD2SI*/ { 19, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1395}, 1725 /*(1699) VCVTTSD2SI*/ { 20, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1402}, 1726 /*(1700) VCVTTSD2SI*/ { 76, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1410}, 1727 /*(1701) VCVTTSD2SI*/ { 77, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1420}, 1728 /*(1702) VCVTTSD2SI*/ { 76, 59, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1433}, 1729 /*(1703) VCVTTSD2SI*/ { 77, 59, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1443}, 1730 /*(1704) VCVTTSD2SI*/ { 78, 102, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1456}, 1731 /*(1705) VCVTTSD2SI*/ { 79, 102, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1465}, 1732 /*(1706) VCVTTSD2SI*/ { 77, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1477}, 1733 /*(1707) VCVTTSD2SI*/ { 77, 59, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1490}, 1734 /*(1708) VCVTTSD2SI*/ { 79, 102, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1503}, 1735 /*(1709) VCVTPD2PS*/ { 53, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 1736 /*(1710) VCVTPD2PS*/ { 2, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1737 /*(1711) VCVTPD2PS*/ { 53, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 1738 /*(1712) VCVTPD2PS*/ { 2, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1739 /*(1713) VCVTPD2PS*/ { 22, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 1740 /*(1714) VCVTPD2PS*/ { 22, 58, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 1741 /*(1715) VCVTPD2PS*/ { 31, 8, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 1742 /*(1716) VCVTPD2PS*/ { 22, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 1743 /*(1717) VCVTPD2PS*/ { 31, 8, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 1744 /*(1718) VCVTPD2PS*/ { 22, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 1745 /*(1719) VCVTPD2PS*/ { 31, 8, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 1746 /*(1720) SHA256RNDS2*/ { 4, 1, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 1747 /*(1721) SHA256RNDS2*/ { 3, 0, 0xcb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 1748 /*(1722) VMRESUME*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1542}, 1749 /*(1723) UCOMISD*/ { 3, 3, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1750 /*(1724) UCOMISD*/ { 4, 4, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1751 /*(1725) UCOMISS*/ { 3, 0, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1752 /*(1726) UCOMISS*/ { 4, 1, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1753 /*(1727) PFPNACC*/ { 16, 79, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 1754 /*(1728) PFPNACC*/ { 21, 80, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 1755 /*(1729) INVLPGA*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 277}, 1756 /*(1730) XRSTORS64*/ { 73, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 884}, 1757 /*(1731) PFSUB*/ { 16, 79, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 1758 /*(1732) PFSUB*/ { 21, 80, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 1759 /*(1733) VPSHLDQ*/ { 12, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1760 /*(1734) VPSHLDQ*/ { 13, 15, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1761 /*(1735) VPSHLDQ*/ { 12, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1762 /*(1736) VPSHLDQ*/ { 13, 15, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1763 /*(1737) VPSHLDQ*/ { 12, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1764 /*(1738) VPSHLDQ*/ { 13, 15, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 1765 /*(1739) VPSHLDW*/ { 12, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1766 /*(1740) VPSHLDW*/ { 15, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1767 /*(1741) VPSHLDW*/ { 12, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1768 /*(1742) VPSHLDW*/ { 15, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1769 /*(1743) VPSHLDW*/ { 12, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 1770 /*(1744) VPSHLDW*/ { 15, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 1771 /*(1745) CVTPS2DQ*/ { 3, 3, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1772 /*(1746) CVTPS2DQ*/ { 4, 4, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1773 /*(1747) MOV_DR*/ { 16, 107, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1774 /*(1748) MOV_DR*/ { 16, 107, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1775 /*(1749) MOV_DR*/ { 16, 107, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1776 /*(1750) MOV_DR*/ { 16, 107, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1777 /*(1751) PUNPCKHDQ*/ { 3, 0, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1778 /*(1752) PUNPCKHDQ*/ { 4, 1, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 1779 /*(1753) PUNPCKHDQ*/ { 3, 3, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1780 /*(1754) PUNPCKHDQ*/ { 4, 4, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 1781 /*(1755) PFMAX*/ { 16, 79, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 1782 /*(1756) PFMAX*/ { 21, 80, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 1783 /*(1757) REPE_SCASW*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1784 /*(1758) VPSHRDVD*/ { 12, 2, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1785 /*(1759) VPSHRDVD*/ { 13, 7, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1786 /*(1760) VPSHRDVD*/ { 12, 2, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1787 /*(1761) VPSHRDVD*/ { 13, 7, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1788 /*(1762) VPSHRDVD*/ { 12, 2, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1789 /*(1763) VPSHRDVD*/ { 13, 7, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1790 /*(1764) REPE_SCASQ*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1791 /*(1765) CLWB*/ { 43, 3, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 746}, 1792 /*(1766) VPSHRDVW*/ { 12, 2, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1793 /*(1767) VPSHRDVW*/ { 15, 6, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1794 /*(1768) VPSHRDVW*/ { 12, 2, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1795 /*(1769) VPSHRDVW*/ { 15, 6, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1796 /*(1770) VPSHRDVW*/ { 12, 2, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1797 /*(1771) VPSHRDVW*/ { 15, 6, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 1798 /*(1772) REPE_SCASD*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1799 /*(1773) REPE_SCASB*/ { 5, 36, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1800 /*(1774) VPSHRDVQ*/ { 12, 2, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1801 /*(1775) VPSHRDVQ*/ { 13, 8, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1802 /*(1776) VPSHRDVQ*/ { 12, 2, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1803 /*(1777) VPSHRDVQ*/ { 13, 8, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1804 /*(1778) VPSHRDVQ*/ { 12, 2, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1805 /*(1779) VPSHRDVQ*/ { 13, 8, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1806 /*(1780) PMOVZXBW*/ { 3, 16, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1807 /*(1781) PMOVZXBW*/ { 4, 17, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1808 /*(1782) PMOVZXBQ*/ { 3, 16, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1809 /*(1783) PMOVZXBQ*/ { 4, 17, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1810 /*(1784) PMOVZXBD*/ { 3, 16, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1811 /*(1785) PMOVZXBD*/ { 4, 17, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 1812 /*(1786) CMC*/ { 16, 36, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1813 /*(1787) VPERM2F128*/ { 13, 35, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1814 /*(1788) VPERM2F128*/ { 30, 14, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1815 /*(1789) CMOVBE*/ { 16, 0, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1816 /*(1790) CMOVBE*/ { 21, 1, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1817 /*(1791) CMP*/ { 0, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 1818 /*(1792) CMP*/ { 1, 93, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 1819 /*(1793) CMP*/ { 0, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 1820 /*(1794) CMP*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 1821 /*(1795) CMP*/ { 0, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 1822 /*(1796) CMP*/ { 1, 93, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 1823 /*(1797) CMP*/ { 0, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 1824 /*(1798) CMP*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 1825 /*(1799) CMP*/ { 16, 5, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1826 /*(1800) CMP*/ { 21, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1827 /*(1801) CMP*/ { 16, 5, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1828 /*(1802) CMP*/ { 21, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1829 /*(1803) CMP*/ { 16, 5, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1830 /*(1804) CMP*/ { 21, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1831 /*(1805) CMP*/ { 16, 5, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1832 /*(1806) CMP*/ { 21, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1833 /*(1807) CMP*/ { 16, 103, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1834 /*(1808) CMP*/ { 16, 104, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1835 /*(1809) VFMSUB132PS*/ { 13, 5, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1836 /*(1810) VFMSUB132PS*/ { 30, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1837 /*(1811) VFMSUB132PS*/ { 13, 5, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1838 /*(1812) VFMSUB132PS*/ { 30, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1839 /*(1813) VFMSUB132PS*/ { 12, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1840 /*(1814) VFMSUB132PS*/ { 12, 58, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 1841 /*(1815) VFMSUB132PS*/ { 13, 7, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1842 /*(1816) VFMSUB132PS*/ { 12, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1843 /*(1817) VFMSUB132PS*/ { 13, 7, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1844 /*(1818) VFMSUB132PS*/ { 12, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1845 /*(1819) VFMSUB132PS*/ { 13, 7, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1846 /*(1820) SHA1NEXTE*/ { 4, 1, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 1847 /*(1821) SHA1NEXTE*/ { 3, 0, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 1848 /*(1822) INVVPID*/ { 3, 108, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1849 /*(1823) INVVPID*/ { 3, 108, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 1850 /*(1824) VFMSUB132PD*/ { 13, 5, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1851 /*(1825) VFMSUB132PD*/ { 30, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1852 /*(1826) VFMSUB132PD*/ { 13, 5, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1853 /*(1827) VFMSUB132PD*/ { 30, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1854 /*(1828) VFMSUB132PD*/ { 12, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1855 /*(1829) VFMSUB132PD*/ { 12, 58, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 1856 /*(1830) VFMSUB132PD*/ { 13, 8, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1857 /*(1831) VFMSUB132PD*/ { 12, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1858 /*(1832) VFMSUB132PD*/ { 13, 8, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1859 /*(1833) VFMSUB132PD*/ { 12, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1860 /*(1834) VFMSUB132PD*/ { 13, 8, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1861 /*(1835) PFACC*/ { 16, 79, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 1862 /*(1836) PFACC*/ { 21, 80, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 1863 /*(1837) PFRCPIT2*/ { 16, 79, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 1864 /*(1838) PFRCPIT2*/ { 21, 80, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 1865 /*(1839) VINSERTI32X4*/ { 12, 14, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1866 /*(1840) VINSERTI32X4*/ { 15, 75, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 1867 /*(1841) VINSERTI32X4*/ { 12, 14, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1868 /*(1842) VINSERTI32X4*/ { 15, 75, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 1869 /*(1843) VINSERTI32X8*/ { 12, 14, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 1870 /*(1844) VINSERTI32X8*/ { 15, 109, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 1871 /*(1845) VCVTPH2PS*/ { 19, 5, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1023}, 1872 /*(1846) VCVTPH2PS*/ { 20, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1039}, 1873 /*(1847) VCVTPH2PS*/ { 19, 5, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1023}, 1874 /*(1848) VCVTPH2PS*/ { 20, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1039}, 1875 /*(1849) VCVTPH2PS*/ { 22, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1876 /*(1850) VCVTPH2PS*/ { 22, 71, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 846}, 1877 /*(1851) VCVTPH2PS*/ { 81, 34, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 1878 /*(1852) VCVTPH2PS*/ { 22, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1879 /*(1853) VCVTPH2PS*/ { 81, 34, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 1880 /*(1854) VCVTPH2PS*/ { 22, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1881 /*(1855) VCVTPH2PS*/ { 81, 34, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 1882 /*(1856) VMOVSHDUP*/ { 53, 5, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 1883 /*(1857) VMOVSHDUP*/ { 2, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 1884 /*(1858) VMOVSHDUP*/ { 53, 5, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 1885 /*(1859) VMOVSHDUP*/ { 2, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 1886 /*(1860) VMOVSHDUP*/ { 22, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 1887 /*(1861) VMOVSHDUP*/ { 81, 110, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 1888 /*(1862) VMOVSHDUP*/ { 22, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 1889 /*(1863) VMOVSHDUP*/ { 81, 110, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 1890 /*(1864) VMOVSHDUP*/ { 22, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 1891 /*(1865) VMOVSHDUP*/ { 81, 110, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 1892 /*(1866) VP4DPWSSDS*/ { 15, 9, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 77}, 1893 /*(1867) BNDSTX*/ { 3, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 1894 /*(1868) BNDSTX*/ { 82, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 324}, 1895 /*(1869) BNDSTX*/ { 82, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 1896 /*(1870) BNDSTX*/ { 82, 0, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 51}, 1897 /*(1871) INSERTQ*/ { 6, 111, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 1898 /*(1872) INSERTQ*/ { 6, 1, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 1899 /*(1873) INT*/ { 16, 112, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1900 /*(1874) INC*/ { 36, 5, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 1901 /*(1875) INC*/ { 1, 2, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1902 /*(1876) INC*/ { 36, 5, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 9}, 1903 /*(1877) INC*/ { 1, 2, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 1904 /*(1878) INC*/ { 16, 47, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 1905 /*(1879) VMAXSS*/ { 7, 5, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 1906 /*(1880) VMAXSS*/ { 8, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 1907 /*(1881) VMAXSS*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 1908 /*(1882) VMAXSS*/ { 12, 59, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 1909 /*(1883) VMAXSS*/ { 15, 61, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 1910 /*(1884) VPEXTRW_C5*/ { 76, 14, 0xc5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1556}, 1911 /*(1885) VPEXTRW_C5*/ { 83, 14, 0xc5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1566}, 1912 /*(1886) VPMOVSXDQ*/ { 2, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 1913 /*(1887) VPMOVSXDQ*/ { 53, 5, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 1914 /*(1888) VPMOVSXDQ*/ { 2, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 1915 /*(1889) VPMOVSXDQ*/ { 53, 5, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 1916 /*(1890) VPMOVSXDQ*/ { 22, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1917 /*(1891) VPMOVSXDQ*/ { 81, 113, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 1918 /*(1892) VPMOVSXDQ*/ { 22, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1919 /*(1893) VPMOVSXDQ*/ { 81, 113, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 1920 /*(1894) VPMOVSXDQ*/ { 22, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 1921 /*(1895) VPMOVSXDQ*/ { 81, 113, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 1922 /*(1896) VPSRLVQ*/ { 13, 5, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1923 /*(1897) VPSRLVQ*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1924 /*(1898) VPSRLVQ*/ { 13, 5, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 1925 /*(1899) VPSRLVQ*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 1926 /*(1900) VPSRLVQ*/ { 12, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1927 /*(1901) VPSRLVQ*/ { 13, 8, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1928 /*(1902) VPSRLVQ*/ { 12, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1929 /*(1903) VPSRLVQ*/ { 13, 8, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1930 /*(1904) VPSRLVQ*/ { 12, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 1931 /*(1905) VPSRLVQ*/ { 13, 8, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 1932 /*(1906) VPCONFLICTQ*/ { 22, 2, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 1933 /*(1907) VPCONFLICTQ*/ { 31, 8, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 1934 /*(1908) VPCONFLICTQ*/ { 22, 2, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 1935 /*(1909) VPCONFLICTQ*/ { 31, 8, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 1936 /*(1910) VPCONFLICTQ*/ { 22, 2, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 1937 /*(1911) VPCONFLICTQ*/ { 31, 8, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 1938 /*(1912) SETB*/ { 16, 0, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1939 /*(1913) SETB*/ { 21, 1, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1940 /*(1914) SETL*/ { 16, 0, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1941 /*(1915) SETL*/ { 21, 1, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1942 /*(1916) SETO*/ { 16, 0, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1943 /*(1917) SETO*/ { 21, 1, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1944 /*(1918) BSR*/ { 16, 0, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1945 /*(1919) BSR*/ { 21, 1, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1946 /*(1920) BSR*/ { 16, 0, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1947 /*(1921) BSR*/ { 21, 1, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1948 /*(1922) BSR*/ { 16, 0, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1949 /*(1923) BSR*/ { 21, 1, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1950 /*(1924) BSR*/ { 84, 0, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1951 /*(1925) BSR*/ { 85, 1, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 16}, 1952 /*(1926) VMOVDDUP*/ { 53, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 1953 /*(1927) VMOVDDUP*/ { 2, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 1954 /*(1928) VMOVDDUP*/ { 53, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 1955 /*(1929) VMOVDDUP*/ { 2, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 1956 /*(1930) VMOVDDUP*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 1957 /*(1931) VMOVDDUP*/ { 81, 114, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 1958 /*(1932) VMOVDDUP*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 1959 /*(1933) VMOVDDUP*/ { 81, 114, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 1960 /*(1934) VMOVDDUP*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 1961 /*(1935) VMOVDDUP*/ { 81, 114, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 1962 /*(1936) SETP*/ { 16, 0, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1963 /*(1937) SETP*/ { 21, 1, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1964 /*(1938) VPSRLVD*/ { 13, 5, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1965 /*(1939) VPSRLVD*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1966 /*(1940) VPSRLVD*/ { 13, 5, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 1967 /*(1941) VPSRLVD*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 1968 /*(1942) VPSRLVD*/ { 12, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1969 /*(1943) VPSRLVD*/ { 13, 7, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1970 /*(1944) VPSRLVD*/ { 12, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1971 /*(1945) VPSRLVD*/ { 13, 7, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1972 /*(1946) VPSRLVD*/ { 12, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 1973 /*(1947) VPSRLVD*/ { 13, 7, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 1974 /*(1948) SETS*/ { 16, 0, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1975 /*(1949) SETS*/ { 21, 1, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1976 /*(1950) BSF*/ { 16, 0, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1977 /*(1951) BSF*/ { 21, 1, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1978 /*(1952) BSF*/ { 16, 0, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1979 /*(1953) BSF*/ { 21, 1, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1980 /*(1954) BSF*/ { 86, 0, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1981 /*(1955) BSF*/ { 87, 1, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 63}, 1982 /*(1956) VMXON*/ { 42, 50, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 276}, 1983 /*(1957) SETZ*/ { 16, 0, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 1984 /*(1958) SETZ*/ { 21, 1, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 1985 /*(1959) TZCNT*/ { 86, 0, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 4}, 1986 /*(1960) TZCNT*/ { 87, 1, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 1987 /*(1961) VPSRLDQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 726}, 1988 /*(1962) VPSRLDQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 726}, 1989 /*(1963) VPSRLDQ*/ { 88, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1596}, 1990 /*(1964) VPSRLDQ*/ { 89, 87, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 1991 /*(1965) VPSRLDQ*/ { 88, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1596}, 1992 /*(1966) VPSRLDQ*/ { 89, 87, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 1993 /*(1967) VPSRLDQ*/ { 88, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1596}, 1994 /*(1968) VPSRLDQ*/ { 89, 87, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 1995 /*(1969) VFNMADDSD*/ { 13, 65, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 1996 /*(1970) VFNMADDSD*/ { 30, 66, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 1997 /*(1971) VFNMADDSD*/ { 13, 65, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 1998 /*(1972) VFNMADDSD*/ { 30, 66, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 1999 /*(1973) VFNMADDSS*/ { 13, 65, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2000 /*(1974) VFNMADDSS*/ { 30, 66, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2001 /*(1975) VFNMADDSS*/ { 13, 65, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 2002 /*(1976) VFNMADDSS*/ { 30, 66, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 2003 /*(1977) PF2ID*/ { 16, 79, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 2004 /*(1978) PF2ID*/ { 21, 80, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 2005 /*(1979) VGETMANTSD*/ { 12, 14, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 2006 /*(1980) VGETMANTSD*/ { 12, 81, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 2007 /*(1981) VGETMANTSD*/ { 15, 82, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 2008 /*(1982) CMOVLE*/ { 16, 0, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2009 /*(1983) CMOVLE*/ { 21, 1, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2010 /*(1984) SARX*/ { 7, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2011 /*(1985) SARX*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 389}, 2012 /*(1986) SARX*/ { 8, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1611}, 2013 /*(1987) SARX*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1615}, 2014 /*(1988) SARX*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 822}, 2015 /*(1989) SARX*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1621}, 2016 /*(1990) VPCONFLICTD*/ { 22, 2, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2017 /*(1991) VPCONFLICTD*/ { 31, 7, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2018 /*(1992) VPCONFLICTD*/ { 22, 2, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2019 /*(1993) VPCONFLICTD*/ { 31, 7, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2020 /*(1994) VPCONFLICTD*/ { 22, 2, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2021 /*(1995) VPCONFLICTD*/ { 31, 7, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2022 /*(1996) PF2IW*/ { 16, 79, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 2023 /*(1997) PF2IW*/ { 21, 80, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 2024 /*(1998) VGETMANTSS*/ { 12, 14, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 2025 /*(1999) VGETMANTSS*/ { 12, 81, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 2026 /*(2000) VGETMANTSS*/ { 15, 94, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 2027 /*(2001) SAVEPREVSSP*/ { 39, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 270}, 2028 /*(2002) VPERMIL2PS*/ { 13, 65, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2029 /*(2003) VPERMIL2PS*/ { 30, 66, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2030 /*(2004) VPERMIL2PS*/ { 13, 65, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2031 /*(2005) VPERMIL2PS*/ { 30, 66, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2032 /*(2006) VPERMIL2PS*/ { 13, 65, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 2033 /*(2007) VPERMIL2PS*/ { 30, 66, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 2034 /*(2008) VPERMIL2PS*/ { 13, 65, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 2035 /*(2009) VPERMIL2PS*/ { 30, 66, 0x48, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 2036 /*(2010) FCMOVBE*/ { 1, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 2037 /*(2011) JNBE*/ { 16, 10, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2038 /*(2012) JNBE*/ { 16, 11, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2039 /*(2013) JNBE*/ { 16, 12, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2040 /*(2014) JNBE*/ { 16, 13, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2041 /*(2015) PREFETCHT2*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2042 /*(2016) PREFETCHT1*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2043 /*(2017) PREFETCHT0*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 2044 /*(2018) VPERMIL2PD*/ { 13, 65, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2045 /*(2019) VPERMIL2PD*/ { 30, 66, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2046 /*(2020) VPERMIL2PD*/ { 13, 65, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2047 /*(2021) VPERMIL2PD*/ { 30, 66, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2048 /*(2022) VPERMIL2PD*/ { 13, 65, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 2049 /*(2023) VPERMIL2PD*/ { 30, 66, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 2050 /*(2024) VPERMIL2PD*/ { 13, 65, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 2051 /*(2025) VPERMIL2PD*/ { 30, 66, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 2052 /*(2026) CVTTSS2SI*/ { 29, 50, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2053 /*(2027) CVTTSS2SI*/ { 28, 51, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 95}, 2054 /*(2028) CVTTSS2SI*/ { 29, 50, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 29}, 2055 /*(2029) CVTTSS2SI*/ { 28, 51, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 88}, 2056 /*(2030) VPMINSD*/ { 7, 5, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2057 /*(2031) VPMINSD*/ { 8, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2058 /*(2032) VPMINSD*/ { 7, 5, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2059 /*(2033) VPMINSD*/ { 8, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2060 /*(2034) VPMINSD*/ { 12, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2061 /*(2035) VPMINSD*/ { 13, 7, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2062 /*(2036) VPMINSD*/ { 12, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2063 /*(2037) VPMINSD*/ { 13, 7, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2064 /*(2038) VPMINSD*/ { 12, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2065 /*(2039) VPMINSD*/ { 13, 7, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2066 /*(2040) VSTMXCSR*/ { 90, 5, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 2067 /*(2041) VPMINSB*/ { 7, 5, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2068 /*(2042) VPMINSB*/ { 8, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2069 /*(2043) VPMINSB*/ { 7, 5, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2070 /*(2044) VPMINSB*/ { 8, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2071 /*(2045) VPMINSB*/ { 9, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 2072 /*(2046) VPMINSB*/ { 10, 29, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 2073 /*(2047) VPMINSB*/ { 9, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 2074 /*(2048) VPMINSB*/ { 10, 29, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 2075 /*(2049) VPMINSB*/ { 9, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 2076 /*(2050) VPMINSB*/ { 10, 29, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 2077 /*(2051) VFRCZPD*/ { 19, 5, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 2078 /*(2052) VFRCZPD*/ { 20, 2, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 2079 /*(2053) VFRCZPD*/ { 19, 5, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 2080 /*(2054) VFRCZPD*/ { 20, 2, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 2081 /*(2055) VPMINSW*/ { 7, 5, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2082 /*(2056) VPMINSW*/ { 8, 2, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2083 /*(2057) VPMINSW*/ { 7, 5, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2084 /*(2058) VPMINSW*/ { 8, 2, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2085 /*(2059) VPMINSW*/ { 9, 2, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 2086 /*(2060) VPMINSW*/ { 10, 6, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 2087 /*(2061) VPMINSW*/ { 9, 2, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 2088 /*(2062) VPMINSW*/ { 10, 6, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 2089 /*(2063) VPMINSW*/ { 9, 2, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 2090 /*(2064) VPMINSW*/ { 10, 6, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 2091 /*(2065) VPMINSQ*/ { 12, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2092 /*(2066) VPMINSQ*/ { 13, 8, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2093 /*(2067) VPMINSQ*/ { 12, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2094 /*(2068) VPMINSQ*/ { 13, 8, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2095 /*(2069) VPMINSQ*/ { 12, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2096 /*(2070) VPMINSQ*/ { 13, 8, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2097 /*(2071) SHA1RNDS4*/ { 4, 73, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 11}, 2098 /*(2072) SHA1RNDS4*/ { 3, 72, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 9}, 2099 /*(2073) VPMADD52HUQ*/ { 12, 2, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2100 /*(2074) VPMADD52HUQ*/ { 13, 8, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2101 /*(2075) VPMADD52HUQ*/ { 12, 2, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2102 /*(2076) VPMADD52HUQ*/ { 13, 8, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2103 /*(2077) VPMADD52HUQ*/ { 12, 2, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2104 /*(2078) VPMADD52HUQ*/ { 13, 8, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2105 /*(2079) VFRCZPS*/ { 19, 5, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 2106 /*(2080) VFRCZPS*/ { 20, 2, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 2107 /*(2081) VFRCZPS*/ { 19, 5, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 2108 /*(2082) VFRCZPS*/ { 20, 2, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 2109 /*(2083) STD*/ { 16, 36, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2110 /*(2084) STC*/ { 16, 36, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2111 /*(2085) STI*/ { 16, 36, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2112 /*(2086) FSUBP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 2113 /*(2087) STR*/ { 0, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 2114 /*(2088) STR*/ { 1, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 4}, 2115 /*(2089) FSUBR*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 2116 /*(2090) FSUBR*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 2117 /*(2091) FSUBR*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 2118 /*(2092) FSUBR*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 2119 /*(2093) VPXOR*/ { 7, 5, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2120 /*(2094) VPXOR*/ { 8, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2121 /*(2095) VPXOR*/ { 7, 5, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2122 /*(2096) VPXOR*/ { 8, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2123 /*(2097) VFPCLASSPD*/ { 63, 14, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2124 /*(2098) VFPCLASSPD*/ { 64, 15, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2125 /*(2099) VFPCLASSPD*/ { 63, 14, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2126 /*(2100) VFPCLASSPD*/ { 64, 15, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2127 /*(2101) VFPCLASSPD*/ { 63, 14, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2128 /*(2102) VFPCLASSPD*/ { 64, 15, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2129 /*(2103) REP_LODSQ*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2130 /*(2104) REP_LODSQ*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2131 /*(2105) PADDUSW*/ { 3, 0, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2132 /*(2106) PADDUSW*/ { 4, 1, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2133 /*(2107) PADDUSW*/ { 3, 3, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2134 /*(2108) PADDUSW*/ { 4, 4, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2135 /*(2109) REP_LODSW*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2136 /*(2110) REP_LODSW*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2137 /*(2111) VCVTSD2USI*/ { 76, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1410}, 2138 /*(2112) VCVTSD2USI*/ { 77, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1420}, 2139 /*(2113) VCVTSD2USI*/ { 76, 62, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1433}, 2140 /*(2114) VCVTSD2USI*/ { 77, 62, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1443}, 2141 /*(2115) VCVTSD2USI*/ { 78, 102, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1456}, 2142 /*(2116) VCVTSD2USI*/ { 79, 102, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1465}, 2143 /*(2117) VCVTSD2USI*/ { 77, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1477}, 2144 /*(2118) VCVTSD2USI*/ { 77, 62, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1490}, 2145 /*(2119) VCVTSD2USI*/ { 79, 102, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1503}, 2146 /*(2120) PMADDUBSW*/ { 3, 0, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 2147 /*(2121) PMADDUBSW*/ { 4, 1, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 2148 /*(2122) PMADDUBSW*/ { 3, 3, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 2149 /*(2123) PMADDUBSW*/ { 4, 4, 0x4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 2150 /*(2124) RSTORSSP*/ { 42, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 269}, 2151 /*(2125) REP_LODSB*/ { 5, 68, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2152 /*(2126) REP_LODSB*/ { 5, 68, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2153 /*(2127) REP_LODSD*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2154 /*(2128) REP_LODSD*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2155 /*(2129) PADDUSB*/ { 3, 0, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2156 /*(2130) PADDUSB*/ { 4, 1, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2157 /*(2131) PADDUSB*/ { 3, 3, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2158 /*(2132) PADDUSB*/ { 4, 4, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2159 /*(2133) HSUBPS*/ { 5, 50, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2160 /*(2134) HSUBPS*/ { 6, 51, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 2161 /*(2135) VPBLENDVB*/ { 13, 65, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2162 /*(2136) VPBLENDVB*/ { 30, 66, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2163 /*(2137) VPBLENDVB*/ { 13, 65, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2164 /*(2138) VPBLENDVB*/ { 30, 66, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2165 /*(2139) FILD*/ { 0, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2166 /*(2140) FILD*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2167 /*(2141) FILD*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 2168 /*(2142) BZHI*/ { 7, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2169 /*(2143) BZHI*/ { 13, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 156}, 2170 /*(2144) BZHI*/ { 8, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 54}, 2171 /*(2145) BZHI*/ { 30, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1627}, 2172 /*(2146) BZHI*/ { 13, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 174}, 2173 /*(2147) BZHI*/ { 30, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1633}, 2174 /*(2148) HSUBPD*/ { 3, 3, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2175 /*(2149) HSUBPD*/ { 4, 4, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2176 /*(2150) PDEP*/ { 7, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 71}, 2177 /*(2151) PDEP*/ { 13, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 406}, 2178 /*(2152) PDEP*/ { 8, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 179}, 2179 /*(2153) PDEP*/ { 30, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 411}, 2180 /*(2154) PDEP*/ { 13, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 417}, 2181 /*(2155) PDEP*/ { 30, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 422}, 2182 /*(2156) VPSRAD*/ { 7, 5, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2183 /*(2157) VPSRAD*/ { 8, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2184 /*(2158) VPSRAD*/ { 26, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1639}, 2185 /*(2159) VPSRAD*/ { 7, 5, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2186 /*(2160) VPSRAD*/ { 8, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2187 /*(2161) VPSRAD*/ { 26, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1639}, 2188 /*(2162) VPSRAD*/ { 12, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2189 /*(2163) VPSRAD*/ { 15, 67, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 2190 /*(2164) VPSRAD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1644}, 2191 /*(2165) VPSRAD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1652}, 2192 /*(2166) VPSRAD*/ { 12, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2193 /*(2167) VPSRAD*/ { 15, 67, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 2194 /*(2168) VPSRAD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1644}, 2195 /*(2169) VPSRAD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1652}, 2196 /*(2170) VPSRAD*/ { 12, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2197 /*(2171) VPSRAD*/ { 15, 67, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 2198 /*(2172) VPSRAD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1644}, 2199 /*(2173) VPSRAD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1652}, 2200 /*(2174) VPSHLD*/ { 13, 5, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 2201 /*(2175) VPSHLD*/ { 30, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 2202 /*(2176) VPSHLD*/ { 13, 5, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 2203 /*(2177) VPSHLD*/ { 30, 2, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 2204 /*(2178) VPSHLB*/ { 13, 5, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 2205 /*(2179) VPSHLB*/ { 30, 2, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 2206 /*(2180) VPSHLB*/ { 13, 5, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 2207 /*(2181) VPSHLB*/ { 30, 2, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 2208 /*(2182) VPSHUFD*/ { 53, 35, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 2209 /*(2183) VPSHUFD*/ { 2, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2210 /*(2184) VPSHUFD*/ { 53, 35, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 2211 /*(2185) VPSHUFD*/ { 2, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2212 /*(2186) VPSHUFD*/ { 22, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 2213 /*(2187) VPSHUFD*/ { 31, 18, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 2214 /*(2188) VPSHUFD*/ { 22, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 2215 /*(2189) VPSHUFD*/ { 31, 18, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 2216 /*(2190) VPSHUFD*/ { 22, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 2217 /*(2191) VPSHUFD*/ { 31, 18, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 2218 /*(2192) VPSRAW*/ { 7, 5, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2219 /*(2193) VPSRAW*/ { 8, 2, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2220 /*(2194) VPSRAW*/ { 26, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1639}, 2221 /*(2195) VPSRAW*/ { 7, 5, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2222 /*(2196) VPSRAW*/ { 8, 2, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2223 /*(2197) VPSRAW*/ { 26, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1639}, 2224 /*(2198) VPSRAW*/ { 9, 2, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 2225 /*(2199) VPSRAW*/ { 10, 70, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 2226 /*(2200) VPSRAW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1676}, 2227 /*(2201) VPSRAW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1682}, 2228 /*(2202) VPSRAW*/ { 9, 2, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 2229 /*(2203) VPSRAW*/ { 10, 70, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 2230 /*(2204) VPSRAW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1676}, 2231 /*(2205) VPSRAW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1682}, 2232 /*(2206) VPSRAW*/ { 9, 2, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 2233 /*(2207) VPSRAW*/ { 10, 70, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 2234 /*(2208) VPSRAW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1676}, 2235 /*(2209) VPSRAW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1682}, 2236 /*(2210) VPSRAQ*/ { 12, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2237 /*(2211) VPSRAQ*/ { 15, 69, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 2238 /*(2212) VPSRAQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1687}, 2239 /*(2213) VPSRAQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1695}, 2240 /*(2214) VPSRAQ*/ { 12, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2241 /*(2215) VPSRAQ*/ { 15, 69, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 2242 /*(2216) VPSRAQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1687}, 2243 /*(2217) VPSRAQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1695}, 2244 /*(2218) VPSRAQ*/ { 12, 2, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2245 /*(2219) VPSRAQ*/ { 15, 69, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 2246 /*(2220) VPSRAQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1687}, 2247 /*(2221) VPSRAQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1695}, 2248 /*(2222) FADD*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2249 /*(2223) FADD*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2250 /*(2224) FADD*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2251 /*(2225) FADD*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2252 /*(2226) VPSHLW*/ { 13, 5, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 2253 /*(2227) VPSHLW*/ { 30, 2, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 2254 /*(2228) VPSHLW*/ { 13, 5, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 2255 /*(2229) VPSHLW*/ { 30, 2, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 2256 /*(2230) VPSHLQ*/ { 13, 5, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 2257 /*(2231) VPSHLQ*/ { 30, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 2258 /*(2232) VPSHLQ*/ { 13, 5, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 2259 /*(2233) VPSHLQ*/ { 30, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 2260 /*(2234) VMOVSLDUP*/ { 53, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 2261 /*(2235) VMOVSLDUP*/ { 2, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 2262 /*(2236) VMOVSLDUP*/ { 53, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 2263 /*(2237) VMOVSLDUP*/ { 2, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 2264 /*(2238) VMOVSLDUP*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 2265 /*(2239) VMOVSLDUP*/ { 81, 110, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 2266 /*(2240) VMOVSLDUP*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 2267 /*(2241) VMOVSLDUP*/ { 81, 110, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 2268 /*(2242) VMOVSLDUP*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 2269 /*(2243) VMOVSLDUP*/ { 81, 110, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 2270 /*(2244) DIVSD*/ { 5, 50, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2271 /*(2245) DIVSD*/ { 6, 51, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 2272 /*(2246) VDIVPD*/ { 7, 5, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2273 /*(2247) VDIVPD*/ { 8, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2274 /*(2248) VDIVPD*/ { 7, 5, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2275 /*(2249) VDIVPD*/ { 8, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2276 /*(2250) VDIVPD*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2277 /*(2251) VDIVPD*/ { 12, 58, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1294}, 2278 /*(2252) VDIVPD*/ { 13, 8, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2279 /*(2253) VDIVPD*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2280 /*(2254) VDIVPD*/ { 13, 8, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2281 /*(2255) VDIVPD*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2282 /*(2256) VDIVPD*/ { 13, 8, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2283 /*(2257) FSETPM287_NOP*/ { 66, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1701}, 2284 /*(2258) KMOVQ*/ { 20, 2, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1704}, 2285 /*(2259) KMOVQ*/ { 19, 5, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1712}, 2286 /*(2260) KMOVQ*/ { 19, 5, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1712}, 2287 /*(2261) KMOVQ*/ { 20, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1402}, 2288 /*(2262) KMOVQ*/ { 20, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1402}, 2289 /*(2263) VDIVPS*/ { 7, 5, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2290 /*(2264) VDIVPS*/ { 8, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 2291 /*(2265) VDIVPS*/ { 7, 5, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2292 /*(2266) VDIVPS*/ { 8, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 2293 /*(2267) VDIVPS*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2294 /*(2268) VDIVPS*/ { 12, 58, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1309}, 2295 /*(2269) VDIVPS*/ { 13, 7, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2296 /*(2270) VDIVPS*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2297 /*(2271) VDIVPS*/ { 13, 7, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2298 /*(2272) VDIVPS*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2299 /*(2273) VDIVPS*/ { 13, 7, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2300 /*(2274) PUSHAD*/ { 16, 36, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2301 /*(2275) DIVSS*/ { 5, 50, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2302 /*(2276) DIVSS*/ { 6, 51, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2303 /*(2277) VAESIMC*/ { 2, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2304 /*(2278) VAESIMC*/ { 53, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2305 /*(2279) PREFETCH_EXCLUSIVE*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2306 /*(2280) VPSHUFLW*/ { 53, 35, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 2307 /*(2281) VPSHUFLW*/ { 2, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 2308 /*(2282) VPSHUFLW*/ { 53, 35, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 2309 /*(2283) VPSHUFLW*/ { 2, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 2310 /*(2284) VPSHUFLW*/ { 54, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1719}, 2311 /*(2285) VPSHUFLW*/ { 55, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1425}, 2312 /*(2286) VPSHUFLW*/ { 54, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1719}, 2313 /*(2287) VPSHUFLW*/ { 55, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1425}, 2314 /*(2288) VPSHUFLW*/ { 54, 14, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1719}, 2315 /*(2289) VPSHUFLW*/ { 55, 57, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1425}, 2316 /*(2290) VFMSUBADD213PS*/ { 13, 5, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2317 /*(2291) VFMSUBADD213PS*/ { 30, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 2318 /*(2292) VFMSUBADD213PS*/ { 13, 5, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2319 /*(2293) VFMSUBADD213PS*/ { 30, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 2320 /*(2294) VFMSUBADD213PS*/ { 12, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2321 /*(2295) VFMSUBADD213PS*/ { 12, 58, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 2322 /*(2296) VFMSUBADD213PS*/ { 13, 7, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2323 /*(2297) VFMSUBADD213PS*/ { 12, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2324 /*(2298) VFMSUBADD213PS*/ { 13, 7, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2325 /*(2299) VFMSUBADD213PS*/ { 12, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2326 /*(2300) VFMSUBADD213PS*/ { 13, 7, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2327 /*(2301) IDIV*/ { 0, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 2328 /*(2302) IDIV*/ { 1, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 2329 /*(2303) IDIV*/ { 0, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 2330 /*(2304) IDIV*/ { 1, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 2331 /*(2305) VFMSUBADD213PD*/ { 13, 5, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 2332 /*(2306) VFMSUBADD213PD*/ { 30, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 2333 /*(2307) VFMSUBADD213PD*/ { 13, 5, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 2334 /*(2308) VFMSUBADD213PD*/ { 30, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 2335 /*(2309) VFMSUBADD213PD*/ { 12, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2336 /*(2310) VFMSUBADD213PD*/ { 12, 58, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 2337 /*(2311) VFMSUBADD213PD*/ { 13, 8, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2338 /*(2312) VFMSUBADD213PD*/ { 12, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2339 /*(2313) VFMSUBADD213PD*/ { 13, 8, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2340 /*(2314) VFMSUBADD213PD*/ { 12, 2, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2341 /*(2315) VFMSUBADD213PD*/ { 13, 8, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2342 /*(2316) VPAND*/ { 7, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2343 /*(2317) VPAND*/ { 8, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2344 /*(2318) VPAND*/ { 7, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2345 /*(2319) VPAND*/ { 8, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2346 /*(2320) VPANDN*/ { 7, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2347 /*(2321) VPANDN*/ { 8, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2348 /*(2322) VPANDN*/ { 7, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2349 /*(2323) VPANDN*/ { 8, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2350 /*(2324) VSHUFPD*/ { 7, 35, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2351 /*(2325) VSHUFPD*/ { 8, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2352 /*(2326) VSHUFPD*/ { 7, 35, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2353 /*(2327) VSHUFPD*/ { 8, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2354 /*(2328) VSHUFPD*/ { 12, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2355 /*(2329) VSHUFPD*/ { 13, 15, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2356 /*(2330) VSHUFPD*/ { 12, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2357 /*(2331) VSHUFPD*/ { 13, 15, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2358 /*(2332) VSHUFPD*/ { 12, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2359 /*(2333) VSHUFPD*/ { 13, 15, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2360 /*(2334) VSQRTPS*/ { 53, 5, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 2361 /*(2335) VSQRTPS*/ { 2, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 2362 /*(2336) VSQRTPS*/ { 53, 5, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 2363 /*(2337) VSQRTPS*/ { 2, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 2364 /*(2338) VSQRTPS*/ { 22, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 2365 /*(2339) VSQRTPS*/ { 22, 58, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1737}, 2366 /*(2340) VSQRTPS*/ { 31, 7, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 2367 /*(2341) VSQRTPS*/ { 22, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 2368 /*(2342) VSQRTPS*/ { 31, 7, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 2369 /*(2343) VSQRTPS*/ { 22, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 2370 /*(2344) VSQRTPS*/ { 31, 7, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 2371 /*(2345) VPANDD*/ { 12, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2372 /*(2346) VPANDD*/ { 13, 7, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 2373 /*(2347) VPANDD*/ { 12, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2374 /*(2348) VPANDD*/ { 13, 7, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 2375 /*(2349) VPANDD*/ { 12, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2376 /*(2350) VPANDD*/ { 13, 7, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 2377 /*(2351) VPERMI2PS*/ { 12, 2, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2378 /*(2352) VPERMI2PS*/ { 13, 7, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2379 /*(2353) VPERMI2PS*/ { 12, 2, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2380 /*(2354) VPERMI2PS*/ { 13, 7, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2381 /*(2355) VPERMI2PS*/ { 12, 2, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2382 /*(2356) VPERMI2PS*/ { 13, 7, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2383 /*(2357) VPANDQ*/ { 12, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2384 /*(2358) VPANDQ*/ { 13, 8, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2385 /*(2359) VPANDQ*/ { 12, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2386 /*(2360) VPANDQ*/ { 13, 8, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2387 /*(2361) VPANDQ*/ { 12, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2388 /*(2362) VPANDQ*/ { 13, 8, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2389 /*(2363) VSQRTPD*/ { 53, 5, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 2390 /*(2364) VSQRTPD*/ { 2, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2391 /*(2365) VSQRTPD*/ { 53, 5, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 2392 /*(2366) VSQRTPD*/ { 2, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2393 /*(2367) VSQRTPD*/ { 22, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 2394 /*(2368) VSQRTPD*/ { 22, 58, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 2395 /*(2369) VSQRTPD*/ { 31, 8, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 2396 /*(2370) VSQRTPD*/ { 22, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 2397 /*(2371) VSQRTPD*/ { 31, 8, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 2398 /*(2372) VSQRTPD*/ { 22, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 2399 /*(2373) VSQRTPD*/ { 31, 8, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 2400 /*(2374) VSHUFPS*/ { 7, 35, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2401 /*(2375) VSHUFPS*/ { 8, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 2402 /*(2376) VSHUFPS*/ { 7, 35, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2403 /*(2377) VSHUFPS*/ { 8, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 2404 /*(2378) VSHUFPS*/ { 12, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2405 /*(2379) VSHUFPS*/ { 13, 18, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2406 /*(2380) VSHUFPS*/ { 12, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2407 /*(2381) VSHUFPS*/ { 13, 18, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2408 /*(2382) VSHUFPS*/ { 12, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2409 /*(2383) VSHUFPS*/ { 13, 18, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2410 /*(2384) VLDDQU*/ { 53, 5, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 2411 /*(2385) VLDDQU*/ { 53, 5, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 2412 /*(2386) VPROLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1755}, 2413 /*(2387) VPROLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1763}, 2414 /*(2388) VPROLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1755}, 2415 /*(2389) VPROLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1763}, 2416 /*(2390) VPROLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1755}, 2417 /*(2391) VPROLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1763}, 2418 /*(2392) PXOR*/ { 3, 0, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2419 /*(2393) PXOR*/ { 4, 1, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2420 /*(2394) PXOR*/ { 3, 3, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2421 /*(2395) PXOR*/ { 4, 4, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2422 /*(2396) VPROLQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1769}, 2423 /*(2397) VPROLQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 527}, 2424 /*(2398) VPROLQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1769}, 2425 /*(2399) VPROLQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 527}, 2426 /*(2400) VPROLQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1769}, 2427 /*(2401) VPROLQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 527}, 2428 /*(2402) VPMULDQ*/ { 7, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2429 /*(2403) VPMULDQ*/ { 8, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2430 /*(2404) VPMULDQ*/ { 7, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2431 /*(2405) VPMULDQ*/ { 8, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 2432 /*(2406) VPMULDQ*/ { 12, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2433 /*(2407) VPMULDQ*/ { 13, 8, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2434 /*(2408) VPMULDQ*/ { 12, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2435 /*(2409) VPMULDQ*/ { 13, 8, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2436 /*(2410) VPMULDQ*/ { 12, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2437 /*(2411) VPMULDQ*/ { 13, 8, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2438 /*(2412) CVTTPS2DQ*/ { 5, 50, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2439 /*(2413) CVTTPS2DQ*/ { 6, 51, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2440 /*(2414) SHRD*/ { 16, 72, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2441 /*(2415) SHRD*/ { 21, 73, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2442 /*(2416) SHRD*/ { 16, 0, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2443 /*(2417) SHRD*/ { 21, 1, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2444 /*(2418) MONITOR*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1777}, 2445 /*(2419) MONITOR*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1777}, 2446 /*(2420) MONITOR*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1777}, 2447 /*(2421) MONITOR*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1777}, 2448 /*(2422) XABORT*/ { 66, 14, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 300}, 2449 /*(2423) VPGATHERQD*/ { 32, 37, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 2450 /*(2424) VPGATHERQD*/ { 32, 38, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 253}, 2451 /*(2425) VPGATHERQD*/ { 33, 44, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 2452 /*(2426) VPGATHERQD*/ { 33, 45, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 2453 /*(2427) VPGATHERQD*/ { 33, 46, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 2454 /*(2428) MOVSB*/ { 5, 28, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2455 /*(2429) VMLOAD*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 636}, 2456 /*(2430) MOVQ2DQ*/ { 6, 51, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2457 /*(2431) MOVSX*/ { 16, 0, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2458 /*(2432) MOVSX*/ { 21, 1, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2459 /*(2433) MOVSX*/ { 16, 0, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2460 /*(2434) MOVSX*/ { 21, 1, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2461 /*(2435) MOVSW*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2462 /*(2436) MOVSS*/ { 5, 50, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2463 /*(2437) MOVSS*/ { 6, 51, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2464 /*(2438) MOVSS*/ { 5, 50, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2465 /*(2439) MOVSS*/ { 6, 51, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2466 /*(2440) MOVSQ*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2467 /*(2441) MOV_CR*/ { 16, 107, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2468 /*(2442) MOV_CR*/ { 16, 107, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2469 /*(2443) MOV_CR*/ { 16, 107, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2470 /*(2444) MOV_CR*/ { 16, 107, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2471 /*(2445) MOVDQU*/ { 5, 50, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2472 /*(2446) MOVDQU*/ { 6, 51, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2473 /*(2447) MOVDQU*/ { 5, 50, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2474 /*(2448) MOVDQU*/ { 6, 51, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2475 /*(2449) PSUBD*/ { 3, 0, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2476 /*(2450) PSUBD*/ { 4, 1, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2477 /*(2451) PSUBD*/ { 3, 3, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2478 /*(2452) PSUBD*/ { 4, 4, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2479 /*(2453) PSUBB*/ { 3, 0, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2480 /*(2454) PSUBB*/ { 4, 1, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2481 /*(2455) PSUBB*/ { 3, 3, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2482 /*(2456) PSUBB*/ { 4, 4, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2483 /*(2457) VFMADD231SS*/ { 13, 5, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2484 /*(2458) VFMADD231SS*/ { 30, 2, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 2485 /*(2459) VFMADD231SS*/ { 12, 2, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2486 /*(2460) VFMADD231SS*/ { 12, 62, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 2487 /*(2461) VFMADD231SS*/ { 15, 61, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 2488 /*(2462) FSCALE*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1782}, 2489 /*(2463) PSUBW*/ { 3, 0, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2490 /*(2464) PSUBW*/ { 4, 1, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2491 /*(2465) PSUBW*/ { 3, 3, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2492 /*(2466) PSUBW*/ { 4, 4, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2493 /*(2467) PSUBQ*/ { 3, 0, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2494 /*(2468) PSUBQ*/ { 4, 1, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2495 /*(2469) PSUBQ*/ { 3, 3, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2496 /*(2470) PSUBQ*/ { 4, 4, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2497 /*(2471) VFMADD231SD*/ { 13, 5, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 2498 /*(2472) VFMADD231SD*/ { 30, 2, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 2499 /*(2473) VFMADD231SD*/ { 12, 2, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2500 /*(2474) VFMADD231SD*/ { 12, 62, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 2501 /*(2475) VFMADD231SD*/ { 15, 60, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 2502 /*(2476) AESIMC*/ { 4, 4, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 2503 /*(2477) AESIMC*/ { 3, 3, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 2504 /*(2478) WBINVD*/ { 16, 19, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2505 /*(2479) WBINVD*/ { 91, 19, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2506 /*(2480) WBINVD*/ { 91, 19, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 2507 /*(2481) VPANDND*/ { 12, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2508 /*(2482) VPANDND*/ { 13, 7, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 2509 /*(2483) VPANDND*/ { 12, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2510 /*(2484) VPANDND*/ { 13, 7, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 2511 /*(2485) VPANDND*/ { 12, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 2512 /*(2486) VPANDND*/ { 13, 7, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 2513 /*(2487) VCVTTPS2UDQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 2514 /*(2488) VCVTTPS2UDQ*/ { 22, 71, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1737}, 2515 /*(2489) VCVTTPS2UDQ*/ { 31, 7, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 2516 /*(2490) VCVTTPS2UDQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 2517 /*(2491) VCVTTPS2UDQ*/ { 31, 7, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 2518 /*(2492) VCVTTPS2UDQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 2519 /*(2493) VCVTTPS2UDQ*/ { 31, 7, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 2520 /*(2494) VPMOVSQW*/ { 22, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2521 /*(2495) VPMOVSQW*/ { 23, 115, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2522 /*(2496) VPMOVSQW*/ { 22, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2523 /*(2497) VPMOVSQW*/ { 23, 115, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2524 /*(2498) VPMOVSQW*/ { 22, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2525 /*(2499) VPMOVSQW*/ { 23, 115, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2526 /*(2500) VGETMANTPD*/ { 22, 14, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2527 /*(2501) VGETMANTPD*/ { 22, 116, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1785}, 2528 /*(2502) VGETMANTPD*/ { 31, 15, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2529 /*(2503) VGETMANTPD*/ { 22, 14, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2530 /*(2504) VGETMANTPD*/ { 31, 15, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2531 /*(2505) VGETMANTPD*/ { 22, 14, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2532 /*(2506) VGETMANTPD*/ { 31, 15, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2533 /*(2507) VPALIGNR*/ { 7, 35, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 2534 /*(2508) VPALIGNR*/ { 8, 14, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 2535 /*(2509) VPALIGNR*/ { 7, 35, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 2536 /*(2510) VPALIGNR*/ { 8, 14, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 2537 /*(2511) VPALIGNR*/ { 9, 14, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1598}, 2538 /*(2512) VPALIGNR*/ { 10, 117, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 242}, 2539 /*(2513) VPALIGNR*/ { 9, 14, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1598}, 2540 /*(2514) VPALIGNR*/ { 10, 117, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 242}, 2541 /*(2515) VPALIGNR*/ { 9, 14, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1598}, 2542 /*(2516) VPALIGNR*/ { 10, 117, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 242}, 2543 /*(2517) VPMACSSWW*/ { 13, 65, 0x85, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 2544 /*(2518) VPMACSSWW*/ { 30, 66, 0x85, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 2545 /*(2519) VPMOVSQD*/ { 22, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2546 /*(2520) VPMOVSQD*/ { 23, 113, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2547 /*(2521) VPMOVSQD*/ { 22, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2548 /*(2522) VPMOVSQD*/ { 23, 113, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2549 /*(2523) VPMOVSQD*/ { 22, 2, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2550 /*(2524) VPMOVSQD*/ { 23, 113, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2551 /*(2525) VRNDSCALEPS*/ { 22, 14, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 2552 /*(2526) VRNDSCALEPS*/ { 22, 116, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1795}, 2553 /*(2527) VRNDSCALEPS*/ { 31, 18, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 2554 /*(2528) VRNDSCALEPS*/ { 22, 14, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 2555 /*(2529) VRNDSCALEPS*/ { 31, 18, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 2556 /*(2530) VRNDSCALEPS*/ { 22, 14, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 2557 /*(2531) VRNDSCALEPS*/ { 31, 18, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 2558 /*(2532) VPMOVSQB*/ { 22, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2559 /*(2533) VPMOVSQB*/ { 23, 118, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2560 /*(2534) VPMOVSQB*/ { 22, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2561 /*(2535) VPMOVSQB*/ { 23, 118, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2562 /*(2536) VPMOVSQB*/ { 22, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 2563 /*(2537) VPMOVSQB*/ { 23, 118, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 2564 /*(2538) VPMACSSWD*/ { 13, 65, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 2565 /*(2539) VPMACSSWD*/ { 30, 66, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 2566 /*(2540) VGETMANTPS*/ { 22, 14, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 2567 /*(2541) VGETMANTPS*/ { 22, 116, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1795}, 2568 /*(2542) VGETMANTPS*/ { 31, 18, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 2569 /*(2543) VGETMANTPS*/ { 22, 14, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 2570 /*(2544) VGETMANTPS*/ { 31, 18, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 2571 /*(2545) VGETMANTPS*/ { 22, 14, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 2572 /*(2546) VGETMANTPS*/ { 31, 18, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 2573 /*(2547) CLI*/ { 16, 36, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2574 /*(2548) CLD*/ { 16, 36, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2575 /*(2549) FIMUL*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2576 /*(2550) FIMUL*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2577 /*(2551) VMAXPD*/ { 7, 5, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2578 /*(2552) VMAXPD*/ { 8, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2579 /*(2553) VMAXPD*/ { 7, 5, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2580 /*(2554) VMAXPD*/ { 8, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2581 /*(2555) VMAXPD*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2582 /*(2556) VMAXPD*/ { 12, 71, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1294}, 2583 /*(2557) VMAXPD*/ { 13, 8, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2584 /*(2558) VMAXPD*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2585 /*(2559) VMAXPD*/ { 13, 8, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2586 /*(2560) VMAXPD*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 2587 /*(2561) VMAXPD*/ { 13, 8, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 2588 /*(2562) CLC*/ { 16, 36, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2589 /*(2563) VMAXPS*/ { 7, 5, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2590 /*(2564) VMAXPS*/ { 8, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 2591 /*(2565) VMAXPS*/ { 7, 5, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2592 /*(2566) VMAXPS*/ { 8, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 2593 /*(2567) VMAXPS*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2594 /*(2568) VMAXPS*/ { 12, 71, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1309}, 2595 /*(2569) VMAXPS*/ { 13, 7, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2596 /*(2570) VMAXPS*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2597 /*(2571) VMAXPS*/ { 13, 7, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2598 /*(2572) VMAXPS*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 2599 /*(2573) VMAXPS*/ { 13, 7, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 2600 /*(2574) INCSSPD*/ { 56, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1805}, 2601 /*(2575) LEAVE*/ { 16, 43, 0xc9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2602 /*(2576) VPABSW*/ { 53, 5, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2603 /*(2577) VPABSW*/ { 2, 2, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2604 /*(2578) VPABSW*/ { 53, 5, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2605 /*(2579) VPABSW*/ { 2, 2, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2606 /*(2580) VPABSW*/ { 54, 2, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2607 /*(2581) VPABSW*/ { 55, 6, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2608 /*(2582) VPABSW*/ { 54, 2, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2609 /*(2583) VPABSW*/ { 55, 6, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2610 /*(2584) VPABSW*/ { 54, 2, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2611 /*(2585) VPABSW*/ { 55, 6, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2612 /*(2586) VPABSQ*/ { 22, 2, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 2613 /*(2587) VPABSQ*/ { 31, 8, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 2614 /*(2588) VPABSQ*/ { 22, 2, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 2615 /*(2589) VPABSQ*/ { 31, 8, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 2616 /*(2590) VPABSQ*/ { 22, 2, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 2617 /*(2591) VPABSQ*/ { 31, 8, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 2618 /*(2592) KANDNB*/ { 30, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 2619 /*(2593) KADDW*/ { 30, 2, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 2620 /*(2594) KADDQ*/ { 30, 2, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2621 /*(2595) GETSEC*/ { 16, 19, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2622 /*(2596) KANDND*/ { 30, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1770}, 2623 /*(2597) VPABSD*/ { 53, 5, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2624 /*(2598) VPABSD*/ { 2, 2, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2625 /*(2599) VPABSD*/ { 53, 5, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2626 /*(2600) VPABSD*/ { 2, 2, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2627 /*(2601) VPABSD*/ { 22, 2, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2628 /*(2602) VPABSD*/ { 31, 7, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2629 /*(2603) VPABSD*/ { 22, 2, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2630 /*(2604) VPABSD*/ { 31, 7, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2631 /*(2605) VPABSD*/ { 22, 2, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2632 /*(2606) VPABSD*/ { 31, 7, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2633 /*(2607) ENCLS*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 118}, 2634 /*(2608) JCXZ*/ { 16, 99, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2635 /*(2609) ENCLU*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1810}, 2636 /*(2610) RET_NEAR*/ { 16, 119, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2637 /*(2611) RET_NEAR*/ { 16, 120, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2638 /*(2612) ENCLV*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1815}, 2639 /*(2613) KADDD*/ { 30, 2, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1770}, 2640 /*(2614) KANDNQ*/ { 30, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 2641 /*(2615) CLZERO*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1820}, 2642 /*(2616) KADDB*/ { 30, 2, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 2643 /*(2617) BTC_LOCK*/ { 36, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 5}, 2644 /*(2618) BTC_LOCK*/ { 49, 0, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 2645 /*(2619) VRSQRT28SD*/ { 12, 2, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2646 /*(2620) VRSQRT28SD*/ { 12, 59, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 2647 /*(2621) VRSQRT28SD*/ { 15, 60, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 2648 /*(2622) MULX*/ { 8, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 179}, 2649 /*(2623) MULX*/ { 30, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 411}, 2650 /*(2624) MULX*/ { 7, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 71}, 2651 /*(2625) MULX*/ { 13, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 406}, 2652 /*(2626) MULX*/ { 30, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 422}, 2653 /*(2627) MULX*/ { 13, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 417}, 2654 /*(2628) SETNBE*/ { 16, 0, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2655 /*(2629) SETNBE*/ { 21, 1, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2656 /*(2630) VRSQRT28SS*/ { 12, 2, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2657 /*(2631) VRSQRT28SS*/ { 12, 59, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 2658 /*(2632) VRSQRT28SS*/ { 15, 61, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 2659 /*(2633) VPBROADCASTD*/ { 70, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1022}, 2660 /*(2634) VPBROADCASTD*/ { 71, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1038}, 2661 /*(2635) VPBROADCASTD*/ { 70, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1030}, 2662 /*(2636) VPBROADCASTD*/ { 71, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1047}, 2663 /*(2637) VPBROADCASTD*/ { 50, 83, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1056}, 2664 /*(2638) VPBROADCASTD*/ { 72, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1066}, 2665 /*(2639) VPBROADCASTD*/ { 92, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1186}, 2666 /*(2640) VPBROADCASTD*/ { 72, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1066}, 2667 /*(2641) VPBROADCASTD*/ { 50, 83, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1077}, 2668 /*(2642) VPBROADCASTD*/ { 72, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1087}, 2669 /*(2643) VPBROADCASTD*/ { 92, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1823}, 2670 /*(2644) VPBROADCASTD*/ { 72, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1087}, 2671 /*(2645) VPBROADCASTD*/ { 50, 83, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1098}, 2672 /*(2646) VPBROADCASTD*/ { 72, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1108}, 2673 /*(2647) VPBROADCASTD*/ { 92, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1832}, 2674 /*(2648) VPBROADCASTD*/ { 72, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1108}, 2675 /*(2649) VSHUFI32X4*/ { 12, 14, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 2676 /*(2650) VSHUFI32X4*/ { 13, 18, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 2677 /*(2651) VSHUFI32X4*/ { 12, 14, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 2678 /*(2652) VSHUFI32X4*/ { 13, 18, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 2679 /*(2653) VPBROADCASTB*/ { 70, 5, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1841}, 2680 /*(2654) VPBROADCASTB*/ { 71, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1849}, 2681 /*(2655) VPBROADCASTB*/ { 70, 5, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1858}, 2682 /*(2656) VPBROADCASTB*/ { 71, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1866}, 2683 /*(2657) VPBROADCASTB*/ { 72, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1875}, 2684 /*(2658) VPBROADCASTB*/ { 50, 121, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1886}, 2685 /*(2659) VPBROADCASTB*/ { 72, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1875}, 2686 /*(2660) VPBROADCASTB*/ { 72, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1896}, 2687 /*(2661) VPBROADCASTB*/ { 50, 121, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1907}, 2688 /*(2662) VPBROADCASTB*/ { 72, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1896}, 2689 /*(2663) VPBROADCASTB*/ { 72, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1917}, 2690 /*(2664) VPBROADCASTB*/ { 50, 121, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1928}, 2691 /*(2665) VPBROADCASTB*/ { 72, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1917}, 2692 /*(2666) VPBROADCASTW*/ { 70, 5, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1938}, 2693 /*(2667) VPBROADCASTW*/ { 71, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1946}, 2694 /*(2668) VPBROADCASTW*/ { 70, 5, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1955}, 2695 /*(2669) VPBROADCASTW*/ { 71, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1963}, 2696 /*(2670) VPBROADCASTW*/ { 72, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1972}, 2697 /*(2671) VPBROADCASTW*/ { 50, 122, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1983}, 2698 /*(2672) VPBROADCASTW*/ { 72, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1972}, 2699 /*(2673) VPBROADCASTW*/ { 72, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1993}, 2700 /*(2674) VPBROADCASTW*/ { 50, 122, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2004}, 2701 /*(2675) VPBROADCASTW*/ { 72, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1993}, 2702 /*(2676) VPBROADCASTW*/ { 72, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2014}, 2703 /*(2677) VPBROADCASTW*/ { 50, 122, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2025}, 2704 /*(2678) VPBROADCASTW*/ { 72, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2014}, 2705 /*(2679) VPBROADCASTQ*/ { 70, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2035}, 2706 /*(2680) VPBROADCASTQ*/ { 71, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2043}, 2707 /*(2681) VPBROADCASTQ*/ { 70, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2052}, 2708 /*(2682) VPBROADCASTQ*/ { 71, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2060}, 2709 /*(2683) VPBROADCASTQ*/ { 50, 123, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2069}, 2710 /*(2684) VPBROADCASTQ*/ { 72, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2079}, 2711 /*(2685) VPBROADCASTQ*/ { 72, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2079}, 2712 /*(2686) VPBROADCASTQ*/ { 50, 123, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2090}, 2713 /*(2687) VPBROADCASTQ*/ { 72, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2100}, 2714 /*(2688) VPBROADCASTQ*/ { 72, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2100}, 2715 /*(2689) VPBROADCASTQ*/ { 50, 123, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2111}, 2716 /*(2690) VPBROADCASTQ*/ { 72, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2121}, 2717 /*(2691) VPBROADCASTQ*/ { 72, 2, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2121}, 2718 /*(2692) INT3*/ { 16, 36, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2719 /*(2693) CMPXCHG*/ { 49, 0, 0xb0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2720 /*(2694) CMPXCHG*/ { 21, 1, 0xb0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2721 /*(2695) CMPXCHG*/ { 49, 0, 0xb1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2722 /*(2696) CMPXCHG*/ { 21, 1, 0xb1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2723 /*(2697) VRNDSCALEPD*/ { 22, 14, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2724 /*(2698) VRNDSCALEPD*/ { 22, 116, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1785}, 2725 /*(2699) VRNDSCALEPD*/ { 31, 15, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2726 /*(2700) VRNDSCALEPD*/ { 22, 14, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2727 /*(2701) VRNDSCALEPD*/ { 31, 15, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2728 /*(2702) VRNDSCALEPD*/ { 22, 14, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 2729 /*(2703) VRNDSCALEPD*/ { 31, 15, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 2730 /*(2704) VINSERTF128*/ { 93, 35, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2132}, 2731 /*(2705) VINSERTF128*/ { 94, 14, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2138}, 2732 /*(2706) INTO*/ { 16, 36, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2733 /*(2707) SWAPGS*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 300}, 2734 /*(2708) MOVSLDUP*/ { 5, 50, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2735 /*(2709) MOVSLDUP*/ { 6, 51, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2736 /*(2710) CVTSI2SS*/ { 29, 50, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2737 /*(2711) CVTSI2SS*/ { 28, 51, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 95}, 2738 /*(2712) CVTSI2SS*/ { 29, 50, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 29}, 2739 /*(2713) CVTSI2SS*/ { 28, 51, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 88}, 2740 /*(2714) SYSENTER*/ { 16, 19, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2741 /*(2715) SYSENTER*/ { 16, 19, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2742 /*(2716) CVTSI2SD*/ { 29, 50, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2743 /*(2717) CVTSI2SD*/ { 28, 51, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 2744 /*(2718) CVTSI2SD*/ { 29, 50, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 72}, 2745 /*(2719) CVTSI2SD*/ { 28, 51, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 180}, 2746 /*(2720) VDIVSS*/ { 7, 5, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2747 /*(2721) VDIVSS*/ { 8, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 2748 /*(2722) VDIVSS*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 2749 /*(2723) VDIVSS*/ { 12, 62, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 2750 /*(2724) VDIVSS*/ { 15, 61, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 2751 /*(2725) VFNMADD231SS*/ { 13, 5, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2752 /*(2726) VFNMADD231SS*/ { 30, 2, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 2753 /*(2727) VFNMADD231SS*/ { 12, 2, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2754 /*(2728) VFNMADD231SS*/ { 12, 62, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 2755 /*(2729) VFNMADD231SS*/ { 15, 61, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 2756 /*(2730) VDIVSD*/ { 7, 5, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 2757 /*(2731) VDIVSD*/ { 8, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 2758 /*(2732) VDIVSD*/ { 12, 2, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 2759 /*(2733) VDIVSD*/ { 12, 62, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 2760 /*(2734) VDIVSD*/ { 15, 60, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 2761 /*(2735) VFNMADD231SD*/ { 13, 5, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 2762 /*(2736) VFNMADD231SD*/ { 30, 2, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 2763 /*(2737) VFNMADD231SD*/ { 12, 2, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2764 /*(2738) VFNMADD231SD*/ { 12, 62, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 2765 /*(2739) VFNMADD231SD*/ { 15, 60, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 2766 /*(2740) CMPXCHG8B_LOCK*/ { 36, 106, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 7}, 2767 /*(2741) CMPXCHG8B_LOCK*/ { 80, 106, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 30}, 2768 /*(2742) PMOVMSKB*/ { 4, 1, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2769 /*(2743) PMOVMSKB*/ { 4, 4, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2770 /*(2744) FSTPNCE*/ { 1, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 2771 /*(2745) OR_LOCK*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 2772 /*(2746) OR_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 2773 /*(2747) OR_LOCK*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 2774 /*(2748) OR_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 2775 /*(2749) OR_LOCK*/ { 49, 5, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2776 /*(2750) OR_LOCK*/ { 49, 5, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2777 /*(2751) VPDPBUSDS*/ { 12, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2778 /*(2752) VPDPBUSDS*/ { 13, 7, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2779 /*(2753) VPDPBUSDS*/ { 12, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2780 /*(2754) VPDPBUSDS*/ { 13, 7, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2781 /*(2755) VPDPBUSDS*/ { 12, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2782 /*(2756) VPDPBUSDS*/ { 13, 7, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2783 /*(2757) VSCATTERPF1DPS*/ { 69, 44, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2145}, 2784 /*(2758) ENTER*/ { 16, 124, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2785 /*(2759) VZEROALL*/ { 53, 36, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 2786 /*(2760) VSCATTERPF1DPD*/ { 69, 41, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2156}, 2787 /*(2761) REPNE_SCASB*/ { 5, 36, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2788 /*(2762) VEXP2PS*/ { 22, 2, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 2789 /*(2763) VEXP2PS*/ { 22, 71, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 846}, 2790 /*(2764) VEXP2PS*/ { 31, 7, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 2791 /*(2765) REPNE_SCASD*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2792 /*(2766) FISTTP*/ { 0, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2793 /*(2767) FISTTP*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2794 /*(2768) FISTTP*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2795 /*(2769) REPNE_SCASQ*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2796 /*(2770) VEXP2PD*/ { 22, 2, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 2797 /*(2771) VEXP2PD*/ { 22, 71, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 802}, 2798 /*(2772) VEXP2PD*/ { 31, 8, 0xc8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 2799 /*(2773) REPNE_SCASW*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2800 /*(2774) VMPSADBW*/ { 7, 35, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 2801 /*(2775) VMPSADBW*/ { 8, 14, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 2802 /*(2776) VMPSADBW*/ { 7, 35, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 2803 /*(2777) VMPSADBW*/ { 8, 14, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 2804 /*(2778) KUNPCKBW*/ { 30, 2, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 2805 /*(2779) VSHUFI64X2*/ { 12, 14, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 2806 /*(2780) VSHUFI64X2*/ { 13, 15, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 2807 /*(2781) VSHUFI64X2*/ { 12, 14, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 2808 /*(2782) VSHUFI64X2*/ { 13, 15, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 2809 /*(2783) POP*/ { 0, 125, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2810 /*(2784) POP*/ { 1, 126, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 2811 /*(2785) POP*/ { 16, 36, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2812 /*(2786) POP*/ { 16, 36, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2813 /*(2787) POP*/ { 16, 36, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2814 /*(2788) POP*/ { 16, 127, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2815 /*(2789) POP*/ { 16, 128, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2816 /*(2790) POP*/ { 16, 128, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2817 /*(2791) VMOVHPD*/ { 7, 5, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 2818 /*(2792) VMOVHPD*/ { 53, 5, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 2819 /*(2793) VMOVHPD*/ { 61, 60, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2167}, 2820 /*(2794) VMOVHPD*/ { 59, 60, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 2821 /*(2795) VFMADD132PD*/ { 13, 5, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 2822 /*(2796) VFMADD132PD*/ { 30, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 2823 /*(2797) VFMADD132PD*/ { 13, 5, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 2824 /*(2798) VFMADD132PD*/ { 30, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 2825 /*(2799) VFMADD132PD*/ { 12, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2826 /*(2800) VFMADD132PD*/ { 12, 58, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 2827 /*(2801) VFMADD132PD*/ { 13, 8, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2828 /*(2802) VFMADD132PD*/ { 12, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2829 /*(2803) VFMADD132PD*/ { 13, 8, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2830 /*(2804) VFMADD132PD*/ { 12, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 2831 /*(2805) VFMADD132PD*/ { 13, 8, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2832 /*(2806) VFMADD132PS*/ { 13, 5, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2833 /*(2807) VFMADD132PS*/ { 30, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 2834 /*(2808) VFMADD132PS*/ { 13, 5, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2835 /*(2809) VFMADD132PS*/ { 30, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 2836 /*(2810) VFMADD132PS*/ { 12, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2837 /*(2811) VFMADD132PS*/ { 12, 58, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 2838 /*(2812) VFMADD132PS*/ { 13, 7, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2839 /*(2813) VFMADD132PS*/ { 12, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2840 /*(2814) VFMADD132PS*/ { 13, 7, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2841 /*(2815) VFMADD132PS*/ { 12, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 2842 /*(2816) VFMADD132PS*/ { 13, 7, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2843 /*(2817) VMOVHPS*/ { 7, 5, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 2844 /*(2818) VMOVHPS*/ { 53, 5, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 2845 /*(2819) VMOVHPS*/ { 61, 129, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2175}, 2846 /*(2820) VMOVHPS*/ { 59, 129, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 2847 /*(2821) PMOVZXDQ*/ { 3, 16, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 2848 /*(2822) PMOVZXDQ*/ { 4, 17, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 2849 /*(2823) VZEROUPPER*/ { 53, 36, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 2850 /*(2824) PALIGNR*/ { 3, 72, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 9}, 2851 /*(2825) PALIGNR*/ { 4, 73, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 11}, 2852 /*(2826) PALIGNR*/ { 3, 105, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 2853 /*(2827) PALIGNR*/ { 4, 54, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 2854 /*(2828) LDS*/ { 16, 5, 0xc5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2855 /*(2829) RDFSBASE*/ { 14, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 124}, 2856 /*(2830) SMSW*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 61}, 2857 /*(2831) SMSW*/ { 1, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 60}, 2858 /*(2832) VPMOVQ2M*/ { 11, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 2859 /*(2833) VPMOVQ2M*/ { 11, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 2860 /*(2834) VPMOVQ2M*/ { 11, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 2861 /*(2835) VMFUNC*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2183}, 2862 /*(2836) STGI*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2188}, 2863 /*(2837) FST*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2864 /*(2838) FST*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2865 /*(2839) FST*/ { 1, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 2866 /*(2840) FIST*/ { 0, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2867 /*(2841) FIST*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 2868 /*(2842) LDDQU*/ { 5, 50, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2869 /*(2843) PFRCP*/ { 16, 79, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 2870 /*(2844) PFRCP*/ { 21, 80, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 2871 /*(2845) CPUID*/ { 16, 19, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2872 /*(2846) LZCNT*/ { 5, 0, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2873 /*(2847) LZCNT*/ { 6, 1, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 2874 /*(2848) LZCNT*/ { 84, 0, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 2875 /*(2849) LZCNT*/ { 85, 1, 0xbd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 83}, 2876 /*(2850) VCVTUSI2SD*/ { 34, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2191}, 2877 /*(2851) VCVTUSI2SD*/ { 60, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2198}, 2878 /*(2852) VCVTUSI2SD*/ { 35, 63, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2207}, 2879 /*(2853) VCVTUSI2SD*/ { 61, 63, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2213}, 2880 /*(2854) VCVTUSI2SD*/ { 60, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2221}, 2881 /*(2855) VCVTUSI2SD*/ { 60, 62, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2230}, 2882 /*(2856) VCVTUSI2SD*/ { 61, 64, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2239}, 2883 /*(2857) MINPS*/ { 3, 0, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2884 /*(2858) MINPS*/ { 4, 1, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2885 /*(2859) FIDIVR*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 2886 /*(2860) FIDIVR*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 2887 /*(2861) MOVDDUP*/ { 5, 50, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2888 /*(2862) MOVDDUP*/ { 6, 51, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 2889 /*(2863) MINPD*/ { 3, 3, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2890 /*(2864) MINPD*/ { 4, 4, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2891 /*(2865) FDISI8087_NOP*/ { 66, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1259}, 2892 /*(2866) VPCOMUB*/ { 13, 35, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 2893 /*(2867) VPCOMUB*/ { 30, 14, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 2894 /*(2868) VPCOMUD*/ { 13, 35, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 2895 /*(2869) VPCOMUD*/ { 30, 14, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 2896 /*(2870) VPCOMUQ*/ { 13, 35, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 2897 /*(2871) VPCOMUQ*/ { 30, 14, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 2898 /*(2872) XSAVE*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2247}, 2899 /*(2873) VPCOMUW*/ { 13, 35, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 2900 /*(2874) VPCOMUW*/ { 30, 14, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 2901 /*(2875) SBB_LOCK*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2902 /*(2876) SBB_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2903 /*(2877) SBB_LOCK*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2904 /*(2878) SBB_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2905 /*(2879) SBB_LOCK*/ { 49, 5, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2906 /*(2880) SBB_LOCK*/ { 49, 5, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 2907 /*(2881) INSB*/ { 5, 36, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2908 /*(2882) INSD*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2909 /*(2883) INSD*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2910 /*(2884) INSW*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2911 /*(2885) DIV*/ { 0, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 2912 /*(2886) DIV*/ { 1, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 2913 /*(2887) DIV*/ { 0, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 2914 /*(2888) DIV*/ { 1, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 2915 /*(2889) PTWRITE*/ { 52, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2252}, 2916 /*(2890) PTWRITE*/ { 43, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2186}, 2917 /*(2891) VPMOVSXBW*/ { 2, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2918 /*(2892) VPMOVSXBW*/ { 53, 5, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2919 /*(2893) VPMOVSXBW*/ { 2, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2920 /*(2894) VPMOVSXBW*/ { 53, 5, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2921 /*(2895) VPMOVSXBW*/ { 54, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2922 /*(2896) VPMOVSXBW*/ { 55, 101, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2923 /*(2897) VPMOVSXBW*/ { 54, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2924 /*(2898) VPMOVSXBW*/ { 55, 101, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2925 /*(2899) VPMOVSXBW*/ { 54, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2926 /*(2900) VPMOVSXBW*/ { 55, 101, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2927 /*(2901) VPMOVSXBQ*/ { 2, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2928 /*(2902) VPMOVSXBQ*/ { 53, 5, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2929 /*(2903) VPMOVSXBQ*/ { 2, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2930 /*(2904) VPMOVSXBQ*/ { 53, 5, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2931 /*(2905) VPMOVSXBQ*/ { 54, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2932 /*(2906) VPMOVSXBQ*/ { 55, 118, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2933 /*(2907) VPMOVSXBQ*/ { 54, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2934 /*(2908) VPMOVSXBQ*/ { 55, 118, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2935 /*(2909) VPMOVSXBQ*/ { 54, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2936 /*(2910) VPMOVSXBQ*/ { 55, 118, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2937 /*(2911) FEMMS*/ { 16, 19, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2938 /*(2912) VMOVDQU16*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 2939 /*(2913) VMOVDQU16*/ { 81, 6, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 2940 /*(2914) VMOVDQU16*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 2941 /*(2915) VMOVDQU16*/ { 23, 6, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 2942 /*(2916) VMOVDQU16*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 2943 /*(2917) VMOVDQU16*/ { 81, 6, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 2944 /*(2918) VMOVDQU16*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 2945 /*(2919) VMOVDQU16*/ { 23, 6, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 2946 /*(2920) VMOVDQU16*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 2947 /*(2921) VMOVDQU16*/ { 81, 6, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 2948 /*(2922) VMOVDQU16*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 2949 /*(2923) VMOVDQU16*/ { 23, 6, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 2950 /*(2924) VPMOVSXBD*/ { 2, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2951 /*(2925) VPMOVSXBD*/ { 53, 5, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2952 /*(2926) VPMOVSXBD*/ { 2, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 2953 /*(2927) VPMOVSXBD*/ { 53, 5, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 2954 /*(2928) VPMOVSXBD*/ { 54, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2955 /*(2929) VPMOVSXBD*/ { 55, 31, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2956 /*(2930) VPMOVSXBD*/ { 54, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2957 /*(2931) VPMOVSXBD*/ { 55, 31, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2958 /*(2932) VPMOVSXBD*/ { 54, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 2959 /*(2933) VPMOVSXBD*/ { 55, 31, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 2960 /*(2934) PADDSB*/ { 3, 0, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 2961 /*(2935) PADDSB*/ { 4, 1, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 2962 /*(2936) PADDSB*/ { 3, 3, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 2963 /*(2937) PADDSB*/ { 4, 4, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 2964 /*(2938) VGATHERPF1QPD*/ { 69, 39, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1202}, 2965 /*(2939) DPPD*/ { 3, 130, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 2966 /*(2940) DPPD*/ { 4, 131, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 2967 /*(2941) IN*/ { 16, 132, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2968 /*(2942) IN*/ { 16, 132, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2969 /*(2943) IN*/ { 16, 133, 0xec, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2970 /*(2944) IN*/ { 16, 133, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 2971 /*(2945) DPPS*/ { 3, 130, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 2972 /*(2946) DPPS*/ { 4, 131, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 2973 /*(2947) VGATHERPF1QPS*/ { 69, 44, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2256}, 2974 /*(2948) CVTSD2SI*/ { 29, 50, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2975 /*(2949) CVTSD2SI*/ { 28, 51, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 2976 /*(2950) CVTSD2SI*/ { 29, 50, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 72}, 2977 /*(2951) CVTSD2SI*/ { 28, 51, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 180}, 2978 /*(2952) CMOVNZ*/ { 16, 0, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2979 /*(2953) CMOVNZ*/ { 21, 1, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2980 /*(2954) VFMSUBSS*/ { 13, 65, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 2981 /*(2955) VFMSUBSS*/ { 30, 66, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 2982 /*(2956) VFMSUBSS*/ { 13, 65, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 2983 /*(2957) VFMSUBSS*/ { 30, 66, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 2984 /*(2958) FMULP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 2985 /*(2959) CMOVNS*/ { 16, 0, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2986 /*(2960) CMOVNS*/ { 21, 1, 0x49, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2987 /*(2961) CMOVNP*/ { 16, 0, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2988 /*(2962) CMOVNP*/ { 21, 1, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2989 /*(2963) CMOVNO*/ { 16, 0, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2990 /*(2964) CMOVNO*/ { 21, 1, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2991 /*(2965) CMOVNL*/ { 16, 0, 0x4d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2992 /*(2966) CMOVNL*/ { 21, 1, 0x4d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2993 /*(2967) CVTSD2SS*/ { 5, 50, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 2994 /*(2968) CVTSD2SS*/ { 6, 51, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 2995 /*(2969) CMOVNB*/ { 16, 0, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 2996 /*(2970) CMOVNB*/ { 21, 1, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 2997 /*(2971) SHLX*/ { 7, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 2998 /*(2972) SHLX*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 2999 /*(2973) SHLX*/ { 8, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3000 /*(2974) SHLX*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3001 /*(2975) SHLX*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3002 /*(2976) SHLX*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3003 /*(2977) MOVAPS*/ { 3, 0, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3004 /*(2978) MOVAPS*/ { 4, 1, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3005 /*(2979) MOVAPS*/ { 3, 0, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3006 /*(2980) MOVAPS*/ { 4, 1, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3007 /*(2981) MOVAPD*/ { 3, 3, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3008 /*(2982) MOVAPD*/ { 4, 4, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3009 /*(2983) MOVAPD*/ { 3, 3, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3010 /*(2984) MOVAPD*/ { 4, 4, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3011 /*(2985) JRCXZ*/ { 16, 134, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3012 /*(2986) BLCIC*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2267}, 3013 /*(2987) BLCIC*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2267}, 3014 /*(2988) BLCIC*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2271}, 3015 /*(2989) BLCIC*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2271}, 3016 /*(2990) SHLD*/ { 16, 72, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3017 /*(2991) SHLD*/ { 21, 73, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3018 /*(2992) SHLD*/ { 16, 0, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3019 /*(2993) SHLD*/ { 21, 1, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3020 /*(2994) SAHF*/ { 16, 36, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3021 /*(2995) VPUNPCKLDQ*/ { 7, 5, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3022 /*(2996) VPUNPCKLDQ*/ { 8, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3023 /*(2997) VPUNPCKLDQ*/ { 7, 5, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3024 /*(2998) VPUNPCKLDQ*/ { 8, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3025 /*(2999) VPUNPCKLDQ*/ { 12, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3026 /*(3000) VPUNPCKLDQ*/ { 13, 7, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3027 /*(3001) VPUNPCKLDQ*/ { 12, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3028 /*(3002) VPUNPCKLDQ*/ { 13, 7, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3029 /*(3003) VPUNPCKLDQ*/ { 12, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3030 /*(3004) VPUNPCKLDQ*/ { 13, 7, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3031 /*(3005) FDIVRP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3032 /*(3006) VPSUBB*/ { 7, 5, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3033 /*(3007) VPSUBB*/ { 8, 2, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3034 /*(3008) VPSUBB*/ { 7, 5, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3035 /*(3009) VPSUBB*/ { 8, 2, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3036 /*(3010) VPSUBB*/ { 9, 2, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3037 /*(3011) VPSUBB*/ { 10, 29, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3038 /*(3012) VPSUBB*/ { 9, 2, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3039 /*(3013) VPSUBB*/ { 10, 29, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3040 /*(3014) VPSUBB*/ { 9, 2, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3041 /*(3015) VPSUBB*/ { 10, 29, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3042 /*(3016) TZMSK*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2276}, 3043 /*(3017) TZMSK*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2276}, 3044 /*(3018) TZMSK*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2280}, 3045 /*(3019) TZMSK*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2280}, 3046 /*(3020) VPSUBD*/ { 7, 5, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3047 /*(3021) VPSUBD*/ { 8, 2, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3048 /*(3022) VPSUBD*/ { 7, 5, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3049 /*(3023) VPSUBD*/ { 8, 2, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3050 /*(3024) VPSUBD*/ { 12, 2, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3051 /*(3025) VPSUBD*/ { 13, 7, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3052 /*(3026) VPSUBD*/ { 12, 2, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3053 /*(3027) VPSUBD*/ { 13, 7, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3054 /*(3028) VPSUBD*/ { 12, 2, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3055 /*(3029) VPSUBD*/ { 13, 7, 0xfa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3056 /*(3030) VPMASKMOVQ*/ { 13, 5, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3057 /*(3031) VPMASKMOVQ*/ { 13, 5, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3058 /*(3032) VPMASKMOVQ*/ { 13, 5, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3059 /*(3033) VPMASKMOVQ*/ { 13, 5, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3060 /*(3034) VPSUBQ*/ { 7, 5, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3061 /*(3035) VPSUBQ*/ { 8, 2, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3062 /*(3036) VPSUBQ*/ { 7, 5, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3063 /*(3037) VPSUBQ*/ { 8, 2, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3064 /*(3038) VPSUBQ*/ { 12, 2, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3065 /*(3039) VPSUBQ*/ { 13, 8, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3066 /*(3040) VPSUBQ*/ { 12, 2, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3067 /*(3041) VPSUBQ*/ { 13, 8, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3068 /*(3042) VPSUBQ*/ { 12, 2, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3069 /*(3043) VPSUBQ*/ { 13, 8, 0xfb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3070 /*(3044) VPSUBW*/ { 7, 5, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3071 /*(3045) VPSUBW*/ { 8, 2, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3072 /*(3046) VPSUBW*/ { 7, 5, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3073 /*(3047) VPSUBW*/ { 8, 2, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3074 /*(3048) VPSUBW*/ { 9, 2, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3075 /*(3049) VPSUBW*/ { 10, 6, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3076 /*(3050) VPSUBW*/ { 9, 2, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3077 /*(3051) VPSUBW*/ { 10, 6, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3078 /*(3052) VPSUBW*/ { 9, 2, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3079 /*(3053) VPSUBW*/ { 10, 6, 0xf9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3080 /*(3054) PCMPISTRM*/ { 3, 135, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 3081 /*(3055) PCMPISTRM*/ { 4, 136, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 3082 /*(3056) PCMPISTRI*/ { 51, 135, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 402}, 3083 /*(3057) PCMPISTRI*/ { 74, 136, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1269}, 3084 /*(3058) PCMPISTRI*/ { 51, 135, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 354}, 3085 /*(3059) PCMPISTRI*/ { 74, 136, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1284}, 3086 /*(3060) VFMSUBADD132PD*/ { 13, 5, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3087 /*(3061) VFMSUBADD132PD*/ { 30, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3088 /*(3062) VFMSUBADD132PD*/ { 13, 5, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3089 /*(3063) VFMSUBADD132PD*/ { 30, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3090 /*(3064) VFMSUBADD132PD*/ { 12, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3091 /*(3065) VFMSUBADD132PD*/ { 12, 58, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 3092 /*(3066) VFMSUBADD132PD*/ { 13, 8, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3093 /*(3067) VFMSUBADD132PD*/ { 12, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3094 /*(3068) VFMSUBADD132PD*/ { 13, 8, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3095 /*(3069) VFMSUBADD132PD*/ { 12, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3096 /*(3070) VFMSUBADD132PD*/ { 13, 8, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3097 /*(3071) LMSW*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 239}, 3098 /*(3072) LMSW*/ { 1, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 238}, 3099 /*(3073) INVEPT*/ { 3, 108, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3100 /*(3074) INVEPT*/ { 3, 108, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3101 /*(3075) VPMADD52LUQ*/ { 12, 2, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3102 /*(3076) VPMADD52LUQ*/ { 13, 8, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3103 /*(3077) VPMADD52LUQ*/ { 12, 2, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3104 /*(3078) VPMADD52LUQ*/ { 13, 8, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3105 /*(3079) VPMADD52LUQ*/ { 12, 2, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3106 /*(3080) VPMADD52LUQ*/ { 13, 8, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3107 /*(3081) REPNE_CMPSQ*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3108 /*(3082) PMULHUW*/ { 3, 0, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3109 /*(3083) PMULHUW*/ { 4, 1, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3110 /*(3084) PMULHUW*/ { 3, 3, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3111 /*(3085) PMULHUW*/ { 4, 4, 0xe4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3112 /*(3086) RDRAND*/ { 14, 1, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 238}, 3113 /*(3087) VPSUBSB*/ { 7, 5, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3114 /*(3088) VPSUBSB*/ { 8, 2, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3115 /*(3089) VPSUBSB*/ { 7, 5, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3116 /*(3090) VPSUBSB*/ { 8, 2, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3117 /*(3091) VPSUBSB*/ { 9, 2, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3118 /*(3092) VPSUBSB*/ { 10, 29, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3119 /*(3093) VPSUBSB*/ { 9, 2, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3120 /*(3094) VPSUBSB*/ { 10, 29, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3121 /*(3095) VPSUBSB*/ { 9, 2, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3122 /*(3096) VPSUBSB*/ { 10, 29, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3123 /*(3097) VINSERTF32X8*/ { 12, 14, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 3124 /*(3098) VINSERTF32X8*/ { 15, 109, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 3125 /*(3099) CLTS*/ { 16, 19, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3126 /*(3100) VINSERTF32X4*/ { 12, 14, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 3127 /*(3101) VINSERTF32X4*/ { 15, 75, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 3128 /*(3102) VINSERTF32X4*/ { 12, 14, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 3129 /*(3103) VINSERTF32X4*/ { 15, 75, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 3130 /*(3104) VPSUBSW*/ { 7, 5, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3131 /*(3105) VPSUBSW*/ { 8, 2, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3132 /*(3106) VPSUBSW*/ { 7, 5, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3133 /*(3107) VPSUBSW*/ { 8, 2, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3134 /*(3108) VPSUBSW*/ { 9, 2, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3135 /*(3109) VPSUBSW*/ { 10, 6, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3136 /*(3110) VPSUBSW*/ { 9, 2, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3137 /*(3111) VPSUBSW*/ { 10, 6, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3138 /*(3112) VPSUBSW*/ { 9, 2, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3139 /*(3113) VPSUBSW*/ { 10, 6, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3140 /*(3114) FLD*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3141 /*(3115) FLD*/ { 1, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 3142 /*(3116) FLD*/ { 0, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3143 /*(3117) FLD*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3144 /*(3118) PMAXUW*/ { 3, 16, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3145 /*(3119) PMAXUW*/ { 4, 17, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 3146 /*(3120) PMAXUD*/ { 3, 16, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3147 /*(3121) PMAXUD*/ { 4, 17, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 3148 /*(3122) PMAXUB*/ { 3, 0, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3149 /*(3123) PMAXUB*/ { 4, 1, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3150 /*(3124) PMAXUB*/ { 3, 3, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3151 /*(3125) PMAXUB*/ { 4, 4, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3152 /*(3126) PCMPEQD*/ { 3, 0, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3153 /*(3127) PCMPEQD*/ { 4, 1, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3154 /*(3128) PCMPEQD*/ { 3, 3, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3155 /*(3129) PCMPEQD*/ { 4, 4, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3156 /*(3130) VPSCATTERQQ*/ { 33, 39, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 3157 /*(3131) VPSCATTERQQ*/ { 33, 40, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 3158 /*(3132) VPSCATTERQQ*/ { 33, 41, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 3159 /*(3133) VFNMADD231PS*/ { 13, 5, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3160 /*(3134) VFNMADD231PS*/ { 30, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3161 /*(3135) VFNMADD231PS*/ { 13, 5, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3162 /*(3136) VFNMADD231PS*/ { 30, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3163 /*(3137) VFNMADD231PS*/ { 12, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3164 /*(3138) VFNMADD231PS*/ { 12, 58, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 3165 /*(3139) VFNMADD231PS*/ { 13, 7, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3166 /*(3140) VFNMADD231PS*/ { 12, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3167 /*(3141) VFNMADD231PS*/ { 13, 7, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3168 /*(3142) VFNMADD231PS*/ { 12, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3169 /*(3143) VFNMADD231PS*/ { 13, 7, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3170 /*(3144) VCVTTPD2UQQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 3171 /*(3145) VCVTTPD2UQQ*/ { 31, 8, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 3172 /*(3146) VCVTTPD2UQQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 3173 /*(3147) VCVTTPD2UQQ*/ { 31, 8, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 3174 /*(3148) VCVTTPD2UQQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 3175 /*(3149) VCVTTPD2UQQ*/ { 22, 71, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 3176 /*(3150) VCVTTPD2UQQ*/ { 31, 8, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 3177 /*(3151) VMOVHLPS*/ { 8, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3178 /*(3152) VMOVHLPS*/ { 60, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2285}, 3179 /*(3153) VPSCATTERQD*/ { 33, 44, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 3180 /*(3154) VPSCATTERQD*/ { 33, 45, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 3181 /*(3155) VPSCATTERQD*/ { 33, 46, 0xa1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 3182 /*(3156) VFNMADD231PD*/ { 13, 5, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3183 /*(3157) VFNMADD231PD*/ { 30, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3184 /*(3158) VFNMADD231PD*/ { 13, 5, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3185 /*(3159) VFNMADD231PD*/ { 30, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3186 /*(3160) VFNMADD231PD*/ { 12, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3187 /*(3161) VFNMADD231PD*/ { 12, 58, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 3188 /*(3162) VFNMADD231PD*/ { 13, 8, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3189 /*(3163) VFNMADD231PD*/ { 12, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3190 /*(3164) VFNMADD231PD*/ { 13, 8, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3191 /*(3165) VFNMADD231PD*/ { 12, 2, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3192 /*(3166) VFNMADD231PD*/ { 13, 8, 0xbc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3193 /*(3167) FDECSTP*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2294}, 3194 /*(3168) VGF2P8MULB*/ { 12, 2, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3195 /*(3169) VGF2P8MULB*/ { 15, 29, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3196 /*(3170) VGF2P8MULB*/ { 12, 2, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3197 /*(3171) VGF2P8MULB*/ { 15, 29, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3198 /*(3172) VGF2P8MULB*/ { 12, 2, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3199 /*(3173) VGF2P8MULB*/ { 15, 29, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3200 /*(3174) VGF2P8MULB*/ { 30, 2, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3201 /*(3175) VGF2P8MULB*/ { 13, 5, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3202 /*(3176) VGF2P8MULB*/ { 30, 2, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3203 /*(3177) VGF2P8MULB*/ { 13, 5, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3204 /*(3178) VRCP14PD*/ { 22, 2, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3205 /*(3179) VRCP14PD*/ { 31, 8, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 3206 /*(3180) VRCP14PD*/ { 22, 2, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3207 /*(3181) VRCP14PD*/ { 31, 8, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 3208 /*(3182) VRCP14PD*/ { 22, 2, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3209 /*(3183) VRCP14PD*/ { 31, 8, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 3210 /*(3184) MFENCE*/ { 52, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 986}, 3211 /*(3185) PSHUFLW*/ { 5, 76, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 3212 /*(3186) PSHUFLW*/ { 6, 77, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 3213 /*(3187) SKINIT*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 274}, 3214 /*(3188) FLDZ*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2297}, 3215 /*(3189) VPHADDUWQ*/ { 19, 5, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 3216 /*(3190) VPHADDUWQ*/ { 20, 2, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 3217 /*(3191) VPERMT2D*/ { 12, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3218 /*(3192) VPERMT2D*/ { 13, 7, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3219 /*(3193) VPERMT2D*/ { 12, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3220 /*(3194) VPERMT2D*/ { 13, 7, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3221 /*(3195) VPERMT2D*/ { 12, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3222 /*(3196) VPERMT2D*/ { 13, 7, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3223 /*(3197) VPERMT2B*/ { 12, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3224 /*(3198) VPERMT2B*/ { 15, 29, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3225 /*(3199) VPERMT2B*/ { 12, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3226 /*(3200) VPERMT2B*/ { 15, 29, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3227 /*(3201) VPERMT2B*/ { 12, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3228 /*(3202) VPERMT2B*/ { 15, 29, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3229 /*(3203) VPERMT2W*/ { 12, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3230 /*(3204) VPERMT2W*/ { 15, 6, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3231 /*(3205) VPERMT2W*/ { 12, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3232 /*(3206) VPERMT2W*/ { 15, 6, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3233 /*(3207) VPERMT2W*/ { 12, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3234 /*(3208) VPERMT2W*/ { 15, 6, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3235 /*(3209) VPHADDUWD*/ { 19, 5, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 3236 /*(3210) VPHADDUWD*/ { 20, 2, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 3237 /*(3211) VPERMT2Q*/ { 12, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3238 /*(3212) VPERMT2Q*/ { 13, 8, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3239 /*(3213) VPERMT2Q*/ { 12, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3240 /*(3214) VPERMT2Q*/ { 13, 8, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3241 /*(3215) VPERMT2Q*/ { 12, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3242 /*(3216) VPERMT2Q*/ { 13, 8, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3243 /*(3217) VMOVNTPD*/ { 53, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3244 /*(3218) VMOVNTPD*/ { 53, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3245 /*(3219) VMOVNTPD*/ { 59, 137, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3246 /*(3220) VMOVNTPD*/ { 59, 137, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3247 /*(3221) VMOVNTPD*/ { 59, 137, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3248 /*(3222) VUNPCKLPS*/ { 7, 5, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 3249 /*(3223) VUNPCKLPS*/ { 8, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3250 /*(3224) VUNPCKLPS*/ { 7, 5, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 3251 /*(3225) VUNPCKLPS*/ { 8, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3252 /*(3226) VUNPCKLPS*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 3253 /*(3227) VUNPCKLPS*/ { 13, 7, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 3254 /*(3228) VUNPCKLPS*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 3255 /*(3229) VUNPCKLPS*/ { 13, 7, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 3256 /*(3230) VUNPCKLPS*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 3257 /*(3231) VUNPCKLPS*/ { 13, 7, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 3258 /*(3232) VMOVNTPS*/ { 53, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 3259 /*(3233) VMOVNTPS*/ { 53, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 3260 /*(3234) VMOVNTPS*/ { 59, 110, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 3261 /*(3235) VMOVNTPS*/ { 59, 110, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 3262 /*(3236) VMOVNTPS*/ { 59, 110, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 3263 /*(3237) VUNPCKLPD*/ { 7, 5, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3264 /*(3238) VUNPCKLPD*/ { 8, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3265 /*(3239) VUNPCKLPD*/ { 7, 5, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3266 /*(3240) VUNPCKLPD*/ { 8, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3267 /*(3241) VUNPCKLPD*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3268 /*(3242) VUNPCKLPD*/ { 13, 8, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3269 /*(3243) VUNPCKLPD*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3270 /*(3244) VUNPCKLPD*/ { 13, 8, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3271 /*(3245) VUNPCKLPD*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3272 /*(3246) VUNPCKLPD*/ { 13, 8, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3273 /*(3247) BTR_LOCK*/ { 36, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 746}, 3274 /*(3248) BTR_LOCK*/ { 49, 0, 0xb3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 3275 /*(3249) VMOVDQU8*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 3276 /*(3250) VMOVDQU8*/ { 81, 29, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2310}, 3277 /*(3251) VMOVDQU8*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 3278 /*(3252) VMOVDQU8*/ { 23, 29, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2319}, 3279 /*(3253) VMOVDQU8*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 3280 /*(3254) VMOVDQU8*/ { 81, 29, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2310}, 3281 /*(3255) VMOVDQU8*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 3282 /*(3256) VMOVDQU8*/ { 23, 29, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2310}, 3283 /*(3257) VMOVDQU8*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 3284 /*(3258) VMOVDQU8*/ { 81, 29, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2310}, 3285 /*(3259) VMOVDQU8*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 3286 /*(3260) VMOVDQU8*/ { 23, 29, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2310}, 3287 /*(3261) VFMADDSUB213PS*/ { 13, 5, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3288 /*(3262) VFMADDSUB213PS*/ { 30, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3289 /*(3263) VFMADDSUB213PS*/ { 13, 5, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3290 /*(3264) VFMADDSUB213PS*/ { 30, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3291 /*(3265) VFMADDSUB213PS*/ { 12, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3292 /*(3266) VFMADDSUB213PS*/ { 12, 58, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 3293 /*(3267) VFMADDSUB213PS*/ { 13, 7, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3294 /*(3268) VFMADDSUB213PS*/ { 12, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3295 /*(3269) VFMADDSUB213PS*/ { 13, 7, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3296 /*(3270) VFMADDSUB213PS*/ { 12, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3297 /*(3271) VFMADDSUB213PS*/ { 13, 7, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3298 /*(3272) VFMSUBADDPD*/ { 13, 65, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3299 /*(3273) VFMSUBADDPD*/ { 30, 66, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3300 /*(3274) VFMSUBADDPD*/ { 13, 65, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3301 /*(3275) VFMSUBADDPD*/ { 30, 66, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3302 /*(3276) VFMSUBADDPD*/ { 13, 65, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3303 /*(3277) VFMSUBADDPD*/ { 30, 66, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3304 /*(3278) VFMSUBADDPD*/ { 13, 65, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3305 /*(3279) VFMSUBADDPD*/ { 30, 66, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3306 /*(3280) MOVNTPD*/ { 3, 16, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3307 /*(3281) VFMADDSUB213PD*/ { 13, 5, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3308 /*(3282) VFMADDSUB213PD*/ { 30, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3309 /*(3283) VFMADDSUB213PD*/ { 13, 5, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3310 /*(3284) VFMADDSUB213PD*/ { 30, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3311 /*(3285) VFMADDSUB213PD*/ { 12, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3312 /*(3286) VFMADDSUB213PD*/ { 12, 58, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 3313 /*(3287) VFMADDSUB213PD*/ { 13, 8, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3314 /*(3288) VFMADDSUB213PD*/ { 12, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3315 /*(3289) VFMADDSUB213PD*/ { 13, 8, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3316 /*(3290) VFMADDSUB213PD*/ { 12, 2, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3317 /*(3291) VFMADDSUB213PD*/ { 13, 8, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3318 /*(3292) VCVTPS2DQ*/ { 53, 5, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3319 /*(3293) VCVTPS2DQ*/ { 2, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3320 /*(3294) VCVTPS2DQ*/ { 53, 5, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3321 /*(3295) VCVTPS2DQ*/ { 2, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3322 /*(3296) VCVTPS2DQ*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 3323 /*(3297) VCVTPS2DQ*/ { 22, 58, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2329}, 3324 /*(3298) VCVTPS2DQ*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 3325 /*(3299) VCVTPS2DQ*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 3326 /*(3300) VCVTPS2DQ*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 3327 /*(3301) VCVTPS2DQ*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 3328 /*(3302) VCVTPS2DQ*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 3329 /*(3303) MOVNTPS*/ { 3, 0, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3330 /*(3304) VFMSUBADDPS*/ { 13, 65, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3331 /*(3305) VFMSUBADDPS*/ { 30, 66, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3332 /*(3306) VFMSUBADDPS*/ { 13, 65, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3333 /*(3307) VFMSUBADDPS*/ { 30, 66, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3334 /*(3308) VFMSUBADDPS*/ { 13, 65, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3335 /*(3309) VFMSUBADDPS*/ { 30, 66, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3336 /*(3310) VFMSUBADDPS*/ { 13, 65, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3337 /*(3311) VFMSUBADDPS*/ { 30, 66, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3338 /*(3312) VCVTTPD2QQ*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 3339 /*(3313) VCVTTPD2QQ*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 3340 /*(3314) VCVTTPD2QQ*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 3341 /*(3315) VCVTTPD2QQ*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 3342 /*(3316) VCVTTPD2QQ*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 3343 /*(3317) VCVTTPD2QQ*/ { 22, 71, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 3344 /*(3318) VCVTTPD2QQ*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 3345 /*(3319) LEA*/ { 16, 138, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3346 /*(3320) VFMADD213PD*/ { 13, 5, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3347 /*(3321) VFMADD213PD*/ { 30, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3348 /*(3322) VFMADD213PD*/ { 13, 5, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3349 /*(3323) VFMADD213PD*/ { 30, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3350 /*(3324) VFMADD213PD*/ { 12, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3351 /*(3325) VFMADD213PD*/ { 12, 58, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 3352 /*(3326) VFMADD213PD*/ { 13, 8, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3353 /*(3327) VFMADD213PD*/ { 12, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3354 /*(3328) VFMADD213PD*/ { 13, 8, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3355 /*(3329) VFMADD213PD*/ { 12, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3356 /*(3330) VFMADD213PD*/ { 13, 8, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3357 /*(3331) FLD1*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2272}, 3358 /*(3332) XTEST*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2339}, 3359 /*(3333) LES*/ { 16, 5, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3360 /*(3334) VFMADD213PS*/ { 13, 5, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3361 /*(3335) VFMADD213PS*/ { 30, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3362 /*(3336) VFMADD213PS*/ { 13, 5, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3363 /*(3337) VFMADD213PS*/ { 30, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3364 /*(3338) VFMADD213PS*/ { 12, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3365 /*(3339) VFMADD213PS*/ { 12, 58, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 3366 /*(3340) VFMADD213PS*/ { 13, 7, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3367 /*(3341) VFMADD213PS*/ { 12, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3368 /*(3342) VFMADD213PS*/ { 13, 7, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3369 /*(3343) VFMADD213PS*/ { 12, 2, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3370 /*(3344) VFMADD213PS*/ { 13, 7, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3371 /*(3345) VPHMINPOSUW*/ { 53, 5, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 3372 /*(3346) VPHMINPOSUW*/ { 2, 2, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 3373 /*(3347) PFADD*/ { 16, 79, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 3374 /*(3348) PFADD*/ { 21, 80, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 3375 /*(3349) PEXTRW_SSE4*/ { 3, 130, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 3376 /*(3350) PEXTRW_SSE4*/ { 4, 131, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 3377 /*(3351) RCPPS*/ { 3, 0, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3378 /*(3352) RCPPS*/ { 4, 1, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3379 /*(3353) VPUNPCKHWD*/ { 7, 5, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3380 /*(3354) VPUNPCKHWD*/ { 8, 2, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3381 /*(3355) VPUNPCKHWD*/ { 7, 5, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3382 /*(3356) VPUNPCKHWD*/ { 8, 2, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3383 /*(3357) VPUNPCKHWD*/ { 9, 2, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3384 /*(3358) VPUNPCKHWD*/ { 10, 6, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3385 /*(3359) VPUNPCKHWD*/ { 9, 2, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3386 /*(3360) VPUNPCKHWD*/ { 10, 6, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3387 /*(3361) VPUNPCKHWD*/ { 9, 2, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 3388 /*(3362) VPUNPCKHWD*/ { 10, 6, 0x69, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 3389 /*(3363) CMPXCHG16B_LOCK*/ { 80, 106, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 23}, 3390 /*(3364) CVTTPD2PI*/ { 3, 3, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3391 /*(3365) CVTTPD2PI*/ { 4, 4, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3392 /*(3366) VCVTSS2USI*/ { 76, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2344}, 3393 /*(3367) VCVTSS2USI*/ { 77, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2354}, 3394 /*(3368) VCVTSS2USI*/ { 76, 62, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2367}, 3395 /*(3369) VCVTSS2USI*/ { 77, 62, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2377}, 3396 /*(3370) VCVTSS2USI*/ { 78, 139, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2390}, 3397 /*(3371) VCVTSS2USI*/ { 79, 139, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2399}, 3398 /*(3372) VCVTSS2USI*/ { 77, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2411}, 3399 /*(3373) VCVTSS2USI*/ { 77, 62, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2424}, 3400 /*(3374) VCVTSS2USI*/ { 79, 139, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2437}, 3401 /*(3375) PCONFIG*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2449}, 3402 /*(3376) FISTP*/ { 0, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 3403 /*(3377) FISTP*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 3404 /*(3378) FISTP*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 3405 /*(3379) JMP_FAR*/ { 0, 5, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3406 /*(3380) JMP_FAR*/ { 16, 140, 0xea, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3407 /*(3381) POPA*/ { 16, 36, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3408 /*(3382) VFPCLASSSS*/ { 63, 14, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 710}, 3409 /*(3383) VFPCLASSSS*/ { 23, 94, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 3410 /*(3384) POPF*/ { 16, 43, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3411 /*(3385) VFPCLASSSD*/ { 63, 14, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 3412 /*(3386) VFPCLASSSD*/ { 23, 82, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 3413 /*(3387) CALL_NEAR*/ { 0, 95, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3414 /*(3388) CALL_NEAR*/ { 1, 96, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 3415 /*(3389) CALL_NEAR*/ { 16, 97, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3416 /*(3390) CALL_NEAR*/ { 16, 141, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3417 /*(3391) FICOMP*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 3418 /*(3392) FICOMP*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 3419 /*(3393) PSUBUSB*/ { 3, 0, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3420 /*(3394) PSUBUSB*/ { 4, 1, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3421 /*(3395) PSUBUSB*/ { 3, 3, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3422 /*(3396) PSUBUSB*/ { 4, 4, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3423 /*(3397) VFMADDSUB231PS*/ { 13, 5, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3424 /*(3398) VFMADDSUB231PS*/ { 30, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3425 /*(3399) VFMADDSUB231PS*/ { 13, 5, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 3426 /*(3400) VFMADDSUB231PS*/ { 30, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 3427 /*(3401) VFMADDSUB231PS*/ { 12, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3428 /*(3402) VFMADDSUB231PS*/ { 12, 58, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 3429 /*(3403) VFMADDSUB231PS*/ { 13, 7, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3430 /*(3404) VFMADDSUB231PS*/ { 12, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3431 /*(3405) VFMADDSUB231PS*/ { 13, 7, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3432 /*(3406) VFMADDSUB231PS*/ { 12, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3433 /*(3407) VFMADDSUB231PS*/ { 13, 7, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3434 /*(3408) PSUBUSW*/ { 3, 0, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3435 /*(3409) PSUBUSW*/ { 4, 1, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3436 /*(3410) PSUBUSW*/ { 3, 3, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3437 /*(3411) PSUBUSW*/ { 4, 4, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3438 /*(3412) VUCOMISD*/ { 53, 5, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3439 /*(3413) VUCOMISD*/ { 2, 2, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3440 /*(3414) VUCOMISD*/ { 11, 2, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 558}, 3441 /*(3415) VUCOMISD*/ { 11, 59, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 570}, 3442 /*(3416) VUCOMISD*/ { 59, 60, 0x2e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3443 /*(3417) VFMADDSUB231PD*/ { 13, 5, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3444 /*(3418) VFMADDSUB231PD*/ { 30, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3445 /*(3419) VFMADDSUB231PD*/ { 13, 5, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 3446 /*(3420) VFMADDSUB231PD*/ { 30, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 3447 /*(3421) VFMADDSUB231PD*/ { 12, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3448 /*(3422) VFMADDSUB231PD*/ { 12, 58, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 3449 /*(3423) VFMADDSUB231PD*/ { 13, 8, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3450 /*(3424) VFMADDSUB231PD*/ { 12, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3451 /*(3425) VFMADDSUB231PD*/ { 13, 8, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3452 /*(3426) VFMADDSUB231PD*/ { 12, 2, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3453 /*(3427) VFMADDSUB231PD*/ { 13, 8, 0xb6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3454 /*(3428) PFCMPGT*/ { 16, 79, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 3455 /*(3429) PFCMPGT*/ { 21, 80, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 3456 /*(3430) VPSHLDD*/ { 12, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 3457 /*(3431) VPSHLDD*/ { 13, 18, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 3458 /*(3432) VPSHLDD*/ { 12, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 3459 /*(3433) VPSHLDD*/ { 13, 18, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 3460 /*(3434) VPSHLDD*/ { 12, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 3461 /*(3435) VPSHLDD*/ { 13, 18, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 3462 /*(3436) PFCMPGE*/ { 16, 79, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 3463 /*(3437) PFCMPGE*/ { 21, 80, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 3464 /*(3438) VCVTPS2UQQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 3465 /*(3439) VCVTPS2UQQ*/ { 31, 142, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 3466 /*(3440) VCVTPS2UQQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 3467 /*(3441) VCVTPS2UQQ*/ { 31, 142, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 3468 /*(3442) VCVTPS2UQQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 3469 /*(3443) VCVTPS2UQQ*/ { 22, 58, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2329}, 3470 /*(3444) VCVTPS2UQQ*/ { 31, 142, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 3471 /*(3445) FNSAVE*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3472 /*(3446) FNSAVE*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3473 /*(3447) LOOP*/ { 16, 78, 0xe2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3474 /*(3448) VMOVQ*/ { 19, 5, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2454}, 3475 /*(3449) VMOVQ*/ { 20, 2, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 898}, 3476 /*(3450) VMOVQ*/ { 19, 5, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2454}, 3477 /*(3451) VMOVQ*/ { 20, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 898}, 3478 /*(3452) VMOVQ*/ { 53, 5, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 3479 /*(3453) VMOVQ*/ { 2, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 3480 /*(3454) VMOVQ*/ { 53, 5, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3481 /*(3455) VMOVQ*/ { 2, 2, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3482 /*(3456) VMOVQ*/ { 11, 2, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 558}, 3483 /*(3457) VMOVQ*/ { 59, 64, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3484 /*(3458) VMOVQ*/ { 11, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 558}, 3485 /*(3459) VMOVQ*/ { 59, 143, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3486 /*(3460) VMOVQ*/ { 11, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2461}, 3487 /*(3461) VMOVQ*/ { 59, 60, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2473}, 3488 /*(3462) VMOVQ*/ { 11, 2, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 558}, 3489 /*(3463) VMOVQ*/ { 59, 60, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 3490 /*(3464) DIVPS*/ { 3, 0, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3491 /*(3465) DIVPS*/ { 4, 1, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3492 /*(3466) DIVPD*/ { 3, 3, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3493 /*(3467) DIVPD*/ { 4, 4, 0x5e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3494 /*(3468) VMOVD*/ { 53, 5, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3495 /*(3469) VMOVD*/ { 2, 2, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3496 /*(3470) VMOVD*/ { 53, 5, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3497 /*(3471) VMOVD*/ { 2, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3498 /*(3472) VMOVD*/ { 19, 5, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2484}, 3499 /*(3473) VMOVD*/ { 20, 2, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3500 /*(3474) VMOVD*/ { 19, 5, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2484}, 3501 /*(3475) VMOVD*/ { 20, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3502 /*(3476) VMOVD*/ { 76, 2, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1556}, 3503 /*(3477) VMOVD*/ { 11, 2, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2491}, 3504 /*(3478) VMOVD*/ { 78, 63, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2503}, 3505 /*(3479) VMOVD*/ { 59, 63, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2512}, 3506 /*(3480) VMOVD*/ { 76, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1556}, 3507 /*(3481) VMOVD*/ { 11, 2, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2491}, 3508 /*(3482) VMOVD*/ { 78, 144, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2503}, 3509 /*(3483) VMOVD*/ { 59, 144, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2512}, 3510 /*(3484) VPMULHRSW*/ { 7, 5, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3511 /*(3485) VPMULHRSW*/ { 8, 2, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3512 /*(3486) VPMULHRSW*/ { 7, 5, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3513 /*(3487) VPMULHRSW*/ { 8, 2, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3514 /*(3488) VPMULHRSW*/ { 9, 2, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 3515 /*(3489) VPMULHRSW*/ { 10, 6, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 3516 /*(3490) VPMULHRSW*/ { 9, 2, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 3517 /*(3491) VPMULHRSW*/ { 10, 6, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 3518 /*(3492) VPMULHRSW*/ { 9, 2, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 3519 /*(3493) VPMULHRSW*/ { 10, 6, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 3520 /*(3494) XADD*/ { 49, 0, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3521 /*(3495) XADD*/ { 21, 1, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3522 /*(3496) XADD*/ { 49, 0, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3523 /*(3497) XADD*/ { 21, 1, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3524 /*(3498) VFMADDSUBPD*/ { 13, 65, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3525 /*(3499) VFMADDSUBPD*/ { 30, 66, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3526 /*(3500) VFMADDSUBPD*/ { 13, 65, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3527 /*(3501) VFMADDSUBPD*/ { 30, 66, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3528 /*(3502) VFMADDSUBPD*/ { 13, 65, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3529 /*(3503) VFMADDSUBPD*/ { 30, 66, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3530 /*(3504) VFMADDSUBPD*/ { 13, 65, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3531 /*(3505) VFMADDSUBPD*/ { 30, 66, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3532 /*(3506) XSAVEC64*/ { 73, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1515}, 3533 /*(3507) VFMADDSUBPS*/ { 13, 65, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3534 /*(3508) VFMADDSUBPS*/ { 30, 66, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3535 /*(3509) VFMADDSUBPS*/ { 13, 65, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3536 /*(3510) VFMADDSUBPS*/ { 30, 66, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3537 /*(3511) VFMADDSUBPS*/ { 13, 65, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3538 /*(3512) VFMADDSUBPS*/ { 30, 66, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3539 /*(3513) VFMADDSUBPS*/ { 13, 65, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 3540 /*(3514) VFMADDSUBPS*/ { 30, 66, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 3541 /*(3515) LAHF*/ { 16, 36, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3542 /*(3516) KXNORQ*/ { 30, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3543 /*(3517) VPMOVDB*/ { 22, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3544 /*(3518) VPMOVDB*/ { 23, 31, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3545 /*(3519) VPMOVDB*/ { 22, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3546 /*(3520) VPMOVDB*/ { 23, 31, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3547 /*(3521) VPMOVDB*/ { 22, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3548 /*(3522) VPMOVDB*/ { 23, 31, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3549 /*(3523) VRSQRT14SS*/ { 12, 2, 0x4f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3550 /*(3524) VRSQRT14SS*/ { 15, 61, 0x4f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3551 /*(3525) PBLENDW*/ { 3, 130, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 3552 /*(3526) PBLENDW*/ { 4, 131, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 3553 /*(3527) VPMOVDW*/ { 22, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3554 /*(3528) VPMOVDW*/ { 23, 34, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3555 /*(3529) VPMOVDW*/ { 22, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3556 /*(3530) VPMOVDW*/ { 23, 34, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3557 /*(3531) VPMOVDW*/ { 22, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3558 /*(3532) VPMOVDW*/ { 23, 34, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3559 /*(3533) CMPXCHG_LOCK*/ { 49, 0, 0xb0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 3560 /*(3534) CMPXCHG_LOCK*/ { 49, 0, 0xb1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 3561 /*(3535) KXNORD*/ { 30, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1770}, 3562 /*(3536) BLCMSK*/ { 24, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2523}, 3563 /*(3537) BLCMSK*/ { 24, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2523}, 3564 /*(3538) BLCMSK*/ { 26, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2527}, 3565 /*(3539) BLCMSK*/ { 26, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2527}, 3566 /*(3540) MPSADBW*/ { 3, 130, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 3567 /*(3541) MPSADBW*/ { 4, 131, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 3568 /*(3542) VEXTRACTF64X4*/ { 22, 14, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 3569 /*(3543) VEXTRACTF64X4*/ { 23, 30, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 3570 /*(3544) VEXTRACTF64X2*/ { 22, 14, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 3571 /*(3545) VEXTRACTF64X2*/ { 23, 27, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 3572 /*(3546) VEXTRACTF64X2*/ { 22, 14, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 3573 /*(3547) VEXTRACTF64X2*/ { 23, 27, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 3574 /*(3548) VPMOVD2M*/ { 11, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 3575 /*(3549) VPMOVD2M*/ { 11, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 3576 /*(3550) VPMOVD2M*/ { 11, 2, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 3577 /*(3551) VPERM2I128*/ { 13, 35, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3578 /*(3552) VPERM2I128*/ { 30, 14, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3579 /*(3553) FSQRT*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2532}, 3580 /*(3554) FADDP*/ { 1, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 3581 /*(3555) VPMOVUSQW*/ { 22, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3582 /*(3556) VPMOVUSQW*/ { 23, 115, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3583 /*(3557) VPMOVUSQW*/ { 22, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3584 /*(3558) VPMOVUSQW*/ { 23, 115, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3585 /*(3559) VPMOVUSQW*/ { 22, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3586 /*(3560) VPMOVUSQW*/ { 23, 115, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3587 /*(3561) VINSERTI128*/ { 13, 35, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 3588 /*(3562) VINSERTI128*/ { 30, 14, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 3589 /*(3563) VPMOVUSQB*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3590 /*(3564) VPMOVUSQB*/ { 23, 118, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3591 /*(3565) VPMOVUSQB*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3592 /*(3566) VPMOVUSQB*/ { 23, 118, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3593 /*(3567) VPMOVUSQB*/ { 22, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3594 /*(3568) VPMOVUSQB*/ { 23, 118, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3595 /*(3569) FXSAVE64*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2535}, 3596 /*(3570) CMPPS*/ { 3, 72, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3597 /*(3571) CMPPS*/ { 4, 73, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3598 /*(3572) VPMOVUSQD*/ { 22, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3599 /*(3573) VPMOVUSQD*/ { 23, 113, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3600 /*(3574) VPMOVUSQD*/ { 22, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3601 /*(3575) VPMOVUSQD*/ { 23, 113, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3602 /*(3576) VPMOVUSQD*/ { 22, 2, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 3603 /*(3577) VPMOVUSQD*/ { 23, 113, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 3604 /*(3578) VPBLENDMQ*/ { 12, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3605 /*(3579) VPBLENDMQ*/ { 13, 8, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3606 /*(3580) VPBLENDMQ*/ { 12, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3607 /*(3581) VPBLENDMQ*/ { 13, 8, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3608 /*(3582) VPBLENDMQ*/ { 12, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3609 /*(3583) VPBLENDMQ*/ { 13, 8, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3610 /*(3584) VPBLENDMW*/ { 12, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3611 /*(3585) VPBLENDMW*/ { 15, 6, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3612 /*(3586) VPBLENDMW*/ { 12, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3613 /*(3587) VPBLENDMW*/ { 15, 6, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3614 /*(3588) VPBLENDMW*/ { 12, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3615 /*(3589) VPBLENDMW*/ { 15, 6, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3616 /*(3590) ANDNPD*/ { 3, 3, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3617 /*(3591) ANDNPD*/ { 4, 4, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3618 /*(3592) VPBLENDMB*/ { 12, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3619 /*(3593) VPBLENDMB*/ { 15, 29, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3620 /*(3594) VPBLENDMB*/ { 12, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3621 /*(3595) VPBLENDMB*/ { 15, 29, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3622 /*(3596) VPBLENDMB*/ { 12, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3623 /*(3597) VPBLENDMB*/ { 15, 29, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3624 /*(3598) VPBLENDMD*/ { 12, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3625 /*(3599) VPBLENDMD*/ { 13, 7, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3626 /*(3600) VPBLENDMD*/ { 12, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3627 /*(3601) VPBLENDMD*/ { 13, 7, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3628 /*(3602) VPBLENDMD*/ { 12, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3629 /*(3603) VPBLENDMD*/ { 13, 7, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3630 /*(3604) LFS*/ { 16, 0, 0xb4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3631 /*(3605) ANDNPS*/ { 3, 0, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3632 /*(3606) ANDNPS*/ { 4, 1, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3633 /*(3607) KUNPCKDQ*/ { 30, 2, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3634 /*(3608) OUT*/ { 16, 132, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3635 /*(3609) OUT*/ { 16, 132, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3636 /*(3610) OUT*/ { 16, 133, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3637 /*(3611) OUT*/ { 16, 133, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3638 /*(3612) XSAVES64*/ { 73, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2540}, 3639 /*(3613) LTR*/ { 0, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3640 /*(3614) LTR*/ { 1, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 3641 /*(3615) VRSQRT14SD*/ { 12, 2, 0x4f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3642 /*(3616) VRSQRT14SD*/ { 15, 60, 0x4f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3643 /*(3617) VMULPS*/ { 7, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 3644 /*(3618) VMULPS*/ { 8, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3645 /*(3619) VMULPS*/ { 7, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 3646 /*(3620) VMULPS*/ { 8, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3647 /*(3621) VMULPS*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 3648 /*(3622) VMULPS*/ { 12, 58, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1309}, 3649 /*(3623) VMULPS*/ { 13, 7, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 3650 /*(3624) VMULPS*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 3651 /*(3625) VMULPS*/ { 13, 7, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 3652 /*(3626) VMULPS*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 3653 /*(3627) VMULPS*/ { 13, 7, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 3654 /*(3628) VPMACSSDQH*/ { 13, 65, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 3655 /*(3629) VPMACSSDQH*/ { 30, 66, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 3656 /*(3630) VPMACSSDQL*/ { 13, 65, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 3657 /*(3631) VPMACSSDQL*/ { 30, 66, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 3658 /*(3632) LGDT*/ { 0, 86, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 3659 /*(3633) LGDT*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 3660 /*(3634) CMOVNLE*/ { 16, 0, 0x4f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3661 /*(3635) CMOVNLE*/ { 21, 1, 0x4f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3662 /*(3636) VCVTTPD2UDQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 3663 /*(3637) VCVTTPD2UDQ*/ { 22, 71, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2555}, 3664 /*(3638) VCVTTPD2UDQ*/ { 31, 8, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 3665 /*(3639) VCVTTPD2UDQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 3666 /*(3640) VCVTTPD2UDQ*/ { 31, 8, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 3667 /*(3641) VCVTTPD2UDQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 3668 /*(3642) VCVTTPD2UDQ*/ { 31, 8, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 3669 /*(3643) VPERMI2W*/ { 12, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3670 /*(3644) VPERMI2W*/ { 15, 6, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3671 /*(3645) VPERMI2W*/ { 12, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3672 /*(3646) VPERMI2W*/ { 15, 6, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3673 /*(3647) VPERMI2W*/ { 12, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 3674 /*(3648) VPERMI2W*/ { 15, 6, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 3675 /*(3649) PHADDSW*/ { 3, 0, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 3676 /*(3650) PHADDSW*/ { 4, 1, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 3677 /*(3651) PHADDSW*/ { 3, 3, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3678 /*(3652) PHADDSW*/ { 4, 4, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 3679 /*(3653) LODSQ*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3680 /*(3654) UD0*/ { 16, 0, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3681 /*(3655) UD0*/ { 21, 1, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3682 /*(3656) UD1*/ { 16, 0, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3683 /*(3657) UD1*/ { 21, 1, 0xb9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3684 /*(3658) LODSW*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3685 /*(3659) LODSB*/ { 5, 68, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3686 /*(3660) LODSD*/ { 5, 68, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3687 /*(3661) VMAXSD*/ { 7, 5, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 3688 /*(3662) VMAXSD*/ { 8, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 3689 /*(3663) VMAXSD*/ { 12, 2, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 3690 /*(3664) VMAXSD*/ { 12, 59, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 3691 /*(3665) VMAXSD*/ { 15, 60, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 3692 /*(3666) VPHADDUBD*/ { 19, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 3693 /*(3667) VPHADDUBD*/ { 20, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 3694 /*(3668) VPHADDUBQ*/ { 19, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 3695 /*(3669) VPHADDUBQ*/ { 20, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 3696 /*(3670) VPHADDUBW*/ { 19, 5, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 3697 /*(3671) VPHADDUBW*/ { 20, 2, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 3698 /*(3672) VBROADCASTF64X2*/ { 50, 53, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 370}, 3699 /*(3673) VBROADCASTF64X2*/ { 50, 53, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 380}, 3700 /*(3674) VPTEST*/ { 53, 5, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 3701 /*(3675) VPTEST*/ { 2, 2, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 3702 /*(3676) VPTEST*/ { 53, 5, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 3703 /*(3677) VPTEST*/ { 2, 2, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 3704 /*(3678) FISUB*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3705 /*(3679) FISUB*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3706 /*(3680) VADDSUBPS*/ { 7, 5, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 3707 /*(3681) VADDSUBPS*/ { 8, 2, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 3708 /*(3682) VADDSUBPS*/ { 7, 5, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 3709 /*(3683) VADDSUBPS*/ { 8, 2, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 3710 /*(3684) PADDSW*/ { 3, 0, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3711 /*(3685) PADDSW*/ { 4, 1, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3712 /*(3686) PADDSW*/ { 3, 3, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3713 /*(3687) PADDSW*/ { 4, 4, 0xed, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3714 /*(3688) VADDSUBPD*/ { 7, 5, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3715 /*(3689) VADDSUBPD*/ { 8, 2, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3716 /*(3690) VADDSUBPD*/ { 7, 5, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3717 /*(3691) VADDSUBPD*/ { 8, 2, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3718 /*(3692) CVTPD2DQ*/ { 5, 50, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 3719 /*(3693) CVTPD2DQ*/ { 6, 51, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 3720 /*(3694) RSM*/ { 16, 19, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3721 /*(3695) VSQRTSD*/ { 7, 5, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 3722 /*(3696) VSQRTSD*/ { 8, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 3723 /*(3697) VSQRTSD*/ { 12, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 3724 /*(3698) VSQRTSD*/ { 12, 62, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 3725 /*(3699) VSQRTSD*/ { 15, 60, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 3726 /*(3700) VPERMI2B*/ { 12, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3727 /*(3701) VPERMI2B*/ { 15, 29, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3728 /*(3702) VPERMI2B*/ { 12, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3729 /*(3703) VPERMI2B*/ { 15, 29, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3730 /*(3704) VPERMI2B*/ { 12, 2, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 3731 /*(3705) VPERMI2B*/ { 15, 29, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 3732 /*(3706) VSQRTSS*/ { 7, 5, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3733 /*(3707) VSQRTSS*/ { 8, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 3734 /*(3708) VSQRTSS*/ { 12, 2, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 3735 /*(3709) VSQRTSS*/ { 12, 62, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 3736 /*(3710) VSQRTSS*/ { 15, 61, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 3737 /*(3711) VMREAD*/ { 3, 145, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3738 /*(3712) VMREAD*/ { 4, 107, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3739 /*(3713) VMREAD*/ { 3, 145, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3740 /*(3714) VMREAD*/ { 4, 107, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3741 /*(3715) XSAVEOPT64*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2573}, 3742 /*(3716) POPFD*/ { 16, 43, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3743 /*(3717) VAESDECLAST*/ { 8, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3744 /*(3718) VAESDECLAST*/ { 7, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3745 /*(3719) VAESDECLAST*/ { 34, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 3746 /*(3720) VAESDECLAST*/ { 35, 42, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 3747 /*(3721) VAESDECLAST*/ { 34, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 3748 /*(3722) VAESDECLAST*/ { 35, 42, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 3749 /*(3723) VAESDECLAST*/ { 34, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 3750 /*(3724) VAESDECLAST*/ { 35, 42, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 3751 /*(3725) VAESDECLAST*/ { 8, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3752 /*(3726) VAESDECLAST*/ { 7, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3753 /*(3727) MOVNTDQA*/ { 3, 16, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3754 /*(3728) POPFQ*/ { 16, 43, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3755 /*(3729) SYSCALL*/ { 16, 146, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 3756 /*(3730) VRSQRTSS*/ { 7, 5, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3757 /*(3731) VRSQRTSS*/ { 8, 2, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 3758 /*(3732) VPPERM*/ { 13, 65, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 3759 /*(3733) VPPERM*/ { 30, 66, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 3760 /*(3734) VPPERM*/ { 13, 65, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2578}, 3761 /*(3735) VPPERM*/ { 30, 66, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2583}, 3762 /*(3736) MWAITX*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2589}, 3763 /*(3737) VMOVDQA*/ { 53, 5, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3764 /*(3738) VMOVDQA*/ { 2, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3765 /*(3739) VMOVDQA*/ { 53, 5, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3766 /*(3740) VMOVDQA*/ { 2, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3767 /*(3741) VMOVDQA*/ { 53, 5, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3768 /*(3742) VMOVDQA*/ { 2, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3769 /*(3743) VMOVDQA*/ { 53, 5, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 3770 /*(3744) VMOVDQA*/ { 2, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3771 /*(3745) VPOPCNTW*/ { 22, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3772 /*(3746) VPOPCNTW*/ { 81, 6, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 3773 /*(3747) VPOPCNTW*/ { 22, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3774 /*(3748) VPOPCNTW*/ { 81, 6, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 3775 /*(3749) VPOPCNTW*/ { 22, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3776 /*(3750) VPOPCNTW*/ { 81, 6, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 3777 /*(3751) VPOPCNTQ*/ { 22, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3778 /*(3752) VPOPCNTQ*/ { 31, 8, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 3779 /*(3753) VPOPCNTQ*/ { 22, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3780 /*(3754) VPOPCNTQ*/ { 31, 8, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 3781 /*(3755) VPOPCNTQ*/ { 22, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3782 /*(3756) VPOPCNTQ*/ { 31, 8, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 3783 /*(3757) VMOVDQU*/ { 53, 5, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 3784 /*(3758) VMOVDQU*/ { 2, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 3785 /*(3759) VMOVDQU*/ { 53, 5, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 3786 /*(3760) VMOVDQU*/ { 2, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 3787 /*(3761) VMOVDQU*/ { 53, 5, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 3788 /*(3762) VMOVDQU*/ { 2, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 3789 /*(3763) VMOVDQU*/ { 53, 5, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 3790 /*(3764) VMOVDQU*/ { 2, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 3791 /*(3765) VPOPCNTD*/ { 22, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3792 /*(3766) VPOPCNTD*/ { 31, 7, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 3793 /*(3767) VPOPCNTD*/ { 22, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3794 /*(3768) VPOPCNTD*/ { 31, 7, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 3795 /*(3769) VPOPCNTD*/ { 22, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3796 /*(3770) VPOPCNTD*/ { 31, 7, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 3797 /*(3771) BLSFILL*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2594}, 3798 /*(3772) BLSFILL*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2594}, 3799 /*(3773) BLSFILL*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2598}, 3800 /*(3774) BLSFILL*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2598}, 3801 /*(3775) VPOPCNTB*/ { 22, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3802 /*(3776) VPOPCNTB*/ { 81, 29, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 3803 /*(3777) VPOPCNTB*/ { 22, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3804 /*(3778) VPOPCNTB*/ { 81, 29, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 3805 /*(3779) VPOPCNTB*/ { 22, 2, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3806 /*(3780) VPOPCNTB*/ { 81, 29, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 3807 /*(3781) PCMPEQQ*/ { 3, 16, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 3808 /*(3782) PCMPEQQ*/ { 4, 17, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 3809 /*(3783) VCMPSS*/ { 7, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 3810 /*(3784) VCMPSS*/ { 8, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 3811 /*(3785) VCMPSS*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2603}, 3812 /*(3786) VCMPSS*/ { 47, 81, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 3813 /*(3787) VCMPSS*/ { 58, 94, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 3814 /*(3788) PCMPEQW*/ { 3, 0, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3815 /*(3789) PCMPEQW*/ { 4, 1, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3816 /*(3790) PCMPEQW*/ { 3, 3, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3817 /*(3791) PCMPEQW*/ { 4, 4, 0x75, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3818 /*(3792) VLDMXCSR*/ { 90, 5, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2611}, 3819 /*(3793) RCPSS*/ { 5, 50, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 3820 /*(3794) RCPSS*/ { 6, 51, 0x53, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 3821 /*(3795) PCMPEQB*/ { 3, 0, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3822 /*(3796) PCMPEQB*/ { 4, 1, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3823 /*(3797) PCMPEQB*/ { 3, 3, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3824 /*(3798) PCMPEQB*/ { 4, 4, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3825 /*(3799) VCMPSD*/ { 7, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 3826 /*(3800) VCMPSD*/ { 8, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 3827 /*(3801) VCMPSD*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2617}, 3828 /*(3802) VCMPSD*/ { 47, 81, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 3829 /*(3803) VCMPSD*/ { 58, 82, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 3830 /*(3804) KORB*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 3831 /*(3805) PUNPCKLQDQ*/ { 3, 3, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3832 /*(3806) PUNPCKLQDQ*/ { 4, 4, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3833 /*(3807) VPHADDW*/ { 7, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3834 /*(3808) VPHADDW*/ { 8, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3835 /*(3809) VPHADDW*/ { 7, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3836 /*(3810) VPHADDW*/ { 8, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3837 /*(3811) HADDPD*/ { 3, 3, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3838 /*(3812) HADDPD*/ { 4, 4, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3839 /*(3813) KORD*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1770}, 3840 /*(3814) PACKSSDW*/ { 3, 0, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3841 /*(3815) PACKSSDW*/ { 4, 1, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3842 /*(3816) PACKSSDW*/ { 3, 3, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3843 /*(3817) PACKSSDW*/ { 4, 4, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3844 /*(3818) VPHADDD*/ { 7, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3845 /*(3819) VPHADDD*/ { 8, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3846 /*(3820) VPHADDD*/ { 7, 5, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 3847 /*(3821) VPHADDD*/ { 8, 2, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 3848 /*(3822) HADDPS*/ { 5, 50, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 3849 /*(3823) HADDPS*/ { 6, 51, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 3850 /*(3824) KXNORB*/ { 30, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 3851 /*(3825) KORW*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 3852 /*(3826) KORQ*/ { 30, 2, 0x45, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3853 /*(3827) KMOVB*/ { 20, 2, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3854 /*(3828) KMOVB*/ { 19, 5, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2484}, 3855 /*(3829) KMOVB*/ { 19, 5, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2484}, 3856 /*(3830) KMOVB*/ { 20, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3857 /*(3831) KMOVB*/ { 20, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 3858 /*(3832) LOOPNE*/ { 5, 78, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3859 /*(3833) LOOPNE*/ { 5, 78, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3860 /*(3834) LOOPNE*/ { 16, 78, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 3861 /*(3835) LOOPNE*/ { 5, 78, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 3862 /*(3836) KMOVD*/ { 20, 2, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 898}, 3863 /*(3837) KMOVD*/ { 19, 5, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2454}, 3864 /*(3838) KMOVD*/ { 19, 5, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2454}, 3865 /*(3839) KMOVD*/ { 20, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1387}, 3866 /*(3840) KMOVD*/ { 2, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 3867 /*(3841) KMOVD*/ { 20, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1387}, 3868 /*(3842) KMOVD*/ { 2, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 3869 /*(3843) FPTAN*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 508}, 3870 /*(3844) VEXPANDPD*/ { 81, 147, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 3871 /*(3845) VEXPANDPD*/ { 22, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3872 /*(3846) VEXPANDPD*/ { 81, 147, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 3873 /*(3847) VEXPANDPD*/ { 22, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3874 /*(3848) VEXPANDPD*/ { 81, 147, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 3875 /*(3849) VEXPANDPD*/ { 22, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3876 /*(3850) FIDIV*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3877 /*(3851) FIDIV*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3878 /*(3852) VMPTRLD*/ { 43, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 359}, 3879 /*(3853) KMOVW*/ { 20, 2, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1301}, 3880 /*(3854) KMOVW*/ { 19, 5, 0x90, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2625}, 3881 /*(3855) KMOVW*/ { 19, 5, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2625}, 3882 /*(3856) KMOVW*/ { 20, 2, 0x92, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1301}, 3883 /*(3857) KMOVW*/ { 20, 2, 0x93, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1301}, 3884 /*(3858) VEXPANDPS*/ { 81, 148, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 3885 /*(3859) VEXPANDPS*/ { 22, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3886 /*(3860) VEXPANDPS*/ { 81, 148, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 3887 /*(3861) VEXPANDPS*/ { 22, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3888 /*(3862) VEXPANDPS*/ { 81, 148, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 3889 /*(3863) VEXPANDPS*/ { 22, 2, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3890 /*(3864) SHR*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3891 /*(3865) SHR*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 3892 /*(3866) SHR*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3893 /*(3867) SHR*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 3894 /*(3868) SHR*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3895 /*(3869) SHR*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 3896 /*(3870) SHR*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3897 /*(3871) SHR*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 3898 /*(3872) SHR*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3899 /*(3873) SHR*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 3900 /*(3874) SHR*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 3901 /*(3875) SHR*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 3902 /*(3876) VDPPD*/ { 7, 35, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 3903 /*(3877) VDPPD*/ { 8, 14, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 3904 /*(3878) VSCATTERPF0QPD*/ { 69, 39, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2632}, 3905 /*(3879) CMPPD*/ { 3, 105, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3906 /*(3880) CMPPD*/ { 4, 54, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3907 /*(3881) MOVLHPS*/ { 4, 1, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3908 /*(3882) VSCATTERPF0QPS*/ { 69, 44, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2643}, 3909 /*(3883) VDPPS*/ { 7, 35, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 3910 /*(3884) VDPPS*/ { 8, 14, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 3911 /*(3885) VDPPS*/ { 7, 35, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 3912 /*(3886) VDPPS*/ { 8, 14, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 3913 /*(3887) VPUNPCKHDQ*/ { 7, 5, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3914 /*(3888) VPUNPCKHDQ*/ { 8, 2, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3915 /*(3889) VPUNPCKHDQ*/ { 7, 5, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3916 /*(3890) VPUNPCKHDQ*/ { 8, 2, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3917 /*(3891) VPUNPCKHDQ*/ { 12, 2, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3918 /*(3892) VPUNPCKHDQ*/ { 13, 7, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3919 /*(3893) VPUNPCKHDQ*/ { 12, 2, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3920 /*(3894) VPUNPCKHDQ*/ { 13, 7, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3921 /*(3895) VPUNPCKHDQ*/ { 12, 2, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 3922 /*(3896) VPUNPCKHDQ*/ { 13, 7, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 3923 /*(3897) SHL*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3924 /*(3898) SHL*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 3925 /*(3899) SHL*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3926 /*(3900) SHL*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3927 /*(3901) SHL*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3928 /*(3902) SHL*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 3929 /*(3903) SHL*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3930 /*(3904) SHL*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3931 /*(3905) SHL*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3932 /*(3906) SHL*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 3933 /*(3907) SHL*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3934 /*(3908) SHL*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3935 /*(3909) SHL*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3936 /*(3910) SHL*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3937 /*(3911) SHL*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3938 /*(3912) SHL*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 3939 /*(3913) SHL*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3940 /*(3914) SHL*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 3941 /*(3915) SHL*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3942 /*(3916) SHL*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3943 /*(3917) SHL*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 3944 /*(3918) SHL*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 3945 /*(3919) SHL*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 3946 /*(3920) SHL*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 3947 /*(3921) PFNACC*/ { 16, 79, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 3948 /*(3922) PFNACC*/ { 21, 80, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 3949 /*(3923) VCVTQQ2PD*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 3950 /*(3924) VCVTQQ2PD*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2664}, 3951 /*(3925) VCVTQQ2PD*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 3952 /*(3926) VCVTQQ2PD*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2664}, 3953 /*(3927) VCVTQQ2PD*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 3954 /*(3928) VCVTQQ2PD*/ { 22, 58, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2672}, 3955 /*(3929) VCVTQQ2PD*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2664}, 3956 /*(3930) VGATHERPF0DPD*/ { 69, 41, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 937}, 3957 /*(3931) VCVTQQ2PS*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 3958 /*(3932) VCVTQQ2PS*/ { 31, 8, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 3959 /*(3933) VCVTQQ2PS*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 3960 /*(3934) VCVTQQ2PS*/ { 31, 8, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 3961 /*(3935) VCVTQQ2PS*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 3962 /*(3936) VCVTQQ2PS*/ { 22, 58, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2555}, 3963 /*(3937) VCVTQQ2PS*/ { 31, 8, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 3964 /*(3938) VMULPD*/ { 7, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3965 /*(3939) VMULPD*/ { 8, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3966 /*(3940) VMULPD*/ { 7, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 3967 /*(3941) VMULPD*/ { 8, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 3968 /*(3942) VMULPD*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3969 /*(3943) VMULPD*/ { 12, 58, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1294}, 3970 /*(3944) VMULPD*/ { 13, 8, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3971 /*(3945) VMULPD*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3972 /*(3946) VMULPD*/ { 13, 8, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3973 /*(3947) VMULPD*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 3974 /*(3948) VMULPD*/ { 13, 8, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 3975 /*(3949) VGATHERPF0DPS*/ { 69, 44, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 948}, 3976 /*(3950) VPCOMPRESSD*/ { 23, 148, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 3977 /*(3951) VPCOMPRESSD*/ { 22, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3978 /*(3952) VPCOMPRESSD*/ { 23, 148, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 3979 /*(3953) VPCOMPRESSD*/ { 22, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3980 /*(3954) VPCOMPRESSD*/ { 23, 148, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 3981 /*(3955) VPCOMPRESSD*/ { 22, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3982 /*(3956) VPCOMPRESSB*/ { 23, 149, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 3983 /*(3957) VPCOMPRESSB*/ { 22, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3984 /*(3958) VPCOMPRESSB*/ { 23, 149, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 3985 /*(3959) VPCOMPRESSB*/ { 22, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3986 /*(3960) VPCOMPRESSB*/ { 23, 149, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 3987 /*(3961) VPCOMPRESSB*/ { 22, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 3988 /*(3962) PAND*/ { 3, 0, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 3989 /*(3963) PAND*/ { 4, 1, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 3990 /*(3964) PAND*/ { 3, 3, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 3991 /*(3965) PAND*/ { 4, 4, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 3992 /*(3966) VPCOMPRESSW*/ { 23, 150, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 3993 /*(3967) VPCOMPRESSW*/ { 22, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3994 /*(3968) VPCOMPRESSW*/ { 23, 150, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 3995 /*(3969) VPCOMPRESSW*/ { 22, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3996 /*(3970) VPCOMPRESSW*/ { 23, 150, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 3997 /*(3971) VPCOMPRESSW*/ { 22, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 3998 /*(3972) VPCOMPRESSQ*/ { 23, 147, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 3999 /*(3973) VPCOMPRESSQ*/ { 22, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4000 /*(3974) VPCOMPRESSQ*/ { 23, 147, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 4001 /*(3975) VPCOMPRESSQ*/ { 22, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4002 /*(3976) VPCOMPRESSQ*/ { 23, 147, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 4003 /*(3977) VPCOMPRESSQ*/ { 22, 2, 0x8b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4004 /*(3978) PMAXSW*/ { 3, 0, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4005 /*(3979) PMAXSW*/ { 4, 1, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4006 /*(3980) PMAXSW*/ { 3, 3, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4007 /*(3981) PMAXSW*/ { 4, 4, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4008 /*(3982) PMAXSB*/ { 3, 16, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4009 /*(3983) PMAXSB*/ { 4, 17, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4010 /*(3984) PMAXSD*/ { 3, 16, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4011 /*(3985) PMAXSD*/ { 4, 17, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4012 /*(3986) PUSH*/ { 0, 125, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 4013 /*(3987) PUSH*/ { 1, 126, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 4014 /*(3988) PUSH*/ { 16, 36, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4015 /*(3989) PUSH*/ { 16, 36, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4016 /*(3990) PUSH*/ { 16, 36, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4017 /*(3991) PUSH*/ { 16, 36, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4018 /*(3992) PUSH*/ { 16, 127, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4019 /*(3993) PUSH*/ { 16, 151, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4020 /*(3994) PUSH*/ { 16, 152, 0x6a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4021 /*(3995) PUSH*/ { 16, 128, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4022 /*(3996) PUSH*/ { 16, 128, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4023 /*(3997) PFRSQIT1*/ { 16, 79, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 4024 /*(3998) PFRSQIT1*/ { 21, 80, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 4025 /*(3999) PADDD*/ { 3, 0, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4026 /*(4000) PADDD*/ { 4, 1, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4027 /*(4001) PADDD*/ { 3, 3, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4028 /*(4002) PADDD*/ { 4, 4, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4029 /*(4003) PADDB*/ { 3, 0, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4030 /*(4004) PADDB*/ { 4, 1, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4031 /*(4005) PADDB*/ { 3, 3, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4032 /*(4006) PADDB*/ { 4, 4, 0xfc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4033 /*(4007) BLENDPS*/ { 3, 130, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 4034 /*(4008) BLENDPS*/ { 4, 131, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 4035 /*(4009) PSRLDQ*/ { 52, 54, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 18}, 4036 /*(4010) VPACKUSWB*/ { 7, 5, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4037 /*(4011) VPACKUSWB*/ { 8, 2, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4038 /*(4012) VPACKUSWB*/ { 7, 5, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4039 /*(4013) VPACKUSWB*/ { 8, 2, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4040 /*(4014) VPACKUSWB*/ { 9, 2, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4041 /*(4015) VPACKUSWB*/ { 10, 6, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4042 /*(4016) VPACKUSWB*/ { 9, 2, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4043 /*(4017) VPACKUSWB*/ { 10, 6, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4044 /*(4018) VPACKUSWB*/ { 9, 2, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4045 /*(4019) VPACKUSWB*/ { 10, 6, 0x67, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4046 /*(4020) PADDW*/ { 3, 0, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4047 /*(4021) PADDW*/ { 4, 1, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4048 /*(4022) PADDW*/ { 3, 3, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4049 /*(4023) PADDW*/ { 4, 4, 0xfd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4050 /*(4024) BLENDPD*/ { 3, 130, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 4051 /*(4025) BLENDPD*/ { 4, 131, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 4052 /*(4026) PADDQ*/ { 3, 0, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4053 /*(4027) PADDQ*/ { 4, 1, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4054 /*(4028) PADDQ*/ { 3, 3, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4055 /*(4029) PADDQ*/ { 4, 4, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4056 /*(4030) SUB_LOCK*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2068}, 4057 /*(4031) SUB_LOCK*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2068}, 4058 /*(4032) SUB_LOCK*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2068}, 4059 /*(4033) SUB_LOCK*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2068}, 4060 /*(4034) SUB_LOCK*/ { 49, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4061 /*(4035) SUB_LOCK*/ { 49, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4062 /*(4036) MOVLPD*/ { 3, 3, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4063 /*(4037) MOVLPD*/ { 3, 3, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4064 /*(4038) VPADDUSW*/ { 7, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4065 /*(4039) VPADDUSW*/ { 8, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4066 /*(4040) VPADDUSW*/ { 7, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4067 /*(4041) VPADDUSW*/ { 8, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4068 /*(4042) VPADDUSW*/ { 9, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4069 /*(4043) VPADDUSW*/ { 10, 6, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4070 /*(4044) VPADDUSW*/ { 9, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4071 /*(4045) VPADDUSW*/ { 10, 6, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4072 /*(4046) VPADDUSW*/ { 9, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4073 /*(4047) VPADDUSW*/ { 10, 6, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4074 /*(4048) MINSS*/ { 5, 50, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 4075 /*(4049) MINSS*/ { 6, 51, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 4076 /*(4050) MOVLPS*/ { 3, 0, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4077 /*(4051) MOVLPS*/ { 3, 0, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4078 /*(4052) MINSD*/ { 5, 50, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 4079 /*(4053) MINSD*/ { 6, 51, 0x5d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 4080 /*(4054) KORTESTQ*/ { 20, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1704}, 4081 /*(4055) VFMSUBSD*/ { 13, 65, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4082 /*(4056) VFMSUBSD*/ { 30, 66, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4083 /*(4057) VFMSUBSD*/ { 13, 65, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 4084 /*(4058) VFMSUBSD*/ { 30, 66, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 4085 /*(4059) FICOM*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4086 /*(4060) FICOM*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4087 /*(4061) VPMOVUSDB*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 4088 /*(4062) VPMOVUSDB*/ { 23, 31, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 4089 /*(4063) VPMOVUSDB*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 4090 /*(4064) VPMOVUSDB*/ { 23, 31, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 4091 /*(4065) VPMOVUSDB*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 4092 /*(4066) VPMOVUSDB*/ { 23, 31, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 4093 /*(4067) VPMULHW*/ { 7, 5, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4094 /*(4068) VPMULHW*/ { 8, 2, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4095 /*(4069) VPMULHW*/ { 7, 5, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4096 /*(4070) VPMULHW*/ { 8, 2, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4097 /*(4071) VPMULHW*/ { 9, 2, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4098 /*(4072) VPMULHW*/ { 10, 6, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4099 /*(4073) VPMULHW*/ { 9, 2, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4100 /*(4074) VPMULHW*/ { 10, 6, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4101 /*(4075) VPMULHW*/ { 9, 2, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4102 /*(4076) VPMULHW*/ { 10, 6, 0xe5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4103 /*(4077) PREFETCHW*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 4104 /*(4078) PREFETCHW*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 4105 /*(4079) REP_INSW*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4106 /*(4080) REP_INSW*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4107 /*(4081) MOVNTDQ*/ { 3, 3, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4108 /*(4082) LLWPCB*/ { 18, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2682}, 4109 /*(4083) REP_INSB*/ { 5, 36, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4110 /*(4084) REP_INSB*/ { 5, 36, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4111 /*(4085) REP_INSD*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4112 /*(4086) REP_INSD*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4113 /*(4087) REP_INSD*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4114 /*(4088) REP_INSD*/ { 5, 36, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4115 /*(4089) REP_STOSD*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4116 /*(4090) REP_STOSD*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4117 /*(4091) VERR*/ { 0, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 61}, 4118 /*(4092) VERR*/ { 1, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 60}, 4119 /*(4093) REP_STOSB*/ { 5, 36, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4120 /*(4094) REP_STOSB*/ { 5, 36, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4121 /*(4095) VHSUBPD*/ { 7, 5, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4122 /*(4096) VHSUBPD*/ { 8, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4123 /*(4097) VHSUBPD*/ { 7, 5, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4124 /*(4098) VHSUBPD*/ { 8, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4125 /*(4099) VPSRAVQ*/ { 12, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4126 /*(4100) VPSRAVQ*/ { 13, 8, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4127 /*(4101) VPSRAVQ*/ { 12, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4128 /*(4102) VPSRAVQ*/ { 13, 8, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4129 /*(4103) VPSRAVQ*/ { 12, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4130 /*(4104) VPSRAVQ*/ { 13, 8, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4131 /*(4105) VPSRAVW*/ { 12, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4132 /*(4106) VPSRAVW*/ { 15, 6, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4133 /*(4107) VPSRAVW*/ { 12, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4134 /*(4108) VPSRAVW*/ { 15, 6, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4135 /*(4109) VPSRAVW*/ { 12, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4136 /*(4110) VPSRAVW*/ { 15, 6, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4137 /*(4111) VHSUBPS*/ { 7, 5, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 4138 /*(4112) VHSUBPS*/ { 8, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 4139 /*(4113) VHSUBPS*/ { 7, 5, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 4140 /*(4114) VHSUBPS*/ { 8, 2, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 4141 /*(4115) VFMADD132SS*/ { 13, 5, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4142 /*(4116) VFMADD132SS*/ { 30, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4143 /*(4117) VFMADD132SS*/ { 12, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4144 /*(4118) VFMADD132SS*/ { 12, 62, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 4145 /*(4119) VFMADD132SS*/ { 15, 61, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 4146 /*(4120) REP_STOSW*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4147 /*(4121) REP_STOSW*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4148 /*(4122) REP_STOSQ*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4149 /*(4123) REP_STOSQ*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4150 /*(4124) VPSRAVD*/ { 13, 5, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4151 /*(4125) VPSRAVD*/ { 30, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4152 /*(4126) VPSRAVD*/ { 13, 5, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4153 /*(4127) VPSRAVD*/ { 30, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4154 /*(4128) VPSRAVD*/ { 12, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4155 /*(4129) VPSRAVD*/ { 13, 7, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4156 /*(4130) VPSRAVD*/ { 12, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4157 /*(4131) VPSRAVD*/ { 13, 7, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4158 /*(4132) VPSRAVD*/ { 12, 2, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4159 /*(4133) VPSRAVD*/ { 13, 7, 0x46, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4160 /*(4134) PSWAPD*/ { 16, 79, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 4161 /*(4135) PSWAPD*/ { 21, 80, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 4162 /*(4136) KNOTQ*/ { 20, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1704}, 4163 /*(4137) KNOTW*/ { 20, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1301}, 4164 /*(4138) KNOTB*/ { 20, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 4165 /*(4139) KNOTD*/ { 20, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 898}, 4166 /*(4140) TEST*/ { 0, 48, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4167 /*(4141) TEST*/ { 0, 48, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4168 /*(4142) TEST*/ { 1, 93, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4169 /*(4143) TEST*/ { 1, 93, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4170 /*(4144) TEST*/ { 0, 49, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4171 /*(4145) TEST*/ { 0, 49, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4172 /*(4146) TEST*/ { 1, 89, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4173 /*(4147) TEST*/ { 1, 89, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4174 /*(4148) TEST*/ { 16, 5, 0x84, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4175 /*(4149) TEST*/ { 21, 2, 0x84, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4176 /*(4150) TEST*/ { 16, 5, 0x85, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4177 /*(4151) TEST*/ { 21, 2, 0x85, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4178 /*(4152) TEST*/ { 16, 103, 0xa8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4179 /*(4153) TEST*/ { 16, 104, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4180 /*(4154) LGS*/ { 16, 0, 0xb5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4181 /*(4155) SETNZ*/ { 16, 0, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4182 /*(4156) SETNZ*/ { 21, 1, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 4183 /*(4157) JZ*/ { 16, 10, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4184 /*(4158) JZ*/ { 16, 11, 0x74, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4185 /*(4159) JZ*/ { 16, 12, 0x84, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4186 /*(4160) JZ*/ { 16, 13, 0x84, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4187 /*(4161) JP*/ { 16, 10, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4188 /*(4162) JP*/ { 16, 11, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4189 /*(4163) JP*/ { 16, 12, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4190 /*(4164) JP*/ { 16, 13, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4191 /*(4165) JS*/ { 16, 10, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4192 /*(4166) JS*/ { 16, 11, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4193 /*(4167) JS*/ { 16, 12, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4194 /*(4168) JS*/ { 16, 13, 0x88, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4195 /*(4169) JL*/ { 16, 10, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4196 /*(4170) JL*/ { 16, 11, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4197 /*(4171) JL*/ { 16, 12, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4198 /*(4172) JL*/ { 16, 13, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4199 /*(4173) VMOVNTDQ*/ { 53, 5, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 4200 /*(4174) VMOVNTDQ*/ { 53, 5, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 4201 /*(4175) VMOVNTDQ*/ { 59, 110, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2512}, 4202 /*(4176) VMOVNTDQ*/ { 59, 110, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2512}, 4203 /*(4177) VMOVNTDQ*/ { 59, 110, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2512}, 4204 /*(4178) JB*/ { 16, 10, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4205 /*(4179) JB*/ { 16, 11, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4206 /*(4180) JB*/ { 16, 12, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4207 /*(4181) JB*/ { 16, 13, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4208 /*(4182) VMWRITE*/ { 3, 145, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4209 /*(4183) VMWRITE*/ { 4, 107, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4210 /*(4184) VMWRITE*/ { 3, 145, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4211 /*(4185) VMWRITE*/ { 4, 107, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4212 /*(4186) VCMPPS*/ { 7, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 4213 /*(4187) VCMPPS*/ { 8, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 4214 /*(4188) VCMPPS*/ { 7, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 4215 /*(4189) VCMPPS*/ { 8, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 4216 /*(4190) VCMPPS*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2691}, 4217 /*(4191) VCMPPS*/ { 47, 116, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2699}, 4218 /*(4192) VCMPPS*/ { 48, 18, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 4219 /*(4193) VCMPPS*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2691}, 4220 /*(4194) VCMPPS*/ { 48, 18, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 4221 /*(4195) VCMPPS*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2691}, 4222 /*(4196) VCMPPS*/ { 48, 18, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 4223 /*(4197) VCMPPD*/ { 7, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4224 /*(4198) VCMPPD*/ { 8, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4225 /*(4199) VCMPPD*/ { 7, 35, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4226 /*(4200) VCMPPD*/ { 8, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4227 /*(4201) VCMPPD*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2707}, 4228 /*(4202) VCMPPD*/ { 47, 116, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2715}, 4229 /*(4203) VCMPPD*/ { 48, 15, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 753}, 4230 /*(4204) VCMPPD*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2707}, 4231 /*(4205) VCMPPD*/ { 48, 15, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 753}, 4232 /*(4206) VCMPPD*/ { 47, 14, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2707}, 4233 /*(4207) VCMPPD*/ { 48, 15, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 753}, 4234 /*(4208) VFIXUPIMMPS*/ { 12, 14, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 4235 /*(4209) VFIXUPIMMPS*/ { 12, 116, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 4236 /*(4210) VFIXUPIMMPS*/ { 13, 18, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 4237 /*(4211) VFIXUPIMMPS*/ { 12, 14, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 4238 /*(4212) VFIXUPIMMPS*/ { 13, 18, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 4239 /*(4213) VFIXUPIMMPS*/ { 12, 14, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 4240 /*(4214) VFIXUPIMMPS*/ { 13, 18, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 4241 /*(4215) RDMSR*/ { 16, 19, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4242 /*(4216) VBROADCASTF32X8*/ { 50, 84, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1128}, 4243 /*(4217) JECXZ*/ { 16, 99, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4244 /*(4218) JECXZ*/ { 16, 134, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4245 /*(4219) VFIXUPIMMPD*/ { 12, 14, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4246 /*(4220) VFIXUPIMMPD*/ { 12, 116, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 4247 /*(4221) VFIXUPIMMPD*/ { 13, 15, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 4248 /*(4222) VFIXUPIMMPD*/ { 12, 14, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4249 /*(4223) VFIXUPIMMPD*/ { 13, 15, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 4250 /*(4224) VFIXUPIMMPD*/ { 12, 14, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4251 /*(4225) VFIXUPIMMPD*/ { 13, 15, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 4252 /*(4226) VBROADCASTF32X2*/ { 72, 2, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2723}, 4253 /*(4227) VBROADCASTF32X2*/ { 50, 129, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2734}, 4254 /*(4228) VBROADCASTF32X2*/ { 72, 2, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2744}, 4255 /*(4229) VBROADCASTF32X2*/ { 50, 129, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2755}, 4256 /*(4230) VBROADCASTF32X4*/ { 50, 85, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1138}, 4257 /*(4231) VBROADCASTF32X4*/ { 50, 85, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1148}, 4258 /*(4232) XSAVEC*/ { 73, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2247}, 4259 /*(4233) VPCMPW*/ { 47, 14, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4260 /*(4234) VPCMPW*/ { 58, 57, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4261 /*(4235) VPCMPW*/ { 47, 14, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4262 /*(4236) VPCMPW*/ { 58, 57, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4263 /*(4237) VPCMPW*/ { 47, 14, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4264 /*(4238) VPCMPW*/ { 58, 57, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4265 /*(4239) VPCMPQ*/ { 47, 14, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4266 /*(4240) VPCMPQ*/ { 48, 15, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 89}, 4267 /*(4241) VPCMPQ*/ { 47, 14, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4268 /*(4242) VPCMPQ*/ { 48, 15, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 89}, 4269 /*(4243) VPCMPQ*/ { 47, 14, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4270 /*(4244) VPCMPQ*/ { 48, 15, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 89}, 4271 /*(4245) VSCATTERQPS*/ { 33, 44, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 4272 /*(4246) VSCATTERQPS*/ { 33, 45, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 4273 /*(4247) VSCATTERQPS*/ { 33, 46, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 4274 /*(4248) VBLENDVPD*/ { 13, 65, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4275 /*(4249) VBLENDVPD*/ { 30, 66, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4276 /*(4250) VBLENDVPD*/ { 13, 65, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4277 /*(4251) VBLENDVPD*/ { 30, 66, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4278 /*(4252) VFMSUB231SD*/ { 13, 5, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 4279 /*(4253) VFMSUB231SD*/ { 30, 2, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 4280 /*(4254) VFMSUB231SD*/ { 12, 2, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4281 /*(4255) VFMSUB231SD*/ { 12, 62, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 4282 /*(4256) VFMSUB231SD*/ { 15, 60, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4283 /*(4257) VPCMPD*/ { 47, 14, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 4284 /*(4258) VPCMPD*/ { 48, 18, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 348}, 4285 /*(4259) VPCMPD*/ { 47, 14, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 4286 /*(4260) VPCMPD*/ { 48, 18, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 348}, 4287 /*(4261) VPCMPD*/ { 47, 14, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 4288 /*(4262) VPCMPD*/ { 48, 18, 0x1f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 348}, 4289 /*(4263) VPCMPB*/ { 47, 14, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 4290 /*(4264) VPCMPB*/ { 58, 87, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1166}, 4291 /*(4265) VPCMPB*/ { 47, 14, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 4292 /*(4266) VPCMPB*/ { 58, 87, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1166}, 4293 /*(4267) VPCMPB*/ { 47, 14, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1158}, 4294 /*(4268) VPCMPB*/ { 58, 87, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1166}, 4295 /*(4269) PMULDQ*/ { 3, 16, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4296 /*(4270) PMULDQ*/ { 4, 17, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4297 /*(4271) VFMSUB231SS*/ { 13, 5, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4298 /*(4272) VFMSUB231SS*/ { 30, 2, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4299 /*(4273) VFMSUB231SS*/ { 12, 2, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4300 /*(4274) VFMSUB231SS*/ { 12, 62, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 4301 /*(4275) VFMSUB231SS*/ { 15, 61, 0xbb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 4302 /*(4276) VBLENDVPS*/ { 13, 65, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4303 /*(4277) VBLENDVPS*/ { 30, 66, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4304 /*(4278) VBLENDVPS*/ { 13, 65, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4305 /*(4279) VBLENDVPS*/ { 30, 66, 0x4a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4306 /*(4280) VPGATHERQQ*/ { 32, 37, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 4307 /*(4281) VPGATHERQQ*/ { 32, 38, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 222}, 4308 /*(4282) VPGATHERQQ*/ { 33, 39, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 4309 /*(4283) VPGATHERQQ*/ { 33, 40, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 4310 /*(4284) VPGATHERQQ*/ { 33, 41, 0x91, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 4311 /*(4285) KANDD*/ { 30, 2, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1770}, 4312 /*(4286) VGETEXPPS*/ { 22, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4313 /*(4287) VGETEXPPS*/ { 22, 71, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 846}, 4314 /*(4288) VGETEXPPS*/ { 31, 7, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 4315 /*(4289) VGETEXPPS*/ { 22, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4316 /*(4290) VGETEXPPS*/ { 31, 7, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 4317 /*(4291) VGETEXPPS*/ { 22, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4318 /*(4292) VGETEXPPS*/ { 31, 7, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 4319 /*(4293) KTESTD*/ { 20, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 898}, 4320 /*(4294) KTESTB*/ { 20, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 4321 /*(4295) MONITORX*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2765}, 4322 /*(4296) MONITORX*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2765}, 4323 /*(4297) MONITORX*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2765}, 4324 /*(4298) MONITORX*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2765}, 4325 /*(4299) KTESTW*/ { 20, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1301}, 4326 /*(4300) VPMADCSSWD*/ { 13, 65, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 4327 /*(4301) VPMADCSSWD*/ { 30, 66, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 4328 /*(4302) VGETEXPPD*/ { 22, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4329 /*(4303) VGETEXPPD*/ { 22, 71, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 802}, 4330 /*(4304) VGETEXPPD*/ { 31, 8, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 4331 /*(4305) VGETEXPPD*/ { 22, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4332 /*(4306) VGETEXPPD*/ { 31, 8, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 4333 /*(4307) VGETEXPPD*/ { 22, 2, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4334 /*(4308) VGETEXPPD*/ { 31, 8, 0x42, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 4335 /*(4309) VMRUN*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 63}, 4336 /*(4310) XLAT*/ { 16, 68, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4337 /*(4311) XCHG*/ { 49, 5, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4338 /*(4312) XCHG*/ { 49, 5, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4339 /*(4313) XCHG*/ { 21, 2, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4340 /*(4314) XCHG*/ { 49, 5, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4341 /*(4315) XCHG*/ { 49, 5, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4342 /*(4316) XCHG*/ { 21, 2, 0x87, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4343 /*(4317) XCHG*/ { 16, 47, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4344 /*(4318) XCHG*/ { 95, 47, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 4345 /*(4319) BNDLDX*/ { 3, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4346 /*(4320) BNDLDX*/ { 82, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 324}, 4347 /*(4321) BNDLDX*/ { 82, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4348 /*(4322) BNDLDX*/ { 82, 0, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 51}, 4349 /*(4323) VBLENDPD*/ { 7, 35, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 4350 /*(4324) VBLENDPD*/ { 8, 14, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 4351 /*(4325) VBLENDPD*/ { 7, 35, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 4352 /*(4326) VBLENDPD*/ { 8, 14, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 4353 /*(4327) VFMSUBPD*/ { 13, 65, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4354 /*(4328) VFMSUBPD*/ { 30, 66, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4355 /*(4329) VFMSUBPD*/ { 13, 65, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 4356 /*(4330) VFMSUBPD*/ { 30, 66, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 4357 /*(4331) VFMSUBPD*/ { 13, 65, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4358 /*(4332) VFMSUBPD*/ { 30, 66, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4359 /*(4333) VFMSUBPD*/ { 13, 65, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 4360 /*(4334) VFMSUBPD*/ { 30, 66, 0x6d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 4361 /*(4335) VCVTTSD2USI*/ { 76, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1410}, 4362 /*(4336) VCVTTSD2USI*/ { 77, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1420}, 4363 /*(4337) VCVTTSD2USI*/ { 76, 59, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1433}, 4364 /*(4338) VCVTTSD2USI*/ { 77, 59, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1443}, 4365 /*(4339) VCVTTSD2USI*/ { 78, 102, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1456}, 4366 /*(4340) VCVTTSD2USI*/ { 79, 102, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1465}, 4367 /*(4341) VCVTTSD2USI*/ { 77, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1477}, 4368 /*(4342) VCVTTSD2USI*/ { 77, 59, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1490}, 4369 /*(4343) VCVTTSD2USI*/ { 79, 102, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1503}, 4370 /*(4344) VBLENDPS*/ { 7, 35, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 4371 /*(4345) VBLENDPS*/ { 8, 14, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 4372 /*(4346) VBLENDPS*/ { 7, 35, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 4373 /*(4347) VBLENDPS*/ { 8, 14, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 4374 /*(4348) VFMSUBPS*/ { 13, 65, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4375 /*(4349) VFMSUBPS*/ { 30, 66, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4376 /*(4350) VFMSUBPS*/ { 13, 65, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 4377 /*(4351) VFMSUBPS*/ { 30, 66, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 4378 /*(4352) VFMSUBPS*/ { 13, 65, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4379 /*(4353) VFMSUBPS*/ { 30, 66, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4380 /*(4354) VFMSUBPS*/ { 13, 65, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 4381 /*(4355) VFMSUBPS*/ { 30, 66, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 4382 /*(4356) AND*/ { 36, 35, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 254}, 4383 /*(4357) AND*/ { 1, 14, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 4384 /*(4358) AND*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 254}, 4385 /*(4359) AND*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 4386 /*(4360) AND*/ { 36, 35, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 254}, 4387 /*(4361) AND*/ { 1, 14, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 4388 /*(4362) AND*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 254}, 4389 /*(4363) AND*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 4390 /*(4364) AND*/ { 49, 5, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4391 /*(4365) AND*/ { 21, 2, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4392 /*(4366) AND*/ { 49, 5, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4393 /*(4367) AND*/ { 21, 2, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4394 /*(4368) AND*/ { 21, 2, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4395 /*(4369) AND*/ { 16, 5, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4396 /*(4370) AND*/ { 21, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4397 /*(4371) AND*/ { 16, 5, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4398 /*(4372) AND*/ { 16, 103, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4399 /*(4373) AND*/ { 16, 104, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4400 /*(4374) VRSQRTPS*/ { 53, 5, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 4401 /*(4375) VRSQRTPS*/ { 2, 2, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 4402 /*(4376) VRSQRTPS*/ { 53, 5, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 4403 /*(4377) VRSQRTPS*/ { 2, 2, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 4404 /*(4378) FLDENV*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 4405 /*(4379) FLDENV*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 4406 /*(4380) PFCMPEQ*/ { 16, 79, 0xb0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 4407 /*(4381) PFCMPEQ*/ { 21, 80, 0xb0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 4408 /*(4382) VEXTRACTF32X8*/ { 22, 14, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 4409 /*(4383) VEXTRACTF32X8*/ { 23, 109, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 4410 /*(4384) VPEXTRB*/ { 53, 35, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4411 /*(4385) VPEXTRB*/ { 2, 14, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 4412 /*(4386) VPEXTRB*/ { 76, 14, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2770}, 4413 /*(4387) VPEXTRB*/ { 78, 153, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1568}, 4414 /*(4388) VPEXTRD*/ { 19, 35, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 4415 /*(4389) VPEXTRD*/ { 20, 14, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 4416 /*(4390) VPEXTRD*/ { 53, 35, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4417 /*(4391) VPEXTRD*/ { 2, 14, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 4418 /*(4392) VPEXTRD*/ { 76, 14, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2770}, 4419 /*(4393) VPEXTRD*/ { 11, 14, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2780}, 4420 /*(4394) VPEXTRD*/ { 78, 154, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1568}, 4421 /*(4395) VPEXTRD*/ { 59, 154, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2792}, 4422 /*(4396) VPHSUBW*/ { 7, 5, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4423 /*(4397) VPHSUBW*/ { 8, 2, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4424 /*(4398) VPHSUBW*/ { 7, 5, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4425 /*(4399) VPHSUBW*/ { 8, 2, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4426 /*(4400) PMOVSXBD*/ { 3, 16, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4427 /*(4401) PMOVSXBD*/ { 4, 17, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4428 /*(4402) FPATAN*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 275}, 4429 /*(4403) VPEXTRQ*/ { 19, 35, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 899}, 4430 /*(4404) VPEXTRQ*/ { 20, 14, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 4431 /*(4405) VPEXTRQ*/ { 11, 14, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2803}, 4432 /*(4406) VPEXTRQ*/ { 59, 155, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2815}, 4433 /*(4407) VPEXTRW*/ { 53, 35, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4434 /*(4408) VPEXTRW*/ { 2, 14, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 4435 /*(4409) VPEXTRW*/ { 2, 14, 0xc5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4436 /*(4410) VPEXTRW*/ { 76, 14, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2770}, 4437 /*(4411) VPEXTRW*/ { 78, 156, 0x15, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1568}, 4438 /*(4412) PMOVSXBQ*/ { 3, 16, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4439 /*(4413) PMOVSXBQ*/ { 4, 17, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4440 /*(4414) VPHSUBD*/ { 7, 5, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4441 /*(4415) VPHSUBD*/ { 8, 2, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4442 /*(4416) VPHSUBD*/ { 7, 5, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4443 /*(4417) VPHSUBD*/ { 8, 2, 0x6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4444 /*(4418) PMOVSXBW*/ { 3, 16, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4445 /*(4419) PMOVSXBW*/ { 4, 17, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4446 /*(4420) VADDPD*/ { 7, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4447 /*(4421) VADDPD*/ { 8, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4448 /*(4422) VADDPD*/ { 7, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4449 /*(4423) VADDPD*/ { 8, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4450 /*(4424) VADDPD*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4451 /*(4425) VADDPD*/ { 12, 58, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1294}, 4452 /*(4426) VADDPD*/ { 13, 8, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 4453 /*(4427) VADDPD*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4454 /*(4428) VADDPD*/ { 13, 8, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 4455 /*(4429) VADDPD*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4456 /*(4430) VADDPD*/ { 13, 8, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 4457 /*(4431) FDIV*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 4458 /*(4432) FDIV*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 4459 /*(4433) FDIV*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 4460 /*(4434) FDIV*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 4461 /*(4435) RDTSC*/ { 16, 19, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 4462 /*(4436) VADDPS*/ { 7, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 4463 /*(4437) VADDPS*/ { 8, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 4464 /*(4438) VADDPS*/ { 7, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 4465 /*(4439) VADDPS*/ { 8, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 4466 /*(4440) VADDPS*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 4467 /*(4441) VADDPS*/ { 12, 58, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1309}, 4468 /*(4442) VADDPS*/ { 13, 7, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 4469 /*(4443) VADDPS*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 4470 /*(4444) VADDPS*/ { 13, 7, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 4471 /*(4445) VADDPS*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 4472 /*(4446) VADDPS*/ { 13, 7, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 4473 /*(4447) PI2FW*/ { 16, 79, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 4474 /*(4448) PI2FW*/ { 21, 80, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 4475 /*(4449) SETSSBSY*/ { 39, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1805}, 4476 /*(4450) EMMS*/ { 3, 19, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4477 /*(4451) VPSHLDVQ*/ { 12, 2, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4478 /*(4452) VPSHLDVQ*/ { 13, 8, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4479 /*(4453) VPSHLDVQ*/ { 12, 2, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4480 /*(4454) VPSHLDVQ*/ { 13, 8, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4481 /*(4455) VPSHLDVQ*/ { 12, 2, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4482 /*(4456) VPSHLDVQ*/ { 13, 8, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4483 /*(4457) VPTESTNMD*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2826}, 4484 /*(4458) VPTESTNMD*/ { 48, 7, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2834}, 4485 /*(4459) VPTESTNMD*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2826}, 4486 /*(4460) VPTESTNMD*/ { 48, 7, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2834}, 4487 /*(4461) VPTESTNMD*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2826}, 4488 /*(4462) VPTESTNMD*/ { 48, 7, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2834}, 4489 /*(4463) VPTESTNMB*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2826}, 4490 /*(4464) VPTESTNMB*/ { 58, 29, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2833}, 4491 /*(4465) VPTESTNMB*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2826}, 4492 /*(4466) VPTESTNMB*/ { 58, 29, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2833}, 4493 /*(4467) VPTESTNMB*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2826}, 4494 /*(4468) VPTESTNMB*/ { 58, 29, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2833}, 4495 /*(4469) VPSHLDVW*/ { 12, 2, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4496 /*(4470) VPSHLDVW*/ { 15, 6, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4497 /*(4471) VPSHLDVW*/ { 12, 2, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4498 /*(4472) VPSHLDVW*/ { 15, 6, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4499 /*(4473) VPSHLDVW*/ { 12, 2, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4500 /*(4474) VPSHLDVW*/ { 15, 6, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4501 /*(4475) VMMCALL*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 4502 /*(4476) VPTESTNMW*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2840}, 4503 /*(4477) VPTESTNMW*/ { 58, 6, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2848}, 4504 /*(4478) VPTESTNMW*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2840}, 4505 /*(4479) VPTESTNMW*/ { 58, 6, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2848}, 4506 /*(4480) VPTESTNMW*/ { 47, 2, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2840}, 4507 /*(4481) VPTESTNMW*/ { 58, 6, 0x26, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2848}, 4508 /*(4482) VPSHLDVD*/ { 12, 2, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4509 /*(4483) VPSHLDVD*/ { 13, 7, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4510 /*(4484) VPSHLDVD*/ { 12, 2, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4511 /*(4485) VPSHLDVD*/ { 13, 7, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4512 /*(4486) VPSHLDVD*/ { 12, 2, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4513 /*(4487) VPSHLDVD*/ { 13, 7, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4514 /*(4488) VPTESTNMQ*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2840}, 4515 /*(4489) VPTESTNMQ*/ { 48, 8, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2849}, 4516 /*(4490) VPTESTNMQ*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2840}, 4517 /*(4491) VPTESTNMQ*/ { 48, 8, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2849}, 4518 /*(4492) VPTESTNMQ*/ { 47, 2, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2840}, 4519 /*(4493) VPTESTNMQ*/ { 48, 8, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2849}, 4520 /*(4494) VMXOFF*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2855}, 4521 /*(4495) MOVDIR64B*/ { 3, 0, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4522 /*(4496) MOVDIR64B*/ { 3, 0, 0xf8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4523 /*(4497) VCOMPRESSPD*/ { 23, 147, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 4524 /*(4498) VCOMPRESSPD*/ { 22, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4525 /*(4499) VCOMPRESSPD*/ { 23, 147, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 4526 /*(4500) VCOMPRESSPD*/ { 22, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4527 /*(4501) VCOMPRESSPD*/ { 23, 147, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 381}, 4528 /*(4502) VCOMPRESSPD*/ { 22, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 4529 /*(4503) VPADDUSB*/ { 7, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4530 /*(4504) VPADDUSB*/ { 8, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4531 /*(4505) VPADDUSB*/ { 7, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4532 /*(4506) VPADDUSB*/ { 8, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4533 /*(4507) VPADDUSB*/ { 9, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4534 /*(4508) VPADDUSB*/ { 10, 29, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4535 /*(4509) VPADDUSB*/ { 9, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4536 /*(4510) VPADDUSB*/ { 10, 29, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4537 /*(4511) VPADDUSB*/ { 9, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4538 /*(4512) VPADDUSB*/ { 10, 29, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4539 /*(4513) VCOMPRESSPS*/ { 23, 148, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 4540 /*(4514) VCOMPRESSPS*/ { 22, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4541 /*(4515) VCOMPRESSPS*/ { 23, 148, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 4542 /*(4516) VCOMPRESSPS*/ { 22, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4543 /*(4517) VCOMPRESSPS*/ { 23, 148, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1149}, 4544 /*(4518) VCOMPRESSPS*/ { 22, 2, 0x8a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4545 /*(4519) VINSERTI64X2*/ { 12, 14, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4546 /*(4520) VINSERTI64X2*/ { 15, 27, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4547 /*(4521) VINSERTI64X2*/ { 12, 14, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4548 /*(4522) VINSERTI64X2*/ { 15, 27, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4549 /*(4523) VINSERTI64X4*/ { 12, 14, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4550 /*(4524) VINSERTI64X4*/ { 15, 30, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4551 /*(4525) MOVNTSS*/ { 5, 0, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 4552 /*(4526) VEXTRACTF128*/ { 19, 35, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 4553 /*(4527) VEXTRACTF128*/ { 20, 14, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 4554 /*(4528) RCR*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4555 /*(4529) RCR*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4556 /*(4530) RCR*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4557 /*(4531) RCR*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4558 /*(4532) RCR*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4559 /*(4533) RCR*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4560 /*(4534) RCR*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4561 /*(4535) RCR*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4562 /*(4536) RCR*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4563 /*(4537) RCR*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4564 /*(4538) RCR*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4565 /*(4539) RCR*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4566 /*(4540) FMUL*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4567 /*(4541) FMUL*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4568 /*(4542) FMUL*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4569 /*(4543) FMUL*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4570 /*(4544) MOVNTSD*/ { 5, 0, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 4571 /*(4545) RDPKRU*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2860}, 4572 /*(4546) VPMACSSDD*/ { 13, 65, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 4573 /*(4547) VPMACSSDD*/ { 30, 66, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 4574 /*(4548) STOSD*/ { 5, 36, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4575 /*(4549) VPINSRB*/ { 7, 35, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 4576 /*(4550) VPINSRB*/ { 8, 14, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 4577 /*(4551) VPINSRB*/ { 34, 14, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2865}, 4578 /*(4552) VPINSRB*/ { 35, 157, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2872}, 4579 /*(4553) VFMADD213SD*/ { 13, 5, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 4580 /*(4554) VFMADD213SD*/ { 30, 2, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 4581 /*(4555) VFMADD213SD*/ { 12, 2, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4582 /*(4556) VFMADD213SD*/ { 12, 62, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 4583 /*(4557) VFMADD213SD*/ { 15, 60, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4584 /*(4558) STOSB*/ { 5, 36, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4585 /*(4559) VPINSRD*/ { 13, 35, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 4586 /*(4560) VPINSRD*/ { 30, 14, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 4587 /*(4561) VPINSRD*/ { 7, 35, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 4588 /*(4562) VPINSRD*/ { 8, 14, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 4589 /*(4563) VPINSRD*/ { 34, 14, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2865}, 4590 /*(4564) VPINSRD*/ { 60, 14, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2878}, 4591 /*(4565) VPINSRD*/ { 35, 158, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2872}, 4592 /*(4566) VPINSRD*/ { 61, 158, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2887}, 4593 /*(4567) VSCATTERPF0DPS*/ { 69, 44, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2643}, 4594 /*(4568) VGATHERPF1DPS*/ { 69, 44, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2256}, 4595 /*(4569) VPINSRQ*/ { 13, 35, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 4596 /*(4570) VPINSRQ*/ { 30, 14, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 4597 /*(4571) VPINSRQ*/ { 60, 14, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2895}, 4598 /*(4572) VPINSRQ*/ { 61, 159, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2904}, 4599 /*(4573) VPERMI2D*/ { 12, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4600 /*(4574) VPERMI2D*/ { 13, 7, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4601 /*(4575) VPERMI2D*/ { 12, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4602 /*(4576) VPERMI2D*/ { 13, 7, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4603 /*(4577) VPERMI2D*/ { 12, 2, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4604 /*(4578) VPERMI2D*/ { 13, 7, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4605 /*(4579) VPINSRW*/ { 7, 35, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4606 /*(4580) VPINSRW*/ { 8, 14, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4607 /*(4581) VPINSRW*/ { 34, 14, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 4608 /*(4582) VPINSRW*/ { 35, 160, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2912}, 4609 /*(4583) VMPTRST*/ { 43, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2590}, 4610 /*(4584) CMPXCHG16B*/ { 80, 106, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 187}, 4611 /*(4585) VSCATTERPF0DPD*/ { 69, 41, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2632}, 4612 /*(4586) REP_MOVSD*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4613 /*(4587) REP_MOVSD*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4614 /*(4588) REP_MOVSB*/ { 5, 28, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4615 /*(4589) REP_MOVSB*/ { 5, 28, 0xa4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4616 /*(4590) FCMOVU*/ { 1, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4617 /*(4591) REP_MOVSW*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4618 /*(4592) REP_MOVSW*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4619 /*(4593) REP_MOVSQ*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4620 /*(4594) REP_MOVSQ*/ { 5, 28, 0xa5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4621 /*(4595) FCMOVE*/ { 1, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4622 /*(4596) FCMOVB*/ { 1, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4623 /*(4597) VPSRLW*/ { 7, 5, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4624 /*(4598) VPSRLW*/ { 8, 2, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4625 /*(4599) VPSRLW*/ { 26, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 868}, 4626 /*(4600) VPSRLW*/ { 7, 5, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4627 /*(4601) VPSRLW*/ { 8, 2, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4628 /*(4602) VPSRLW*/ { 26, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 868}, 4629 /*(4603) VPSRLW*/ { 9, 2, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4630 /*(4604) VPSRLW*/ { 10, 70, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4631 /*(4605) VPSRLW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2918}, 4632 /*(4606) VPSRLW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 407}, 4633 /*(4607) VPSRLW*/ { 9, 2, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4634 /*(4608) VPSRLW*/ { 10, 70, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4635 /*(4609) VPSRLW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2918}, 4636 /*(4610) VPSRLW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 407}, 4637 /*(4611) VPSRLW*/ { 9, 2, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4638 /*(4612) VPSRLW*/ { 10, 70, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4639 /*(4613) VPSRLW*/ { 67, 14, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2918}, 4640 /*(4614) VPSRLW*/ { 68, 57, 0x71, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 407}, 4641 /*(4615) VPSRLQ*/ { 7, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4642 /*(4616) VPSRLQ*/ { 8, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4643 /*(4617) VPSRLQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 868}, 4644 /*(4618) VPSRLQ*/ { 7, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4645 /*(4619) VPSRLQ*/ { 8, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4646 /*(4620) VPSRLQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 868}, 4647 /*(4621) VPSRLQ*/ { 12, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4648 /*(4622) VPSRLQ*/ { 15, 69, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 4649 /*(4623) VPSRLQ*/ { 65, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2924}, 4650 /*(4624) VPSRLQ*/ { 25, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2932}, 4651 /*(4625) VPSRLQ*/ { 12, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4652 /*(4626) VPSRLQ*/ { 15, 69, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 4653 /*(4627) VPSRLQ*/ { 65, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2924}, 4654 /*(4628) VPSRLQ*/ { 25, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2932}, 4655 /*(4629) VPSRLQ*/ { 12, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4656 /*(4630) VPSRLQ*/ { 15, 69, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 752}, 4657 /*(4631) VPSRLQ*/ { 65, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2924}, 4658 /*(4632) VPSRLQ*/ { 25, 15, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2932}, 4659 /*(4633) VMOVAPD*/ { 53, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 4660 /*(4634) VMOVAPD*/ { 2, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4661 /*(4635) VMOVAPD*/ { 53, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 4662 /*(4636) VMOVAPD*/ { 2, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4663 /*(4637) VMOVAPD*/ { 53, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 4664 /*(4638) VMOVAPD*/ { 2, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4665 /*(4639) VMOVAPD*/ { 53, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 4666 /*(4640) VMOVAPD*/ { 2, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 4667 /*(4641) VMOVAPD*/ { 22, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 4668 /*(4642) VMOVAPD*/ { 81, 137, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 4669 /*(4643) VMOVAPD*/ { 22, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 4670 /*(4644) VMOVAPD*/ { 23, 137, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2947}, 4671 /*(4645) VMOVAPD*/ { 22, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 4672 /*(4646) VMOVAPD*/ { 81, 137, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 4673 /*(4647) VMOVAPD*/ { 22, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 4674 /*(4648) VMOVAPD*/ { 23, 137, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 4675 /*(4649) VMOVAPD*/ { 22, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 4676 /*(4650) VMOVAPD*/ { 81, 137, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 4677 /*(4651) VMOVAPD*/ { 22, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 4678 /*(4652) VMOVAPD*/ { 23, 137, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 4679 /*(4653) VPSRLD*/ { 7, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4680 /*(4654) VPSRLD*/ { 8, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4681 /*(4655) VPSRLD*/ { 26, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 868}, 4682 /*(4656) VPSRLD*/ { 7, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4683 /*(4657) VPSRLD*/ { 8, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4684 /*(4658) VPSRLD*/ { 26, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 868}, 4685 /*(4659) VPSRLD*/ { 12, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 4686 /*(4660) VPSRLD*/ { 15, 67, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 4687 /*(4661) VPSRLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2957}, 4688 /*(4662) VPSRLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 4689 /*(4663) VPSRLD*/ { 12, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 4690 /*(4664) VPSRLD*/ { 15, 67, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 4691 /*(4665) VPSRLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2957}, 4692 /*(4666) VPSRLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 4693 /*(4667) VPSRLD*/ { 12, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 4694 /*(4668) VPSRLD*/ { 15, 67, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 353}, 4695 /*(4669) VPSRLD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2957}, 4696 /*(4670) VPSRLD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 35}, 4697 /*(4671) CVTPS2PI*/ { 3, 0, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4698 /*(4672) CVTPS2PI*/ { 4, 1, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4699 /*(4673) CVTPS2PD*/ { 3, 0, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4700 /*(4674) CVTPS2PD*/ { 4, 1, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4701 /*(4675) VMOVAPS*/ { 53, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 4702 /*(4676) VMOVAPS*/ { 2, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 4703 /*(4677) VMOVAPS*/ { 53, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 4704 /*(4678) VMOVAPS*/ { 2, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 4705 /*(4679) VMOVAPS*/ { 53, 5, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 4706 /*(4680) VMOVAPS*/ { 2, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 4707 /*(4681) VMOVAPS*/ { 53, 5, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 4708 /*(4682) VMOVAPS*/ { 2, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 4709 /*(4683) VMOVAPS*/ { 22, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4710 /*(4684) VMOVAPS*/ { 81, 110, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 4711 /*(4685) VMOVAPS*/ { 22, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4712 /*(4686) VMOVAPS*/ { 23, 110, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2974}, 4713 /*(4687) VMOVAPS*/ { 22, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4714 /*(4688) VMOVAPS*/ { 81, 110, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 4715 /*(4689) VMOVAPS*/ { 22, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4716 /*(4690) VMOVAPS*/ { 23, 110, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 4717 /*(4691) VMOVAPS*/ { 22, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4718 /*(4692) VMOVAPS*/ { 81, 110, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 4719 /*(4693) VMOVAPS*/ { 22, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4720 /*(4694) VMOVAPS*/ { 23, 110, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 4721 /*(4695) VFIXUPIMMSS*/ { 12, 14, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 4722 /*(4696) VFIXUPIMMSS*/ { 12, 81, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 4723 /*(4697) VFIXUPIMMSS*/ { 15, 94, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 4724 /*(4698) PFMIN*/ { 16, 79, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 4725 /*(4699) PFMIN*/ { 21, 80, 0x94, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 4726 /*(4700) VBROADCASTSD*/ { 70, 5, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2052}, 4727 /*(4701) VBROADCASTSD*/ { 71, 2, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2060}, 4728 /*(4702) VBROADCASTSD*/ { 50, 123, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2069}, 4729 /*(4703) VBROADCASTSD*/ { 72, 2, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2079}, 4730 /*(4704) VBROADCASTSD*/ { 50, 123, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2111}, 4731 /*(4705) VBROADCASTSD*/ { 72, 2, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2121}, 4732 /*(4706) VSCALEFPD*/ { 12, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4733 /*(4707) VSCALEFPD*/ { 12, 58, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 4734 /*(4708) VSCALEFPD*/ { 13, 8, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4735 /*(4709) VSCALEFPD*/ { 12, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4736 /*(4710) VSCALEFPD*/ { 13, 8, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4737 /*(4711) VSCALEFPD*/ { 12, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4738 /*(4712) VSCALEFPD*/ { 13, 8, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4739 /*(4713) VFIXUPIMMSD*/ { 12, 14, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 4740 /*(4714) VFIXUPIMMSD*/ { 12, 81, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 4741 /*(4715) VFIXUPIMMSD*/ { 15, 82, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 4742 /*(4716) VCVTTPS2UQQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 4743 /*(4717) VCVTTPS2UQQ*/ { 31, 142, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 4744 /*(4718) VCVTTPS2UQQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 4745 /*(4719) VCVTTPS2UQQ*/ { 31, 142, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 4746 /*(4720) VCVTTPS2UQQ*/ { 22, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 4747 /*(4721) VCVTTPS2UQQ*/ { 22, 71, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2329}, 4748 /*(4722) VCVTTPS2UQQ*/ { 31, 142, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 4749 /*(4723) VPMASKMOVD*/ { 13, 5, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4750 /*(4724) VPMASKMOVD*/ { 13, 5, 0x8c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4751 /*(4725) VPMASKMOVD*/ { 13, 5, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4752 /*(4726) VPMASKMOVD*/ { 13, 5, 0x8e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4753 /*(4727) CLFLUSH*/ { 43, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2590}, 4754 /*(4728) VPMOVUSDW*/ { 22, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 4755 /*(4729) VPMOVUSDW*/ { 23, 34, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 4756 /*(4730) VPMOVUSDW*/ { 22, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 4757 /*(4731) VPMOVUSDW*/ { 23, 34, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 4758 /*(4732) VPMOVUSDW*/ { 22, 2, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 4759 /*(4733) VPMOVUSDW*/ { 23, 34, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 4760 /*(4734) VPSLLVW*/ { 12, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4761 /*(4735) VPSLLVW*/ { 15, 6, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4762 /*(4736) VPSLLVW*/ { 12, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4763 /*(4737) VPSLLVW*/ { 15, 6, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4764 /*(4738) VPSLLVW*/ { 12, 2, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4765 /*(4739) VPSLLVW*/ { 15, 6, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4766 /*(4740) VPBROADCASTMW2D*/ { 75, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2984}, 4767 /*(4741) VPBROADCASTMW2D*/ { 75, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2997}, 4768 /*(4742) VPBROADCASTMW2D*/ { 75, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3010}, 4769 /*(4743) CQO*/ { 57, 36, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 7}, 4770 /*(4744) PUNPCKHBW*/ { 3, 0, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4771 /*(4745) PUNPCKHBW*/ { 4, 1, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4772 /*(4746) PUNPCKHBW*/ { 3, 3, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4773 /*(4747) PUNPCKHBW*/ { 4, 4, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4774 /*(4748) MOVUPD*/ { 3, 3, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4775 /*(4749) MOVUPD*/ { 4, 4, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4776 /*(4750) MOVUPD*/ { 3, 3, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4777 /*(4751) MOVUPD*/ { 4, 4, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4778 /*(4752) VPSADBW*/ { 7, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4779 /*(4753) VPSADBW*/ { 8, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4780 /*(4754) VPSADBW*/ { 7, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4781 /*(4755) VPSADBW*/ { 8, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4782 /*(4756) VPSADBW*/ { 34, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 4783 /*(4757) VPSADBW*/ { 35, 29, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2912}, 4784 /*(4758) VPSADBW*/ { 34, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 4785 /*(4759) VPSADBW*/ { 35, 29, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2912}, 4786 /*(4760) VPSADBW*/ { 34, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1604}, 4787 /*(4761) VPSADBW*/ { 35, 29, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2912}, 4788 /*(4762) XBEGIN*/ { 66, 161, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 300}, 4789 /*(4763) REPE_CMPSW*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4790 /*(4764) REPE_CMPSQ*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4791 /*(4765) MOVUPS*/ { 3, 0, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4792 /*(4766) MOVUPS*/ { 4, 1, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4793 /*(4767) MOVUPS*/ { 3, 0, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4794 /*(4768) MOVUPS*/ { 4, 1, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4795 /*(4769) BTS_LOCK*/ { 36, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2068}, 4796 /*(4770) BTS_LOCK*/ { 49, 0, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 4797 /*(4771) REPE_CMPSD*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4798 /*(4772) VSCALEFPS*/ { 12, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4799 /*(4773) VSCALEFPS*/ { 12, 58, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 4800 /*(4774) VSCALEFPS*/ { 13, 7, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4801 /*(4775) VSCALEFPS*/ { 12, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4802 /*(4776) VSCALEFPS*/ { 13, 7, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4803 /*(4777) VSCALEFPS*/ { 12, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4804 /*(4778) VSCALEFPS*/ { 13, 7, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4805 /*(4779) OR*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2}, 4806 /*(4780) OR*/ { 1, 93, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4807 /*(4781) OR*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2}, 4808 /*(4782) OR*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4809 /*(4783) OR*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2}, 4810 /*(4784) OR*/ { 1, 93, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4811 /*(4785) OR*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2}, 4812 /*(4786) OR*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4813 /*(4787) OR*/ { 49, 5, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4814 /*(4788) OR*/ { 21, 2, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4815 /*(4789) OR*/ { 49, 5, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4816 /*(4790) OR*/ { 21, 2, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4817 /*(4791) OR*/ { 16, 5, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4818 /*(4792) OR*/ { 21, 2, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4819 /*(4793) OR*/ { 16, 5, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4820 /*(4794) OR*/ { 21, 2, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4821 /*(4795) OR*/ { 16, 112, 0xc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4822 /*(4796) OR*/ { 16, 104, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4823 /*(4797) REPE_CMPSB*/ { 5, 68, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 4824 /*(4798) VEXTRACTI64X4*/ { 22, 14, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 4825 /*(4799) VEXTRACTI64X4*/ { 23, 30, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 4826 /*(4800) PEXT*/ { 7, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4827 /*(4801) PEXT*/ { 13, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 389}, 4828 /*(4802) PEXT*/ { 8, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1611}, 4829 /*(4803) PEXT*/ { 30, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1615}, 4830 /*(4804) PEXT*/ { 13, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 822}, 4831 /*(4805) PEXT*/ { 30, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1621}, 4832 /*(4806) VRNDSCALESS*/ { 12, 14, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 4833 /*(4807) VRNDSCALESS*/ { 12, 81, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 4834 /*(4808) VRNDSCALESS*/ { 15, 94, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 4835 /*(4809) VEXTRACTI32X4*/ { 22, 14, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 4836 /*(4810) VEXTRACTI32X4*/ { 23, 75, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 4837 /*(4811) VEXTRACTI32X4*/ { 22, 14, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 4838 /*(4812) VEXTRACTI32X4*/ { 23, 75, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 4839 /*(4813) VBROADCASTI128*/ { 70, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1316}, 4840 /*(4814) FXCH*/ { 1, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4841 /*(4815) FXCH*/ { 1, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4842 /*(4816) FXCH*/ { 1, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 4843 /*(4817) VEXTRACTI32X8*/ { 22, 14, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 4844 /*(4818) VEXTRACTI32X8*/ { 23, 109, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 4845 /*(4819) VPMOVZXDQ*/ { 2, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 4846 /*(4820) VPMOVZXDQ*/ { 53, 5, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 4847 /*(4821) VPMOVZXDQ*/ { 2, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 4848 /*(4822) VPMOVZXDQ*/ { 53, 5, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 4849 /*(4823) VPMOVZXDQ*/ { 22, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4850 /*(4824) VPMOVZXDQ*/ { 81, 113, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 4851 /*(4825) VPMOVZXDQ*/ { 22, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4852 /*(4826) VPMOVZXDQ*/ { 81, 113, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 4853 /*(4827) VPMOVZXDQ*/ { 22, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 4854 /*(4828) VPMOVZXDQ*/ { 81, 113, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 4855 /*(4829) PEXTRW*/ { 4, 73, 0xc5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4856 /*(4830) PEXTRW*/ { 4, 54, 0xc5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4857 /*(4831) PEXTRQ*/ { 51, 130, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 354}, 4858 /*(4832) PEXTRQ*/ { 74, 131, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1284}, 4859 /*(4833) VFMADD132SD*/ { 13, 5, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 4860 /*(4834) VFMADD132SD*/ { 30, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 4861 /*(4835) VFMADD132SD*/ { 12, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4862 /*(4836) VFMADD132SD*/ { 12, 62, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 4863 /*(4837) VFMADD132SD*/ { 15, 60, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4864 /*(4838) VFMSUBADD132PS*/ { 13, 5, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4865 /*(4839) VFMSUBADD132PS*/ { 30, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4866 /*(4840) VFMSUBADD132PS*/ { 13, 5, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4867 /*(4841) VFMSUBADD132PS*/ { 30, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4868 /*(4842) VFMSUBADD132PS*/ { 12, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4869 /*(4843) VFMSUBADD132PS*/ { 12, 58, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 4870 /*(4844) VFMSUBADD132PS*/ { 13, 7, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4871 /*(4845) VFMSUBADD132PS*/ { 12, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4872 /*(4846) VFMSUBADD132PS*/ { 13, 7, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4873 /*(4847) VFMSUBADD132PS*/ { 12, 2, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4874 /*(4848) VFMSUBADD132PS*/ { 13, 7, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4875 /*(4849) CVTDQ2PS*/ { 3, 0, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4876 /*(4850) CVTDQ2PS*/ { 4, 1, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4877 /*(4851) VPORD*/ { 12, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 4878 /*(4852) VPORD*/ { 13, 7, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 4879 /*(4853) VPORD*/ { 12, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 4880 /*(4854) VPORD*/ { 13, 7, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 4881 /*(4855) VPORD*/ { 12, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 4882 /*(4856) VPORD*/ { 13, 7, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 4883 /*(4857) PEXTRD*/ { 51, 130, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 402}, 4884 /*(4858) PEXTRD*/ { 74, 131, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1269}, 4885 /*(4859) PEXTRB*/ { 3, 130, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 4886 /*(4860) PEXTRB*/ { 4, 131, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 4887 /*(4861) CVTDQ2PD*/ { 5, 50, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 4888 /*(4862) CVTDQ2PD*/ { 6, 51, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 4889 /*(4863) VFMSUBADD231PS*/ { 13, 5, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4890 /*(4864) VFMSUBADD231PS*/ { 30, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4891 /*(4865) VFMSUBADD231PS*/ { 13, 5, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 4892 /*(4866) VFMSUBADD231PS*/ { 30, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 4893 /*(4867) VFMSUBADD231PS*/ { 12, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4894 /*(4868) VFMSUBADD231PS*/ { 12, 58, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 4895 /*(4869) VFMSUBADD231PS*/ { 13, 7, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4896 /*(4870) VFMSUBADD231PS*/ { 12, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4897 /*(4871) VFMSUBADD231PS*/ { 13, 7, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4898 /*(4872) VFMSUBADD231PS*/ { 12, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4899 /*(4873) VFMSUBADD231PS*/ { 13, 7, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4900 /*(4874) CVTPD2PS*/ { 3, 3, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4901 /*(4875) CVTPD2PS*/ { 4, 4, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4902 /*(4876) VFMSUBADD231PD*/ { 13, 5, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 4903 /*(4877) VFMSUBADD231PD*/ { 30, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 4904 /*(4878) VFMSUBADD231PD*/ { 13, 5, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 4905 /*(4879) VFMSUBADD231PD*/ { 30, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 4906 /*(4880) VFMSUBADD231PD*/ { 12, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4907 /*(4881) VFMSUBADD231PD*/ { 12, 58, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 4908 /*(4882) VFMSUBADD231PD*/ { 13, 8, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4909 /*(4883) VFMSUBADD231PD*/ { 12, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4910 /*(4884) VFMSUBADD231PD*/ { 13, 8, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4911 /*(4885) VFMSUBADD231PD*/ { 12, 2, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4912 /*(4886) VFMSUBADD231PD*/ { 13, 8, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4913 /*(4887) CVTPD2PI*/ { 3, 3, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4914 /*(4888) CVTPD2PI*/ { 4, 4, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4915 /*(4889) VPSRLVW*/ { 12, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4916 /*(4890) VPSRLVW*/ { 15, 6, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4917 /*(4891) VPSRLVW*/ { 12, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4918 /*(4892) VPSRLVW*/ { 15, 6, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4919 /*(4893) VPSRLVW*/ { 12, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4920 /*(4894) VPSRLVW*/ { 15, 6, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 4921 /*(4895) WRSSQ*/ { 51, 0, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 444}, 4922 /*(4896) KXORW*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 4923 /*(4897) WRSSD*/ { 51, 0, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 440}, 4924 /*(4898) VPXORQ*/ { 12, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4925 /*(4899) VPXORQ*/ { 13, 8, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 4926 /*(4900) VPXORQ*/ { 12, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4927 /*(4901) VPXORQ*/ { 13, 8, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 4928 /*(4902) VPXORQ*/ { 12, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 4929 /*(4903) VPXORQ*/ { 13, 8, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 4930 /*(4904) NEG*/ { 36, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4931 /*(4905) NEG*/ { 1, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4932 /*(4906) NEG*/ { 36, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4933 /*(4907) NEG*/ { 1, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 4934 /*(4908) PMINUW*/ { 3, 16, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4935 /*(4909) PMINUW*/ { 4, 17, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4936 /*(4910) BLSIC*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 962}, 4937 /*(4911) BLSIC*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 962}, 4938 /*(4912) BLSIC*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 966}, 4939 /*(4913) BLSIC*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 966}, 4940 /*(4914) PMINUD*/ { 3, 16, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 4941 /*(4915) PMINUD*/ { 4, 17, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 4942 /*(4916) VCVTPS2UDQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4943 /*(4917) VCVTPS2UDQ*/ { 22, 58, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1737}, 4944 /*(4918) VCVTPS2UDQ*/ { 31, 7, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 4945 /*(4919) VCVTPS2UDQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4946 /*(4920) VCVTPS2UDQ*/ { 31, 7, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 4947 /*(4921) VCVTPS2UDQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 4948 /*(4922) VCVTPS2UDQ*/ { 31, 7, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 4949 /*(4923) PMINUB*/ { 3, 0, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 4950 /*(4924) PMINUB*/ { 4, 1, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 4951 /*(4925) PMINUB*/ { 3, 3, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 4952 /*(4926) PMINUB*/ { 4, 4, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 4953 /*(4927) VPMINUQ*/ { 12, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4954 /*(4928) VPMINUQ*/ { 13, 8, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4955 /*(4929) VPMINUQ*/ { 12, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4956 /*(4930) VPMINUQ*/ { 13, 8, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4957 /*(4931) VPMINUQ*/ { 12, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 4958 /*(4932) VPMINUQ*/ { 13, 8, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4959 /*(4933) VPMINUW*/ { 7, 5, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4960 /*(4934) VPMINUW*/ { 8, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4961 /*(4935) VPMINUW*/ { 7, 5, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4962 /*(4936) VPMINUW*/ { 8, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4963 /*(4937) VPMINUW*/ { 9, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 4964 /*(4938) VPMINUW*/ { 10, 6, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 4965 /*(4939) VPMINUW*/ { 9, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 4966 /*(4940) VPMINUW*/ { 10, 6, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 4967 /*(4941) VPMINUW*/ { 9, 2, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 4968 /*(4942) VPMINUW*/ { 10, 6, 0x3a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 4969 /*(4943) SALC*/ { 16, 36, 0xd6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 4970 /*(4944) FUCOMPP*/ { 66, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3023}, 4971 /*(4945) VPMINUB*/ { 7, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4972 /*(4946) VPMINUB*/ { 8, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4973 /*(4947) VPMINUB*/ { 7, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 4974 /*(4948) VPMINUB*/ { 8, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 4975 /*(4949) VPMINUB*/ { 9, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4976 /*(4950) VPMINUB*/ { 10, 29, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4977 /*(4951) VPMINUB*/ { 9, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4978 /*(4952) VPMINUB*/ { 10, 29, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4979 /*(4953) VPMINUB*/ { 9, 2, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 4980 /*(4954) VPMINUB*/ { 10, 29, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 4981 /*(4955) VPMINUD*/ { 7, 5, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4982 /*(4956) VPMINUD*/ { 8, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4983 /*(4957) VPMINUD*/ { 7, 5, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 4984 /*(4958) VPMINUD*/ { 8, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 4985 /*(4959) VPMINUD*/ { 12, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4986 /*(4960) VPMINUD*/ { 13, 7, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4987 /*(4961) VPMINUD*/ { 12, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4988 /*(4962) VPMINUD*/ { 13, 7, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4989 /*(4963) VPMINUD*/ { 12, 2, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 4990 /*(4964) VPMINUD*/ { 13, 7, 0x3b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 4991 /*(4965) VMOVDQU32*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 4992 /*(4966) VMOVDQU32*/ { 81, 110, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 4993 /*(4967) VMOVDQU32*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 4994 /*(4968) VMOVDQU32*/ { 23, 110, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 4995 /*(4969) VMOVDQU32*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 4996 /*(4970) VMOVDQU32*/ { 81, 110, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 4997 /*(4971) VMOVDQU32*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 4998 /*(4972) VMOVDQU32*/ { 23, 110, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 4999 /*(4973) VMOVDQU32*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 5000 /*(4974) VMOVDQU32*/ { 81, 110, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 5001 /*(4975) VMOVDQU32*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 5002 /*(4976) VMOVDQU32*/ { 23, 110, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 5003 /*(4977) LWPINS*/ { 24, 162, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3026}, 5004 /*(4978) LWPINS*/ { 26, 163, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3030}, 5005 /*(4979) FNSTENV*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 5006 /*(4980) FNSTENV*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 5007 /*(4981) VSCALEFSD*/ { 12, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5008 /*(4982) VSCALEFSD*/ { 12, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 5009 /*(4983) VSCALEFSD*/ { 15, 60, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5010 /*(4984) PAVGW*/ { 3, 0, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5011 /*(4985) PAVGW*/ { 4, 1, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5012 /*(4986) PAVGW*/ { 3, 3, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5013 /*(4987) PAVGW*/ { 4, 4, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5014 /*(4988) VGETEXPSS*/ { 12, 2, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5015 /*(4989) VGETEXPSS*/ { 12, 59, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 5016 /*(4990) VGETEXPSS*/ { 15, 61, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5017 /*(4991) VSCALEFSS*/ { 12, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5018 /*(4992) VSCALEFSS*/ { 12, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 5019 /*(4993) VSCALEFSS*/ { 15, 61, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5020 /*(4994) VMOVDQA32*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5021 /*(4995) VMOVDQA32*/ { 81, 110, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3035}, 5022 /*(4996) VMOVDQA32*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5023 /*(4997) VMOVDQA32*/ { 23, 110, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3044}, 5024 /*(4998) VMOVDQA32*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5025 /*(4999) VMOVDQA32*/ { 81, 110, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3035}, 5026 /*(5000) VMOVDQA32*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5027 /*(5001) VMOVDQA32*/ { 23, 110, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3035}, 5028 /*(5002) VMOVDQA32*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5029 /*(5003) VMOVDQA32*/ { 81, 110, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3035}, 5030 /*(5004) VMOVDQA32*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5031 /*(5005) VMOVDQA32*/ { 23, 110, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3035}, 5032 /*(5006) VPUNPCKHBW*/ { 7, 5, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5033 /*(5007) VPUNPCKHBW*/ { 8, 2, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5034 /*(5008) VPUNPCKHBW*/ { 7, 5, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5035 /*(5009) VPUNPCKHBW*/ { 8, 2, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5036 /*(5010) VPUNPCKHBW*/ { 9, 2, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5037 /*(5011) VPUNPCKHBW*/ { 10, 29, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5038 /*(5012) VPUNPCKHBW*/ { 9, 2, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5039 /*(5013) VPUNPCKHBW*/ { 10, 29, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5040 /*(5014) VPUNPCKHBW*/ { 9, 2, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5041 /*(5015) VPUNPCKHBW*/ { 10, 29, 0x68, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5042 /*(5016) VGETEXPSD*/ { 12, 2, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5043 /*(5017) VGETEXPSD*/ { 12, 59, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 5044 /*(5018) VGETEXPSD*/ { 15, 60, 0x43, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5045 /*(5019) PAVGB*/ { 3, 0, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5046 /*(5020) PAVGB*/ { 4, 1, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5047 /*(5021) PAVGB*/ { 3, 3, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5048 /*(5022) PAVGB*/ { 4, 4, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5049 /*(5023) VCVTTPD2DQ*/ { 53, 5, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5050 /*(5024) VCVTTPD2DQ*/ { 2, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5051 /*(5025) VCVTTPD2DQ*/ { 53, 5, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5052 /*(5026) VCVTTPD2DQ*/ { 2, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5053 /*(5027) VCVTTPD2DQ*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5054 /*(5028) VCVTTPD2DQ*/ { 22, 71, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 5055 /*(5029) VCVTTPD2DQ*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 5056 /*(5030) VCVTTPD2DQ*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5057 /*(5031) VCVTTPD2DQ*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 5058 /*(5032) VCVTTPD2DQ*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5059 /*(5033) VCVTTPD2DQ*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 5060 /*(5034) VPCMPGTB*/ { 7, 5, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5061 /*(5035) VPCMPGTB*/ { 8, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5062 /*(5036) VPCMPGTB*/ { 7, 5, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5063 /*(5037) VPCMPGTB*/ { 8, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5064 /*(5038) VPCMPGTB*/ { 45, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5065 /*(5039) VPCMPGTB*/ { 46, 29, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5066 /*(5040) VPCMPGTB*/ { 45, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5067 /*(5041) VPCMPGTB*/ { 46, 29, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5068 /*(5042) VPCMPGTB*/ { 45, 2, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5069 /*(5043) VPCMPGTB*/ { 46, 29, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5070 /*(5044) VPCMPGTD*/ { 7, 5, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5071 /*(5045) VPCMPGTD*/ { 8, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5072 /*(5046) VPCMPGTD*/ { 7, 5, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5073 /*(5047) VPCMPGTD*/ { 8, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5074 /*(5048) VPCMPGTD*/ { 47, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5075 /*(5049) VPCMPGTD*/ { 48, 7, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5076 /*(5050) VPCMPGTD*/ { 47, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5077 /*(5051) VPCMPGTD*/ { 48, 7, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5078 /*(5052) VPCMPGTD*/ { 47, 2, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5079 /*(5053) VPCMPGTD*/ { 48, 7, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5080 /*(5054) GF2P8AFFINEINVQB*/ { 4, 73, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 5081 /*(5055) GF2P8AFFINEINVQB*/ { 3, 72, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 5082 /*(5056) VAESKEYGENASSIST*/ { 2, 14, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 5083 /*(5057) VAESKEYGENASSIST*/ { 53, 35, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 5084 /*(5058) VPCMPGTQ*/ { 7, 5, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5085 /*(5059) VPCMPGTQ*/ { 8, 2, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5086 /*(5060) VPCMPGTQ*/ { 7, 5, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5087 /*(5061) VPCMPGTQ*/ { 8, 2, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5088 /*(5062) VPCMPGTQ*/ { 47, 2, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 5089 /*(5063) VPCMPGTQ*/ { 48, 8, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5090 /*(5064) VPCMPGTQ*/ { 47, 2, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 5091 /*(5065) VPCMPGTQ*/ { 48, 8, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5092 /*(5066) VPCMPGTQ*/ { 47, 2, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 338}, 5093 /*(5067) VPCMPGTQ*/ { 48, 8, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5094 /*(5068) VPCMPGTW*/ { 7, 5, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5095 /*(5069) VPCMPGTW*/ { 8, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5096 /*(5070) VPCMPGTW*/ { 7, 5, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5097 /*(5071) VPCMPGTW*/ { 8, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5098 /*(5072) VPCMPGTW*/ { 45, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5099 /*(5073) VPCMPGTW*/ { 46, 6, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5100 /*(5074) VPCMPGTW*/ { 45, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5101 /*(5075) VPCMPGTW*/ { 46, 6, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5102 /*(5076) VPCMPGTW*/ { 45, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5103 /*(5077) VPCMPGTW*/ { 46, 6, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5104 /*(5078) VPXORD*/ { 12, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5105 /*(5079) VPXORD*/ { 13, 7, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5106 /*(5080) VPXORD*/ { 12, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5107 /*(5081) VPXORD*/ { 13, 7, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5108 /*(5082) VPXORD*/ { 12, 2, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5109 /*(5083) VPXORD*/ { 13, 7, 0xef, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5110 /*(5084) VEXTRACTI64X2*/ { 22, 14, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 5111 /*(5085) VEXTRACTI64X2*/ { 23, 27, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 5112 /*(5086) VEXTRACTI64X2*/ { 22, 14, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 5113 /*(5087) VEXTRACTI64X2*/ { 23, 27, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 560}, 5114 /*(5088) COMISD*/ { 3, 3, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5115 /*(5089) COMISD*/ { 4, 4, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5116 /*(5090) COMISS*/ { 3, 0, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5117 /*(5091) COMISS*/ { 4, 1, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5118 /*(5092) ANDPD*/ { 3, 3, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5119 /*(5093) ANDPD*/ { 4, 4, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5120 /*(5094) NEG_LOCK*/ { 36, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5121 /*(5095) NEG_LOCK*/ { 36, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5122 /*(5096) VPEXPANDD*/ { 81, 148, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 5123 /*(5097) VPEXPANDD*/ { 22, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5124 /*(5098) VPEXPANDD*/ { 81, 148, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 5125 /*(5099) VPEXPANDD*/ { 22, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5126 /*(5100) VPEXPANDD*/ { 81, 148, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 5127 /*(5101) VPEXPANDD*/ { 22, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5128 /*(5102) FUCOMIP*/ { 1, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 5129 /*(5103) ANDPS*/ { 3, 0, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5130 /*(5104) ANDPS*/ { 4, 1, 0x54, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5131 /*(5105) VPHSUBSW*/ { 7, 5, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5132 /*(5106) VPHSUBSW*/ { 8, 2, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5133 /*(5107) VPHSUBSW*/ { 7, 5, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5134 /*(5108) VPHSUBSW*/ { 8, 2, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5135 /*(5109) VPORQ*/ { 12, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 5136 /*(5110) VPORQ*/ { 13, 8, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 5137 /*(5111) VPORQ*/ { 12, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 5138 /*(5112) VPORQ*/ { 13, 8, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 5139 /*(5113) VPORQ*/ { 12, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 5140 /*(5114) VPORQ*/ { 13, 8, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 5141 /*(5115) ADCX*/ { 74, 32, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 1269}, 5142 /*(5116) ADCX*/ { 51, 33, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 402}, 5143 /*(5117) ADCX*/ { 74, 32, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 1284}, 5144 /*(5118) ADCX*/ { 51, 33, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 354}, 5145 /*(5119) PMOVZXWQ*/ { 3, 16, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5146 /*(5120) PMOVZXWQ*/ { 4, 17, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5147 /*(5121) VPSLLVD*/ { 13, 5, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5148 /*(5122) VPSLLVD*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5149 /*(5123) VPSLLVD*/ { 13, 5, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5150 /*(5124) VPSLLVD*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5151 /*(5125) VPSLLVD*/ { 12, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5152 /*(5126) VPSLLVD*/ { 13, 7, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5153 /*(5127) VPSLLVD*/ { 12, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5154 /*(5128) VPSLLVD*/ { 13, 7, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5155 /*(5129) VPSLLVD*/ { 12, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5156 /*(5130) VPSLLVD*/ { 13, 7, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5157 /*(5131) VFMADD213SS*/ { 13, 5, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5158 /*(5132) VFMADD213SS*/ { 30, 2, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5159 /*(5133) VFMADD213SS*/ { 12, 2, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5160 /*(5134) VFMADD213SS*/ { 12, 62, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 5161 /*(5135) VFMADD213SS*/ { 15, 61, 0xa9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5162 /*(5136) ENDBR64*/ { 40, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3054}, 5163 /*(5137) VADDSD*/ { 7, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 5164 /*(5138) VADDSD*/ { 8, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 5165 /*(5139) VADDSD*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 5166 /*(5140) VADDSD*/ { 12, 62, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 5167 /*(5141) VADDSD*/ { 15, 60, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 5168 /*(5142) PMOVZXWD*/ { 3, 16, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5169 /*(5143) PMOVZXWD*/ { 4, 17, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5170 /*(5144) VCVTPS2PH*/ { 19, 35, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 5171 /*(5145) VCVTPS2PH*/ { 20, 14, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 5172 /*(5146) VCVTPS2PH*/ { 19, 35, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 5173 /*(5147) VCVTPS2PH*/ { 20, 14, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 5174 /*(5148) VCVTPS2PH*/ { 22, 14, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 5175 /*(5149) VCVTPS2PH*/ { 22, 116, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1795}, 5176 /*(5150) VCVTPS2PH*/ { 23, 164, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 5177 /*(5151) VCVTPS2PH*/ { 22, 14, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 5178 /*(5152) VCVTPS2PH*/ { 23, 164, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 5179 /*(5153) VCVTPS2PH*/ { 22, 14, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 5180 /*(5154) VCVTPS2PH*/ { 23, 164, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 912}, 5181 /*(5155) VPACKSSWB*/ { 7, 5, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5182 /*(5156) VPACKSSWB*/ { 8, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5183 /*(5157) VPACKSSWB*/ { 7, 5, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5184 /*(5158) VPACKSSWB*/ { 8, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5185 /*(5159) VPACKSSWB*/ { 9, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5186 /*(5160) VPACKSSWB*/ { 10, 6, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5187 /*(5161) VPACKSSWB*/ { 9, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5188 /*(5162) VPACKSSWB*/ { 10, 6, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5189 /*(5163) VPACKSSWB*/ { 9, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5190 /*(5164) VPACKSSWB*/ { 10, 6, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5191 /*(5165) VADDSS*/ { 7, 5, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5192 /*(5166) VADDSS*/ { 8, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 5193 /*(5167) VADDSS*/ { 12, 2, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 5194 /*(5168) VADDSS*/ { 12, 62, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 5195 /*(5169) VADDSS*/ { 15, 61, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 5196 /*(5170) PSHUFHW*/ { 5, 76, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5197 /*(5171) PSHUFHW*/ { 6, 77, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 5198 /*(5172) VPSLLVQ*/ { 13, 5, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5199 /*(5173) VPSLLVQ*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5200 /*(5174) VPSLLVQ*/ { 13, 5, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5201 /*(5175) VPSLLVQ*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5202 /*(5176) VPSLLVQ*/ { 12, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5203 /*(5177) VPSLLVQ*/ { 13, 8, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5204 /*(5178) VPSLLVQ*/ { 12, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5205 /*(5179) VPSLLVQ*/ { 13, 8, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5206 /*(5180) VPSLLVQ*/ { 12, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5207 /*(5181) VPSLLVQ*/ { 13, 8, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5208 /*(5182) VCVTPS2PD*/ { 53, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5209 /*(5183) VCVTPS2PD*/ { 2, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 5210 /*(5184) VCVTPS2PD*/ { 53, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5211 /*(5185) VCVTPS2PD*/ { 2, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 5212 /*(5186) VCVTPS2PD*/ { 22, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5213 /*(5187) VCVTPS2PD*/ { 22, 71, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1737}, 5214 /*(5188) VCVTPS2PD*/ { 31, 142, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 5215 /*(5189) VCVTPS2PD*/ { 22, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5216 /*(5190) VCVTPS2PD*/ { 31, 142, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 5217 /*(5191) VCVTPS2PD*/ { 22, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5218 /*(5192) VCVTPS2PD*/ { 31, 142, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 5219 /*(5193) VMOVSD*/ { 53, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 5220 /*(5194) VMOVSD*/ { 8, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 5221 /*(5195) VMOVSD*/ { 53, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 5222 /*(5196) VMOVSD*/ { 8, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 5223 /*(5197) VMOVSD*/ { 81, 60, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 5224 /*(5198) VMOVSD*/ { 23, 60, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1587}, 5225 /*(5199) VMOVSD*/ { 12, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 5226 /*(5200) VMOVSD*/ { 12, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 5227 /*(5201) VMOVSS*/ { 53, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 5228 /*(5202) VMOVSS*/ { 8, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 5229 /*(5203) VMOVSS*/ { 53, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 5230 /*(5204) VMOVSS*/ { 8, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 5231 /*(5205) VMOVSS*/ { 81, 61, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 5232 /*(5206) VMOVSS*/ { 23, 61, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1547}, 5233 /*(5207) VMOVSS*/ { 12, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 5234 /*(5208) VMOVSS*/ { 12, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 5235 /*(5209) ARPL*/ { 16, 5, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5236 /*(5210) ARPL*/ { 21, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5237 /*(5211) FCHS*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 983}, 5238 /*(5212) OUTSW*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5239 /*(5213) OUTSB*/ { 5, 68, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5240 /*(5214) OUTSD*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5241 /*(5215) OUTSD*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5242 /*(5216) JNLE*/ { 16, 10, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5243 /*(5217) JNLE*/ { 16, 11, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5244 /*(5218) JNLE*/ { 16, 12, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5245 /*(5219) JNLE*/ { 16, 13, 0x8f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5246 /*(5220) WRMSR*/ { 16, 19, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5247 /*(5221) MOVNTI*/ { 3, 0, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5248 /*(5222) MOVNTI*/ { 3, 0, 0xc3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5249 /*(5223) VPSLLDQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 5250 /*(5224) VPSLLDQ*/ { 26, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 5251 /*(5225) VPSLLDQ*/ { 88, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3059}, 5252 /*(5226) VPSLLDQ*/ { 89, 87, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3067}, 5253 /*(5227) VPSLLDQ*/ { 88, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3059}, 5254 /*(5228) VPSLLDQ*/ { 89, 87, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3067}, 5255 /*(5229) VPSLLDQ*/ { 88, 14, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3059}, 5256 /*(5230) VPSLLDQ*/ { 89, 87, 0x73, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3067}, 5257 /*(5231) BNDMOV*/ { 4, 4, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5258 /*(5232) BNDMOV*/ { 3, 165, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5259 /*(5233) BNDMOV*/ { 3, 165, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5260 /*(5234) BNDMOV*/ { 3, 165, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5261 /*(5235) BNDMOV*/ { 4, 4, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5262 /*(5236) BNDMOV*/ { 3, 165, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5263 /*(5237) BNDMOV*/ { 3, 165, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5264 /*(5238) BNDMOV*/ { 3, 165, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5265 /*(5239) MOVNTQ*/ { 3, 0, 0xe7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5266 /*(5240) VRANGESD*/ { 12, 14, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5267 /*(5241) VRANGESD*/ { 12, 81, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 5268 /*(5242) VRANGESD*/ { 15, 82, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 5269 /*(5243) JO*/ { 16, 10, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5270 /*(5244) JO*/ { 16, 11, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5271 /*(5245) JO*/ { 16, 13, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5272 /*(5246) JO*/ { 16, 12, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5273 /*(5247) LAR*/ { 16, 0, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5274 /*(5248) LAR*/ { 21, 1, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5275 /*(5249) VRANGESS*/ { 12, 14, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 5276 /*(5250) VRANGESS*/ { 12, 81, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 5277 /*(5251) VRANGESS*/ { 15, 94, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 884}, 5278 /*(5252) FLDL2T*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3023}, 5279 /*(5253) FSUB*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 5280 /*(5254) FSUB*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 5281 /*(5255) FSUB*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 5282 /*(5256) FSUB*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 5283 /*(5257) ROUNDPD*/ { 3, 130, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 5284 /*(5258) ROUNDPD*/ { 4, 131, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 5285 /*(5259) FLDL2E*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3074}, 5286 /*(5260) ROUNDPS*/ { 3, 130, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 5287 /*(5261) ROUNDPS*/ { 4, 131, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 5288 /*(5262) SBB*/ { 36, 48, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5289 /*(5263) SBB*/ { 1, 93, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5290 /*(5264) SBB*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5291 /*(5265) SBB*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5292 /*(5266) SBB*/ { 36, 48, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5293 /*(5267) SBB*/ { 1, 93, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5294 /*(5268) SBB*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5295 /*(5269) SBB*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5296 /*(5270) SBB*/ { 49, 5, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5297 /*(5271) SBB*/ { 21, 2, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5298 /*(5272) SBB*/ { 49, 5, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5299 /*(5273) SBB*/ { 21, 2, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5300 /*(5274) SBB*/ { 21, 2, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5301 /*(5275) SBB*/ { 16, 5, 0x1a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5302 /*(5276) SBB*/ { 21, 2, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5303 /*(5277) SBB*/ { 16, 5, 0x1b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5304 /*(5278) SBB*/ { 16, 103, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5305 /*(5279) SBB*/ { 16, 104, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5306 /*(5280) BEXTR_XOP*/ { 53, 162, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3077}, 5307 /*(5281) BEXTR_XOP*/ { 53, 162, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3077}, 5308 /*(5282) BEXTR_XOP*/ { 2, 163, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3082}, 5309 /*(5283) BEXTR_XOP*/ { 2, 163, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3082}, 5310 /*(5284) VPERMB*/ { 12, 2, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5311 /*(5285) VPERMB*/ { 15, 29, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5312 /*(5286) VPERMB*/ { 12, 2, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5313 /*(5287) VPERMB*/ { 15, 29, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5314 /*(5288) VPERMB*/ { 12, 2, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5315 /*(5289) VPERMB*/ { 15, 29, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5316 /*(5290) PCMPGTQ*/ { 3, 3, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5317 /*(5291) PCMPGTQ*/ { 4, 4, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5318 /*(5292) FYL2X*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 734}, 5319 /*(5293) VPERMD*/ { 13, 5, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5320 /*(5294) VPERMD*/ { 30, 2, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5321 /*(5295) VPERMD*/ { 12, 2, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5322 /*(5296) VPERMD*/ { 13, 7, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5323 /*(5297) VPERMD*/ { 12, 2, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5324 /*(5298) VPERMD*/ { 13, 7, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5325 /*(5299) PCMPGTW*/ { 3, 0, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5326 /*(5300) PCMPGTW*/ { 4, 1, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5327 /*(5301) PCMPGTW*/ { 3, 3, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5328 /*(5302) PCMPGTW*/ { 4, 4, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5329 /*(5303) VPLZCNTD*/ { 22, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5330 /*(5304) VPLZCNTD*/ { 31, 7, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 5331 /*(5305) VPLZCNTD*/ { 22, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5332 /*(5306) VPLZCNTD*/ { 31, 7, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 5333 /*(5307) VPLZCNTD*/ { 22, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5334 /*(5308) VPLZCNTD*/ { 31, 7, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 5335 /*(5309) PCMPGTB*/ { 3, 0, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5336 /*(5310) PCMPGTB*/ { 4, 1, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5337 /*(5311) PCMPGTB*/ { 3, 3, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5338 /*(5312) PCMPGTB*/ { 4, 4, 0x64, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5339 /*(5313) VPERMQ*/ { 19, 35, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 899}, 5340 /*(5314) VPERMQ*/ { 20, 14, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 5341 /*(5315) VPERMQ*/ { 22, 14, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 5342 /*(5316) VPERMQ*/ { 31, 15, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 5343 /*(5317) VPERMQ*/ { 12, 2, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5344 /*(5318) VPERMQ*/ { 13, 8, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5345 /*(5319) VPERMQ*/ { 22, 14, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 5346 /*(5320) VPERMQ*/ { 31, 15, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 5347 /*(5321) VPERMQ*/ { 12, 2, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5348 /*(5322) VPERMQ*/ { 13, 8, 0x36, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5349 /*(5323) PCMPGTD*/ { 3, 0, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5350 /*(5324) PCMPGTD*/ { 4, 1, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5351 /*(5325) PCMPGTD*/ { 3, 3, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5352 /*(5326) PCMPGTD*/ { 4, 4, 0x66, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5353 /*(5327) VPERMW*/ { 12, 2, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5354 /*(5328) VPERMW*/ { 15, 6, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5355 /*(5329) VPERMW*/ { 12, 2, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5356 /*(5330) VPERMW*/ { 15, 6, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5357 /*(5331) VPERMW*/ { 12, 2, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5358 /*(5332) VPERMW*/ { 15, 6, 0x8d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5359 /*(5333) VMCLEAR*/ { 43, 3, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 746}, 5360 /*(5334) VPLZCNTQ*/ { 22, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 5361 /*(5335) VPLZCNTQ*/ { 31, 8, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 5362 /*(5336) VPLZCNTQ*/ { 22, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 5363 /*(5337) VPLZCNTQ*/ { 31, 8, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 5364 /*(5338) VPLZCNTQ*/ { 22, 2, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 5365 /*(5339) VPLZCNTQ*/ { 31, 8, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 5366 /*(5340) VCVTTPS2QQ*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5367 /*(5341) VCVTTPS2QQ*/ { 31, 142, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 5368 /*(5342) VCVTTPS2QQ*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5369 /*(5343) VCVTTPS2QQ*/ { 31, 142, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 5370 /*(5344) VCVTTPS2QQ*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5371 /*(5345) VCVTTPS2QQ*/ { 22, 71, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2329}, 5372 /*(5346) VCVTTPS2QQ*/ { 31, 142, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 5373 /*(5347) VFNMADD213SS*/ { 13, 5, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5374 /*(5348) VFNMADD213SS*/ { 30, 2, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5375 /*(5349) VFNMADD213SS*/ { 12, 2, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5376 /*(5350) VFNMADD213SS*/ { 12, 62, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 5377 /*(5351) VFNMADD213SS*/ { 15, 61, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5378 /*(5352) VPMOVZXWQ*/ { 2, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5379 /*(5353) VPMOVZXWQ*/ { 53, 5, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5380 /*(5354) VPMOVZXWQ*/ { 2, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5381 /*(5355) VPMOVZXWQ*/ { 53, 5, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5382 /*(5356) VPMOVZXWQ*/ { 54, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5383 /*(5357) VPMOVZXWQ*/ { 55, 115, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5384 /*(5358) VPMOVZXWQ*/ { 54, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5385 /*(5359) VPMOVZXWQ*/ { 55, 115, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5386 /*(5360) VPMOVZXWQ*/ { 54, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5387 /*(5361) VPMOVZXWQ*/ { 55, 115, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5388 /*(5362) PHMINPOSUW*/ { 3, 16, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5389 /*(5363) PHMINPOSUW*/ { 4, 17, 0x41, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5390 /*(5364) INVPCID*/ { 3, 108, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5391 /*(5365) INVPCID*/ { 3, 108, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5392 /*(5366) VFNMADD213SD*/ { 13, 5, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5393 /*(5367) VFNMADD213SD*/ { 30, 2, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5394 /*(5368) VFNMADD213SD*/ { 12, 2, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5395 /*(5369) VFNMADD213SD*/ { 12, 62, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 5396 /*(5370) VFNMADD213SD*/ { 15, 60, 0xad, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5397 /*(5371) CBW*/ { 16, 36, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5398 /*(5372) VMSAVE*/ { 66, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 62}, 5399 /*(5373) EXTRQ*/ { 52, 166, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1269}, 5400 /*(5374) EXTRQ*/ { 4, 17, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5401 /*(5375) VPMOVZXWD*/ { 2, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5402 /*(5376) VPMOVZXWD*/ { 53, 5, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5403 /*(5377) VPMOVZXWD*/ { 2, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5404 /*(5378) VPMOVZXWD*/ { 53, 5, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5405 /*(5379) VPMOVZXWD*/ { 54, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5406 /*(5380) VPMOVZXWD*/ { 55, 34, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5407 /*(5381) VPMOVZXWD*/ { 54, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5408 /*(5382) VPMOVZXWD*/ { 55, 34, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5409 /*(5383) VPMOVZXWD*/ { 54, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5410 /*(5384) VPMOVZXWD*/ { 55, 34, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5411 /*(5385) CMPSQ*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5412 /*(5386) CMPSS*/ { 5, 76, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5413 /*(5387) CMPSS*/ { 6, 77, 0xc2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 5414 /*(5388) CMPSW*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5415 /*(5389) VPAVGW*/ { 7, 5, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5416 /*(5390) VPAVGW*/ { 8, 2, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5417 /*(5391) VPAVGW*/ { 7, 5, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5418 /*(5392) VPAVGW*/ { 8, 2, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5419 /*(5393) VPAVGW*/ { 9, 2, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5420 /*(5394) VPAVGW*/ { 10, 6, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5421 /*(5395) VPAVGW*/ { 9, 2, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5422 /*(5396) VPAVGW*/ { 10, 6, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5423 /*(5397) VPAVGW*/ { 9, 2, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5424 /*(5398) VPAVGW*/ { 10, 6, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5425 /*(5399) CMPSB*/ { 5, 68, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5426 /*(5400) CMPSD*/ { 5, 68, 0xa7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5427 /*(5401) VPAVGB*/ { 7, 5, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5428 /*(5402) VPAVGB*/ { 8, 2, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5429 /*(5403) VPAVGB*/ { 7, 5, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5430 /*(5404) VPAVGB*/ { 8, 2, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5431 /*(5405) VPAVGB*/ { 9, 2, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5432 /*(5406) VPAVGB*/ { 10, 29, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5433 /*(5407) VPAVGB*/ { 9, 2, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5434 /*(5408) VPAVGB*/ { 10, 29, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5435 /*(5409) VPAVGB*/ { 9, 2, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5436 /*(5410) VPAVGB*/ { 10, 29, 0xe0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5437 /*(5411) PSIGNW*/ { 3, 0, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 5438 /*(5412) PSIGNW*/ { 4, 1, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 5439 /*(5413) PSIGNW*/ { 3, 3, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5440 /*(5414) PSIGNW*/ { 4, 4, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5441 /*(5415) VPMAXSD*/ { 7, 5, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5442 /*(5416) VPMAXSD*/ { 8, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5443 /*(5417) VPMAXSD*/ { 7, 5, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5444 /*(5418) VPMAXSD*/ { 8, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5445 /*(5419) VPMAXSD*/ { 12, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5446 /*(5420) VPMAXSD*/ { 13, 7, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5447 /*(5421) VPMAXSD*/ { 12, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5448 /*(5422) VPMAXSD*/ { 13, 7, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5449 /*(5423) VPMAXSD*/ { 12, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5450 /*(5424) VPMAXSD*/ { 13, 7, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5451 /*(5425) VPMAXSB*/ { 7, 5, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5452 /*(5426) VPMAXSB*/ { 8, 2, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5453 /*(5427) VPMAXSB*/ { 7, 5, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5454 /*(5428) VPMAXSB*/ { 8, 2, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5455 /*(5429) VPMAXSB*/ { 9, 2, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 5456 /*(5430) VPMAXSB*/ { 10, 29, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 5457 /*(5431) VPMAXSB*/ { 9, 2, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 5458 /*(5432) VPMAXSB*/ { 10, 29, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 5459 /*(5433) VPMAXSB*/ { 9, 2, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 5460 /*(5434) VPMAXSB*/ { 10, 29, 0x3c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 5461 /*(5435) VMULSS*/ { 7, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5462 /*(5436) VMULSS*/ { 8, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 5463 /*(5437) VMULSS*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 5464 /*(5438) VMULSS*/ { 12, 62, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 5465 /*(5439) VMULSS*/ { 15, 61, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 5466 /*(5440) KXORQ*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5467 /*(5441) VPMAXSW*/ { 7, 5, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5468 /*(5442) VPMAXSW*/ { 8, 2, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5469 /*(5443) VPMAXSW*/ { 7, 5, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5470 /*(5444) VPMAXSW*/ { 8, 2, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5471 /*(5445) VPMAXSW*/ { 9, 2, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5472 /*(5446) VPMAXSW*/ { 10, 6, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5473 /*(5447) VPMAXSW*/ { 9, 2, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5474 /*(5448) VPMAXSW*/ { 10, 6, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5475 /*(5449) VPMAXSW*/ { 9, 2, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 5476 /*(5450) VPMAXSW*/ { 10, 6, 0xee, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 5477 /*(5451) PSIGND*/ { 3, 0, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 5478 /*(5452) PSIGND*/ { 4, 1, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 5479 /*(5453) PSIGND*/ { 3, 3, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5480 /*(5454) PSIGND*/ { 4, 4, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5481 /*(5455) PSIGNB*/ { 3, 0, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 5482 /*(5456) PSIGNB*/ { 4, 1, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 5483 /*(5457) PSIGNB*/ { 3, 3, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5484 /*(5458) PSIGNB*/ { 4, 4, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5485 /*(5459) VPMAXSQ*/ { 12, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5486 /*(5460) VPMAXSQ*/ { 13, 8, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5487 /*(5461) VPMAXSQ*/ { 12, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5488 /*(5462) VPMAXSQ*/ { 13, 8, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5489 /*(5463) VPMAXSQ*/ { 12, 2, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5490 /*(5464) VPMAXSQ*/ { 13, 8, 0x3d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5491 /*(5465) KXORD*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1770}, 5492 /*(5466) KXORB*/ { 30, 2, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 906}, 5493 /*(5467) XSETBV*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1098}, 5494 /*(5468) VMULSD*/ { 7, 5, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 5495 /*(5469) VMULSD*/ { 8, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 5496 /*(5470) VMULSD*/ { 12, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 816}, 5497 /*(5471) VMULSD*/ { 12, 62, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 823}, 5498 /*(5472) VMULSD*/ { 15, 60, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 830}, 5499 /*(5473) BEXTR*/ { 7, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5500 /*(5474) BEXTR*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 156}, 5501 /*(5475) BEXTR*/ { 8, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 54}, 5502 /*(5476) BEXTR*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1627}, 5503 /*(5477) BEXTR*/ { 13, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 174}, 5504 /*(5478) BEXTR*/ { 30, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1633}, 5505 /*(5479) FXTRACT*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3088}, 5506 /*(5480) VMOVNTDQA*/ { 53, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5507 /*(5481) VMOVNTDQA*/ { 53, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5508 /*(5482) VMOVNTDQA*/ { 59, 110, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3091}, 5509 /*(5483) VMOVNTDQA*/ { 59, 110, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3091}, 5510 /*(5484) VMOVNTDQA*/ { 59, 110, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3091}, 5511 /*(5485) CALL_FAR*/ { 0, 5, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5512 /*(5486) CALL_FAR*/ { 16, 140, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5513 /*(5487) FCOMPP*/ { 66, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5514 /*(5488) GF2P8AFFINEQB*/ { 4, 73, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 5515 /*(5489) GF2P8AFFINEQB*/ { 3, 72, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 5516 /*(5490) V4FMADDPS*/ { 15, 9, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 77}, 5517 /*(5491) MASKMOVDQU*/ { 4, 167, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5518 /*(5492) FENI8087_NOP*/ { 66, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 983}, 5519 /*(5493) VPHSUBBW*/ { 19, 5, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 5520 /*(5494) VPHSUBBW*/ { 20, 2, 0xe1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 5521 /*(5495) PFCPIT1*/ { 16, 79, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 5522 /*(5496) PFCPIT1*/ { 21, 80, 0xa6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 5523 /*(5497) PMOVSXDQ*/ { 3, 16, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5524 /*(5498) PMOVSXDQ*/ { 4, 17, 0x25, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5525 /*(5499) FISUBR*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 5526 /*(5500) FISUBR*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 269}, 5527 /*(5501) VCVTPS2QQ*/ { 22, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5528 /*(5502) VCVTPS2QQ*/ { 31, 142, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 5529 /*(5503) VCVTPS2QQ*/ { 22, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5530 /*(5504) VCVTPS2QQ*/ { 31, 142, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 5531 /*(5505) VCVTPS2QQ*/ { 22, 2, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1658}, 5532 /*(5506) VCVTPS2QQ*/ { 22, 58, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2329}, 5533 /*(5507) VCVTPS2QQ*/ { 31, 142, 0x7b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1668}, 5534 /*(5508) CMOVNBE*/ { 16, 0, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5535 /*(5509) CMOVNBE*/ { 21, 1, 0x47, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5536 /*(5510) VBROADCASTI32X2*/ { 72, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3102}, 5537 /*(5511) VBROADCASTI32X2*/ { 50, 129, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3113}, 5538 /*(5512) VBROADCASTI32X2*/ { 72, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2723}, 5539 /*(5513) VBROADCASTI32X2*/ { 50, 129, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2734}, 5540 /*(5514) VBROADCASTI32X2*/ { 72, 2, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2744}, 5541 /*(5515) VBROADCASTI32X2*/ { 50, 129, 0x59, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2755}, 5542 /*(5516) VPACKSSDW*/ { 7, 5, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5543 /*(5517) VPACKSSDW*/ { 8, 2, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5544 /*(5518) VPACKSSDW*/ { 7, 5, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5545 /*(5519) VPACKSSDW*/ { 8, 2, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 5546 /*(5520) VPACKSSDW*/ { 12, 2, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5547 /*(5521) VPACKSSDW*/ { 13, 7, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5548 /*(5522) VPACKSSDW*/ { 12, 2, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5549 /*(5523) VPACKSSDW*/ { 13, 7, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5550 /*(5524) VPACKSSDW*/ { 12, 2, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 346}, 5551 /*(5525) VPACKSSDW*/ { 13, 7, 0x6b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 354}, 5552 /*(5526) XOR*/ { 36, 35, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 359}, 5553 /*(5527) XOR*/ { 1, 14, 0x80, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 5554 /*(5528) XOR*/ { 36, 49, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 359}, 5555 /*(5529) XOR*/ { 1, 89, 0x81, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 5556 /*(5530) XOR*/ { 36, 35, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 359}, 5557 /*(5531) XOR*/ { 1, 14, 0x82, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 5558 /*(5532) XOR*/ { 36, 48, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 359}, 5559 /*(5533) XOR*/ { 1, 93, 0x83, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 238}, 5560 /*(5534) XOR*/ { 49, 5, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5561 /*(5535) XOR*/ { 21, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5562 /*(5536) XOR*/ { 49, 5, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5563 /*(5537) XOR*/ { 21, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5564 /*(5538) XOR*/ { 21, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5565 /*(5539) XOR*/ { 16, 5, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5566 /*(5540) XOR*/ { 21, 2, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5567 /*(5541) XOR*/ { 16, 5, 0x33, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5568 /*(5542) XOR*/ { 16, 112, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5569 /*(5543) XOR*/ { 16, 104, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5570 /*(5544) ORPD*/ { 3, 3, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 5571 /*(5545) ORPD*/ { 4, 4, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5572 /*(5546) ORPS*/ { 3, 0, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 5573 /*(5547) ORPS*/ { 4, 1, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5574 /*(5548) CLFLUSHOPT*/ { 43, 3, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 449}, 5575 /*(5549) AESENC*/ { 4, 4, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5576 /*(5550) AESENC*/ { 3, 3, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5577 /*(5551) VEXTRACTPS*/ { 53, 35, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 5578 /*(5552) VEXTRACTPS*/ { 2, 14, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 5579 /*(5553) VEXTRACTPS*/ { 76, 14, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2770}, 5580 /*(5554) VEXTRACTPS*/ { 78, 154, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1568}, 5581 /*(5555) WRPKRU*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3123}, 5582 /*(5556) VCVTSS2SD*/ { 7, 5, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5583 /*(5557) VCVTSS2SD*/ { 8, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 5584 /*(5558) VCVTSS2SD*/ { 12, 2, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 864}, 5585 /*(5559) VCVTSS2SD*/ { 12, 59, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 871}, 5586 /*(5560) VCVTSS2SD*/ { 15, 61, 0x5a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 878}, 5587 /*(5561) VCVTSS2SI*/ { 53, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 5588 /*(5562) VCVTSS2SI*/ { 2, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 5589 /*(5563) VCVTSS2SI*/ { 19, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3128}, 5590 /*(5564) VCVTSS2SI*/ { 20, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3135}, 5591 /*(5565) VCVTSS2SI*/ { 19, 5, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3143}, 5592 /*(5566) VCVTSS2SI*/ { 20, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3150}, 5593 /*(5567) VCVTSS2SI*/ { 76, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2344}, 5594 /*(5568) VCVTSS2SI*/ { 77, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2354}, 5595 /*(5569) VCVTSS2SI*/ { 76, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2367}, 5596 /*(5570) VCVTSS2SI*/ { 77, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2377}, 5597 /*(5571) VCVTSS2SI*/ { 78, 139, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2390}, 5598 /*(5572) VCVTSS2SI*/ { 79, 139, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2399}, 5599 /*(5573) VCVTSS2SI*/ { 77, 2, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2411}, 5600 /*(5574) VCVTSS2SI*/ { 77, 62, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2424}, 5601 /*(5575) VCVTSS2SI*/ { 79, 139, 0x2d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2437}, 5602 /*(5576) FYL2XP1*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 47}, 5603 /*(5577) FRNDINT*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1820}, 5604 /*(5578) MOVMSKPS*/ { 4, 1, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 5605 /*(5579) PHSUBSW*/ { 3, 0, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 5606 /*(5580) PHSUBSW*/ { 4, 1, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 5607 /*(5581) PHSUBSW*/ { 3, 3, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5608 /*(5582) PHSUBSW*/ { 4, 4, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5609 /*(5583) MOVMSKPD*/ { 4, 4, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 5610 /*(5584) VPMOVMSKB*/ { 2, 2, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5611 /*(5585) VPMOVMSKB*/ { 2, 2, 0xd7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5612 /*(5586) MOVSHDUP*/ { 5, 50, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5613 /*(5587) MOVSHDUP*/ { 6, 51, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 5614 /*(5588) VMLAUNCH*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3158}, 5615 /*(5589) STAC*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 315}, 5616 /*(5590) VPDPWSSD*/ { 12, 2, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5617 /*(5591) VPDPWSSD*/ { 13, 7, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5618 /*(5592) VPDPWSSD*/ { 12, 2, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5619 /*(5593) VPDPWSSD*/ { 13, 7, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5620 /*(5594) VPDPWSSD*/ { 12, 2, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5621 /*(5595) VPDPWSSD*/ { 13, 7, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5622 /*(5596) RDSSPQ*/ { 41, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3163}, 5623 /*(5597) VFNMADD213PS*/ { 13, 5, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5624 /*(5598) VFNMADD213PS*/ { 30, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5625 /*(5599) VFNMADD213PS*/ { 13, 5, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5626 /*(5600) VFNMADD213PS*/ { 30, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5627 /*(5601) VFNMADD213PS*/ { 12, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5628 /*(5602) VFNMADD213PS*/ { 12, 58, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 5629 /*(5603) VFNMADD213PS*/ { 13, 7, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5630 /*(5604) VFNMADD213PS*/ { 12, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5631 /*(5605) VFNMADD213PS*/ { 13, 7, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5632 /*(5606) VFNMADD213PS*/ { 12, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5633 /*(5607) VFNMADD213PS*/ { 13, 7, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5634 /*(5608) VFMSUB231PD*/ { 13, 5, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5635 /*(5609) VFMSUB231PD*/ { 30, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5636 /*(5610) VFMSUB231PD*/ { 13, 5, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5637 /*(5611) VFMSUB231PD*/ { 30, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5638 /*(5612) VFMSUB231PD*/ { 12, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5639 /*(5613) VFMSUB231PD*/ { 12, 58, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 5640 /*(5614) VFMSUB231PD*/ { 13, 8, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5641 /*(5615) VFMSUB231PD*/ { 12, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5642 /*(5616) VFMSUB231PD*/ { 13, 8, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5643 /*(5617) VFMSUB231PD*/ { 12, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5644 /*(5618) VFMSUB231PD*/ { 13, 8, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5645 /*(5619) VPMOVM2W*/ { 11, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 5646 /*(5620) VPMOVM2W*/ { 11, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 5647 /*(5621) VPMOVM2W*/ { 11, 2, 0x28, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 5648 /*(5622) VCVTPD2UDQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 5649 /*(5623) VCVTPD2UDQ*/ { 22, 58, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2555}, 5650 /*(5624) VCVTPD2UDQ*/ { 31, 8, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 5651 /*(5625) VCVTPD2UDQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 5652 /*(5626) VCVTPD2UDQ*/ { 31, 8, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 5653 /*(5627) VCVTPD2UDQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2545}, 5654 /*(5628) VCVTPD2UDQ*/ { 31, 8, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2565}, 5655 /*(5629) MOVSD_XMM*/ { 5, 50, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 5656 /*(5630) MOVSD_XMM*/ { 6, 51, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 5657 /*(5631) MOVSD_XMM*/ { 5, 50, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 5658 /*(5632) MOVSD_XMM*/ { 6, 51, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 5659 /*(5633) VFMSUB231PS*/ { 13, 5, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5660 /*(5634) VFMSUB231PS*/ { 30, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5661 /*(5635) VFMSUB231PS*/ { 13, 5, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 5662 /*(5636) VFMSUB231PS*/ { 30, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 5663 /*(5637) VFMSUB231PS*/ { 12, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5664 /*(5638) VFMSUB231PS*/ { 12, 58, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 5665 /*(5639) VFMSUB231PS*/ { 13, 7, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5666 /*(5640) VFMSUB231PS*/ { 12, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5667 /*(5641) VFMSUB231PS*/ { 13, 7, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5668 /*(5642) VFMSUB231PS*/ { 12, 2, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5669 /*(5643) VFMSUB231PS*/ { 13, 7, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5670 /*(5644) VFNMADD213PD*/ { 13, 5, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5671 /*(5645) VFNMADD213PD*/ { 30, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5672 /*(5646) VFNMADD213PD*/ { 13, 5, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5673 /*(5647) VFNMADD213PD*/ { 30, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5674 /*(5648) VFNMADD213PD*/ { 12, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5675 /*(5649) VFNMADD213PD*/ { 12, 58, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 5676 /*(5650) VFNMADD213PD*/ { 13, 8, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5677 /*(5651) VFNMADD213PD*/ { 12, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5678 /*(5652) VFNMADD213PD*/ { 13, 8, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5679 /*(5653) VFNMADD213PD*/ { 12, 2, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5680 /*(5654) VFNMADD213PD*/ { 13, 8, 0xac, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5681 /*(5655) VPMOVM2D*/ { 11, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 5682 /*(5656) VPMOVM2D*/ { 11, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 5683 /*(5657) VPMOVM2D*/ { 11, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 41}, 5684 /*(5658) CLDEMOTE*/ { 44, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 323}, 5685 /*(5659) SUBSD*/ { 5, 50, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 5686 /*(5660) SUBSD*/ { 6, 51, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 5687 /*(5661) SQRTSD*/ { 5, 50, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 5688 /*(5662) SQRTSD*/ { 6, 51, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 5689 /*(5663) FBSTP*/ { 0, 5, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 239}, 5690 /*(5664) VAESENC*/ { 8, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5691 /*(5665) VAESENC*/ { 7, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5692 /*(5666) VAESENC*/ { 34, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 5693 /*(5667) VAESENC*/ { 35, 42, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 5694 /*(5668) VAESENC*/ { 34, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 5695 /*(5669) VAESENC*/ { 35, 42, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 5696 /*(5670) VAESENC*/ { 34, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 240}, 5697 /*(5671) VAESENC*/ { 35, 42, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 247}, 5698 /*(5672) VAESENC*/ { 8, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5699 /*(5673) VAESENC*/ { 7, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5700 /*(5674) VMOVLPD*/ { 7, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 5701 /*(5675) VMOVLPD*/ { 53, 5, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5702 /*(5676) VMOVLPD*/ { 61, 60, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2167}, 5703 /*(5677) VMOVLPD*/ { 59, 60, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 582}, 5704 /*(5678) SQRTSS*/ { 5, 50, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5705 /*(5679) SQRTSS*/ { 6, 51, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 5706 /*(5680) SUBSS*/ { 5, 50, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 5707 /*(5681) SUBSS*/ { 6, 51, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 5708 /*(5682) VMOVLHPS*/ { 8, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 5709 /*(5683) VMOVLHPS*/ { 60, 2, 0x16, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2285}, 5710 /*(5684) VMOVLPS*/ { 7, 5, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 5711 /*(5685) VMOVLPS*/ { 53, 5, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5712 /*(5686) VMOVLPS*/ { 61, 129, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2175}, 5713 /*(5687) VMOVLPS*/ { 59, 129, 0x13, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 622}, 5714 /*(5688) VCVTPD2DQ*/ { 53, 5, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 5715 /*(5689) VCVTPD2DQ*/ { 2, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 5716 /*(5690) VCVTPD2DQ*/ { 53, 5, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1369}, 5717 /*(5691) VCVTPD2DQ*/ { 2, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1374}, 5718 /*(5692) VCVTPD2DQ*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 5719 /*(5693) VCVTPD2DQ*/ { 22, 58, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3169}, 5720 /*(5694) VCVTPD2DQ*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1588}, 5721 /*(5695) VCVTPD2DQ*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 5722 /*(5696) VCVTPD2DQ*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1588}, 5723 /*(5697) VCVTPD2DQ*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 5724 /*(5698) VCVTPD2DQ*/ { 31, 8, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1588}, 5725 /*(5699) VPCOMQ*/ { 13, 35, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5726 /*(5700) VPCOMQ*/ { 30, 14, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5727 /*(5701) VCVTTSS2SI*/ { 53, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 5728 /*(5702) VCVTTSS2SI*/ { 2, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 5729 /*(5703) VCVTTSS2SI*/ { 19, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3128}, 5730 /*(5704) VCVTTSS2SI*/ { 20, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3135}, 5731 /*(5705) VCVTTSS2SI*/ { 19, 5, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3143}, 5732 /*(5706) VCVTTSS2SI*/ { 20, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3150}, 5733 /*(5707) VCVTTSS2SI*/ { 76, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2344}, 5734 /*(5708) VCVTTSS2SI*/ { 77, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2354}, 5735 /*(5709) VCVTTSS2SI*/ { 76, 59, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2367}, 5736 /*(5710) VCVTTSS2SI*/ { 77, 59, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2377}, 5737 /*(5711) VCVTTSS2SI*/ { 78, 139, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2390}, 5738 /*(5712) VCVTTSS2SI*/ { 79, 139, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2399}, 5739 /*(5713) VCVTTSS2SI*/ { 77, 2, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2411}, 5740 /*(5714) VCVTTSS2SI*/ { 77, 59, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2424}, 5741 /*(5715) VCVTTSS2SI*/ { 79, 139, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2437}, 5742 /*(5716) FCOS*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3179}, 5743 /*(5717) VPMOVW2M*/ { 11, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 5744 /*(5718) VPMOVW2M*/ { 11, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 5745 /*(5719) VPMOVW2M*/ { 11, 2, 0x29, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 5746 /*(5720) VPCOMW*/ { 13, 35, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5747 /*(5721) VPCOMW*/ { 30, 14, 0xcd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5748 /*(5722) SGDT*/ { 0, 86, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5749 /*(5723) SGDT*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 5750 /*(5724) VPCOMB*/ { 13, 35, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5751 /*(5725) VPCOMB*/ { 30, 14, 0xcc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5752 /*(5726) VPCOMD*/ { 13, 35, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5753 /*(5727) VPCOMD*/ { 30, 14, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5754 /*(5728) EXTRACTPS*/ { 3, 130, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 5755 /*(5729) EXTRACTPS*/ { 4, 131, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 5756 /*(5730) FCOM*/ { 0, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5757 /*(5731) FCOM*/ { 0, 5, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5758 /*(5732) FCOM*/ { 1, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 5759 /*(5733) FCOM*/ { 1, 2, 0xdc, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 5760 /*(5734) VPMOVZXBD*/ { 2, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5761 /*(5735) VPMOVZXBD*/ { 53, 5, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5762 /*(5736) VPMOVZXBD*/ { 2, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5763 /*(5737) VPMOVZXBD*/ { 53, 5, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5764 /*(5738) VPMOVZXBD*/ { 54, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5765 /*(5739) VPMOVZXBD*/ { 55, 31, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5766 /*(5740) VPMOVZXBD*/ { 54, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5767 /*(5741) VPMOVZXBD*/ { 55, 31, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5768 /*(5742) VPMOVZXBD*/ { 54, 2, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5769 /*(5743) VPMOVZXBD*/ { 55, 31, 0x31, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5770 /*(5744) VPMOVZXBW*/ { 2, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5771 /*(5745) VPMOVZXBW*/ { 53, 5, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5772 /*(5746) VPMOVZXBW*/ { 2, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5773 /*(5747) VPMOVZXBW*/ { 53, 5, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5774 /*(5748) VPMOVZXBW*/ { 54, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5775 /*(5749) VPMOVZXBW*/ { 55, 101, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5776 /*(5750) VPMOVZXBW*/ { 54, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5777 /*(5751) VPMOVZXBW*/ { 55, 101, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5778 /*(5752) VPMOVZXBW*/ { 54, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5779 /*(5753) VPMOVZXBW*/ { 55, 101, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5780 /*(5754) VPMOVZXBQ*/ { 2, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5781 /*(5755) VPMOVZXBQ*/ { 53, 5, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5782 /*(5756) VPMOVZXBQ*/ { 2, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 5783 /*(5757) VPMOVZXBQ*/ { 53, 5, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 5784 /*(5758) VPMOVZXBQ*/ { 54, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5785 /*(5759) VPMOVZXBQ*/ { 55, 118, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5786 /*(5760) VPMOVZXBQ*/ { 54, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5787 /*(5761) VPMOVZXBQ*/ { 55, 118, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5788 /*(5762) VPMOVZXBQ*/ { 54, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 5789 /*(5763) VPMOVZXBQ*/ { 55, 118, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 5790 /*(5764) XSAVEOPT*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3182}, 5791 /*(5765) MUL*/ { 0, 5, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 5792 /*(5766) MUL*/ { 1, 2, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 5793 /*(5767) MUL*/ { 0, 5, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 61}, 5794 /*(5768) MUL*/ { 1, 2, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 5795 /*(5769) VINSERTPS*/ { 7, 35, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 5796 /*(5770) VINSERTPS*/ { 8, 14, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 5797 /*(5771) VINSERTPS*/ { 60, 14, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2878}, 5798 /*(5772) VINSERTPS*/ { 61, 168, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2887}, 5799 /*(5773) LWPVAL*/ { 24, 162, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3187}, 5800 /*(5774) LWPVAL*/ { 26, 163, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3191}, 5801 /*(5775) VPMOVWB*/ { 22, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 5802 /*(5776) VPMOVWB*/ { 23, 101, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 5803 /*(5777) VPMOVWB*/ { 22, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 5804 /*(5778) VPMOVWB*/ { 23, 101, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 5805 /*(5779) VPMOVWB*/ { 22, 2, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 5806 /*(5780) VPMOVWB*/ { 23, 101, 0x30, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 5807 /*(5781) PCLMULQDQ*/ { 4, 54, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 5808 /*(5782) PCLMULQDQ*/ { 3, 105, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 5809 /*(5783) FNOP*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 5810 /*(5784) VCVTUQQ2PD*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 5811 /*(5785) VCVTUQQ2PD*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2664}, 5812 /*(5786) VCVTUQQ2PD*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 5813 /*(5787) VCVTUQQ2PD*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2664}, 5814 /*(5788) VCVTUQQ2PD*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 5815 /*(5789) VCVTUQQ2PD*/ { 22, 58, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2672}, 5816 /*(5790) VCVTUQQ2PD*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2664}, 5817 /*(5791) FSTP*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5818 /*(5792) FSTP*/ { 0, 5, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 5819 /*(5793) FSTP*/ { 0, 5, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5820 /*(5794) FSTP*/ { 1, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5821 /*(5795) FSTP*/ { 1, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 5822 /*(5796) FSTP*/ { 1, 2, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 17}, 5823 /*(5797) FNINIT*/ { 66, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 60}, 5824 /*(5798) VCVTUQQ2PS*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 5825 /*(5799) VCVTUQQ2PS*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1588}, 5826 /*(5800) VCVTUQQ2PS*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 5827 /*(5801) VCVTUQQ2PS*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1588}, 5828 /*(5802) VCVTUQQ2PS*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1577}, 5829 /*(5803) VCVTUQQ2PS*/ { 22, 58, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3169}, 5830 /*(5804) VCVTUQQ2PS*/ { 31, 8, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1588}, 5831 /*(5805) FIADD*/ { 0, 5, 0xda, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5832 /*(5806) FIADD*/ { 0, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5833 /*(5807) VPSIGNW*/ { 7, 5, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5834 /*(5808) VPSIGNW*/ { 8, 2, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5835 /*(5809) VPSIGNW*/ { 7, 5, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5836 /*(5810) VPSIGNW*/ { 8, 2, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5837 /*(5811) VFMSUB213SD*/ { 13, 5, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 5838 /*(5812) VFMSUB213SD*/ { 30, 2, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 5839 /*(5813) VFMSUB213SD*/ { 12, 2, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5840 /*(5814) VFMSUB213SD*/ { 12, 62, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 5841 /*(5815) VFMSUB213SD*/ { 15, 60, 0xab, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5842 /*(5816) PTEST*/ { 3, 16, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5843 /*(5817) PTEST*/ { 4, 17, 0x17, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5844 /*(5818) VRCP14SD*/ { 12, 2, 0x4d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 5845 /*(5819) VRCP14SD*/ { 15, 60, 0x4d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 5846 /*(5820) BLCFILL*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2523}, 5847 /*(5821) BLCFILL*/ { 24, 5, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2523}, 5848 /*(5822) BLCFILL*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2527}, 5849 /*(5823) BLCFILL*/ { 26, 2, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2527}, 5850 /*(5824) VPSIGND*/ { 7, 5, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5851 /*(5825) VPSIGND*/ { 8, 2, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5852 /*(5826) VPSIGND*/ { 7, 5, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5853 /*(5827) VPSIGND*/ { 8, 2, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5854 /*(5828) VPSIGNB*/ { 7, 5, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5855 /*(5829) VPSIGNB*/ { 8, 2, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5856 /*(5830) VPSIGNB*/ { 7, 5, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 5857 /*(5831) VPSIGNB*/ { 8, 2, 0x8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 5858 /*(5832) MOVSXD*/ { 16, 5, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5859 /*(5833) MOVSXD*/ { 21, 2, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5860 /*(5834) VRCP14SS*/ { 12, 2, 0x4d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 5861 /*(5835) VRCP14SS*/ { 15, 61, 0x4d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 5862 /*(5836) AAD*/ { 16, 112, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5863 /*(5837) AAA*/ { 16, 36, 0x37, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5864 /*(5838) AAM*/ { 16, 112, 0xd4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5865 /*(5839) AAS*/ { 16, 36, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5866 /*(5840) PHADDD*/ { 3, 0, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 5867 /*(5841) PHADDD*/ { 4, 1, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 5868 /*(5842) PHADDD*/ { 3, 3, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5869 /*(5843) PHADDD*/ { 4, 4, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5870 /*(5844) KTESTQ*/ { 20, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1704}, 5871 /*(5845) VPMACSDQL*/ { 13, 65, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5872 /*(5846) VPMACSDQL*/ { 30, 66, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5873 /*(5847) PHADDW*/ { 3, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 5874 /*(5848) PHADDW*/ { 4, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 5875 /*(5849) PHADDW*/ { 3, 3, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 5876 /*(5850) PHADDW*/ { 4, 4, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 5877 /*(5851) VPMACSDQH*/ { 13, 65, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5878 /*(5852) VPMACSDQH*/ { 30, 66, 0x9f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5879 /*(5853) VMOVUPS*/ { 53, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5880 /*(5854) VMOVUPS*/ { 2, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 5881 /*(5855) VMOVUPS*/ { 53, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5882 /*(5856) VMOVUPS*/ { 2, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 5883 /*(5857) VMOVUPS*/ { 53, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5884 /*(5858) VMOVUPS*/ { 2, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 5885 /*(5859) VMOVUPS*/ { 53, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 5886 /*(5860) VMOVUPS*/ { 2, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 5887 /*(5861) VMOVUPS*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5888 /*(5862) VMOVUPS*/ { 81, 110, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 5889 /*(5863) VMOVUPS*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5890 /*(5864) VMOVUPS*/ { 23, 110, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 5891 /*(5865) VMOVUPS*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5892 /*(5866) VMOVUPS*/ { 81, 110, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 5893 /*(5867) VMOVUPS*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5894 /*(5868) VMOVUPS*/ { 23, 110, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 5895 /*(5869) VMOVUPS*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5896 /*(5870) VMOVUPS*/ { 81, 110, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 5897 /*(5871) VMOVUPS*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 5898 /*(5872) VMOVUPS*/ { 23, 110, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2965}, 5899 /*(5873) VPMACSDD*/ { 13, 65, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 5900 /*(5874) VPMACSDD*/ { 30, 66, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 5901 /*(5875) VPCMPUQ*/ { 47, 14, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5902 /*(5876) VPCMPUQ*/ { 48, 15, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 89}, 5903 /*(5877) VPCMPUQ*/ { 47, 14, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5904 /*(5878) VPCMPUQ*/ { 48, 15, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 89}, 5905 /*(5879) VPCMPUQ*/ { 47, 14, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5906 /*(5880) VPCMPUQ*/ { 48, 15, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 89}, 5907 /*(5881) WBNOINVD*/ { 96, 19, 0x9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 4}, 5908 /*(5882) VERW*/ { 0, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 269}, 5909 /*(5883) VERW*/ { 1, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 270}, 5910 /*(5884) VMOVUPD*/ { 53, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5911 /*(5885) VMOVUPD*/ { 2, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5912 /*(5886) VMOVUPD*/ { 53, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5913 /*(5887) VMOVUPD*/ { 2, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5914 /*(5888) VMOVUPD*/ { 53, 5, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5915 /*(5889) VMOVUPD*/ { 2, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5916 /*(5890) VMOVUPD*/ { 53, 5, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 199}, 5917 /*(5891) VMOVUPD*/ { 2, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 5918 /*(5892) VMOVUPD*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5919 /*(5893) VMOVUPD*/ { 81, 137, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 5920 /*(5894) VMOVUPD*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5921 /*(5895) VMOVUPD*/ { 23, 137, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 5922 /*(5896) VMOVUPD*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5923 /*(5897) VMOVUPD*/ { 81, 137, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 5924 /*(5898) VMOVUPD*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5925 /*(5899) VMOVUPD*/ { 23, 137, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 5926 /*(5900) VMOVUPD*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5927 /*(5901) VMOVUPD*/ { 81, 137, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 5928 /*(5902) VMOVUPD*/ { 22, 2, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 5929 /*(5903) VMOVUPD*/ { 23, 137, 0x11, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 5930 /*(5904) VPCMPUW*/ { 47, 14, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5931 /*(5905) VPCMPUW*/ { 58, 57, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 5932 /*(5906) VPCMPUW*/ { 47, 14, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5933 /*(5907) VPCMPUW*/ { 58, 57, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 5934 /*(5908) VPCMPUW*/ { 47, 14, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5935 /*(5909) VPCMPUW*/ { 58, 57, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 125}, 5936 /*(5910) VPEXPANDB*/ { 81, 149, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 5937 /*(5911) VPEXPANDB*/ { 22, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5938 /*(5912) VPEXPANDB*/ { 81, 149, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 5939 /*(5913) VPEXPANDB*/ { 22, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5940 /*(5914) VPEXPANDB*/ { 81, 149, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1057}, 5941 /*(5915) VPEXPANDB*/ { 22, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 5942 /*(5916) VTESTPD*/ { 19, 5, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1023}, 5943 /*(5917) VTESTPD*/ { 20, 2, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1039}, 5944 /*(5918) VTESTPD*/ { 19, 5, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1023}, 5945 /*(5919) VTESTPD*/ { 20, 2, 0xf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1039}, 5946 /*(5920) SCASW*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5947 /*(5921) VFNMSUBPS*/ { 13, 65, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 5948 /*(5922) VFNMSUBPS*/ { 30, 66, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 5949 /*(5923) VFNMSUBPS*/ { 13, 65, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 5950 /*(5924) VFNMSUBPS*/ { 30, 66, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 5951 /*(5925) VFNMSUBPS*/ { 13, 65, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 5952 /*(5926) VFNMSUBPS*/ { 30, 66, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 5953 /*(5927) VFNMSUBPS*/ { 13, 65, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 5954 /*(5928) VFNMSUBPS*/ { 30, 66, 0x7c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 5955 /*(5929) SCASQ*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5956 /*(5930) SFENCE*/ { 52, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2589}, 5957 /*(5931) KUNPCKWD*/ { 30, 2, 0x4b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 922}, 5958 /*(5932) VTESTPS*/ { 19, 5, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1023}, 5959 /*(5933) VTESTPS*/ { 20, 2, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1039}, 5960 /*(5934) VTESTPS*/ { 19, 5, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1023}, 5961 /*(5935) VTESTPS*/ { 20, 2, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1039}, 5962 /*(5936) SCASD*/ { 5, 36, 0xaf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5963 /*(5937) SCASB*/ { 5, 36, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 5964 /*(5938) VFNMSUBPD*/ { 13, 65, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 5965 /*(5939) VFNMSUBPD*/ { 30, 66, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 5966 /*(5940) VFNMSUBPD*/ { 13, 65, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 5967 /*(5941) VFNMSUBPD*/ { 30, 66, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 5968 /*(5942) VFNMSUBPD*/ { 13, 65, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 5969 /*(5943) VFNMSUBPD*/ { 30, 66, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 5970 /*(5944) VFNMSUBPD*/ { 13, 65, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 5971 /*(5945) VFNMSUBPD*/ { 30, 66, 0x7d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 5972 /*(5946) REP_OUTSB*/ { 5, 68, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5973 /*(5947) REP_OUTSB*/ { 5, 68, 0x6e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5974 /*(5948) VGF2P8AFFINEQB*/ { 12, 14, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5975 /*(5949) VGF2P8AFFINEQB*/ { 13, 15, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 5976 /*(5950) VGF2P8AFFINEQB*/ { 12, 14, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5977 /*(5951) VGF2P8AFFINEQB*/ { 13, 15, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 5978 /*(5952) VGF2P8AFFINEQB*/ { 12, 14, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 5979 /*(5953) VGF2P8AFFINEQB*/ { 13, 15, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 5980 /*(5954) VGF2P8AFFINEQB*/ { 30, 14, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 5981 /*(5955) VGF2P8AFFINEQB*/ { 13, 35, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 5982 /*(5956) VGF2P8AFFINEQB*/ { 30, 14, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 5983 /*(5957) VGF2P8AFFINEQB*/ { 13, 35, 0xce, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 5984 /*(5958) RORX*/ { 2, 14, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3196}, 5985 /*(5959) RORX*/ { 20, 14, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3202}, 5986 /*(5960) RORX*/ { 53, 35, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1375}, 5987 /*(5961) RORX*/ { 19, 35, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1388}, 5988 /*(5962) RORX*/ { 20, 14, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3210}, 5989 /*(5963) RORX*/ { 19, 35, 0xf0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1403}, 5990 /*(5964) REP_OUTSD*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5991 /*(5965) REP_OUTSD*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 5992 /*(5966) REP_OUTSD*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5993 /*(5967) REP_OUTSD*/ { 5, 68, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 5994 /*(5968) PCMPESTRI*/ { 51, 135, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 402}, 5995 /*(5969) PCMPESTRI*/ { 74, 136, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1269}, 5996 /*(5970) PCMPESTRI*/ { 51, 135, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 354}, 5997 /*(5971) PCMPESTRI*/ { 74, 136, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1284}, 5998 /*(5972) PCMPESTRM*/ { 51, 135, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 402}, 5999 /*(5973) PCMPESTRM*/ { 74, 136, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1269}, 6000 /*(5974) PCMPESTRM*/ { 51, 135, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 354}, 6001 /*(5975) PCMPESTRM*/ { 74, 136, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1284}, 6002 /*(5976) VSUBPD*/ { 7, 5, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6003 /*(5977) VSUBPD*/ { 8, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6004 /*(5978) VSUBPD*/ { 7, 5, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6005 /*(5979) VSUBPD*/ { 8, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6006 /*(5980) VSUBPD*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6007 /*(5981) VSUBPD*/ { 12, 58, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1294}, 6008 /*(5982) VSUBPD*/ { 13, 8, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6009 /*(5983) VSUBPD*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6010 /*(5984) VSUBPD*/ { 13, 8, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6011 /*(5985) VSUBPD*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6012 /*(5986) VSUBPD*/ { 13, 8, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6013 /*(5987) VSUBPS*/ { 7, 5, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6014 /*(5988) VSUBPS*/ { 8, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 6015 /*(5989) VSUBPS*/ { 7, 5, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6016 /*(5990) VSUBPS*/ { 8, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 6017 /*(5991) VSUBPS*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6018 /*(5992) VSUBPS*/ { 12, 58, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1309}, 6019 /*(5993) VSUBPS*/ { 13, 7, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6020 /*(5994) VSUBPS*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6021 /*(5995) VSUBPS*/ { 13, 7, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6022 /*(5996) VSUBPS*/ { 12, 2, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6023 /*(5997) VSUBPS*/ { 13, 7, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6024 /*(5998) VPHADDSW*/ { 7, 5, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6025 /*(5999) VPHADDSW*/ { 8, 2, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6026 /*(6000) VPHADDSW*/ { 7, 5, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6027 /*(6001) VPHADDSW*/ { 8, 2, 0x3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6028 /*(6002) VPEXPANDQ*/ { 81, 147, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 6029 /*(6003) VPEXPANDQ*/ { 22, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6030 /*(6004) VPEXPANDQ*/ { 81, 147, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 6031 /*(6005) VPEXPANDQ*/ { 22, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6032 /*(6006) VPEXPANDQ*/ { 81, 147, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 6033 /*(6007) VPEXPANDQ*/ { 22, 2, 0x89, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6034 /*(6008) PFSUBR*/ { 16, 79, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 6035 /*(6009) PFSUBR*/ { 21, 80, 0xaa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 6036 /*(6010) AESDECLAST*/ { 4, 4, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6037 /*(6011) AESDECLAST*/ { 3, 3, 0xdf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6038 /*(6012) VPEXPANDW*/ { 81, 150, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 6039 /*(6013) VPEXPANDW*/ { 22, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6040 /*(6014) VPEXPANDW*/ { 81, 150, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 6041 /*(6015) VPEXPANDW*/ { 22, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6042 /*(6016) VPEXPANDW*/ { 81, 150, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 361}, 6043 /*(6017) VPEXPANDW*/ { 22, 2, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6044 /*(6018) VPSUBUSB*/ { 7, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6045 /*(6019) VPSUBUSB*/ { 8, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6046 /*(6020) VPSUBUSB*/ { 7, 5, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6047 /*(6021) VPSUBUSB*/ { 8, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6048 /*(6022) VPSUBUSB*/ { 9, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6049 /*(6023) VPSUBUSB*/ { 10, 29, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6050 /*(6024) VPSUBUSB*/ { 9, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6051 /*(6025) VPSUBUSB*/ { 10, 29, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6052 /*(6026) VPSUBUSB*/ { 9, 2, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6053 /*(6027) VPSUBUSB*/ { 10, 29, 0xd8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6054 /*(6028) FXSAVE*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3218}, 6055 /*(6029) FCMOVNBE*/ { 1, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 162}, 6056 /*(6030) VGF2P8AFFINEINVQB*/ { 12, 14, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 6057 /*(6031) VGF2P8AFFINEINVQB*/ { 13, 15, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 6058 /*(6032) VGF2P8AFFINEINVQB*/ { 12, 14, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 6059 /*(6033) VGF2P8AFFINEINVQB*/ { 13, 15, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 6060 /*(6034) VGF2P8AFFINEINVQB*/ { 12, 14, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 6061 /*(6035) VGF2P8AFFINEINVQB*/ { 13, 15, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 6062 /*(6036) VGF2P8AFFINEINVQB*/ { 30, 14, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 6063 /*(6037) VGF2P8AFFINEINVQB*/ { 13, 35, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 6064 /*(6038) VGF2P8AFFINEINVQB*/ { 30, 14, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 6065 /*(6039) VGF2P8AFFINEINVQB*/ { 13, 35, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 6066 /*(6040) VPSUBUSW*/ { 7, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6067 /*(6041) VPSUBUSW*/ { 8, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6068 /*(6042) VPSUBUSW*/ { 7, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6069 /*(6043) VPSUBUSW*/ { 8, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6070 /*(6044) VPSUBUSW*/ { 9, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6071 /*(6045) VPSUBUSW*/ { 10, 6, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6072 /*(6046) VPSUBUSW*/ { 9, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6073 /*(6047) VPSUBUSW*/ { 10, 6, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6074 /*(6048) VPSUBUSW*/ { 9, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6075 /*(6049) VPSUBUSW*/ { 10, 6, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6076 /*(6050) MASKMOVQ*/ { 4, 169, 0xf7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6077 /*(6051) SHUFPD*/ { 3, 105, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6078 /*(6052) SHUFPD*/ { 4, 54, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6079 /*(6053) SUBPD*/ { 3, 3, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6080 /*(6054) SUBPD*/ { 4, 4, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6081 /*(6055) SQRTPD*/ { 3, 3, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6082 /*(6056) SQRTPD*/ { 4, 4, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6083 /*(6057) VMCALL*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1274}, 6084 /*(6058) SUBPS*/ { 3, 0, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6085 /*(6059) SUBPS*/ { 4, 1, 0x5c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6086 /*(6060) SHUFPS*/ { 3, 72, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6087 /*(6061) SHUFPS*/ { 4, 73, 0xc6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6088 /*(6062) VPCMPESTRI*/ { 53, 35, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6089 /*(6063) VPCMPESTRI*/ { 2, 14, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 6090 /*(6064) VPCMPESTRI*/ { 19, 35, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 6091 /*(6065) VPCMPESTRI*/ { 20, 14, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 6092 /*(6066) VPCMPESTRI*/ { 19, 35, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 899}, 6093 /*(6067) VPCMPESTRI*/ { 20, 14, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 6094 /*(6068) VPCMPESTRM*/ { 53, 35, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6095 /*(6069) VPCMPESTRM*/ { 2, 14, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 6096 /*(6070) VPCMPESTRM*/ { 19, 35, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 6097 /*(6071) VPCMPESTRM*/ { 20, 14, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 6098 /*(6072) VPCMPESTRM*/ { 19, 35, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 899}, 6099 /*(6073) VPCMPESTRM*/ { 20, 14, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 6100 /*(6074) SQRTPS*/ { 3, 0, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6101 /*(6075) SQRTPS*/ { 4, 1, 0x51, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6102 /*(6076) VANDNPS*/ { 7, 5, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6103 /*(6077) VANDNPS*/ { 8, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 6104 /*(6078) VANDNPS*/ { 7, 5, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6105 /*(6079) VANDNPS*/ { 8, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 6106 /*(6080) VANDNPS*/ { 12, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6107 /*(6081) VANDNPS*/ { 13, 7, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6108 /*(6082) VANDNPS*/ { 12, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6109 /*(6083) VANDNPS*/ { 13, 7, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6110 /*(6084) VANDNPS*/ { 12, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6111 /*(6085) VANDNPS*/ { 13, 7, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6112 /*(6086) VPMADDWD*/ { 7, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6113 /*(6087) VPMADDWD*/ { 8, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6114 /*(6088) VPMADDWD*/ { 7, 5, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6115 /*(6089) VPMADDWD*/ { 8, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6116 /*(6090) VPMADDWD*/ { 9, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6117 /*(6091) VPMADDWD*/ { 10, 6, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6118 /*(6092) VPMADDWD*/ { 9, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6119 /*(6093) VPMADDWD*/ { 10, 6, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6120 /*(6094) VPMADDWD*/ { 9, 2, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6121 /*(6095) VPMADDWD*/ { 10, 6, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6122 /*(6096) INC_LOCK*/ { 36, 5, 0xfe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 6123 /*(6097) INC_LOCK*/ { 36, 5, 0xff, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 8}, 6124 /*(6098) VANDNPD*/ { 7, 5, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6125 /*(6099) VANDNPD*/ { 8, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6126 /*(6100) VANDNPD*/ { 7, 5, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6127 /*(6101) VANDNPD*/ { 8, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6128 /*(6102) VANDNPD*/ { 12, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6129 /*(6103) VANDNPD*/ { 13, 8, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6130 /*(6104) VANDNPD*/ { 12, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6131 /*(6105) VANDNPD*/ { 13, 8, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6132 /*(6106) VANDNPD*/ { 12, 2, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6133 /*(6107) VANDNPD*/ { 13, 8, 0x55, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6134 /*(6108) XRSTOR*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3223}, 6135 /*(6109) VP4DPWSSD*/ { 15, 9, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 77}, 6136 /*(6110) FTST*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1701}, 6137 /*(6111) CVTTPD2DQ*/ { 3, 3, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6138 /*(6112) CVTTPD2DQ*/ { 4, 4, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6139 /*(6113) XRSTOR64*/ { 73, 0, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 2540}, 6140 /*(6114) VPCMOV*/ { 13, 65, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 6141 /*(6115) VPCMOV*/ { 30, 66, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 6142 /*(6116) VPCMOV*/ { 13, 65, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2578}, 6143 /*(6117) VPCMOV*/ { 30, 66, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2583}, 6144 /*(6118) VPCMOV*/ { 13, 65, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 6145 /*(6119) VPCMOV*/ { 30, 66, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 6146 /*(6120) VPCMOV*/ { 13, 65, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2578}, 6147 /*(6121) VPCMOV*/ { 30, 66, 0xa2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2583}, 6148 /*(6122) VPRORQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3228}, 6149 /*(6123) VPRORQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2168}, 6150 /*(6124) VPRORQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3228}, 6151 /*(6125) VPRORQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2168}, 6152 /*(6126) VPRORQ*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3228}, 6153 /*(6127) VPRORQ*/ { 25, 15, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2168}, 6154 /*(6128) PSHUFB*/ { 3, 0, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 6155 /*(6129) PSHUFB*/ { 4, 1, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 6156 /*(6130) PSHUFB*/ { 3, 3, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6157 /*(6131) PSHUFB*/ { 4, 4, 0x0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6158 /*(6132) PSHUFD*/ { 3, 105, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6159 /*(6133) PSHUFD*/ { 4, 54, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6160 /*(6134) VPRORD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3236}, 6161 /*(6135) VPRORD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1504}, 6162 /*(6136) VPRORD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3236}, 6163 /*(6137) VPRORD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1504}, 6164 /*(6138) VPRORD*/ { 65, 14, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3236}, 6165 /*(6139) VPRORD*/ { 25, 18, 0x72, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1504}, 6166 /*(6140) WRFSBASE*/ { 14, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 272}, 6167 /*(6141) JBE*/ { 16, 10, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6168 /*(6142) JBE*/ { 16, 11, 0x76, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6169 /*(6143) JBE*/ { 16, 12, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6170 /*(6144) JBE*/ { 16, 13, 0x86, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6171 /*(6145) PSHUFW*/ { 3, 72, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6172 /*(6146) PSHUFW*/ { 4, 73, 0x70, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6173 /*(6147) CVTTPS2PI*/ { 3, 0, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6174 /*(6148) CVTTPS2PI*/ { 4, 1, 0x2c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6175 /*(6149) ANDN*/ { 7, 5, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6176 /*(6150) ANDN*/ { 13, 5, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 156}, 6177 /*(6151) ANDN*/ { 8, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 54}, 6178 /*(6152) ANDN*/ { 30, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1627}, 6179 /*(6153) ANDN*/ { 13, 5, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 174}, 6180 /*(6154) ANDN*/ { 30, 2, 0xf2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1633}, 6181 /*(6155) PREFETCHWT1*/ { 0, 0, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 6182 /*(6156) RSQRTPS*/ { 3, 0, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6183 /*(6157) RSQRTPS*/ { 4, 1, 0x52, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6184 /*(6158) VPBLENDD*/ { 13, 35, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 6185 /*(6159) VPBLENDD*/ { 30, 14, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 6186 /*(6160) VPBLENDD*/ { 13, 35, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 6187 /*(6161) VPBLENDD*/ { 30, 14, 0x2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 6188 /*(6162) VRCP14PS*/ { 22, 2, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 6189 /*(6163) VRCP14PS*/ { 31, 7, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 6190 /*(6164) VRCP14PS*/ { 22, 2, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 6191 /*(6165) VRCP14PS*/ { 31, 7, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 6192 /*(6166) VRCP14PS*/ { 22, 2, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 6193 /*(6167) VRCP14PS*/ { 31, 7, 0x4c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 6194 /*(6168) VPBLENDW*/ { 7, 35, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 6195 /*(6169) VPBLENDW*/ { 8, 14, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 6196 /*(6170) VPBLENDW*/ { 7, 35, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 6197 /*(6171) VPBLENDW*/ { 8, 14, 0xe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 6198 /*(6172) VPOR*/ { 7, 5, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6199 /*(6173) VPOR*/ { 8, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6200 /*(6174) VPOR*/ { 7, 5, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6201 /*(6175) VPOR*/ { 8, 2, 0xeb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6202 /*(6176) VPMULLD*/ { 7, 5, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6203 /*(6177) VPMULLD*/ { 8, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6204 /*(6178) VPMULLD*/ { 7, 5, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6205 /*(6179) VPMULLD*/ { 8, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6206 /*(6180) VPMULLD*/ { 12, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6207 /*(6181) VPMULLD*/ { 13, 7, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6208 /*(6182) VPMULLD*/ { 12, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6209 /*(6183) VPMULLD*/ { 13, 7, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6210 /*(6184) VPMULLD*/ { 12, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6211 /*(6185) VPMULLD*/ { 13, 7, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6212 /*(6186) VFNMSUB231PS*/ { 13, 5, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6213 /*(6187) VFNMSUB231PS*/ { 30, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6214 /*(6188) VFNMSUB231PS*/ { 13, 5, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6215 /*(6189) VFNMSUB231PS*/ { 30, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6216 /*(6190) VFNMSUB231PS*/ { 12, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6217 /*(6191) VFNMSUB231PS*/ { 12, 58, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 6218 /*(6192) VFNMSUB231PS*/ { 13, 7, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6219 /*(6193) VFNMSUB231PS*/ { 12, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6220 /*(6194) VFNMSUB231PS*/ { 13, 7, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6221 /*(6195) VFNMSUB231PS*/ { 12, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6222 /*(6196) VFNMSUB231PS*/ { 13, 7, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6223 /*(6197) IRET*/ { 16, 36, 0xcf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6224 /*(6198) VPCMPISTRM*/ { 53, 35, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6225 /*(6199) VPCMPISTRM*/ { 2, 14, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 6226 /*(6200) VPCMPISTRI*/ { 53, 35, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6227 /*(6201) VPCMPISTRI*/ { 2, 14, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1324}, 6228 /*(6202) VPCMPISTRI*/ { 19, 35, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 6229 /*(6203) VPCMPISTRI*/ { 20, 14, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 6230 /*(6204) VPCMPISTRI*/ { 19, 35, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 899}, 6231 /*(6205) VPCMPISTRI*/ { 20, 14, 0x63, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1523}, 6232 /*(6206) VPMULLQ*/ { 12, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6233 /*(6207) VPMULLQ*/ { 13, 8, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6234 /*(6208) VPMULLQ*/ { 12, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6235 /*(6209) VPMULLQ*/ { 13, 8, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6236 /*(6210) VPMULLQ*/ { 12, 2, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6237 /*(6211) VPMULLQ*/ { 13, 8, 0x40, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6238 /*(6212) VPMULLW*/ { 7, 5, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6239 /*(6213) VPMULLW*/ { 8, 2, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6240 /*(6214) VPMULLW*/ { 7, 5, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6241 /*(6215) VPMULLW*/ { 8, 2, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6242 /*(6216) VPMULLW*/ { 9, 2, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6243 /*(6217) VPMULLW*/ { 10, 6, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6244 /*(6218) VPMULLW*/ { 9, 2, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6245 /*(6219) VPMULLW*/ { 10, 6, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6246 /*(6220) VPMULLW*/ { 9, 2, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6247 /*(6221) VPMULLW*/ { 10, 6, 0xd5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6248 /*(6222) VFNMSUB231PD*/ { 13, 5, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6249 /*(6223) VFNMSUB231PD*/ { 30, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6250 /*(6224) VFNMSUB231PD*/ { 13, 5, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6251 /*(6225) VFNMSUB231PD*/ { 30, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6252 /*(6226) VFNMSUB231PD*/ { 12, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6253 /*(6227) VFNMSUB231PD*/ { 12, 58, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 6254 /*(6228) VFNMSUB231PD*/ { 13, 8, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6255 /*(6229) VFNMSUB231PD*/ { 12, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6256 /*(6230) VFNMSUB231PD*/ { 13, 8, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6257 /*(6231) VFNMSUB231PD*/ { 12, 2, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6258 /*(6232) VFNMSUB231PD*/ { 13, 8, 0xbe, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6259 /*(6233) ADDSD*/ { 5, 50, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 36}, 6260 /*(6234) ADDSD*/ { 6, 51, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 162}, 6261 /*(6235) SIDT*/ { 0, 0, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 6262 /*(6236) SIDT*/ { 0, 86, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 6263 /*(6237) SYSRET_AMD*/ { 16, 19, 0x7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6264 /*(6238) CDQ*/ { 16, 36, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6265 /*(6239) ADDSS*/ { 5, 50, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 6266 /*(6240) ADDSS*/ { 6, 51, 0x58, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 6267 /*(6241) VPMAXUB*/ { 7, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6268 /*(6242) VPMAXUB*/ { 8, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6269 /*(6243) VPMAXUB*/ { 7, 5, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6270 /*(6244) VPMAXUB*/ { 8, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6271 /*(6245) VPMAXUB*/ { 9, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6272 /*(6246) VPMAXUB*/ { 10, 29, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6273 /*(6247) VPMAXUB*/ { 9, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6274 /*(6248) VPMAXUB*/ { 10, 29, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6275 /*(6249) VPMAXUB*/ { 9, 2, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 32}, 6276 /*(6250) VPMAXUB*/ { 10, 29, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 37}, 6277 /*(6251) VPACKUSDW*/ { 7, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6278 /*(6252) VPACKUSDW*/ { 8, 2, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6279 /*(6253) VPACKUSDW*/ { 7, 5, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6280 /*(6254) VPACKUSDW*/ { 8, 2, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6281 /*(6255) VPACKUSDW*/ { 12, 2, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6282 /*(6256) VPACKUSDW*/ { 13, 7, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6283 /*(6257) VPACKUSDW*/ { 12, 2, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6284 /*(6258) VPACKUSDW*/ { 13, 7, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6285 /*(6259) VPACKUSDW*/ { 12, 2, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6286 /*(6260) VPACKUSDW*/ { 13, 7, 0x2b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6287 /*(6261) VPMAXUD*/ { 7, 5, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6288 /*(6262) VPMAXUD*/ { 8, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6289 /*(6263) VPMAXUD*/ { 7, 5, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6290 /*(6264) VPMAXUD*/ { 8, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6291 /*(6265) VPMAXUD*/ { 12, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6292 /*(6266) VPMAXUD*/ { 13, 7, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6293 /*(6267) VPMAXUD*/ { 12, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6294 /*(6268) VPMAXUD*/ { 13, 7, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6295 /*(6269) VPMAXUD*/ { 12, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6296 /*(6270) VPMAXUD*/ { 13, 7, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6297 /*(6271) VPMAXUQ*/ { 12, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6298 /*(6272) VPMAXUQ*/ { 13, 8, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6299 /*(6273) VPMAXUQ*/ { 12, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6300 /*(6274) VPMAXUQ*/ { 13, 8, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6301 /*(6275) VPMAXUQ*/ { 12, 2, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6302 /*(6276) VPMAXUQ*/ { 13, 8, 0x3f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6303 /*(6277) INSERTPS*/ { 3, 130, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 6304 /*(6278) INSERTPS*/ { 4, 131, 0x21, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 6305 /*(6279) VPMAXUW*/ { 7, 5, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6306 /*(6280) VPMAXUW*/ { 8, 2, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6307 /*(6281) VPMAXUW*/ { 7, 5, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6308 /*(6282) VPMAXUW*/ { 8, 2, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 66}, 6309 /*(6283) VPMAXUW*/ { 9, 2, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 6310 /*(6284) VPMAXUW*/ { 10, 6, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 6311 /*(6285) VPMAXUW*/ { 9, 2, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 6312 /*(6286) VPMAXUW*/ { 10, 6, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 6313 /*(6287) VPMAXUW*/ { 9, 2, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 971}, 6314 /*(6288) VPMAXUW*/ { 10, 6, 0x3e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 800}, 6315 /*(6289) POPAD*/ { 16, 36, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6316 /*(6290) FSIN*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3244}, 6317 /*(6291) VPUNPCKLQDQ*/ { 7, 5, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6318 /*(6292) VPUNPCKLQDQ*/ { 8, 2, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6319 /*(6293) VPUNPCKLQDQ*/ { 7, 5, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6320 /*(6294) VPUNPCKLQDQ*/ { 8, 2, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6321 /*(6295) VPUNPCKLQDQ*/ { 12, 2, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6322 /*(6296) VPUNPCKLQDQ*/ { 13, 8, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6323 /*(6297) VPUNPCKLQDQ*/ { 12, 2, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6324 /*(6298) VPUNPCKLQDQ*/ { 13, 8, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6325 /*(6299) VPUNPCKLQDQ*/ { 12, 2, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6326 /*(6300) VPUNPCKLQDQ*/ { 13, 8, 0x6c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6327 /*(6301) VFNMADD132SD*/ { 13, 5, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6328 /*(6302) VFNMADD132SD*/ { 30, 2, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6329 /*(6303) VFNMADD132SD*/ { 12, 2, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6330 /*(6304) VFNMADD132SD*/ { 12, 62, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 6331 /*(6305) VFNMADD132SD*/ { 15, 60, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 6332 /*(6306) VFNMADD132SS*/ { 13, 5, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6333 /*(6307) VFNMADD132SS*/ { 30, 2, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6334 /*(6308) VFNMADD132SS*/ { 12, 2, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6335 /*(6309) VFNMADD132SS*/ { 12, 62, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 6336 /*(6310) VFNMADD132SS*/ { 15, 61, 0x9d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 6337 /*(6311) VMOVDQU64*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 6338 /*(6312) VMOVDQU64*/ { 81, 137, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3247}, 6339 /*(6313) VMOVDQU64*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 6340 /*(6314) VMOVDQU64*/ { 23, 137, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3256}, 6341 /*(6315) VMOVDQU64*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 6342 /*(6316) VMOVDQU64*/ { 81, 137, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3247}, 6343 /*(6317) VMOVDQU64*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 6344 /*(6318) VMOVDQU64*/ { 23, 137, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3247}, 6345 /*(6319) VMOVDQU64*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 6346 /*(6320) VMOVDQU64*/ { 81, 137, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3247}, 6347 /*(6321) VMOVDQU64*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2654}, 6348 /*(6322) VMOVDQU64*/ { 23, 137, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3247}, 6349 /*(6323) PMULHRW*/ { 16, 79, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 6350 /*(6324) PMULHRW*/ { 21, 80, 0xb7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 6351 /*(6325) VSCATTERQPD*/ { 33, 39, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 6352 /*(6326) VSCATTERQPD*/ { 33, 40, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 6353 /*(6327) VSCATTERQPD*/ { 33, 41, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 6354 /*(6328) VCVTUDQ2PS*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 6355 /*(6329) VCVTUDQ2PS*/ { 22, 58, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3266}, 6356 /*(6330) VCVTUDQ2PS*/ { 31, 7, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2311}, 6357 /*(6331) VCVTUDQ2PS*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 6358 /*(6332) VCVTUDQ2PS*/ { 31, 7, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2311}, 6359 /*(6333) VCVTUDQ2PS*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2300}, 6360 /*(6334) VCVTUDQ2PS*/ { 31, 7, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2311}, 6361 /*(6335) VPHSUBDQ*/ { 19, 5, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 110}, 6362 /*(6336) VPHSUBDQ*/ { 20, 2, 0xe3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 117}, 6363 /*(6337) BT*/ { 0, 72, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 61}, 6364 /*(6338) BT*/ { 1, 73, 0xba, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 60}, 6365 /*(6339) BT*/ { 16, 0, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6366 /*(6340) BT*/ { 21, 1, 0xa3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 6367 /*(6341) VMOVDQA64*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6368 /*(6342) VMOVDQA64*/ { 81, 137, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 6369 /*(6343) VMOVDQA64*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6370 /*(6344) VMOVDQA64*/ { 23, 137, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 6371 /*(6345) VMOVDQA64*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6372 /*(6346) VMOVDQA64*/ { 81, 137, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 6373 /*(6347) VMOVDQA64*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6374 /*(6348) VMOVDQA64*/ { 23, 137, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 6375 /*(6349) VMOVDQA64*/ { 22, 2, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6376 /*(6350) VMOVDQA64*/ { 81, 137, 0x6f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 6377 /*(6351) VMOVDQA64*/ { 22, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6378 /*(6352) VMOVDQA64*/ { 23, 137, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2938}, 6379 /*(6353) XADD_LOCK*/ { 49, 0, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 6380 /*(6354) XADD_LOCK*/ { 49, 0, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3}, 6381 /*(6355) VCVTUDQ2PD*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 6382 /*(6356) VCVTUDQ2PD*/ { 31, 142, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 6383 /*(6357) VCVTUDQ2PD*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 6384 /*(6358) VCVTUDQ2PD*/ { 31, 142, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 6385 /*(6359) VCVTUDQ2PD*/ { 22, 2, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 6386 /*(6360) VCVTUDQ2PD*/ { 31, 142, 0x7a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 6387 /*(6361) PABSD*/ { 3, 0, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 6388 /*(6362) PABSD*/ { 4, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 6389 /*(6363) PABSD*/ { 3, 3, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6390 /*(6364) PABSD*/ { 4, 4, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6391 /*(6365) VCVTDQ2PS*/ { 53, 5, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 6392 /*(6366) VCVTDQ2PS*/ { 2, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 6393 /*(6367) VCVTDQ2PS*/ { 53, 5, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 593}, 6394 /*(6368) VCVTDQ2PS*/ { 2, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 6395 /*(6369) VCVTDQ2PS*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 6396 /*(6370) VCVTDQ2PS*/ { 22, 58, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1737}, 6397 /*(6371) VCVTDQ2PS*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 6398 /*(6372) VCVTDQ2PS*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 6399 /*(6373) VCVTDQ2PS*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 6400 /*(6374) VCVTDQ2PS*/ { 22, 2, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1727}, 6401 /*(6375) VCVTDQ2PS*/ { 31, 7, 0x5b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1747}, 6402 /*(6376) VPRORVQ*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6403 /*(6377) VPRORVQ*/ { 13, 8, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6404 /*(6378) VPRORVQ*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6405 /*(6379) VPRORVQ*/ { 13, 8, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6406 /*(6380) VPRORVQ*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6407 /*(6381) VPRORVQ*/ { 13, 8, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6408 /*(6382) VPMACSWW*/ { 13, 65, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 6409 /*(6383) VPMACSWW*/ { 30, 66, 0x95, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 6410 /*(6384) PI2FD*/ { 16, 79, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 6411 /*(6385) PI2FD*/ { 21, 80, 0xd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 6412 /*(6386) PABSB*/ { 3, 0, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 6413 /*(6387) PABSB*/ { 4, 1, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 6414 /*(6388) PABSB*/ { 3, 3, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6415 /*(6389) PABSB*/ { 4, 4, 0x1c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6416 /*(6390) VFNMSUB213PS*/ { 13, 5, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6417 /*(6391) VFNMSUB213PS*/ { 30, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6418 /*(6392) VFNMSUB213PS*/ { 13, 5, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6419 /*(6393) VFNMSUB213PS*/ { 30, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6420 /*(6394) VFNMSUB213PS*/ { 12, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6421 /*(6395) VFNMSUB213PS*/ { 12, 58, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 6422 /*(6396) VFNMSUB213PS*/ { 13, 7, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6423 /*(6397) VFNMSUB213PS*/ { 12, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6424 /*(6398) VFNMSUB213PS*/ { 13, 7, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6425 /*(6399) VFNMSUB213PS*/ { 12, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6426 /*(6400) VFNMSUB213PS*/ { 13, 7, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6427 /*(6401) PABSW*/ { 3, 0, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 6428 /*(6402) PABSW*/ { 4, 1, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 6429 /*(6403) PABSW*/ { 3, 3, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6430 /*(6404) PABSW*/ { 4, 4, 0x1d, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6431 /*(6405) VCVTDQ2PD*/ { 53, 5, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 6432 /*(6406) VCVTDQ2PD*/ { 2, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 6433 /*(6407) VCVTDQ2PD*/ { 53, 5, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 489}, 6434 /*(6408) VCVTDQ2PD*/ { 2, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 494}, 6435 /*(6409) VCVTDQ2PD*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 6436 /*(6410) VCVTDQ2PD*/ { 31, 142, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 6437 /*(6411) VCVTDQ2PD*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 6438 /*(6412) VCVTDQ2PD*/ { 31, 142, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 6439 /*(6413) VCVTDQ2PD*/ { 22, 2, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 994}, 6440 /*(6414) VCVTDQ2PD*/ { 31, 142, 0xe6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1014}, 6441 /*(6415) VPRORVD*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6442 /*(6416) VPRORVD*/ { 13, 7, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6443 /*(6417) VPRORVD*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6444 /*(6418) VPRORVD*/ { 13, 7, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6445 /*(6419) VPRORVD*/ { 12, 2, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6446 /*(6420) VPRORVD*/ { 13, 7, 0x14, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6447 /*(6421) VPMACSWD*/ { 13, 65, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1241}, 6448 /*(6422) VPMACSWD*/ { 30, 66, 0x96, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1246}, 6449 /*(6423) VFNMSUB213PD*/ { 13, 5, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6450 /*(6424) VFNMSUB213PD*/ { 30, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6451 /*(6425) VFNMSUB213PD*/ { 13, 5, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6452 /*(6426) VFNMSUB213PD*/ { 30, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6453 /*(6427) VFNMSUB213PD*/ { 12, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6454 /*(6428) VFNMSUB213PD*/ { 12, 58, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 6455 /*(6429) VFNMSUB213PD*/ { 13, 8, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6456 /*(6430) VFNMSUB213PD*/ { 12, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6457 /*(6431) VFNMSUB213PD*/ { 13, 8, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6458 /*(6432) VFNMSUB213PD*/ { 12, 2, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6459 /*(6433) VFNMSUB213PD*/ { 13, 8, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6460 /*(6434) RDPID*/ { 14, 1, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 278}, 6461 /*(6435) RDPID*/ { 14, 1, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 278}, 6462 /*(6436) AESDEC*/ { 4, 4, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6463 /*(6437) AESDEC*/ { 3, 3, 0xde, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6464 /*(6438) PUNPCKLBW*/ { 3, 0, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6465 /*(6439) PUNPCKLBW*/ { 4, 1, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6466 /*(6440) PUNPCKLBW*/ { 3, 3, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6467 /*(6441) PUNPCKLBW*/ { 4, 4, 0x60, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6468 /*(6442) VEXTRACTI128*/ { 19, 35, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 197}, 6469 /*(6443) VEXTRACTI128*/ { 20, 14, 0x39, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 204}, 6470 /*(6444) VPERMT2PD*/ { 12, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6471 /*(6445) VPERMT2PD*/ { 13, 8, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6472 /*(6446) VPERMT2PD*/ { 12, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6473 /*(6447) VPERMT2PD*/ { 13, 8, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6474 /*(6448) VPERMT2PD*/ { 12, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6475 /*(6449) VPERMT2PD*/ { 13, 8, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6476 /*(6450) UD2*/ { 16, 19, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6477 /*(6451) TPAUSE*/ { 97, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 990}, 6478 /*(6452) TPAUSE*/ { 97, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3276}, 6479 /*(6453) PFSQRT*/ { 16, 79, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 6480 /*(6454) PFSQRT*/ { 21, 80, 0x97, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 6481 /*(6455) ENDBR32*/ { 40, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3282}, 6482 /*(6456) VPERMT2PS*/ { 12, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6483 /*(6457) VPERMT2PS*/ { 13, 7, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6484 /*(6458) VPERMT2PS*/ { 12, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6485 /*(6459) VPERMT2PS*/ { 13, 7, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6486 /*(6460) VPERMT2PS*/ { 12, 2, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6487 /*(6461) VPERMT2PS*/ { 13, 7, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6488 /*(6462) PMADDWD*/ { 3, 0, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6489 /*(6463) PMADDWD*/ { 4, 1, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6490 /*(6464) PMADDWD*/ { 3, 3, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6491 /*(6465) PMADDWD*/ { 4, 4, 0xf5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6492 /*(6466) VCVTSI2SS*/ { 7, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6493 /*(6467) VCVTSI2SS*/ { 8, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 83}, 6494 /*(6468) VCVTSI2SS*/ { 13, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6495 /*(6469) VCVTSI2SS*/ { 30, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3287}, 6496 /*(6470) VCVTSI2SS*/ { 13, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 26}, 6497 /*(6471) VCVTSI2SS*/ { 30, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3293}, 6498 /*(6472) VCVTSI2SS*/ { 34, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 633}, 6499 /*(6473) VCVTSI2SS*/ { 60, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 640}, 6500 /*(6474) VCVTSI2SS*/ { 34, 62, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 649}, 6501 /*(6475) VCVTSI2SS*/ { 60, 62, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 656}, 6502 /*(6476) VCVTSI2SS*/ { 35, 63, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 665}, 6503 /*(6477) VCVTSI2SS*/ { 61, 63, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 671}, 6504 /*(6478) VCVTSI2SS*/ { 60, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 679}, 6505 /*(6479) VCVTSI2SS*/ { 60, 62, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 688}, 6506 /*(6480) VCVTSI2SS*/ { 61, 64, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 697}, 6507 /*(6481) VRANGEPD*/ { 12, 14, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 6508 /*(6482) VRANGEPD*/ { 13, 15, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 6509 /*(6483) VRANGEPD*/ { 12, 14, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 6510 /*(6484) VRANGEPD*/ { 13, 15, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 6511 /*(6485) VRANGEPD*/ { 12, 14, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 87}, 6512 /*(6486) VRANGEPD*/ { 12, 116, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 976}, 6513 /*(6487) VRANGEPD*/ { 13, 15, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 67}, 6514 /*(6488) VREDUCEPS*/ { 22, 14, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 6515 /*(6489) VREDUCEPS*/ { 31, 18, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 6516 /*(6490) VREDUCEPS*/ { 22, 14, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 6517 /*(6491) VREDUCEPS*/ { 31, 18, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 6518 /*(6492) VREDUCEPS*/ { 22, 14, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 212}, 6519 /*(6493) VREDUCEPS*/ { 22, 116, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1795}, 6520 /*(6494) VREDUCEPS*/ { 31, 18, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 214}, 6521 /*(6495) ROL*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6522 /*(6496) ROL*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 6523 /*(6497) ROL*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6524 /*(6498) ROL*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 6525 /*(6499) ROL*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6526 /*(6500) ROL*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 6527 /*(6501) ROL*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6528 /*(6502) ROL*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 6529 /*(6503) ROL*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6530 /*(6504) ROL*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 6531 /*(6505) ROL*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6532 /*(6506) ROL*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1}, 6533 /*(6507) FUCOMP*/ { 1, 2, 0xdd, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 6534 /*(6508) VPMOVUSWB*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6535 /*(6509) VPMOVUSWB*/ { 23, 101, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6536 /*(6510) VPMOVUSWB*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6537 /*(6511) VPMOVUSWB*/ { 23, 101, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6538 /*(6512) VPMOVUSWB*/ { 22, 2, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6539 /*(6513) VPMOVUSWB*/ { 23, 101, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6540 /*(6514) FUCOMI*/ { 1, 2, 0xdb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 270}, 6541 /*(6515) VPCLMULQDQ*/ { 8, 14, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 6542 /*(6516) VPCLMULQDQ*/ { 7, 35, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 6543 /*(6517) VPCLMULQDQ*/ { 34, 14, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2865}, 6544 /*(6518) VPCLMULQDQ*/ { 35, 117, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2872}, 6545 /*(6519) VPCLMULQDQ*/ { 34, 14, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2865}, 6546 /*(6520) VPCLMULQDQ*/ { 35, 117, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2872}, 6547 /*(6521) VPCLMULQDQ*/ { 34, 14, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2865}, 6548 /*(6522) VPCLMULQDQ*/ { 35, 117, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2872}, 6549 /*(6523) VPCLMULQDQ*/ { 8, 14, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 88}, 6550 /*(6524) VPCLMULQDQ*/ { 7, 35, 0x44, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 29}, 6551 /*(6525) VREDUCEPD*/ { 22, 14, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 6552 /*(6526) VREDUCEPD*/ { 31, 15, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 6553 /*(6527) VREDUCEPD*/ { 22, 14, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 6554 /*(6528) VREDUCEPD*/ { 31, 15, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 6555 /*(6529) VREDUCEPD*/ { 22, 14, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 328}, 6556 /*(6530) VREDUCEPD*/ { 22, 116, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1785}, 6557 /*(6531) VREDUCEPD*/ { 31, 15, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 330}, 6558 /*(6532) VRANGEPS*/ { 12, 14, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 6559 /*(6533) VRANGEPS*/ { 13, 18, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 6560 /*(6534) VRANGEPS*/ { 12, 14, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 6561 /*(6535) VRANGEPS*/ { 13, 18, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 6562 /*(6536) VRANGEPS*/ { 12, 14, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 94}, 6563 /*(6537) VRANGEPS*/ { 12, 116, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1252}, 6564 /*(6538) VRANGEPS*/ { 13, 18, 0x50, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 55}, 6565 /*(6539) VCVTSI2SD*/ { 7, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 395}, 6566 /*(6540) VCVTSI2SD*/ { 8, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 812}, 6567 /*(6541) VCVTSI2SD*/ { 13, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3299}, 6568 /*(6542) VCVTSI2SD*/ { 30, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3304}, 6569 /*(6543) VCVTSI2SD*/ { 13, 5, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 393}, 6570 /*(6544) VCVTSI2SD*/ { 30, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3310}, 6571 /*(6545) VCVTSI2SD*/ { 34, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2191}, 6572 /*(6546) VCVTSI2SD*/ { 60, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2198}, 6573 /*(6547) VCVTSI2SD*/ { 35, 63, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2207}, 6574 /*(6548) VCVTSI2SD*/ { 61, 63, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2213}, 6575 /*(6549) VCVTSI2SD*/ { 60, 2, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2221}, 6576 /*(6550) VCVTSI2SD*/ { 60, 62, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2230}, 6577 /*(6551) VCVTSI2SD*/ { 61, 64, 0x2a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2239}, 6578 /*(6552) ROR*/ { 0, 35, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6579 /*(6553) ROR*/ { 1, 14, 0xc0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6580 /*(6554) ROR*/ { 1, 14, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6581 /*(6555) ROR*/ { 0, 35, 0xc1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6582 /*(6556) ROR*/ { 0, 55, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6583 /*(6557) ROR*/ { 1, 56, 0xd0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6584 /*(6558) ROR*/ { 0, 55, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6585 /*(6559) ROR*/ { 1, 56, 0xd1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6586 /*(6560) ROR*/ { 0, 5, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6587 /*(6561) ROR*/ { 1, 2, 0xd2, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6588 /*(6562) ROR*/ { 0, 5, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3}, 6589 /*(6563) ROR*/ { 1, 2, 0xd3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 4}, 6590 /*(6564) SETLE*/ { 16, 0, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6591 /*(6565) SETLE*/ { 21, 1, 0x9e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 6592 /*(6566) XSAVES*/ { 73, 0, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3223}, 6593 /*(6567) VCVTTSS2USI*/ { 76, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2344}, 6594 /*(6568) VCVTTSS2USI*/ { 77, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2354}, 6595 /*(6569) VCVTTSS2USI*/ { 76, 59, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2367}, 6596 /*(6570) VCVTTSS2USI*/ { 77, 59, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2377}, 6597 /*(6571) VCVTTSS2USI*/ { 78, 139, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2390}, 6598 /*(6572) VCVTTSS2USI*/ { 79, 139, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2399}, 6599 /*(6573) VCVTTSS2USI*/ { 77, 2, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2411}, 6600 /*(6574) VCVTTSS2USI*/ { 77, 59, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2424}, 6601 /*(6575) VCVTTSS2USI*/ { 79, 139, 0x78, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2437}, 6602 /*(6576) VFNMSUBSS*/ { 13, 65, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 6603 /*(6577) VFNMSUBSS*/ { 30, 66, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 6604 /*(6578) VFNMSUBSS*/ { 13, 65, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 6605 /*(6579) VFNMSUBSS*/ { 30, 66, 0x7e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 6606 /*(6580) VPMOVSXWD*/ { 2, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 6607 /*(6581) VPMOVSXWD*/ { 53, 5, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 6608 /*(6582) VPMOVSXWD*/ { 2, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 6609 /*(6583) VPMOVSXWD*/ { 53, 5, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 6610 /*(6584) VPMOVSXWD*/ { 54, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 6611 /*(6585) VPMOVSXWD*/ { 55, 34, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 6612 /*(6586) VPMOVSXWD*/ { 54, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 6613 /*(6587) VPMOVSXWD*/ { 55, 34, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 6614 /*(6588) VPMOVSXWD*/ { 54, 2, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 6615 /*(6589) VPMOVSXWD*/ { 55, 34, 0x23, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 6616 /*(6590) VPMOVSXWQ*/ { 2, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 6617 /*(6591) VPMOVSXWQ*/ { 53, 5, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 6618 /*(6592) VPMOVSXWQ*/ { 2, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1181}, 6619 /*(6593) VPMOVSXWQ*/ { 53, 5, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1176}, 6620 /*(6594) VPMOVSXWQ*/ { 54, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 6621 /*(6595) VPMOVSXWQ*/ { 55, 115, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 6622 /*(6596) VPMOVSXWQ*/ { 54, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 6623 /*(6597) VPMOVSXWQ*/ { 55, 115, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 6624 /*(6598) VPMOVSXWQ*/ { 54, 2, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1187}, 6625 /*(6599) VPMOVSXWQ*/ { 55, 115, 0x24, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1195}, 6626 /*(6600) VFNMSUBSD*/ { 13, 65, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 192}, 6627 /*(6601) VFNMSUBSD*/ { 30, 66, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 721}, 6628 /*(6602) VFNMSUBSD*/ { 13, 65, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 526}, 6629 /*(6603) VFNMSUBSD*/ { 30, 66, 0x7f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 727}, 6630 /*(6604) VORPD*/ { 7, 5, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6631 /*(6605) VORPD*/ { 8, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6632 /*(6606) VORPD*/ { 7, 5, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 23}, 6633 /*(6607) VORPD*/ { 8, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 28}, 6634 /*(6608) VORPD*/ { 12, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6635 /*(6609) VORPD*/ { 13, 8, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6636 /*(6610) VORPD*/ { 12, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6637 /*(6611) VORPD*/ { 13, 8, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6638 /*(6612) VORPD*/ { 12, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 390}, 6639 /*(6613) VORPD*/ { 13, 8, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 397}, 6640 /*(6614) BOUND*/ { 16, 5, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6641 /*(6615) BOUND*/ { 16, 5, 0x62, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6642 /*(6616) PSADBW*/ { 3, 0, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6643 /*(6617) PSADBW*/ { 4, 1, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6644 /*(6618) PSADBW*/ { 3, 3, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6645 /*(6619) PSADBW*/ { 4, 4, 0xf6, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6646 /*(6620) SYSCALL_AMD*/ { 16, 170, 0x5, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6647 /*(6621) VCVTPD2UQQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6648 /*(6622) VCVTPD2UQQ*/ { 31, 8, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 6649 /*(6623) VCVTPD2UQQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6650 /*(6624) VCVTPD2UQQ*/ { 31, 8, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 6651 /*(6625) VCVTPD2UQQ*/ { 22, 2, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1213}, 6652 /*(6626) VCVTPD2UQQ*/ { 22, 58, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1231}, 6653 /*(6627) VCVTPD2UQQ*/ { 31, 8, 0x79, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1223}, 6654 /*(6628) VORPS*/ { 7, 5, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6655 /*(6629) VORPS*/ { 8, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 6656 /*(6630) VORPS*/ { 7, 5, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 31}, 6657 /*(6631) VORPS*/ { 8, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 196}, 6658 /*(6632) VORPS*/ { 12, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6659 /*(6633) VORPS*/ { 13, 7, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6660 /*(6634) VORPS*/ { 12, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6661 /*(6635) VORPS*/ { 13, 7, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6662 /*(6636) VORPS*/ { 12, 2, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 428}, 6663 /*(6637) VORPS*/ { 13, 7, 0x56, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 435}, 6664 /*(6638) VPERMI2PD*/ { 12, 2, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6665 /*(6639) VPERMI2PD*/ { 13, 8, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6666 /*(6640) VPERMI2PD*/ { 12, 2, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6667 /*(6641) VPERMI2PD*/ { 13, 8, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6668 /*(6642) VPERMI2PD*/ { 12, 2, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6669 /*(6643) VPERMI2PD*/ { 13, 8, 0x77, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6670 /*(6644) VFNMSUB231SS*/ { 13, 5, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6671 /*(6645) VFNMSUB231SS*/ { 30, 2, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6672 /*(6646) VFNMSUB231SS*/ { 12, 2, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6673 /*(6647) VFNMSUB231SS*/ { 12, 62, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 6674 /*(6648) VFNMSUB231SS*/ { 15, 61, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 546}, 6675 /*(6649) VRSQRT14PD*/ { 22, 2, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6676 /*(6650) VRSQRT14PD*/ { 31, 8, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 6677 /*(6651) VRSQRT14PD*/ { 22, 2, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6678 /*(6652) VRSQRT14PD*/ { 31, 8, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 6679 /*(6653) VRSQRT14PD*/ { 22, 2, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 792}, 6680 /*(6654) VRSQRT14PD*/ { 31, 8, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 362}, 6681 /*(6655) VFNMSUB231SD*/ { 13, 5, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6682 /*(6656) VFNMSUB231SD*/ { 30, 2, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6683 /*(6657) VFNMSUB231SD*/ { 12, 2, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6684 /*(6658) VFNMSUB231SD*/ { 12, 62, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 6685 /*(6659) VFNMSUB231SD*/ { 15, 60, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 786}, 6686 /*(6660) VRSQRT14PS*/ { 22, 2, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 6687 /*(6661) VRSQRT14PS*/ { 31, 7, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 6688 /*(6662) VRSQRT14PS*/ { 22, 2, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 6689 /*(6663) VRSQRT14PS*/ { 31, 7, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 6690 /*(6664) VRSQRT14PS*/ { 22, 2, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 836}, 6691 /*(6665) VRSQRT14PS*/ { 31, 7, 0x4e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 856}, 6692 /*(6666) PAVGUSB*/ { 16, 79, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 0}, 6693 /*(6667) PAVGUSB*/ { 21, 80, 0xbf, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAPAMD), 1}, 6694 /*(6668) PINSRW*/ { 3, 72, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6695 /*(6669) PINSRW*/ { 4, 73, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6696 /*(6670) PINSRW*/ { 3, 105, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6697 /*(6671) PINSRW*/ { 4, 54, 0xc4, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6698 /*(6672) PINSRQ*/ { 51, 130, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 354}, 6699 /*(6673) PINSRQ*/ { 74, 131, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1284}, 6700 /*(6674) PINSRD*/ { 51, 130, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 402}, 6701 /*(6675) PINSRD*/ { 74, 131, 0x22, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 1269}, 6702 /*(6676) PINSRB*/ { 3, 130, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 6703 /*(6677) PINSRB*/ { 4, 131, 0x20, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 6704 /*(6678) PREFETCHNTA*/ { 0, 0, 0x18, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6705 /*(6679) PSUBSW*/ { 3, 0, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6706 /*(6680) PSUBSW*/ { 4, 1, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6707 /*(6681) PSUBSW*/ { 3, 3, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6708 /*(6682) PSUBSW*/ { 4, 4, 0xe9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6709 /*(6683) VPSHAQ*/ { 13, 5, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 6710 /*(6684) VPSHAQ*/ { 30, 2, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 6711 /*(6685) VPSHAQ*/ { 13, 5, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 6712 /*(6686) VPSHAQ*/ { 30, 2, 0x9b, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 6713 /*(6687) VPSHAW*/ { 13, 5, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 6714 /*(6688) VPSHAW*/ { 30, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 6715 /*(6689) VPSHAW*/ { 13, 5, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 6716 /*(6690) VPSHAW*/ { 30, 2, 0x99, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 6717 /*(6691) VBLENDMPS*/ { 12, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6718 /*(6692) VBLENDMPS*/ { 13, 7, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6719 /*(6693) VBLENDMPS*/ { 12, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6720 /*(6694) VBLENDMPS*/ { 13, 7, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6721 /*(6695) VBLENDMPS*/ { 12, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6722 /*(6696) VBLENDMPS*/ { 13, 7, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6723 /*(6697) RDSSPD*/ { 41, 1, 0x1e, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 3316}, 6724 /*(6698) PSUBSB*/ { 3, 0, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6725 /*(6699) PSUBSB*/ { 4, 1, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6726 /*(6700) PSUBSB*/ { 3, 3, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6727 /*(6701) PSUBSB*/ { 4, 4, 0xe8, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6728 /*(6702) VPSHAB*/ { 13, 5, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 6729 /*(6703) VPSHAB*/ { 30, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 6730 /*(6704) VPSHAB*/ { 13, 5, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 6731 /*(6705) VPSHAB*/ { 30, 2, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 6732 /*(6706) VBLENDMPD*/ { 12, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6733 /*(6707) VBLENDMPD*/ { 13, 8, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6734 /*(6708) VBLENDMPD*/ { 12, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6735 /*(6709) VBLENDMPD*/ { 13, 8, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6736 /*(6710) VBLENDMPD*/ { 12, 2, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6737 /*(6711) VBLENDMPD*/ { 13, 8, 0x65, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6738 /*(6712) CWDE*/ { 16, 36, 0x98, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6739 /*(6713) VPSHAD*/ { 13, 5, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 467}, 6740 /*(6714) VPSHAD*/ { 30, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 472}, 6741 /*(6715) VPSHAD*/ { 13, 5, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 478}, 6742 /*(6716) VPSHAD*/ { 30, 2, 0x9a, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 483}, 6743 /*(6717) VPSCATTERDD*/ { 33, 44, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 6744 /*(6718) VPSCATTERDD*/ { 33, 45, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 6745 /*(6719) VPSCATTERDD*/ { 33, 46, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 259}, 6746 /*(6720) SHA1MSG2*/ { 4, 1, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 6747 /*(6721) SHA1MSG2*/ { 3, 0, 0xca, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 6748 /*(6722) VPSCATTERDQ*/ { 33, 41, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 6749 /*(6723) VPSCATTERDQ*/ { 33, 40, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 6750 /*(6724) VPSCATTERDQ*/ { 33, 40, 0xa0, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 228}, 6751 /*(6725) SHA1MSG1*/ { 4, 1, 0xc9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 11}, 6752 /*(6726) SHA1MSG1*/ { 3, 0, 0xc9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 9}, 6753 /*(6727) MOVHLPS*/ { 4, 1, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6754 /*(6728) VSCATTERPF1QPS*/ { 69, 44, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2145}, 6755 /*(6729) PUNPCKLWD*/ { 3, 0, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 9}, 6756 /*(6730) PUNPCKLWD*/ { 4, 1, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 11}, 6757 /*(6731) PUNPCKLWD*/ { 3, 3, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 8}, 6758 /*(6732) PUNPCKLWD*/ { 4, 4, 0x61, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 14}, 6759 /*(6733) VSCATTERPF1QPD*/ { 69, 39, 0xc7, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 2156}, 6760 /*(6734) FSINCOS*/ { 66, 2, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 278}, 6761 /*(6735) VFNMADD132PD*/ { 13, 5, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6762 /*(6736) VFNMADD132PD*/ { 30, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6763 /*(6737) VFNMADD132PD*/ { 13, 5, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 396}, 6764 /*(6738) VFNMADD132PD*/ { 30, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 525}, 6765 /*(6739) VFNMADD132PD*/ { 12, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6766 /*(6740) VFNMADD132PD*/ { 12, 58, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 531}, 6767 /*(6741) VFNMADD132PD*/ { 13, 8, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6768 /*(6742) VFNMADD132PD*/ { 12, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6769 /*(6743) VFNMADD132PD*/ { 13, 8, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6770 /*(6744) VFNMADD132PD*/ { 12, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 65}, 6771 /*(6745) VFNMADD132PD*/ { 13, 8, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 72}, 6772 /*(6746) DAA*/ { 16, 36, 0x27, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6773 /*(6747) VPMOVQW*/ { 22, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6774 /*(6748) VPMOVQW*/ { 23, 115, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6775 /*(6749) VPMOVQW*/ { 22, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6776 /*(6750) VPMOVQW*/ { 23, 115, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6777 /*(6751) VPMOVQW*/ { 22, 2, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6778 /*(6752) VPMOVQW*/ { 23, 115, 0x34, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6779 /*(6753) VFNMADD132PS*/ { 13, 5, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6780 /*(6754) VFNMADD132PS*/ { 30, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6781 /*(6755) VFNMADD132PS*/ { 13, 5, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 186}, 6782 /*(6756) VFNMADD132PS*/ { 30, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 191}, 6783 /*(6757) VFNMADD132PS*/ { 12, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6784 /*(6758) VFNMADD132PS*/ { 12, 58, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 518}, 6785 /*(6759) VFNMADD132PS*/ { 13, 7, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6786 /*(6760) VFNMADD132PS*/ { 12, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6787 /*(6761) VFNMADD132PS*/ { 13, 7, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6788 /*(6762) VFNMADD132PS*/ { 12, 2, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 53}, 6789 /*(6763) VFNMADD132PS*/ { 13, 7, 0x9c, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 36}, 6790 /*(6764) DAS*/ { 16, 36, 0x2f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 0}, 6791 /*(6765) VPMOVQB*/ { 22, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6792 /*(6766) VPMOVQB*/ { 23, 118, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6793 /*(6767) VPMOVQB*/ { 22, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6794 /*(6768) VPMOVQB*/ { 23, 118, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6795 /*(6769) VPMOVQB*/ { 22, 2, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6796 /*(6770) VPMOVQB*/ { 23, 118, 0x32, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6797 /*(6771) VPMOVQD*/ { 22, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6798 /*(6772) VPMOVQD*/ { 23, 113, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6799 /*(6773) VPMOVQD*/ { 22, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6800 /*(6774) VPMOVQD*/ { 23, 113, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6801 /*(6775) VPMOVQD*/ { 22, 2, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 131}, 6802 /*(6776) VPMOVQD*/ { 23, 113, 0x35, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 141}, 6803 /*(6777) BSWAP*/ { 16, 171, 0x19, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 0}, 6804 /*(6778) RDGSBASE*/ { 14, 1, 0xae, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 18}, 6805 /*(6779) PAUSE*/ { 38, 47, 0x12, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 19}, 6806 /*(6780) ROUNDSS*/ { 3, 130, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 6807 /*(6781) ROUNDSS*/ { 4, 131, 0xa, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 6808 /*(6782) VPMOVM2Q*/ { 11, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 6809 /*(6783) VPMOVM2Q*/ { 11, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 6810 /*(6784) VPMOVM2Q*/ { 11, 2, 0x38, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1331}, 6811 /*(6785) FNSTCW*/ { 0, 5, 0xd9, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 6}, 6812 /*(6786) ROUNDSD*/ { 3, 130, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 8}, 6813 /*(6787) ROUNDSD*/ { 4, 131, 0xb, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP3), 14}, 6814 /*(6788) MAXSS*/ { 5, 50, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 1}, 6815 /*(6789) MAXSS*/ { 6, 51, 0x5f, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 17}, 6816 /*(6790) BLSI*/ { 24, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 54}, 6817 /*(6791) BLSI*/ { 25, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1627}, 6818 /*(6792) BLSI*/ { 26, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3322}, 6819 /*(6793) BLSI*/ { 27, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3327}, 6820 /*(6794) BLSI*/ { 25, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 1633}, 6821 /*(6795) BLSI*/ { 27, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3334}, 6822 /*(6796) PBLENDVB*/ { 3, 16, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 8}, 6823 /*(6797) PBLENDVB*/ { 4, 17, 0x10, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP2), 14}, 6824 /*(6798) BLSR*/ { 24, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 426}, 6825 /*(6799) BLSR*/ { 25, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3341}, 6826 /*(6800) BLSR*/ { 26, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3347}, 6827 /*(6801) BLSR*/ { 27, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3352}, 6828 /*(6802) BLSR*/ { 25, 5, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3359}, 6829 /*(6803) BLSR*/ { 27, 2, 0xf3, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP0), 3365}, 6830 /*(6804) MWAIT*/ { 62, 1, 0x1, XED_STATIC_CAST(xed_uint8_t, XED_ILD_MAP1), 923}, 6831 }; 6832