1; RUN: not --crash llc < %s -mtriple=thumb-none-eabi -mcpu=cortex-m4 2>&1 | FileCheck %s --check-prefix=V7M
2; RUN: llc < %s -mtriple=thumbv8m.base-none-eabi 2>&1 | FileCheck %s
3
4; V7M: LLVM ERROR: Invalid register name "sp_ns".
5
6define i32 @read_mclass_registers() nounwind {
7entry:
8  ; CHECK-LABEL: read_mclass_registers:
9  ; CHECK:   mrs r0, apsr
10  ; CHECK:   mrs r1, iapsr
11  ; CHECK:   mrs r1, eapsr
12  ; CHECK:   mrs r1, xpsr
13  ; CHECK:   mrs r1, ipsr
14  ; CHECK:   mrs r1, epsr
15  ; CHECK:   mrs r1, iepsr
16  ; CHECK:   mrs r1, msp
17  ; CHECK:   mrs r1, psp
18  ; CHECK:   mrs r1, primask
19  ; CHECK:   mrs r1, control
20  ; CHECK:   mrs r1, msplim
21  ; CHECK:   mrs r1, psplim
22  ; CHECK:   mrs r1, msp_ns
23  ; CHECK:   mrs r1, psp_ns
24  ; CHECK:   mrs r1, primask_ns
25  ; CHECK:   mrs r1, control_ns
26  ; CHECK:   mrs r1, sp_ns
27
28  %0 = call i32 @llvm.read_register.i32(metadata !0)
29  %1 = call i32 @llvm.read_register.i32(metadata !4)
30  %add1 = add i32 %1, %0
31  %2 = call i32 @llvm.read_register.i32(metadata !8)
32  %add2 = add i32 %add1, %2
33  %3 = call i32 @llvm.read_register.i32(metadata !12)
34  %add3 = add i32 %add2, %3
35  %4 = call i32 @llvm.read_register.i32(metadata !16)
36  %add4 = add i32 %add3, %4
37  %5 = call i32 @llvm.read_register.i32(metadata !17)
38  %add5 = add i32 %add4, %5
39  %6 = call i32 @llvm.read_register.i32(metadata !18)
40  %add6 = add i32 %add5, %6
41  %7 = call i32 @llvm.read_register.i32(metadata !19)
42  %add7 = add i32 %add6, %7
43  %8 = call i32 @llvm.read_register.i32(metadata !20)
44  %add8 = add i32 %add7, %8
45  %9 = call i32 @llvm.read_register.i32(metadata !21)
46  %add9 = add i32 %add8, %9
47  %10 = call i32 @llvm.read_register.i32(metadata !25)
48  %add10 = add i32 %add9, %10
49  %11 = call i32 @llvm.read_register.i32(metadata !26)
50  %add11 = add i32 %add10, %11
51  %12 = call i32 @llvm.read_register.i32(metadata !27)
52  %add12 = add i32 %add11, %12
53  %13 = call i32 @llvm.read_register.i32(metadata !28)
54  %add13 = add i32 %add12, %13
55  %14 = call i32 @llvm.read_register.i32(metadata !29)
56  %add14 = add i32 %add13, %14
57  %15 = call i32 @llvm.read_register.i32(metadata !32)
58  %add15 = add i32 %add14, %15
59  %16 = call i32 @llvm.read_register.i32(metadata !35)
60  %add16 = add i32 %add15, %16
61  %17 = call i32 @llvm.read_register.i32(metadata !36)
62  %add17 = add i32 %add16, %17
63  ret i32 %add10
64}
65
66define void @write_mclass_registers(i32 %x) nounwind {
67entry:
68  ; CHECK-LABEL: write_mclass_registers:
69  ; CHECK:   msr apsr, r0
70  ; CHECK:   msr apsr, r0
71  ; CHECK:   msr iapsr, r0
72  ; CHECK:   msr iapsr, r0
73  ; CHECK:   msr eapsr, r0
74  ; CHECK:   msr eapsr, r0
75  ; CHECK:   msr xpsr, r0
76  ; CHECK:   msr xpsr, r0
77  ; CHECK:   msr ipsr, r0
78  ; CHECK:   msr epsr, r0
79  ; CHECK:   msr iepsr, r0
80  ; CHECK:   msr msp, r0
81  ; CHECK:   msr psp, r0
82  ; CHECK:   msr primask, r0
83  ; CHECK:   msr control, r0
84  ; CHECK:   msr msplim, r0
85  ; CHECK:   msr psplim, r0
86  ; CHECK:   msr msp_ns, r0
87  ; CHECK:   msr psp_ns, r0
88  ; CHECK:   msr primask_ns, r0
89  ; CHECK:   msr control_ns, r0
90  ; CHECK:   msr sp_ns, r0
91
92  call void @llvm.write_register.i32(metadata !0, i32 %x)
93  call void @llvm.write_register.i32(metadata !1, i32 %x)
94  call void @llvm.write_register.i32(metadata !4, i32 %x)
95  call void @llvm.write_register.i32(metadata !5, i32 %x)
96  call void @llvm.write_register.i32(metadata !8, i32 %x)
97  call void @llvm.write_register.i32(metadata !9, i32 %x)
98  call void @llvm.write_register.i32(metadata !12, i32 %x)
99  call void @llvm.write_register.i32(metadata !13, i32 %x)
100  call void @llvm.write_register.i32(metadata !16, i32 %x)
101  call void @llvm.write_register.i32(metadata !17, i32 %x)
102  call void @llvm.write_register.i32(metadata !18, i32 %x)
103  call void @llvm.write_register.i32(metadata !19, i32 %x)
104  call void @llvm.write_register.i32(metadata !20, i32 %x)
105  call void @llvm.write_register.i32(metadata !21, i32 %x)
106  call void @llvm.write_register.i32(metadata !25, i32 %x)
107  call void @llvm.write_register.i32(metadata !26, i32 %x)
108  call void @llvm.write_register.i32(metadata !27, i32 %x)
109  call void @llvm.write_register.i32(metadata !28, i32 %x)
110  call void @llvm.write_register.i32(metadata !29, i32 %x)
111  call void @llvm.write_register.i32(metadata !32, i32 %x)
112  call void @llvm.write_register.i32(metadata !35, i32 %x)
113  call void @llvm.write_register.i32(metadata !36, i32 %x)
114  ret void
115}
116
117declare i32 @llvm.read_register.i32(metadata) nounwind
118declare void @llvm.write_register.i32(metadata, i32) nounwind
119
120!0 = !{!"apsr"}
121!1 = !{!"apsr_nzcvq"}
122!4 = !{!"iapsr"}
123!5 = !{!"iapsr_nzcvq"}
124!8 = !{!"eapsr"}
125!9 = !{!"eapsr_nzcvq"}
126!12 = !{!"xpsr"}
127!13 = !{!"xpsr_nzcvq"}
128!16 = !{!"ipsr"}
129!17 = !{!"epsr"}
130!18 = !{!"iepsr"}
131!19 = !{!"msp"}
132!20 = !{!"psp"}
133!21 = !{!"primask"}
134!25 = !{!"control"}
135!26 = !{!"msplim"}
136!27 = !{!"psplim"}
137!28 = !{!"msp_ns"}
138!29 = !{!"psp_ns"}
139!32 = !{!"primask_ns"}
140!35 = !{!"control_ns"}
141!36 = !{!"sp_ns"}
142
143