1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
2
3// --------------------------------------------------------------------------//
4// Invalid operand (.s)
5
6ld1sw z23.s, p0/z, [x13, #1, MUL VL]
7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
8// CHECK-NEXT: ld1sw z23.s, p0/z, [x13, #1, MUL VL]
9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10
11ld1sw z29.s, p0/z, [x3, #1, MUL VL]
12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
13// CHECK-NEXT: ld1sw z29.s, p0/z, [x3, #1, MUL VL]
14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15
16
17// --------------------------------------------------------------------------//
18// Immediate out of lower bound [-8, 7].
19
20ld1sw z28.d, p2/z, [x28, #-9, MUL VL]
21// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
22// CHECK-NEXT: ld1sw z28.d, p2/z, [x28, #-9, MUL VL]
23// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
24
25ld1sw z27.d, p1/z, [x26, #8, MUL VL]
26// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
27// CHECK-NEXT: ld1sw z27.d, p1/z, [x26, #8, MUL VL]
28// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
29
30
31// --------------------------------------------------------------------------//
32// restricted predicate has range [0, 7].
33
34ld1sw z4.d, p8/z, [x11, #1, MUL VL]
35// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
36// CHECK-NEXT: ld1sw z4.d, p8/z, [x11, #1, MUL VL]
37// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
38
39
40// --------------------------------------------------------------------------//
41// Invalid vector list.
42
43ld1sw { }, p0/z, [x1, #1, MUL VL]
44// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
45// CHECK-NEXT: ld1sw { }, p0/z, [x1, #1, MUL VL]
46// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
47
48ld1sw { z1.d, z2.d }, p0/z, [x1, #1, MUL VL]
49// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
50// CHECK-NEXT: ld1sw { z1.d, z2.d }, p0/z, [x1, #1, MUL VL]
51// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
52
53ld1sw { v0.2d }, p0/z, [x1, #1, MUL VL]
54// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
55// CHECK-NEXT: ld1sw { v0.2d }, p0/z, [x1, #1, MUL VL]
56// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
57
58
59// --------------------------------------------------------------------------//
60// Invalid scalar + scalar addressing modes
61
62ld1sw z0.d, p0/z, [x0, x0]
63// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
64// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, x0]
65// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
66
67ld1sw z0.d, p0/z, [x0, xzr]
68// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
69// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, xzr]
70// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
71
72ld1sw z0.d, p0/z, [x0, x0, lsl #3]
73// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
74// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, x0, lsl #3]
75// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
76
77ld1sw z0.d, p0/z, [x0, w0]
78// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
79// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, w0]
80// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
81
82ld1sw z0.d, p0/z, [x0, w0, uxtw]
83// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
84// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, w0, uxtw]
85// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
86
87
88// --------------------------------------------------------------------------//
89// Invalid scalar + vector addressing modes
90
91ld1sw z0.d, p0/z, [x0, z0.h]
92// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
93// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.h]
94// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
95
96ld1sw z0.d, p0/z, [x0, z0.s]
97// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
98// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.s]
99// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
100
101ld1sw z0.d, p0/z, [x0, z0.d, uxtw #3]
102// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
103// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, uxtw #3]
104// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
105
106ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
107// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
108// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
109// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
110
111ld1sw z0.d, p0/z, [x0, z0.d, lsl]
112// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected #imm after shift specifier
113// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, lsl]
114// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
115
116ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
117// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
118// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, lsl #3]
119// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
120
121ld1sw z0.d, p0/z, [x0, z0.d, sxtw #3]
122// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid shift/extend specified, expected 'z[0..31].d, (lsl|uxtw|sxtw) #2'
123// CHECK-NEXT: ld1sw z0.d, p0/z, [x0, z0.d, sxtw #3]
124// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
125
126
127// --------------------------------------------------------------------------//
128// Invalid vector + immediate addressing modes
129
130ld1sw z0.s, p0/z, [z0.s]
131// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
132// CHECK-NEXT: ld1sw z0.s, p0/z, [z0.s]
133// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
134
135ld1sw z0.s, p0/z, [z0.s, #4]
136// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
137// CHECK-NEXT: ld1sw z0.s, p0/z, [z0.s, #4]
138// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
139
140ld1sw z0.d, p0/z, [z0.d, #-4]
141// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
142// CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #-4]
143// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
144
145ld1sw z0.d, p0/z, [z0.d, #-1]
146// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
147// CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #-1]
148// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
149
150ld1sw z0.d, p0/z, [z0.d, #125]
151// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
152// CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #125]
153// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
154
155ld1sw z0.d, p0/z, [z0.d, #128]
156// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
157// CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #128]
158// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
159
160ld1sw z0.d, p0/z, [z0.d, #3]
161// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 4 in range [0, 124].
162// CHECK-NEXT: ld1sw z0.d, p0/z, [z0.d, #3]
163// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
164
165
166// --------------------------------------------------------------------------//
167// Negative tests for instructions that are incompatible with movprfx
168
169movprfx z0.d, p0/z, z7.d
170ld1sw   { z0.d }, p0/z, [z0.d]
171// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
172// CHECK-NEXT: ld1sw   { z0.d }, p0/z, [z0.d]
173// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
174
175movprfx z0, z7
176ld1sw   { z0.d }, p0/z, [z0.d]
177// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
178// CHECK-NEXT: ld1sw   { z0.d }, p0/z, [z0.d]
179// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
180