1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
2 // REQUIRES: riscv-registered-target
3 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d -target-feature +experimental-v \
4 // RUN: -disable-O0-optnone -emit-llvm %s -o - | opt -S -mem2reg | FileCheck --check-prefix=CHECK-RV64 %s
5
6 #include <riscv_vector.h>
7
8 //
9 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32mf2_f32m1(
10 // CHECK-RV64-NEXT: entry:
11 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.nxv2f32.nxv1f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 1 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
12 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
13 //
test_vfredsum_vs_f32mf2_f32m1(vfloat32m1_t dst,vfloat32mf2_t vector,vfloat32m1_t scalar,size_t vl)14 vfloat32m1_t test_vfredsum_vs_f32mf2_f32m1(vfloat32m1_t dst,
15 vfloat32mf2_t vector,
16 vfloat32m1_t scalar, size_t vl) {
17 return vfredsum_vs_f32mf2_f32m1(dst, vector, scalar, vl);
18 }
19
20 //
21 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m1_f32m1(
22 // CHECK-RV64-NEXT: entry:
23 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 2 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
24 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
25 //
test_vfredsum_vs_f32m1_f32m1(vfloat32m1_t dst,vfloat32m1_t vector,vfloat32m1_t scalar,size_t vl)26 vfloat32m1_t test_vfredsum_vs_f32m1_f32m1(vfloat32m1_t dst, vfloat32m1_t vector,
27 vfloat32m1_t scalar, size_t vl) {
28 return vfredsum_vs_f32m1_f32m1(dst, vector, scalar, vl);
29 }
30
31 //
32 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m2_f32m1(
33 // CHECK-RV64-NEXT: entry:
34 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.nxv2f32.nxv4f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 4 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
35 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
36 //
test_vfredsum_vs_f32m2_f32m1(vfloat32m1_t dst,vfloat32m2_t vector,vfloat32m1_t scalar,size_t vl)37 vfloat32m1_t test_vfredsum_vs_f32m2_f32m1(vfloat32m1_t dst, vfloat32m2_t vector,
38 vfloat32m1_t scalar, size_t vl) {
39 return vfredsum_vs_f32m2_f32m1(dst, vector, scalar, vl);
40 }
41
42 //
43 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m4_f32m1(
44 // CHECK-RV64-NEXT: entry:
45 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.nxv2f32.nxv8f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 8 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
46 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
47 //
test_vfredsum_vs_f32m4_f32m1(vfloat32m1_t dst,vfloat32m4_t vector,vfloat32m1_t scalar,size_t vl)48 vfloat32m1_t test_vfredsum_vs_f32m4_f32m1(vfloat32m1_t dst, vfloat32m4_t vector,
49 vfloat32m1_t scalar, size_t vl) {
50 return vfredsum_vs_f32m4_f32m1(dst, vector, scalar, vl);
51 }
52
53 //
54 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m8_f32m1(
55 // CHECK-RV64-NEXT: entry:
56 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.nxv2f32.nxv16f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 16 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
57 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
58 //
test_vfredsum_vs_f32m8_f32m1(vfloat32m1_t dst,vfloat32m8_t vector,vfloat32m1_t scalar,size_t vl)59 vfloat32m1_t test_vfredsum_vs_f32m8_f32m1(vfloat32m1_t dst, vfloat32m8_t vector,
60 vfloat32m1_t scalar, size_t vl) {
61 return vfredsum_vs_f32m8_f32m1(dst, vector, scalar, vl);
62 }
63
64 //
65 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m1_f64m1(
66 // CHECK-RV64-NEXT: entry:
67 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 1 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
68 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
69 //
test_vfredsum_vs_f64m1_f64m1(vfloat64m1_t dst,vfloat64m1_t vector,vfloat64m1_t scalar,size_t vl)70 vfloat64m1_t test_vfredsum_vs_f64m1_f64m1(vfloat64m1_t dst, vfloat64m1_t vector,
71 vfloat64m1_t scalar, size_t vl) {
72 return vfredsum_vs_f64m1_f64m1(dst, vector, scalar, vl);
73 }
74
75 //
76 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m2_f64m1(
77 // CHECK-RV64-NEXT: entry:
78 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.nxv1f64.nxv2f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 2 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
79 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
80 //
test_vfredsum_vs_f64m2_f64m1(vfloat64m1_t dst,vfloat64m2_t vector,vfloat64m1_t scalar,size_t vl)81 vfloat64m1_t test_vfredsum_vs_f64m2_f64m1(vfloat64m1_t dst, vfloat64m2_t vector,
82 vfloat64m1_t scalar, size_t vl) {
83 return vfredsum_vs_f64m2_f64m1(dst, vector, scalar, vl);
84 }
85
86 //
87 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m4_f64m1(
88 // CHECK-RV64-NEXT: entry:
89 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.nxv1f64.nxv4f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 4 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
90 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
91 //
test_vfredsum_vs_f64m4_f64m1(vfloat64m1_t dst,vfloat64m4_t vector,vfloat64m1_t scalar,size_t vl)92 vfloat64m1_t test_vfredsum_vs_f64m4_f64m1(vfloat64m1_t dst, vfloat64m4_t vector,
93 vfloat64m1_t scalar, size_t vl) {
94 return vfredsum_vs_f64m4_f64m1(dst, vector, scalar, vl);
95 }
96
97 //
98 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m8_f64m1(
99 // CHECK-RV64-NEXT: entry:
100 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.nxv1f64.nxv8f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 8 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
101 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
102 //
test_vfredsum_vs_f64m8_f64m1(vfloat64m1_t dst,vfloat64m8_t vector,vfloat64m1_t scalar,size_t vl)103 vfloat64m1_t test_vfredsum_vs_f64m8_f64m1(vfloat64m1_t dst, vfloat64m8_t vector,
104 vfloat64m1_t scalar, size_t vl) {
105 return vfredsum_vs_f64m8_f64m1(dst, vector, scalar, vl);
106 }
107
108 //
109 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32mf2_f32m1_m(
110 // CHECK-RV64-NEXT: entry:
111 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.mask.nxv2f32.nxv1f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 1 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 1 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
112 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
113 //
test_vfredsum_vs_f32mf2_f32m1_m(vbool64_t mask,vfloat32m1_t dst,vfloat32mf2_t vector,vfloat32m1_t scalar,size_t vl)114 vfloat32m1_t test_vfredsum_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32m1_t dst,
115 vfloat32mf2_t vector,
116 vfloat32m1_t scalar, size_t vl) {
117 return vfredsum_vs_f32mf2_f32m1_m(mask, dst, vector, scalar, vl);
118 }
119
120 //
121 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m1_f32m1_m(
122 // CHECK-RV64-NEXT: entry:
123 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.mask.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 2 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 2 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
124 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
125 //
test_vfredsum_vs_f32m1_f32m1_m(vbool32_t mask,vfloat32m1_t dst,vfloat32m1_t vector,vfloat32m1_t scalar,size_t vl)126 vfloat32m1_t test_vfredsum_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t dst,
127 vfloat32m1_t vector,
128 vfloat32m1_t scalar, size_t vl) {
129 return vfredsum_vs_f32m1_f32m1_m(mask, dst, vector, scalar, vl);
130 }
131
132 //
133 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m2_f32m1_m(
134 // CHECK-RV64-NEXT: entry:
135 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.mask.nxv2f32.nxv4f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 4 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 4 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
136 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
137 //
test_vfredsum_vs_f32m2_f32m1_m(vbool16_t mask,vfloat32m1_t dst,vfloat32m2_t vector,vfloat32m1_t scalar,size_t vl)138 vfloat32m1_t test_vfredsum_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m1_t dst,
139 vfloat32m2_t vector,
140 vfloat32m1_t scalar, size_t vl) {
141 return vfredsum_vs_f32m2_f32m1_m(mask, dst, vector, scalar, vl);
142 }
143
144 //
145 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m4_f32m1_m(
146 // CHECK-RV64-NEXT: entry:
147 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.mask.nxv2f32.nxv8f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 8 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 8 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
148 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
149 //
test_vfredsum_vs_f32m4_f32m1_m(vbool8_t mask,vfloat32m1_t dst,vfloat32m4_t vector,vfloat32m1_t scalar,size_t vl)150 vfloat32m1_t test_vfredsum_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m1_t dst,
151 vfloat32m4_t vector,
152 vfloat32m1_t scalar, size_t vl) {
153 return vfredsum_vs_f32m4_f32m1_m(mask, dst, vector, scalar, vl);
154 }
155
156 //
157 // CHECK-RV64-LABEL: @test_vfredsum_vs_f32m8_f32m1_m(
158 // CHECK-RV64-NEXT: entry:
159 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredsum.mask.nxv2f32.nxv16f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 16 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 16 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
160 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
161 //
test_vfredsum_vs_f32m8_f32m1_m(vbool4_t mask,vfloat32m1_t dst,vfloat32m8_t vector,vfloat32m1_t scalar,size_t vl)162 vfloat32m1_t test_vfredsum_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m1_t dst,
163 vfloat32m8_t vector,
164 vfloat32m1_t scalar, size_t vl) {
165 return vfredsum_vs_f32m8_f32m1_m(mask, dst, vector, scalar, vl);
166 }
167
168 //
169 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m1_f64m1_m(
170 // CHECK-RV64-NEXT: entry:
171 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.mask.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 1 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 1 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
172 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
173 //
test_vfredsum_vs_f64m1_f64m1_m(vbool64_t mask,vfloat64m1_t dst,vfloat64m1_t vector,vfloat64m1_t scalar,size_t vl)174 vfloat64m1_t test_vfredsum_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t dst,
175 vfloat64m1_t vector,
176 vfloat64m1_t scalar, size_t vl) {
177 return vfredsum_vs_f64m1_f64m1_m(mask, dst, vector, scalar, vl);
178 }
179
180 //
181 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m2_f64m1_m(
182 // CHECK-RV64-NEXT: entry:
183 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.mask.nxv1f64.nxv2f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 2 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 2 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
184 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
185 //
test_vfredsum_vs_f64m2_f64m1_m(vbool32_t mask,vfloat64m1_t dst,vfloat64m2_t vector,vfloat64m1_t scalar,size_t vl)186 vfloat64m1_t test_vfredsum_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m1_t dst,
187 vfloat64m2_t vector,
188 vfloat64m1_t scalar, size_t vl) {
189 return vfredsum_vs_f64m2_f64m1_m(mask, dst, vector, scalar, vl);
190 }
191
192 //
193 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m4_f64m1_m(
194 // CHECK-RV64-NEXT: entry:
195 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.mask.nxv1f64.nxv4f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 4 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 4 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
196 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
197 //
test_vfredsum_vs_f64m4_f64m1_m(vbool16_t mask,vfloat64m1_t dst,vfloat64m4_t vector,vfloat64m1_t scalar,size_t vl)198 vfloat64m1_t test_vfredsum_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m1_t dst,
199 vfloat64m4_t vector,
200 vfloat64m1_t scalar, size_t vl) {
201 return vfredsum_vs_f64m4_f64m1_m(mask, dst, vector, scalar, vl);
202 }
203
204 //
205 // CHECK-RV64-LABEL: @test_vfredsum_vs_f64m8_f64m1_m(
206 // CHECK-RV64-NEXT: entry:
207 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredsum.mask.nxv1f64.nxv8f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 8 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 8 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
208 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
209 //
test_vfredsum_vs_f64m8_f64m1_m(vbool8_t mask,vfloat64m1_t dst,vfloat64m8_t vector,vfloat64m1_t scalar,size_t vl)210 vfloat64m1_t test_vfredsum_vs_f64m8_f64m1_m(vbool8_t mask, vfloat64m1_t dst,
211 vfloat64m8_t vector,
212 vfloat64m1_t scalar, size_t vl) {
213 return vfredsum_vs_f64m8_f64m1_m(mask, dst, vector, scalar, vl);
214 }
215
216 //
217 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32mf2_f32m1(
218 // CHECK-RV64-NEXT: entry:
219 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.nxv2f32.nxv1f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 1 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
220 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
221 //
test_vfredosum_vs_f32mf2_f32m1(vfloat32m1_t dst,vfloat32mf2_t vector,vfloat32m1_t scalar,size_t vl)222 vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1(vfloat32m1_t dst,
223 vfloat32mf2_t vector,
224 vfloat32m1_t scalar, size_t vl) {
225 return vfredosum_vs_f32mf2_f32m1(dst, vector, scalar, vl);
226 }
227
228 //
229 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m1_f32m1(
230 // CHECK-RV64-NEXT: entry:
231 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 2 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
232 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
233 //
test_vfredosum_vs_f32m1_f32m1(vfloat32m1_t dst,vfloat32m1_t vector,vfloat32m1_t scalar,size_t vl)234 vfloat32m1_t test_vfredosum_vs_f32m1_f32m1(vfloat32m1_t dst,
235 vfloat32m1_t vector,
236 vfloat32m1_t scalar, size_t vl) {
237 return vfredosum_vs_f32m1_f32m1(dst, vector, scalar, vl);
238 }
239
240 //
241 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m2_f32m1(
242 // CHECK-RV64-NEXT: entry:
243 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.nxv2f32.nxv4f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 4 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
244 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
245 //
test_vfredosum_vs_f32m2_f32m1(vfloat32m1_t dst,vfloat32m2_t vector,vfloat32m1_t scalar,size_t vl)246 vfloat32m1_t test_vfredosum_vs_f32m2_f32m1(vfloat32m1_t dst,
247 vfloat32m2_t vector,
248 vfloat32m1_t scalar, size_t vl) {
249 return vfredosum_vs_f32m2_f32m1(dst, vector, scalar, vl);
250 }
251
252 //
253 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m4_f32m1(
254 // CHECK-RV64-NEXT: entry:
255 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.nxv2f32.nxv8f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 8 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
256 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
257 //
test_vfredosum_vs_f32m4_f32m1(vfloat32m1_t dst,vfloat32m4_t vector,vfloat32m1_t scalar,size_t vl)258 vfloat32m1_t test_vfredosum_vs_f32m4_f32m1(vfloat32m1_t dst,
259 vfloat32m4_t vector,
260 vfloat32m1_t scalar, size_t vl) {
261 return vfredosum_vs_f32m4_f32m1(dst, vector, scalar, vl);
262 }
263
264 //
265 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m8_f32m1(
266 // CHECK-RV64-NEXT: entry:
267 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.nxv2f32.nxv16f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 16 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], i64 [[VL:%.*]])
268 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
269 //
test_vfredosum_vs_f32m8_f32m1(vfloat32m1_t dst,vfloat32m8_t vector,vfloat32m1_t scalar,size_t vl)270 vfloat32m1_t test_vfredosum_vs_f32m8_f32m1(vfloat32m1_t dst,
271 vfloat32m8_t vector,
272 vfloat32m1_t scalar, size_t vl) {
273 return vfredosum_vs_f32m8_f32m1(dst, vector, scalar, vl);
274 }
275
276 //
277 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m1_f64m1(
278 // CHECK-RV64-NEXT: entry:
279 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 1 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
280 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
281 //
test_vfredosum_vs_f64m1_f64m1(vfloat64m1_t dst,vfloat64m1_t vector,vfloat64m1_t scalar,size_t vl)282 vfloat64m1_t test_vfredosum_vs_f64m1_f64m1(vfloat64m1_t dst,
283 vfloat64m1_t vector,
284 vfloat64m1_t scalar, size_t vl) {
285 return vfredosum_vs_f64m1_f64m1(dst, vector, scalar, vl);
286 }
287
288 //
289 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m2_f64m1(
290 // CHECK-RV64-NEXT: entry:
291 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.nxv1f64.nxv2f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 2 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
292 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
293 //
test_vfredosum_vs_f64m2_f64m1(vfloat64m1_t dst,vfloat64m2_t vector,vfloat64m1_t scalar,size_t vl)294 vfloat64m1_t test_vfredosum_vs_f64m2_f64m1(vfloat64m1_t dst,
295 vfloat64m2_t vector,
296 vfloat64m1_t scalar, size_t vl) {
297 return vfredosum_vs_f64m2_f64m1(dst, vector, scalar, vl);
298 }
299
300 //
301 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m4_f64m1(
302 // CHECK-RV64-NEXT: entry:
303 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.nxv1f64.nxv4f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 4 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
304 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
305 //
test_vfredosum_vs_f64m4_f64m1(vfloat64m1_t dst,vfloat64m4_t vector,vfloat64m1_t scalar,size_t vl)306 vfloat64m1_t test_vfredosum_vs_f64m4_f64m1(vfloat64m1_t dst,
307 vfloat64m4_t vector,
308 vfloat64m1_t scalar, size_t vl) {
309 return vfredosum_vs_f64m4_f64m1(dst, vector, scalar, vl);
310 }
311
312 //
313 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m8_f64m1(
314 // CHECK-RV64-NEXT: entry:
315 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.nxv1f64.nxv8f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 8 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], i64 [[VL:%.*]])
316 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
317 //
test_vfredosum_vs_f64m8_f64m1(vfloat64m1_t dst,vfloat64m8_t vector,vfloat64m1_t scalar,size_t vl)318 vfloat64m1_t test_vfredosum_vs_f64m8_f64m1(vfloat64m1_t dst,
319 vfloat64m8_t vector,
320 vfloat64m1_t scalar, size_t vl) {
321 return vfredosum_vs_f64m8_f64m1(dst, vector, scalar, vl);
322 }
323
324 //
325 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32mf2_f32m1_m(
326 // CHECK-RV64-NEXT: entry:
327 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.mask.nxv2f32.nxv1f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 1 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 1 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
328 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
329 //
test_vfredosum_vs_f32mf2_f32m1_m(vbool64_t mask,vfloat32m1_t dst,vfloat32mf2_t vector,vfloat32m1_t scalar,size_t vl)330 vfloat32m1_t test_vfredosum_vs_f32mf2_f32m1_m(vbool64_t mask, vfloat32m1_t dst,
331 vfloat32mf2_t vector,
332 vfloat32m1_t scalar, size_t vl) {
333 return vfredosum_vs_f32mf2_f32m1_m(mask, dst, vector, scalar, vl);
334 }
335
336 //
337 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m1_f32m1_m(
338 // CHECK-RV64-NEXT: entry:
339 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.mask.nxv2f32.nxv2f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 2 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 2 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
340 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
341 //
test_vfredosum_vs_f32m1_f32m1_m(vbool32_t mask,vfloat32m1_t dst,vfloat32m1_t vector,vfloat32m1_t scalar,size_t vl)342 vfloat32m1_t test_vfredosum_vs_f32m1_f32m1_m(vbool32_t mask, vfloat32m1_t dst,
343 vfloat32m1_t vector,
344 vfloat32m1_t scalar, size_t vl) {
345 return vfredosum_vs_f32m1_f32m1_m(mask, dst, vector, scalar, vl);
346 }
347
348 //
349 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m2_f32m1_m(
350 // CHECK-RV64-NEXT: entry:
351 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.mask.nxv2f32.nxv4f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 4 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 4 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
352 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
353 //
test_vfredosum_vs_f32m2_f32m1_m(vbool16_t mask,vfloat32m1_t dst,vfloat32m2_t vector,vfloat32m1_t scalar,size_t vl)354 vfloat32m1_t test_vfredosum_vs_f32m2_f32m1_m(vbool16_t mask, vfloat32m1_t dst,
355 vfloat32m2_t vector,
356 vfloat32m1_t scalar, size_t vl) {
357 return vfredosum_vs_f32m2_f32m1_m(mask, dst, vector, scalar, vl);
358 }
359
360 //
361 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m4_f32m1_m(
362 // CHECK-RV64-NEXT: entry:
363 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.mask.nxv2f32.nxv8f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 8 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 8 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
364 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
365 //
test_vfredosum_vs_f32m4_f32m1_m(vbool8_t mask,vfloat32m1_t dst,vfloat32m4_t vector,vfloat32m1_t scalar,size_t vl)366 vfloat32m1_t test_vfredosum_vs_f32m4_f32m1_m(vbool8_t mask, vfloat32m1_t dst,
367 vfloat32m4_t vector,
368 vfloat32m1_t scalar, size_t vl) {
369 return vfredosum_vs_f32m4_f32m1_m(mask, dst, vector, scalar, vl);
370 }
371
372 //
373 // CHECK-RV64-LABEL: @test_vfredosum_vs_f32m8_f32m1_m(
374 // CHECK-RV64-NEXT: entry:
375 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 2 x float> @llvm.riscv.vfredosum.mask.nxv2f32.nxv16f32.i64(<vscale x 2 x float> [[DST:%.*]], <vscale x 16 x float> [[VECTOR:%.*]], <vscale x 2 x float> [[SCALAR:%.*]], <vscale x 16 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
376 // CHECK-RV64-NEXT: ret <vscale x 2 x float> [[TMP0]]
377 //
test_vfredosum_vs_f32m8_f32m1_m(vbool4_t mask,vfloat32m1_t dst,vfloat32m8_t vector,vfloat32m1_t scalar,size_t vl)378 vfloat32m1_t test_vfredosum_vs_f32m8_f32m1_m(vbool4_t mask, vfloat32m1_t dst,
379 vfloat32m8_t vector,
380 vfloat32m1_t scalar, size_t vl) {
381 return vfredosum_vs_f32m8_f32m1_m(mask, dst, vector, scalar, vl);
382 }
383
384 //
385 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m1_f64m1_m(
386 // CHECK-RV64-NEXT: entry:
387 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.mask.nxv1f64.nxv1f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 1 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 1 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
388 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
389 //
test_vfredosum_vs_f64m1_f64m1_m(vbool64_t mask,vfloat64m1_t dst,vfloat64m1_t vector,vfloat64m1_t scalar,size_t vl)390 vfloat64m1_t test_vfredosum_vs_f64m1_f64m1_m(vbool64_t mask, vfloat64m1_t dst,
391 vfloat64m1_t vector,
392 vfloat64m1_t scalar, size_t vl) {
393 return vfredosum_vs_f64m1_f64m1_m(mask, dst, vector, scalar, vl);
394 }
395
396 //
397 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m2_f64m1_m(
398 // CHECK-RV64-NEXT: entry:
399 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.mask.nxv1f64.nxv2f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 2 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 2 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
400 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
401 //
test_vfredosum_vs_f64m2_f64m1_m(vbool32_t mask,vfloat64m1_t dst,vfloat64m2_t vector,vfloat64m1_t scalar,size_t vl)402 vfloat64m1_t test_vfredosum_vs_f64m2_f64m1_m(vbool32_t mask, vfloat64m1_t dst,
403 vfloat64m2_t vector,
404 vfloat64m1_t scalar, size_t vl) {
405 return vfredosum_vs_f64m2_f64m1_m(mask, dst, vector, scalar, vl);
406 }
407
408 //
409 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m4_f64m1_m(
410 // CHECK-RV64-NEXT: entry:
411 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.mask.nxv1f64.nxv4f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 4 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 4 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
412 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
413 //
test_vfredosum_vs_f64m4_f64m1_m(vbool16_t mask,vfloat64m1_t dst,vfloat64m4_t vector,vfloat64m1_t scalar,size_t vl)414 vfloat64m1_t test_vfredosum_vs_f64m4_f64m1_m(vbool16_t mask, vfloat64m1_t dst,
415 vfloat64m4_t vector,
416 vfloat64m1_t scalar, size_t vl) {
417 return vfredosum_vs_f64m4_f64m1_m(mask, dst, vector, scalar, vl);
418 }
419
420 //
421 // CHECK-RV64-LABEL: @test_vfredosum_vs_f64m8_f64m1_m(
422 // CHECK-RV64-NEXT: entry:
423 // CHECK-RV64-NEXT: [[TMP0:%.*]] = call <vscale x 1 x double> @llvm.riscv.vfredosum.mask.nxv1f64.nxv8f64.i64(<vscale x 1 x double> [[DST:%.*]], <vscale x 8 x double> [[VECTOR:%.*]], <vscale x 1 x double> [[SCALAR:%.*]], <vscale x 8 x i1> [[MASK:%.*]], i64 [[VL:%.*]])
424 // CHECK-RV64-NEXT: ret <vscale x 1 x double> [[TMP0]]
425 //
test_vfredosum_vs_f64m8_f64m1_m(vbool8_t mask,vfloat64m1_t dst,vfloat64m8_t vector,vfloat64m1_t scalar,size_t vl)426 vfloat64m1_t test_vfredosum_vs_f64m8_f64m1_m(vbool8_t mask, vfloat64m1_t dst,
427 vfloat64m8_t vector,
428 vfloat64m1_t scalar, size_t vl) {
429 return vfredosum_vs_f64m8_f64m1_m(mask, dst, vector, scalar, vl);
430 }
431