1 // RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu i686 -tune-cpu i686 -emit-llvm %s -o - | FileCheck %s
2
baz(int a)3 int baz(int a) { return 4; }
4
foo(int a)5 int __attribute__((target("avx,sse4.2,arch=ivybridge"))) foo(int a) { return 4; }
6
koala(int a)7 int __attribute__((target("fpmath=387"))) koala(int a) { return 4; }
8
echidna(int a)9 int __attribute__((target("no-sse2"))) echidna(int a) { return 4; }
10
panda(int a)11 int __attribute__((target("sse4"))) panda(int a) { return 4; }
narwhal(int a)12 int __attribute__((target("no-sse4"))) narwhal(int a) { return 4; }
13
bar(int a)14 int bar(int a) { return baz(a) + foo(a); }
15
qux(int a)16 int __attribute__((target("avx, sse4.2, arch= ivybridge"))) qux(int a) { return 4; }
qax(int a)17 int __attribute__((target("no-aes, arch=ivybridge"))) qax(int a) { return 4; }
18
qq(int a)19 int __attribute__((target("no-mmx"))) qq(int a) { return 40; }
20
lake(int a)21 int __attribute__((target("arch=lakemont,mmx"))) lake(int a) { return 4; }
22
23 int use_before_def(void);
useage(void)24 int useage(void){
25 return use_before_def();
26 }
27
28 // Adding the attribute to a definition does update it in IR.
use_before_def(void)29 int __attribute__((target("arch=lakemont,mmx"))) use_before_def(void) {
30 return 5;
31 }
32
walrus(int a)33 int __attribute__((target("tune=sandybridge"))) walrus(int a) { return 4; }
34
x86_64_v2()35 void __attribute__((target("arch=x86-64-v2"))) x86_64_v2() {}
x86_64_v3()36 void __attribute__((target("arch=x86-64-v3"))) x86_64_v3() {}
x86_64_v4()37 void __attribute__((target("arch=x86-64-v4"))) x86_64_v4() {}
38
39 // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar.
40 // CHECK: baz{{.*}} #0
41 // CHECK: foo{{.*}} #1
42 // We're currently ignoring the fpmath attribute so koala should be identical to baz and bar.
43 // CHECK: koala{{.*}} #0
44 // CHECK: echidna{{.*}} #2
45 // CHECK: panda{{.*}} #3
46 // CHECK: narwhal{{.*}} #4
47 // CHECK: bar{{.*}} #0
48 // CHECK: qux{{.*}} #1
49 // CHECK: qax{{.*}} #5
50 // CHECK: qq{{.*}} #6
51 // CHECK: lake{{.*}} #7
52 // CHECK: use_before_def{{.*}} #7
53 // CHECK: walrus{{.*}} #8
54 // CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87" "tune-cpu"="i686"
55 // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"
56 // CHECK-NOT: tune-cpu
57 // CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87,-aes,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxvnni,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686"
58 // CHECK: #3 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686"
59 // CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87,-avx,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512ifma,-avx512pf,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxvnni,-f16c,-fma,-fma4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686"
60 // CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-vaes"
61 // CHECK-NOT: tune-cpu
62 // CHECK: #6 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87,-3dnow,-3dnowa,-mmx"
63 // CHECK: #7 = {{.*}}"target-cpu"="lakemont" "target-features"="+cx8,+mmx"
64 // CHECK-NOT: tune-cpu
65 // CHECK: #8 = {{.*}}"target-cpu"="i686" "target-features"="+cx8,+x87" "tune-cpu"="sandybridge"
66
67 // CHECK: "target-cpu"="x86-64-v2"
68 // CHECK-SAME: "target-features"="+cx16,+cx8,+fxsr,+mmx,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"
69 // CHECK: "target-cpu"="x86-64-v3"
70 // CHECK-SAME: "target-features"="+avx,+avx2,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
71 // CHECK: "target-cpu"="x86-64-v4"
72 // CHECK-SAME: "target-features"="+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"
73