1; Test to make sure NVVM intrinsics are automatically upgraded.
2; RUN: llvm-as < %s | llvm-dis | FileCheck %s
3; RUN: verify-uselistorder %s
4
5declare i32 @llvm.nvvm.brev32(i32)
6declare i64 @llvm.nvvm.brev64(i64)
7declare i32 @llvm.nvvm.clz.i(i32)
8declare i32 @llvm.nvvm.clz.ll(i64)
9declare i32 @llvm.nvvm.popc.i(i32)
10declare i32 @llvm.nvvm.popc.ll(i64)
11declare float @llvm.nvvm.h2f(i16)
12
13declare i32 @llvm.nvvm.abs.i(i32)
14declare i64 @llvm.nvvm.abs.ll(i64)
15
16declare i32 @llvm.nvvm.max.i(i32, i32)
17declare i64 @llvm.nvvm.max.ll(i64, i64)
18declare i32 @llvm.nvvm.max.ui(i32, i32)
19declare i64 @llvm.nvvm.max.ull(i64, i64)
20declare i32 @llvm.nvvm.min.i(i32, i32)
21declare i64 @llvm.nvvm.min.ll(i64, i64)
22declare i32 @llvm.nvvm.min.ui(i32, i32)
23declare i64 @llvm.nvvm.min.ull(i64, i64)
24
25; CHECK-LABEL: @simple_upgrade
26define void @simple_upgrade(i32 %a, i64 %b, i16 %c) {
27; CHECK: call i32 @llvm.bitreverse.i32(i32 %a)
28  %r1 = call i32 @llvm.nvvm.brev32(i32 %a)
29
30; CHECK: call i64 @llvm.bitreverse.i64(i64 %b)
31  %r2 = call i64 @llvm.nvvm.brev64(i64 %b)
32
33; CHECK: call i32 @llvm.ctlz.i32(i32 %a, i1 false)
34  %r3 = call i32 @llvm.nvvm.clz.i(i32 %a)
35
36; CHECK: [[clz:%[a-zA-Z0-9.]+]] = call i64 @llvm.ctlz.i64(i64 %b, i1 false)
37; CHECK: trunc i64 [[clz]] to i32
38  %r4 = call i32 @llvm.nvvm.clz.ll(i64 %b)
39
40; CHECK: call i32 @llvm.ctpop.i32(i32 %a)
41  %r5 = call i32 @llvm.nvvm.popc.i(i32 %a)
42
43; CHECK: [[popc:%[a-zA-Z0-9.]+]] = call i64 @llvm.ctpop.i64(i64 %b)
44; CHECK: trunc i64 [[popc]] to i32
45  %r6 = call i32 @llvm.nvvm.popc.ll(i64 %b)
46
47; CHECK: call float @llvm.convert.from.fp16.f32(i16 %c)
48  %r7 = call float @llvm.nvvm.h2f(i16 %c)
49  ret void
50}
51
52; CHECK-LABEL: @abs
53define void @abs(i32 %a, i64 %b) {
54; CHECK-DAG: [[negi:%[a-zA-Z0-9.]+]] = sub i32 0, %a
55; CHECK-DAG: [[cmpi:%[a-zA-Z0-9.]+]] = icmp sge i32 %a, 0
56; CHECK: select i1 [[cmpi]], i32 %a, i32 [[negi]]
57  %r1 = call i32 @llvm.nvvm.abs.i(i32 %a)
58
59; CHECK-DAG: [[negll:%[a-zA-Z0-9.]+]] = sub i64 0, %b
60; CHECK-DAG: [[cmpll:%[a-zA-Z0-9.]+]] = icmp sge i64 %b, 0
61; CHECK: select i1 [[cmpll]], i64 %b, i64 [[negll]]
62  %r2 = call i64 @llvm.nvvm.abs.ll(i64 %b)
63
64  ret void
65}
66
67; CHECK-LABEL: @min_max
68define void @min_max(i32 %a1, i32 %a2, i64 %b1, i64 %b2) {
69; CHECK: [[maxi:%[a-zA-Z0-9.]+]] = icmp sge i32 %a1, %a2
70; CHECK: select i1 [[maxi]], i32 %a1, i32 %a2
71  %r1 = call i32 @llvm.nvvm.max.i(i32 %a1, i32 %a2)
72
73; CHECK: [[maxll:%[a-zA-Z0-9.]+]] = icmp sge i64 %b1, %b2
74; CHECK: select i1 [[maxll]], i64 %b1, i64 %b2
75  %r2 = call i64 @llvm.nvvm.max.ll(i64 %b1, i64 %b2)
76
77; CHECK: [[maxui:%[a-zA-Z0-9.]+]] = icmp uge i32 %a1, %a2
78; CHECK: select i1 [[maxui]], i32 %a1, i32 %a2
79  %r3 = call i32 @llvm.nvvm.max.ui(i32 %a1, i32 %a2)
80
81; CHECK: [[maxull:%[a-zA-Z0-9.]+]] = icmp uge i64 %b1, %b2
82; CHECK: select i1 [[maxull]], i64 %b1, i64 %b2
83  %r4 = call i64 @llvm.nvvm.max.ull(i64 %b1, i64 %b2)
84
85; CHECK: [[mini:%[a-zA-Z0-9.]+]] = icmp sle i32 %a1, %a2
86; CHECK: select i1 [[mini]], i32 %a1, i32 %a2
87  %r5 = call i32 @llvm.nvvm.min.i(i32 %a1, i32 %a2)
88
89; CHECK: [[minll:%[a-zA-Z0-9.]+]] = icmp sle i64 %b1, %b2
90; CHECK: select i1 [[minll]], i64 %b1, i64 %b2
91  %r6 = call i64 @llvm.nvvm.min.ll(i64 %b1, i64 %b2)
92
93; CHECK: [[minui:%[a-zA-Z0-9.]+]] = icmp ule i32 %a1, %a2
94; CHECK: select i1 [[minui]], i32 %a1, i32 %a2
95  %r7 = call i32 @llvm.nvvm.min.ui(i32 %a1, i32 %a2)
96
97; CHECK: [[minull:%[a-zA-Z0-9.]+]] = icmp ule i64 %b1, %b2
98; CHECK: select i1 [[minull]], i64 %b1, i64 %b2
99  %r8 = call i64 @llvm.nvvm.min.ull(i64 %b1, i64 %b2)
100
101  ret void
102}
103