1; RUN: llc -mtriple=amdgcn--amdhsa -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefix=GCN %s
2
3; FIXME: merge with trap.ll
4
5; An s_cbranch_execnz is required to avoid trapping if all lanes are 0
6; GCN-LABEL: {{^}}trap_divergent_branch:
7; GCN: s_and_saveexec_b64
8; GCN: s_cbranch_execnz [[TRAP:BB[0-9]+_[0-9]+]]
9; GCN: ; %bb.{{[0-9]+}}:
10; GCN-NEXT: s_endpgm
11; GCN: [[TRAP]]:
12; GCN: s_trap 2
13; GCN-NEXT: s_endpgm
14define amdgpu_kernel void @trap_divergent_branch(i32 addrspace(1)* nocapture readonly %arg) {
15  %id = call i32 @llvm.amdgcn.workitem.id.x()
16  %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg, i32 %id
17  %divergent.val = load i32, i32 addrspace(1)* %gep
18  %cmp = icmp eq i32 %divergent.val, 0
19  br i1 %cmp, label %bb, label %end
20
21bb:
22  call void @llvm.trap()
23  br label %end
24
25end:
26  ret void
27}
28
29; GCN-LABEL: {{^}}debugtrap_divergent_branch:
30; GCN: s_and_saveexec_b64
31; GCN: s_cbranch_execz [[ENDPGM:BB[0-9]+_[0-9]+]]
32; GCN: ; %bb.{{[0-9]+}}:
33; GCN: s_trap 3
34; GCN-NEXT: [[ENDPGM]]:
35; GCN-NEXT: s_endpgm
36define amdgpu_kernel void @debugtrap_divergent_branch(i32 addrspace(1)* nocapture readonly %arg) {
37  %id = call i32 @llvm.amdgcn.workitem.id.x()
38  %gep = getelementptr inbounds i32, i32 addrspace(1)* %arg, i32 %id
39  %divergent.val = load i32, i32 addrspace(1)* %gep
40  %cmp = icmp eq i32 %divergent.val, 0
41  br i1 %cmp, label %bb, label %end
42
43bb:
44  call void @llvm.debugtrap()
45  br label %end
46
47end:
48  ret void
49}
50
51declare void @llvm.trap() #0
52declare void @llvm.debugtrap() #1
53declare i32 @llvm.amdgcn.workitem.id.x() #2
54
55attributes #0 = { nounwind noreturn }
56attributes #1 = { nounwind }
57attributes #2 = { nounwind readnone speculatable }
58