1; RUN: llc < %s -mtriple=ve -mattr=+vpu | FileCheck %s 2 3;;; Test vector subtract intrinsic instructions 4;;; 5;;; Note: 6;;; We test VSUB*vvl, VSUB*vvl_v, VSUB*rvl, VSUB*rvl_v, VSUB*ivl, VSUB*ivl_v, 7;;; VSUB*vvml_v, VSUB*rvml_v, VSUB*ivml_v, PVSUB*vvl, PVSUB*vvl_v, PVSUB*rvl, 8;;; PVSUB*rvl_v, PVSUB*vvml_v, and PVSUB*rvml_v instructions. 9 10; Function Attrs: nounwind readnone 11define fastcc <256 x double> @vsubul_vvvl(<256 x double> %0, <256 x double> %1) { 12; CHECK-LABEL: vsubul_vvvl: 13; CHECK: # %bb.0: 14; CHECK-NEXT: lea %s0, 256 15; CHECK-NEXT: lvl %s0 16; CHECK-NEXT: vsubu.l %v0, %v0, %v1 17; CHECK-NEXT: b.l.t (, %s10) 18 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 19 ret <256 x double> %3 20} 21 22; Function Attrs: nounwind readnone 23declare <256 x double> @llvm.ve.vl.vsubul.vvvl(<256 x double>, <256 x double>, i32) 24 25; Function Attrs: nounwind readnone 26define fastcc <256 x double> @vsubul_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 27; CHECK-LABEL: vsubul_vvvvl: 28; CHECK: # %bb.0: 29; CHECK-NEXT: lea %s0, 128 30; CHECK-NEXT: lvl %s0 31; CHECK-NEXT: vsubu.l %v2, %v0, %v1 32; CHECK-NEXT: lea %s16, 256 33; CHECK-NEXT: lvl %s16 34; CHECK-NEXT: vor %v0, (0)1, %v2 35; CHECK-NEXT: b.l.t (, %s10) 36 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 37 ret <256 x double> %4 38} 39 40; Function Attrs: nounwind readnone 41declare <256 x double> @llvm.ve.vl.vsubul.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 42 43; Function Attrs: nounwind readnone 44define fastcc <256 x double> @vsubul_vsvl(i64 %0, <256 x double> %1) { 45; CHECK-LABEL: vsubul_vsvl: 46; CHECK: # %bb.0: 47; CHECK-NEXT: lea %s1, 256 48; CHECK-NEXT: lvl %s1 49; CHECK-NEXT: vsubu.l %v0, %s0, %v0 50; CHECK-NEXT: b.l.t (, %s10) 51 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vsvl(i64 %0, <256 x double> %1, i32 256) 52 ret <256 x double> %3 53} 54 55; Function Attrs: nounwind readnone 56declare <256 x double> @llvm.ve.vl.vsubul.vsvl(i64, <256 x double>, i32) 57 58; Function Attrs: nounwind readnone 59define fastcc <256 x double> @vsubul_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) { 60; CHECK-LABEL: vsubul_vsvvl: 61; CHECK: # %bb.0: 62; CHECK-NEXT: lea %s1, 128 63; CHECK-NEXT: lvl %s1 64; CHECK-NEXT: vsubu.l %v1, %s0, %v0 65; CHECK-NEXT: lea %s16, 256 66; CHECK-NEXT: lvl %s16 67; CHECK-NEXT: vor %v0, (0)1, %v1 68; CHECK-NEXT: b.l.t (, %s10) 69 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128) 70 ret <256 x double> %4 71} 72 73; Function Attrs: nounwind readnone 74declare <256 x double> @llvm.ve.vl.vsubul.vsvvl(i64, <256 x double>, <256 x double>, i32) 75 76; Function Attrs: nounwind readnone 77define fastcc <256 x double> @vsubul_vsvl_imm(<256 x double> %0) { 78; CHECK-LABEL: vsubul_vsvl_imm: 79; CHECK: # %bb.0: 80; CHECK-NEXT: lea %s0, 256 81; CHECK-NEXT: lvl %s0 82; CHECK-NEXT: vsubu.l %v0, 8, %v0 83; CHECK-NEXT: b.l.t (, %s10) 84 %2 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vsvl(i64 8, <256 x double> %0, i32 256) 85 ret <256 x double> %2 86} 87 88; Function Attrs: nounwind readnone 89define fastcc <256 x double> @vsubul_vsvvl_imm(<256 x double> %0, <256 x double> %1) { 90; CHECK-LABEL: vsubul_vsvvl_imm: 91; CHECK: # %bb.0: 92; CHECK-NEXT: lea %s0, 128 93; CHECK-NEXT: lvl %s0 94; CHECK-NEXT: vsubu.l %v1, 8, %v0 95; CHECK-NEXT: lea %s16, 256 96; CHECK-NEXT: lvl %s16 97; CHECK-NEXT: vor %v0, (0)1, %v1 98; CHECK-NEXT: b.l.t (, %s10) 99 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128) 100 ret <256 x double> %3 101} 102 103; Function Attrs: nounwind readnone 104define fastcc <256 x double> @vsubul_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 105; CHECK-LABEL: vsubul_vvvmvl: 106; CHECK: # %bb.0: 107; CHECK-NEXT: lea %s0, 128 108; CHECK-NEXT: lvl %s0 109; CHECK-NEXT: vsubu.l %v2, %v0, %v1, %vm1 110; CHECK-NEXT: lea %s16, 256 111; CHECK-NEXT: lvl %s16 112; CHECK-NEXT: vor %v0, (0)1, %v2 113; CHECK-NEXT: b.l.t (, %s10) 114 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 115 ret <256 x double> %5 116} 117 118; Function Attrs: nounwind readnone 119declare <256 x double> @llvm.ve.vl.vsubul.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32) 120 121; Function Attrs: nounwind readnone 122define fastcc <256 x double> @vsubul_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 123; CHECK-LABEL: vsubul_vsvmvl: 124; CHECK: # %bb.0: 125; CHECK-NEXT: lea %s1, 128 126; CHECK-NEXT: lvl %s1 127; CHECK-NEXT: vsubu.l %v1, %s0, %v0, %vm1 128; CHECK-NEXT: lea %s16, 256 129; CHECK-NEXT: lvl %s16 130; CHECK-NEXT: vor %v0, (0)1, %v1 131; CHECK-NEXT: b.l.t (, %s10) 132 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 133 ret <256 x double> %5 134} 135 136; Function Attrs: nounwind readnone 137declare <256 x double> @llvm.ve.vl.vsubul.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32) 138 139; Function Attrs: nounwind readnone 140define fastcc <256 x double> @vsubul_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) { 141; CHECK-LABEL: vsubul_vsvmvl_imm: 142; CHECK: # %bb.0: 143; CHECK-NEXT: lea %s0, 128 144; CHECK-NEXT: lvl %s0 145; CHECK-NEXT: vsubu.l %v1, 8, %v0, %vm1 146; CHECK-NEXT: lea %s16, 256 147; CHECK-NEXT: lvl %s16 148; CHECK-NEXT: vor %v0, (0)1, %v1 149; CHECK-NEXT: b.l.t (, %s10) 150 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubul.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128) 151 ret <256 x double> %4 152} 153 154; Function Attrs: nounwind readnone 155define fastcc <256 x double> @vsubuw_vvvl(<256 x double> %0, <256 x double> %1) { 156; CHECK-LABEL: vsubuw_vvvl: 157; CHECK: # %bb.0: 158; CHECK-NEXT: lea %s0, 256 159; CHECK-NEXT: lvl %s0 160; CHECK-NEXT: vsubu.w %v0, %v0, %v1 161; CHECK-NEXT: b.l.t (, %s10) 162 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 163 ret <256 x double> %3 164} 165 166; Function Attrs: nounwind readnone 167declare <256 x double> @llvm.ve.vl.vsubuw.vvvl(<256 x double>, <256 x double>, i32) 168 169; Function Attrs: nounwind readnone 170define fastcc <256 x double> @vsubuw_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 171; CHECK-LABEL: vsubuw_vvvvl: 172; CHECK: # %bb.0: 173; CHECK-NEXT: lea %s0, 128 174; CHECK-NEXT: lvl %s0 175; CHECK-NEXT: vsubu.w %v2, %v0, %v1 176; CHECK-NEXT: lea %s16, 256 177; CHECK-NEXT: lvl %s16 178; CHECK-NEXT: vor %v0, (0)1, %v2 179; CHECK-NEXT: b.l.t (, %s10) 180 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 181 ret <256 x double> %4 182} 183 184; Function Attrs: nounwind readnone 185declare <256 x double> @llvm.ve.vl.vsubuw.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 186 187; Function Attrs: nounwind readnone 188define fastcc <256 x double> @vsubuw_vsvl(i32 signext %0, <256 x double> %1) { 189; CHECK-LABEL: vsubuw_vsvl: 190; CHECK: # %bb.0: 191; CHECK-NEXT: and %s0, %s0, (32)0 192; CHECK-NEXT: lea %s1, 256 193; CHECK-NEXT: lvl %s1 194; CHECK-NEXT: vsubu.w %v0, %s0, %v0 195; CHECK-NEXT: b.l.t (, %s10) 196 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vsvl(i32 %0, <256 x double> %1, i32 256) 197 ret <256 x double> %3 198} 199 200; Function Attrs: nounwind readnone 201declare <256 x double> @llvm.ve.vl.vsubuw.vsvl(i32, <256 x double>, i32) 202 203; Function Attrs: nounwind readnone 204define fastcc <256 x double> @vsubuw_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) { 205; CHECK-LABEL: vsubuw_vsvvl: 206; CHECK: # %bb.0: 207; CHECK-NEXT: and %s0, %s0, (32)0 208; CHECK-NEXT: lea %s1, 128 209; CHECK-NEXT: lvl %s1 210; CHECK-NEXT: vsubu.w %v1, %s0, %v0 211; CHECK-NEXT: lea %s16, 256 212; CHECK-NEXT: lvl %s16 213; CHECK-NEXT: vor %v0, (0)1, %v1 214; CHECK-NEXT: b.l.t (, %s10) 215 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128) 216 ret <256 x double> %4 217} 218 219; Function Attrs: nounwind readnone 220declare <256 x double> @llvm.ve.vl.vsubuw.vsvvl(i32, <256 x double>, <256 x double>, i32) 221 222; Function Attrs: nounwind readnone 223define fastcc <256 x double> @vsubuw_vsvl_imm(<256 x double> %0) { 224; CHECK-LABEL: vsubuw_vsvl_imm: 225; CHECK: # %bb.0: 226; CHECK-NEXT: lea %s0, 256 227; CHECK-NEXT: lvl %s0 228; CHECK-NEXT: vsubu.w %v0, 8, %v0 229; CHECK-NEXT: b.l.t (, %s10) 230 %2 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vsvl(i32 8, <256 x double> %0, i32 256) 231 ret <256 x double> %2 232} 233 234; Function Attrs: nounwind readnone 235define fastcc <256 x double> @vsubuw_vsvvl_imm(<256 x double> %0, <256 x double> %1) { 236; CHECK-LABEL: vsubuw_vsvvl_imm: 237; CHECK: # %bb.0: 238; CHECK-NEXT: lea %s0, 128 239; CHECK-NEXT: lvl %s0 240; CHECK-NEXT: vsubu.w %v1, 8, %v0 241; CHECK-NEXT: lea %s16, 256 242; CHECK-NEXT: lvl %s16 243; CHECK-NEXT: vor %v0, (0)1, %v1 244; CHECK-NEXT: b.l.t (, %s10) 245 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128) 246 ret <256 x double> %3 247} 248 249; Function Attrs: nounwind readnone 250define fastcc <256 x double> @vsubuw_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 251; CHECK-LABEL: vsubuw_vvvmvl: 252; CHECK: # %bb.0: 253; CHECK-NEXT: lea %s0, 128 254; CHECK-NEXT: lvl %s0 255; CHECK-NEXT: vsubu.w %v2, %v0, %v1, %vm1 256; CHECK-NEXT: lea %s16, 256 257; CHECK-NEXT: lvl %s16 258; CHECK-NEXT: vor %v0, (0)1, %v2 259; CHECK-NEXT: b.l.t (, %s10) 260 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 261 ret <256 x double> %5 262} 263 264; Function Attrs: nounwind readnone 265declare <256 x double> @llvm.ve.vl.vsubuw.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32) 266 267; Function Attrs: nounwind readnone 268define fastcc <256 x double> @vsubuw_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 269; CHECK-LABEL: vsubuw_vsvmvl: 270; CHECK: # %bb.0: 271; CHECK-NEXT: and %s0, %s0, (32)0 272; CHECK-NEXT: lea %s1, 128 273; CHECK-NEXT: lvl %s1 274; CHECK-NEXT: vsubu.w %v1, %s0, %v0, %vm1 275; CHECK-NEXT: lea %s16, 256 276; CHECK-NEXT: lvl %s16 277; CHECK-NEXT: vor %v0, (0)1, %v1 278; CHECK-NEXT: b.l.t (, %s10) 279 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 280 ret <256 x double> %5 281} 282 283; Function Attrs: nounwind readnone 284declare <256 x double> @llvm.ve.vl.vsubuw.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32) 285 286; Function Attrs: nounwind readnone 287define fastcc <256 x double> @vsubuw_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) { 288; CHECK-LABEL: vsubuw_vsvmvl_imm: 289; CHECK: # %bb.0: 290; CHECK-NEXT: lea %s0, 128 291; CHECK-NEXT: lvl %s0 292; CHECK-NEXT: vsubu.w %v1, 8, %v0, %vm1 293; CHECK-NEXT: lea %s16, 256 294; CHECK-NEXT: lvl %s16 295; CHECK-NEXT: vor %v0, (0)1, %v1 296; CHECK-NEXT: b.l.t (, %s10) 297 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubuw.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128) 298 ret <256 x double> %4 299} 300 301; Function Attrs: nounwind readnone 302define fastcc <256 x double> @vsubswsx_vvvl(<256 x double> %0, <256 x double> %1) { 303; CHECK-LABEL: vsubswsx_vvvl: 304; CHECK: # %bb.0: 305; CHECK-NEXT: lea %s0, 256 306; CHECK-NEXT: lvl %s0 307; CHECK-NEXT: vsubs.w.sx %v0, %v0, %v1 308; CHECK-NEXT: b.l.t (, %s10) 309 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 310 ret <256 x double> %3 311} 312 313; Function Attrs: nounwind readnone 314declare <256 x double> @llvm.ve.vl.vsubswsx.vvvl(<256 x double>, <256 x double>, i32) 315 316; Function Attrs: nounwind readnone 317define fastcc <256 x double> @vsubswsx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 318; CHECK-LABEL: vsubswsx_vvvvl: 319; CHECK: # %bb.0: 320; CHECK-NEXT: lea %s0, 128 321; CHECK-NEXT: lvl %s0 322; CHECK-NEXT: vsubs.w.sx %v2, %v0, %v1 323; CHECK-NEXT: lea %s16, 256 324; CHECK-NEXT: lvl %s16 325; CHECK-NEXT: vor %v0, (0)1, %v2 326; CHECK-NEXT: b.l.t (, %s10) 327 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 328 ret <256 x double> %4 329} 330 331; Function Attrs: nounwind readnone 332declare <256 x double> @llvm.ve.vl.vsubswsx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 333 334; Function Attrs: nounwind readnone 335define fastcc <256 x double> @vsubswsx_vsvl(i32 signext %0, <256 x double> %1) { 336; CHECK-LABEL: vsubswsx_vsvl: 337; CHECK: # %bb.0: 338; CHECK-NEXT: and %s0, %s0, (32)0 339; CHECK-NEXT: lea %s1, 256 340; CHECK-NEXT: lvl %s1 341; CHECK-NEXT: vsubs.w.sx %v0, %s0, %v0 342; CHECK-NEXT: b.l.t (, %s10) 343 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vsvl(i32 %0, <256 x double> %1, i32 256) 344 ret <256 x double> %3 345} 346 347; Function Attrs: nounwind readnone 348declare <256 x double> @llvm.ve.vl.vsubswsx.vsvl(i32, <256 x double>, i32) 349 350; Function Attrs: nounwind readnone 351define fastcc <256 x double> @vsubswsx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) { 352; CHECK-LABEL: vsubswsx_vsvvl: 353; CHECK: # %bb.0: 354; CHECK-NEXT: and %s0, %s0, (32)0 355; CHECK-NEXT: lea %s1, 128 356; CHECK-NEXT: lvl %s1 357; CHECK-NEXT: vsubs.w.sx %v1, %s0, %v0 358; CHECK-NEXT: lea %s16, 256 359; CHECK-NEXT: lvl %s16 360; CHECK-NEXT: vor %v0, (0)1, %v1 361; CHECK-NEXT: b.l.t (, %s10) 362 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128) 363 ret <256 x double> %4 364} 365 366; Function Attrs: nounwind readnone 367declare <256 x double> @llvm.ve.vl.vsubswsx.vsvvl(i32, <256 x double>, <256 x double>, i32) 368 369; Function Attrs: nounwind readnone 370define fastcc <256 x double> @vsubswsx_vsvl_imm(<256 x double> %0) { 371; CHECK-LABEL: vsubswsx_vsvl_imm: 372; CHECK: # %bb.0: 373; CHECK-NEXT: lea %s0, 256 374; CHECK-NEXT: lvl %s0 375; CHECK-NEXT: vsubs.w.sx %v0, 8, %v0 376; CHECK-NEXT: b.l.t (, %s10) 377 %2 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vsvl(i32 8, <256 x double> %0, i32 256) 378 ret <256 x double> %2 379} 380 381; Function Attrs: nounwind readnone 382define fastcc <256 x double> @vsubswsx_vsvvl_imm(<256 x double> %0, <256 x double> %1) { 383; CHECK-LABEL: vsubswsx_vsvvl_imm: 384; CHECK: # %bb.0: 385; CHECK-NEXT: lea %s0, 128 386; CHECK-NEXT: lvl %s0 387; CHECK-NEXT: vsubs.w.sx %v1, 8, %v0 388; CHECK-NEXT: lea %s16, 256 389; CHECK-NEXT: lvl %s16 390; CHECK-NEXT: vor %v0, (0)1, %v1 391; CHECK-NEXT: b.l.t (, %s10) 392 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128) 393 ret <256 x double> %3 394} 395 396; Function Attrs: nounwind readnone 397define fastcc <256 x double> @vsubswsx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 398; CHECK-LABEL: vsubswsx_vvvmvl: 399; CHECK: # %bb.0: 400; CHECK-NEXT: lea %s0, 128 401; CHECK-NEXT: lvl %s0 402; CHECK-NEXT: vsubs.w.sx %v2, %v0, %v1, %vm1 403; CHECK-NEXT: lea %s16, 256 404; CHECK-NEXT: lvl %s16 405; CHECK-NEXT: vor %v0, (0)1, %v2 406; CHECK-NEXT: b.l.t (, %s10) 407 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 408 ret <256 x double> %5 409} 410 411; Function Attrs: nounwind readnone 412declare <256 x double> @llvm.ve.vl.vsubswsx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32) 413 414; Function Attrs: nounwind readnone 415define fastcc <256 x double> @vsubswsx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 416; CHECK-LABEL: vsubswsx_vsvmvl: 417; CHECK: # %bb.0: 418; CHECK-NEXT: and %s0, %s0, (32)0 419; CHECK-NEXT: lea %s1, 128 420; CHECK-NEXT: lvl %s1 421; CHECK-NEXT: vsubs.w.sx %v1, %s0, %v0, %vm1 422; CHECK-NEXT: lea %s16, 256 423; CHECK-NEXT: lvl %s16 424; CHECK-NEXT: vor %v0, (0)1, %v1 425; CHECK-NEXT: b.l.t (, %s10) 426 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 427 ret <256 x double> %5 428} 429 430; Function Attrs: nounwind readnone 431declare <256 x double> @llvm.ve.vl.vsubswsx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32) 432 433; Function Attrs: nounwind readnone 434define fastcc <256 x double> @vsubswsx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) { 435; CHECK-LABEL: vsubswsx_vsvmvl_imm: 436; CHECK: # %bb.0: 437; CHECK-NEXT: lea %s0, 128 438; CHECK-NEXT: lvl %s0 439; CHECK-NEXT: vsubs.w.sx %v1, 8, %v0, %vm1 440; CHECK-NEXT: lea %s16, 256 441; CHECK-NEXT: lvl %s16 442; CHECK-NEXT: vor %v0, (0)1, %v1 443; CHECK-NEXT: b.l.t (, %s10) 444 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubswsx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128) 445 ret <256 x double> %4 446} 447 448; Function Attrs: nounwind readnone 449define fastcc <256 x double> @vsubswzx_vvvl(<256 x double> %0, <256 x double> %1) { 450; CHECK-LABEL: vsubswzx_vvvl: 451; CHECK: # %bb.0: 452; CHECK-NEXT: lea %s0, 256 453; CHECK-NEXT: lvl %s0 454; CHECK-NEXT: vsubs.w.zx %v0, %v0, %v1 455; CHECK-NEXT: b.l.t (, %s10) 456 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 457 ret <256 x double> %3 458} 459 460; Function Attrs: nounwind readnone 461declare <256 x double> @llvm.ve.vl.vsubswzx.vvvl(<256 x double>, <256 x double>, i32) 462 463; Function Attrs: nounwind readnone 464define fastcc <256 x double> @vsubswzx_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 465; CHECK-LABEL: vsubswzx_vvvvl: 466; CHECK: # %bb.0: 467; CHECK-NEXT: lea %s0, 128 468; CHECK-NEXT: lvl %s0 469; CHECK-NEXT: vsubs.w.zx %v2, %v0, %v1 470; CHECK-NEXT: lea %s16, 256 471; CHECK-NEXT: lvl %s16 472; CHECK-NEXT: vor %v0, (0)1, %v2 473; CHECK-NEXT: b.l.t (, %s10) 474 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 475 ret <256 x double> %4 476} 477 478; Function Attrs: nounwind readnone 479declare <256 x double> @llvm.ve.vl.vsubswzx.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 480 481; Function Attrs: nounwind readnone 482define fastcc <256 x double> @vsubswzx_vsvl(i32 signext %0, <256 x double> %1) { 483; CHECK-LABEL: vsubswzx_vsvl: 484; CHECK: # %bb.0: 485; CHECK-NEXT: and %s0, %s0, (32)0 486; CHECK-NEXT: lea %s1, 256 487; CHECK-NEXT: lvl %s1 488; CHECK-NEXT: vsubs.w.zx %v0, %s0, %v0 489; CHECK-NEXT: b.l.t (, %s10) 490 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vsvl(i32 %0, <256 x double> %1, i32 256) 491 ret <256 x double> %3 492} 493 494; Function Attrs: nounwind readnone 495declare <256 x double> @llvm.ve.vl.vsubswzx.vsvl(i32, <256 x double>, i32) 496 497; Function Attrs: nounwind readnone 498define fastcc <256 x double> @vsubswzx_vsvvl(i32 signext %0, <256 x double> %1, <256 x double> %2) { 499; CHECK-LABEL: vsubswzx_vsvvl: 500; CHECK: # %bb.0: 501; CHECK-NEXT: and %s0, %s0, (32)0 502; CHECK-NEXT: lea %s1, 128 503; CHECK-NEXT: lvl %s1 504; CHECK-NEXT: vsubs.w.zx %v1, %s0, %v0 505; CHECK-NEXT: lea %s16, 256 506; CHECK-NEXT: lvl %s16 507; CHECK-NEXT: vor %v0, (0)1, %v1 508; CHECK-NEXT: b.l.t (, %s10) 509 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vsvvl(i32 %0, <256 x double> %1, <256 x double> %2, i32 128) 510 ret <256 x double> %4 511} 512 513; Function Attrs: nounwind readnone 514declare <256 x double> @llvm.ve.vl.vsubswzx.vsvvl(i32, <256 x double>, <256 x double>, i32) 515 516; Function Attrs: nounwind readnone 517define fastcc <256 x double> @vsubswzx_vsvl_imm(<256 x double> %0) { 518; CHECK-LABEL: vsubswzx_vsvl_imm: 519; CHECK: # %bb.0: 520; CHECK-NEXT: lea %s0, 256 521; CHECK-NEXT: lvl %s0 522; CHECK-NEXT: vsubs.w.zx %v0, 8, %v0 523; CHECK-NEXT: b.l.t (, %s10) 524 %2 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vsvl(i32 8, <256 x double> %0, i32 256) 525 ret <256 x double> %2 526} 527 528; Function Attrs: nounwind readnone 529define fastcc <256 x double> @vsubswzx_vsvvl_imm(<256 x double> %0, <256 x double> %1) { 530; CHECK-LABEL: vsubswzx_vsvvl_imm: 531; CHECK: # %bb.0: 532; CHECK-NEXT: lea %s0, 128 533; CHECK-NEXT: lvl %s0 534; CHECK-NEXT: vsubs.w.zx %v1, 8, %v0 535; CHECK-NEXT: lea %s16, 256 536; CHECK-NEXT: lvl %s16 537; CHECK-NEXT: vor %v0, (0)1, %v1 538; CHECK-NEXT: b.l.t (, %s10) 539 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vsvvl(i32 8, <256 x double> %0, <256 x double> %1, i32 128) 540 ret <256 x double> %3 541} 542 543; Function Attrs: nounwind readnone 544define fastcc <256 x double> @vsubswzx_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 545; CHECK-LABEL: vsubswzx_vvvmvl: 546; CHECK: # %bb.0: 547; CHECK-NEXT: lea %s0, 128 548; CHECK-NEXT: lvl %s0 549; CHECK-NEXT: vsubs.w.zx %v2, %v0, %v1, %vm1 550; CHECK-NEXT: lea %s16, 256 551; CHECK-NEXT: lvl %s16 552; CHECK-NEXT: vor %v0, (0)1, %v2 553; CHECK-NEXT: b.l.t (, %s10) 554 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 555 ret <256 x double> %5 556} 557 558; Function Attrs: nounwind readnone 559declare <256 x double> @llvm.ve.vl.vsubswzx.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32) 560 561; Function Attrs: nounwind readnone 562define fastcc <256 x double> @vsubswzx_vsvmvl(i32 signext %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 563; CHECK-LABEL: vsubswzx_vsvmvl: 564; CHECK: # %bb.0: 565; CHECK-NEXT: and %s0, %s0, (32)0 566; CHECK-NEXT: lea %s1, 128 567; CHECK-NEXT: lvl %s1 568; CHECK-NEXT: vsubs.w.zx %v1, %s0, %v0, %vm1 569; CHECK-NEXT: lea %s16, 256 570; CHECK-NEXT: lvl %s16 571; CHECK-NEXT: vor %v0, (0)1, %v1 572; CHECK-NEXT: b.l.t (, %s10) 573 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vsvmvl(i32 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 574 ret <256 x double> %5 575} 576 577; Function Attrs: nounwind readnone 578declare <256 x double> @llvm.ve.vl.vsubswzx.vsvmvl(i32, <256 x double>, <256 x i1>, <256 x double>, i32) 579 580; Function Attrs: nounwind readnone 581define fastcc <256 x double> @vsubswzx_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) { 582; CHECK-LABEL: vsubswzx_vsvmvl_imm: 583; CHECK: # %bb.0: 584; CHECK-NEXT: lea %s0, 128 585; CHECK-NEXT: lvl %s0 586; CHECK-NEXT: vsubs.w.zx %v1, 8, %v0, %vm1 587; CHECK-NEXT: lea %s16, 256 588; CHECK-NEXT: lvl %s16 589; CHECK-NEXT: vor %v0, (0)1, %v1 590; CHECK-NEXT: b.l.t (, %s10) 591 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubswzx.vsvmvl(i32 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128) 592 ret <256 x double> %4 593} 594 595; Function Attrs: nounwind readnone 596define fastcc <256 x double> @vsubsl_vvvl(<256 x double> %0, <256 x double> %1) { 597; CHECK-LABEL: vsubsl_vvvl: 598; CHECK: # %bb.0: 599; CHECK-NEXT: lea %s0, 256 600; CHECK-NEXT: lvl %s0 601; CHECK-NEXT: vsubs.l %v0, %v0, %v1 602; CHECK-NEXT: b.l.t (, %s10) 603 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 604 ret <256 x double> %3 605} 606 607; Function Attrs: nounwind readnone 608declare <256 x double> @llvm.ve.vl.vsubsl.vvvl(<256 x double>, <256 x double>, i32) 609 610; Function Attrs: nounwind readnone 611define fastcc <256 x double> @vsubsl_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 612; CHECK-LABEL: vsubsl_vvvvl: 613; CHECK: # %bb.0: 614; CHECK-NEXT: lea %s0, 128 615; CHECK-NEXT: lvl %s0 616; CHECK-NEXT: vsubs.l %v2, %v0, %v1 617; CHECK-NEXT: lea %s16, 256 618; CHECK-NEXT: lvl %s16 619; CHECK-NEXT: vor %v0, (0)1, %v2 620; CHECK-NEXT: b.l.t (, %s10) 621 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 622 ret <256 x double> %4 623} 624 625; Function Attrs: nounwind readnone 626declare <256 x double> @llvm.ve.vl.vsubsl.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 627 628; Function Attrs: nounwind readnone 629define fastcc <256 x double> @vsubsl_vsvl(i64 %0, <256 x double> %1) { 630; CHECK-LABEL: vsubsl_vsvl: 631; CHECK: # %bb.0: 632; CHECK-NEXT: lea %s1, 256 633; CHECK-NEXT: lvl %s1 634; CHECK-NEXT: vsubs.l %v0, %s0, %v0 635; CHECK-NEXT: b.l.t (, %s10) 636 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vsvl(i64 %0, <256 x double> %1, i32 256) 637 ret <256 x double> %3 638} 639 640; Function Attrs: nounwind readnone 641declare <256 x double> @llvm.ve.vl.vsubsl.vsvl(i64, <256 x double>, i32) 642 643; Function Attrs: nounwind readnone 644define fastcc <256 x double> @vsubsl_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) { 645; CHECK-LABEL: vsubsl_vsvvl: 646; CHECK: # %bb.0: 647; CHECK-NEXT: lea %s1, 128 648; CHECK-NEXT: lvl %s1 649; CHECK-NEXT: vsubs.l %v1, %s0, %v0 650; CHECK-NEXT: lea %s16, 256 651; CHECK-NEXT: lvl %s16 652; CHECK-NEXT: vor %v0, (0)1, %v1 653; CHECK-NEXT: b.l.t (, %s10) 654 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128) 655 ret <256 x double> %4 656} 657 658; Function Attrs: nounwind readnone 659declare <256 x double> @llvm.ve.vl.vsubsl.vsvvl(i64, <256 x double>, <256 x double>, i32) 660 661; Function Attrs: nounwind readnone 662define fastcc <256 x double> @vsubsl_vsvl_imm(<256 x double> %0) { 663; CHECK-LABEL: vsubsl_vsvl_imm: 664; CHECK: # %bb.0: 665; CHECK-NEXT: lea %s0, 256 666; CHECK-NEXT: lvl %s0 667; CHECK-NEXT: vsubs.l %v0, 8, %v0 668; CHECK-NEXT: b.l.t (, %s10) 669 %2 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vsvl(i64 8, <256 x double> %0, i32 256) 670 ret <256 x double> %2 671} 672 673; Function Attrs: nounwind readnone 674define fastcc <256 x double> @vsubsl_vsvvl_imm(<256 x double> %0, <256 x double> %1) { 675; CHECK-LABEL: vsubsl_vsvvl_imm: 676; CHECK: # %bb.0: 677; CHECK-NEXT: lea %s0, 128 678; CHECK-NEXT: lvl %s0 679; CHECK-NEXT: vsubs.l %v1, 8, %v0 680; CHECK-NEXT: lea %s16, 256 681; CHECK-NEXT: lvl %s16 682; CHECK-NEXT: vor %v0, (0)1, %v1 683; CHECK-NEXT: b.l.t (, %s10) 684 %3 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vsvvl(i64 8, <256 x double> %0, <256 x double> %1, i32 128) 685 ret <256 x double> %3 686} 687 688; Function Attrs: nounwind readnone 689define fastcc <256 x double> @vsubsl_vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 690; CHECK-LABEL: vsubsl_vvvmvl: 691; CHECK: # %bb.0: 692; CHECK-NEXT: lea %s0, 128 693; CHECK-NEXT: lvl %s0 694; CHECK-NEXT: vsubs.l %v2, %v0, %v1, %vm1 695; CHECK-NEXT: lea %s16, 256 696; CHECK-NEXT: lvl %s16 697; CHECK-NEXT: vor %v0, (0)1, %v2 698; CHECK-NEXT: b.l.t (, %s10) 699 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vvvmvl(<256 x double> %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 700 ret <256 x double> %5 701} 702 703; Function Attrs: nounwind readnone 704declare <256 x double> @llvm.ve.vl.vsubsl.vvvmvl(<256 x double>, <256 x double>, <256 x i1>, <256 x double>, i32) 705 706; Function Attrs: nounwind readnone 707define fastcc <256 x double> @vsubsl_vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3) { 708; CHECK-LABEL: vsubsl_vsvmvl: 709; CHECK: # %bb.0: 710; CHECK-NEXT: lea %s1, 128 711; CHECK-NEXT: lvl %s1 712; CHECK-NEXT: vsubs.l %v1, %s0, %v0, %vm1 713; CHECK-NEXT: lea %s16, 256 714; CHECK-NEXT: lvl %s16 715; CHECK-NEXT: vor %v0, (0)1, %v1 716; CHECK-NEXT: b.l.t (, %s10) 717 %5 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vsvmvl(i64 %0, <256 x double> %1, <256 x i1> %2, <256 x double> %3, i32 128) 718 ret <256 x double> %5 719} 720 721; Function Attrs: nounwind readnone 722declare <256 x double> @llvm.ve.vl.vsubsl.vsvmvl(i64, <256 x double>, <256 x i1>, <256 x double>, i32) 723 724; Function Attrs: nounwind readnone 725define fastcc <256 x double> @vsubsl_vsvmvl_imm(<256 x double> %0, <256 x i1> %1, <256 x double> %2) { 726; CHECK-LABEL: vsubsl_vsvmvl_imm: 727; CHECK: # %bb.0: 728; CHECK-NEXT: lea %s0, 128 729; CHECK-NEXT: lvl %s0 730; CHECK-NEXT: vsubs.l %v1, 8, %v0, %vm1 731; CHECK-NEXT: lea %s16, 256 732; CHECK-NEXT: lvl %s16 733; CHECK-NEXT: vor %v0, (0)1, %v1 734; CHECK-NEXT: b.l.t (, %s10) 735 %4 = tail call fast <256 x double> @llvm.ve.vl.vsubsl.vsvmvl(i64 8, <256 x double> %0, <256 x i1> %1, <256 x double> %2, i32 128) 736 ret <256 x double> %4 737} 738 739; Function Attrs: nounwind readnone 740define fastcc <256 x double> @pvsubu_vvvl(<256 x double> %0, <256 x double> %1) { 741; CHECK-LABEL: pvsubu_vvvl: 742; CHECK: # %bb.0: 743; CHECK-NEXT: lea %s0, 256 744; CHECK-NEXT: lvl %s0 745; CHECK-NEXT: pvsubu %v0, %v0, %v1 746; CHECK-NEXT: b.l.t (, %s10) 747 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubu.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 748 ret <256 x double> %3 749} 750 751; Function Attrs: nounwind readnone 752declare <256 x double> @llvm.ve.vl.pvsubu.vvvl(<256 x double>, <256 x double>, i32) 753 754; Function Attrs: nounwind readnone 755define fastcc <256 x double> @pvsubu_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 756; CHECK-LABEL: pvsubu_vvvvl: 757; CHECK: # %bb.0: 758; CHECK-NEXT: lea %s0, 128 759; CHECK-NEXT: lvl %s0 760; CHECK-NEXT: pvsubu %v2, %v0, %v1 761; CHECK-NEXT: lea %s16, 256 762; CHECK-NEXT: lvl %s16 763; CHECK-NEXT: vor %v0, (0)1, %v2 764; CHECK-NEXT: b.l.t (, %s10) 765 %4 = tail call fast <256 x double> @llvm.ve.vl.pvsubu.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 766 ret <256 x double> %4 767} 768 769; Function Attrs: nounwind readnone 770declare <256 x double> @llvm.ve.vl.pvsubu.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 771 772; Function Attrs: nounwind readnone 773define fastcc <256 x double> @pvsubu_vsvl(i64 %0, <256 x double> %1) { 774; CHECK-LABEL: pvsubu_vsvl: 775; CHECK: # %bb.0: 776; CHECK-NEXT: lea %s1, 256 777; CHECK-NEXT: lvl %s1 778; CHECK-NEXT: pvsubu %v0, %s0, %v0 779; CHECK-NEXT: b.l.t (, %s10) 780 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubu.vsvl(i64 %0, <256 x double> %1, i32 256) 781 ret <256 x double> %3 782} 783 784; Function Attrs: nounwind readnone 785declare <256 x double> @llvm.ve.vl.pvsubu.vsvl(i64, <256 x double>, i32) 786 787; Function Attrs: nounwind readnone 788define fastcc <256 x double> @pvsubu_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) { 789; CHECK-LABEL: pvsubu_vsvvl: 790; CHECK: # %bb.0: 791; CHECK-NEXT: lea %s1, 128 792; CHECK-NEXT: lvl %s1 793; CHECK-NEXT: pvsubu %v1, %s0, %v0 794; CHECK-NEXT: lea %s16, 256 795; CHECK-NEXT: lvl %s16 796; CHECK-NEXT: vor %v0, (0)1, %v1 797; CHECK-NEXT: b.l.t (, %s10) 798 %4 = tail call fast <256 x double> @llvm.ve.vl.pvsubu.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128) 799 ret <256 x double> %4 800} 801 802; Function Attrs: nounwind readnone 803declare <256 x double> @llvm.ve.vl.pvsubu.vsvvl(i64, <256 x double>, <256 x double>, i32) 804 805; Function Attrs: nounwind readnone 806define fastcc <256 x double> @pvsubu_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) { 807; CHECK-LABEL: pvsubu_vvvMvl: 808; CHECK: # %bb.0: 809; CHECK-NEXT: lea %s0, 128 810; CHECK-NEXT: lvl %s0 811; CHECK-NEXT: pvsubu %v2, %v0, %v1, %vm2 812; CHECK-NEXT: lea %s16, 256 813; CHECK-NEXT: lvl %s16 814; CHECK-NEXT: vor %v0, (0)1, %v2 815; CHECK-NEXT: b.l.t (, %s10) 816 %5 = tail call fast <256 x double> @llvm.ve.vl.pvsubu.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128) 817 ret <256 x double> %5 818} 819 820; Function Attrs: nounwind readnone 821declare <256 x double> @llvm.ve.vl.pvsubu.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32) 822 823; Function Attrs: nounwind readnone 824define fastcc <256 x double> @pvsubu_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) { 825; CHECK-LABEL: pvsubu_vsvMvl: 826; CHECK: # %bb.0: 827; CHECK-NEXT: lea %s1, 128 828; CHECK-NEXT: lvl %s1 829; CHECK-NEXT: pvsubu %v1, %s0, %v0, %vm2 830; CHECK-NEXT: lea %s16, 256 831; CHECK-NEXT: lvl %s16 832; CHECK-NEXT: vor %v0, (0)1, %v1 833; CHECK-NEXT: b.l.t (, %s10) 834 %5 = tail call fast <256 x double> @llvm.ve.vl.pvsubu.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128) 835 ret <256 x double> %5 836} 837 838; Function Attrs: nounwind readnone 839declare <256 x double> @llvm.ve.vl.pvsubu.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32) 840 841; Function Attrs: nounwind readnone 842define fastcc <256 x double> @pvsubs_vvvl(<256 x double> %0, <256 x double> %1) { 843; CHECK-LABEL: pvsubs_vvvl: 844; CHECK: # %bb.0: 845; CHECK-NEXT: lea %s0, 256 846; CHECK-NEXT: lvl %s0 847; CHECK-NEXT: pvsubs %v0, %v0, %v1 848; CHECK-NEXT: b.l.t (, %s10) 849 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double> %0, <256 x double> %1, i32 256) 850 ret <256 x double> %3 851} 852 853; Function Attrs: nounwind readnone 854declare <256 x double> @llvm.ve.vl.pvsubs.vvvl(<256 x double>, <256 x double>, i32) 855 856; Function Attrs: nounwind readnone 857define fastcc <256 x double> @pvsubs_vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2) { 858; CHECK-LABEL: pvsubs_vvvvl: 859; CHECK: # %bb.0: 860; CHECK-NEXT: lea %s0, 128 861; CHECK-NEXT: lvl %s0 862; CHECK-NEXT: pvsubs %v2, %v0, %v1 863; CHECK-NEXT: lea %s16, 256 864; CHECK-NEXT: lvl %s16 865; CHECK-NEXT: vor %v0, (0)1, %v2 866; CHECK-NEXT: b.l.t (, %s10) 867 %4 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double> %0, <256 x double> %1, <256 x double> %2, i32 128) 868 ret <256 x double> %4 869} 870 871; Function Attrs: nounwind readnone 872declare <256 x double> @llvm.ve.vl.pvsubs.vvvvl(<256 x double>, <256 x double>, <256 x double>, i32) 873 874; Function Attrs: nounwind readnone 875define fastcc <256 x double> @pvsubs_vsvl(i64 %0, <256 x double> %1) { 876; CHECK-LABEL: pvsubs_vsvl: 877; CHECK: # %bb.0: 878; CHECK-NEXT: lea %s1, 256 879; CHECK-NEXT: lvl %s1 880; CHECK-NEXT: pvsubs %v0, %s0, %v0 881; CHECK-NEXT: b.l.t (, %s10) 882 %3 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64 %0, <256 x double> %1, i32 256) 883 ret <256 x double> %3 884} 885 886; Function Attrs: nounwind readnone 887declare <256 x double> @llvm.ve.vl.pvsubs.vsvl(i64, <256 x double>, i32) 888 889; Function Attrs: nounwind readnone 890define fastcc <256 x double> @pvsubs_vsvvl(i64 %0, <256 x double> %1, <256 x double> %2) { 891; CHECK-LABEL: pvsubs_vsvvl: 892; CHECK: # %bb.0: 893; CHECK-NEXT: lea %s1, 128 894; CHECK-NEXT: lvl %s1 895; CHECK-NEXT: pvsubs %v1, %s0, %v0 896; CHECK-NEXT: lea %s16, 256 897; CHECK-NEXT: lvl %s16 898; CHECK-NEXT: vor %v0, (0)1, %v1 899; CHECK-NEXT: b.l.t (, %s10) 900 %4 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64 %0, <256 x double> %1, <256 x double> %2, i32 128) 901 ret <256 x double> %4 902} 903 904; Function Attrs: nounwind readnone 905declare <256 x double> @llvm.ve.vl.pvsubs.vsvvl(i64, <256 x double>, <256 x double>, i32) 906 907; Function Attrs: nounwind readnone 908define fastcc <256 x double> @pvsubs_vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) { 909; CHECK-LABEL: pvsubs_vvvMvl: 910; CHECK: # %bb.0: 911; CHECK-NEXT: lea %s0, 128 912; CHECK-NEXT: lvl %s0 913; CHECK-NEXT: pvsubs %v2, %v0, %v1, %vm2 914; CHECK-NEXT: lea %s16, 256 915; CHECK-NEXT: lvl %s16 916; CHECK-NEXT: vor %v0, (0)1, %v2 917; CHECK-NEXT: b.l.t (, %s10) 918 %5 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vvvMvl(<256 x double> %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128) 919 ret <256 x double> %5 920} 921 922; Function Attrs: nounwind readnone 923declare <256 x double> @llvm.ve.vl.pvsubs.vvvMvl(<256 x double>, <256 x double>, <512 x i1>, <256 x double>, i32) 924 925; Function Attrs: nounwind readnone 926define fastcc <256 x double> @pvsubs_vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3) { 927; CHECK-LABEL: pvsubs_vsvMvl: 928; CHECK: # %bb.0: 929; CHECK-NEXT: lea %s1, 128 930; CHECK-NEXT: lvl %s1 931; CHECK-NEXT: pvsubs %v1, %s0, %v0, %vm2 932; CHECK-NEXT: lea %s16, 256 933; CHECK-NEXT: lvl %s16 934; CHECK-NEXT: vor %v0, (0)1, %v1 935; CHECK-NEXT: b.l.t (, %s10) 936 %5 = tail call fast <256 x double> @llvm.ve.vl.pvsubs.vsvMvl(i64 %0, <256 x double> %1, <512 x i1> %2, <256 x double> %3, i32 128) 937 ret <256 x double> %5 938} 939 940; Function Attrs: nounwind readnone 941declare <256 x double> @llvm.ve.vl.pvsubs.vsvMvl(i64, <256 x double>, <512 x i1>, <256 x double>, i32) 942