1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
2
3// --------------------------------------------------------------------------//
4// Immediate out of lower bound [-8, 7].
5
6ldnf1h z21.h, p4/z, [x17, #-9, MUL VL]
7// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
8// CHECK-NEXT: ldnf1h z21.h, p4/z, [x17, #-9, MUL VL]
9// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
10
11ldnf1h z10.h, p5/z, [x16, #8, MUL VL]
12// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
13// CHECK-NEXT: ldnf1h z10.h, p5/z, [x16, #8, MUL VL]
14// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
15
16ldnf1h z30.s, p6/z, [x25, #-9, MUL VL]
17// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
18// CHECK-NEXT: ldnf1h z30.s, p6/z, [x25, #-9, MUL VL]
19// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
20
21ldnf1h z29.s, p5/z, [x15, #8, MUL VL]
22// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
23// CHECK-NEXT: ldnf1h z29.s, p5/z, [x15, #8, MUL VL]
24// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
25
26ldnf1h z28.d, p2/z, [x28, #-9, MUL VL]
27// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
28// CHECK-NEXT: ldnf1h z28.d, p2/z, [x28, #-9, MUL VL]
29// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
30
31ldnf1h z27.d, p1/z, [x26, #8, MUL VL]
32// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be an integer in range [-8, 7].
33// CHECK-NEXT: ldnf1h z27.d, p1/z, [x26, #8, MUL VL]
34// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
35
36
37// --------------------------------------------------------------------------//
38// restricted predicate has range [0, 7].
39
40ldnf1h z9.h, p8/z, [x25, #1, MUL VL]
41// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
42// CHECK-NEXT: ldnf1h z9.h, p8/z, [x25, #1, MUL VL]
43// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
44
45ldnf1h z12.s, p8/z, [x13, #1, MUL VL]
46// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
47// CHECK-NEXT: ldnf1h z12.s, p8/z, [x13, #1, MUL VL]
48// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
49
50ldnf1h z4.d, p8/z, [x11, #1, MUL VL]
51// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
52// CHECK-NEXT: ldnf1h z4.d, p8/z, [x11, #1, MUL VL]
53// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
54
55
56// --------------------------------------------------------------------------//
57// Invalid vector list.
58
59ldnf1h { }, p0/z, [x1, #1, MUL VL]
60// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector register expected
61// CHECK-NEXT: ldnf1h { }, p0/z, [x1, #1, MUL VL]
62// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
63
64ldnf1h { z1.h, z2.h }, p0/z, [x1, #1, MUL VL]
65// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
66// CHECK-NEXT: ldnf1h { z1.h, z2.h }, p0/z, [x1, #1, MUL VL]
67// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
68
69ldnf1h { v0.2d }, p0/z, [x1, #1, MUL VL]
70// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
71// CHECK-NEXT: ldnf1h { v0.2d }, p0/z, [x1, #1, MUL VL]
72// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
73
74
75// --------------------------------------------------------------------------//
76// Negative tests for instructions that are incompatible with movprfx
77
78movprfx z21.d, p5/z, z28.d
79ldnf1h    { z21.d }, p5/z, [x10, #5, mul vl]
80// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
81// CHECK-NEXT: ldnf1h    { z21.d }, p5/z, [x10, #5, mul vl]
82// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
83
84movprfx z21, z28
85ldnf1h    { z21.d }, p5/z, [x10, #5, mul vl]
86// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
87// CHECK-NEXT: ldnf1h    { z21.d }, p5/z, [x10, #5, mul vl]
88// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
89