1 #define a_cas a_cas
a_cas(volatile int * p,int t,int s)2 static inline int a_cas(volatile int *p, int t, int s)
3 {
4 __asm__ __volatile__ (
5 "lock ; cmpxchg %3, %1"
6 : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
7 return t;
8 }
9
10 #define a_swap a_swap
a_swap(volatile int * p,int v)11 static inline int a_swap(volatile int *p, int v)
12 {
13 __asm__ __volatile__(
14 "xchg %0, %1"
15 : "=r"(v), "=m"(*p) : "0"(v) : "memory" );
16 return v;
17 }
18
19 #define a_fetch_add a_fetch_add
a_fetch_add(volatile int * p,int v)20 static inline int a_fetch_add(volatile int *p, int v)
21 {
22 __asm__ __volatile__(
23 "lock ; xadd %0, %1"
24 : "=r"(v), "=m"(*p) : "0"(v) : "memory" );
25 return v;
26 }
27
28 #define a_and a_and
a_and(volatile int * p,int v)29 static inline void a_and(volatile int *p, int v)
30 {
31 __asm__ __volatile__(
32 "lock ; and %1, %0"
33 : "=m"(*p) : "r"(v) : "memory" );
34 }
35
36 #define a_or a_or
a_or(volatile int * p,int v)37 static inline void a_or(volatile int *p, int v)
38 {
39 __asm__ __volatile__(
40 "lock ; or %1, %0"
41 : "=m"(*p) : "r"(v) : "memory" );
42 }
43
44 #define a_and_64 a_and_64
a_and_64(volatile uint64_t * p,uint64_t v)45 static inline void a_and_64(volatile uint64_t *p, uint64_t v)
46 {
47 __asm__ __volatile(
48 "lock ; and %1, %0"
49 : "=m"(*p) : "r"(v) : "memory" );
50 }
51
52 #define a_or_64 a_or_64
a_or_64(volatile uint64_t * p,uint64_t v)53 static inline void a_or_64(volatile uint64_t *p, uint64_t v)
54 {
55 __asm__ __volatile__(
56 "lock ; or %1, %0"
57 : "=m"(*p) : "r"(v) : "memory" );
58 }
59
60 #define a_inc a_inc
a_inc(volatile int * p)61 static inline void a_inc(volatile int *p)
62 {
63 __asm__ __volatile__(
64 "lock ; incl %0"
65 : "=m"(*p) : "m"(*p) : "memory" );
66 }
67
68 #define a_dec a_dec
a_dec(volatile int * p)69 static inline void a_dec(volatile int *p)
70 {
71 __asm__ __volatile__(
72 "lock ; decl %0"
73 : "=m"(*p) : "m"(*p) : "memory" );
74 }
75
76 #define a_store a_store
a_store(volatile int * p,int x)77 static inline void a_store(volatile int *p, int x)
78 {
79 __asm__ __volatile__(
80 "mov %1, %0 ; lock ; orl $0,(%%rsp)"
81 : "=m"(*p) : "r"(x) : "memory" );
82 }
83
84 #define a_barrier a_barrier
a_barrier()85 static inline void a_barrier()
86 {
87 __asm__ __volatile__( "" : : : "memory" );
88 }
89
90 #define a_spin a_spin
a_spin()91 static inline void a_spin()
92 {
93 __asm__ __volatile__( "pause" : : : "memory" );
94 }
95
96 #define a_crash a_crash
a_crash()97 static inline void a_crash()
98 {
99 __asm__ __volatile__( "hlt" : : : "memory" );
100 }
101
102 #define a_ctz_64 a_ctz_64
a_ctz_64(uint64_t x)103 static inline int a_ctz_64(uint64_t x)
104 {
105 __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
106 return x;
107 }
108
109 #define a_ctz_32 a_ctz_32
a_ctz_32(uint32_t x)110 static inline int a_ctz_32(uint32_t x)
111 {
112 __asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
113 return x;
114 }
115
116 #define a_clz_64 a_clz_64
a_clz_64(uint64_t x)117 static inline int a_clz_64(uint64_t x)
118 {
119 __asm__( "bsr %1,%0 ; xor $63,%0" : "=r"(x) : "r"(x) );
120 return x;
121 }
122