1 //===- llvm/BinaryFormat/ELF.h - ELF constants and structures ---*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This header contains common, non-processor-specific data structures and
10 // constants for the ELF file format.
11 //
12 // The details of the ELF32 bits in this file are largely based on the Tool
13 // Interface Standard (TIS) Executable and Linking Format (ELF) Specification
14 // Version 1.2, May 1995. The ELF64 stuff is based on ELF-64 Object File Format
15 // Version 1.5, Draft 2, May 1998 as well as OpenBSD header files.
16 //
17 //===----------------------------------------------------------------------===//
18 
19 #ifndef LLVM_BINARYFORMAT_ELF_H
20 #define LLVM_BINARYFORMAT_ELF_H
21 
22 #include "llvm/ADT/StringRef.h"
23 #include <cstdint>
24 #include <cstring>
25 #include <string>
26 
27 namespace llvm {
28 namespace ELF {
29 
30 using Elf32_Addr = uint32_t; // Program address
31 using Elf32_Off = uint32_t;  // File offset
32 using Elf32_Half = uint16_t;
33 using Elf32_Word = uint32_t;
34 using Elf32_Sword = int32_t;
35 
36 using Elf64_Addr = uint64_t;
37 using Elf64_Off = uint64_t;
38 using Elf64_Half = uint16_t;
39 using Elf64_Word = uint32_t;
40 using Elf64_Sword = int32_t;
41 using Elf64_Xword = uint64_t;
42 using Elf64_Sxword = int64_t;
43 
44 // Object file magic string.
45 static const char ElfMagic[] = {0x7f, 'E', 'L', 'F', '\0'};
46 
47 // e_ident size and indices.
48 enum {
49   EI_MAG0 = 0,       // File identification index.
50   EI_MAG1 = 1,       // File identification index.
51   EI_MAG2 = 2,       // File identification index.
52   EI_MAG3 = 3,       // File identification index.
53   EI_CLASS = 4,      // File class.
54   EI_DATA = 5,       // Data encoding.
55   EI_VERSION = 6,    // File version.
56   EI_OSABI = 7,      // OS/ABI identification.
57   EI_ABIVERSION = 8, // ABI version.
58   EI_PAD = 9,        // Start of padding bytes.
59   EI_NIDENT = 16     // Number of bytes in e_ident.
60 };
61 
62 struct Elf32_Ehdr {
63   unsigned char e_ident[EI_NIDENT]; // ELF Identification bytes
64   Elf32_Half e_type;                // Type of file (see ET_* below)
65   Elf32_Half e_machine;   // Required architecture for this file (see EM_*)
66   Elf32_Word e_version;   // Must be equal to 1
67   Elf32_Addr e_entry;     // Address to jump to in order to start program
68   Elf32_Off e_phoff;      // Program header table's file offset, in bytes
69   Elf32_Off e_shoff;      // Section header table's file offset, in bytes
70   Elf32_Word e_flags;     // Processor-specific flags
71   Elf32_Half e_ehsize;    // Size of ELF header, in bytes
72   Elf32_Half e_phentsize; // Size of an entry in the program header table
73   Elf32_Half e_phnum;     // Number of entries in the program header table
74   Elf32_Half e_shentsize; // Size of an entry in the section header table
75   Elf32_Half e_shnum;     // Number of entries in the section header table
76   Elf32_Half e_shstrndx;  // Sect hdr table index of sect name string table
77 
checkMagicElf32_Ehdr78   bool checkMagic() const {
79     return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
80   }
81 
getFileClassElf32_Ehdr82   unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
getDataEncodingElf32_Ehdr83   unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
84 };
85 
86 // 64-bit ELF header. Fields are the same as for ELF32, but with different
87 // types (see above).
88 struct Elf64_Ehdr {
89   unsigned char e_ident[EI_NIDENT];
90   Elf64_Half e_type;
91   Elf64_Half e_machine;
92   Elf64_Word e_version;
93   Elf64_Addr e_entry;
94   Elf64_Off e_phoff;
95   Elf64_Off e_shoff;
96   Elf64_Word e_flags;
97   Elf64_Half e_ehsize;
98   Elf64_Half e_phentsize;
99   Elf64_Half e_phnum;
100   Elf64_Half e_shentsize;
101   Elf64_Half e_shnum;
102   Elf64_Half e_shstrndx;
103 
checkMagicElf64_Ehdr104   bool checkMagic() const {
105     return (memcmp(e_ident, ElfMagic, strlen(ElfMagic))) == 0;
106   }
107 
getFileClassElf64_Ehdr108   unsigned char getFileClass() const { return e_ident[EI_CLASS]; }
getDataEncodingElf64_Ehdr109   unsigned char getDataEncoding() const { return e_ident[EI_DATA]; }
110 };
111 
112 // File types.
113 // See current registered ELF types at:
114 //    http://www.sco.com/developers/gabi/latest/ch4.eheader.html
115 enum {
116   ET_NONE = 0,        // No file type
117   ET_REL = 1,         // Relocatable file
118   ET_EXEC = 2,        // Executable file
119   ET_DYN = 3,         // Shared object file
120   ET_CORE = 4,        // Core file
121   ET_LOOS = 0xfe00,   // Beginning of operating system-specific codes
122   ET_HIOS = 0xfeff,   // Operating system-specific
123   ET_LOPROC = 0xff00, // Beginning of processor-specific codes
124   ET_HIPROC = 0xffff  // Processor-specific
125 };
126 
127 // Versioning
128 enum { EV_NONE = 0, EV_CURRENT = 1 };
129 
130 // Machine architectures
131 // See current registered ELF machine architectures at:
132 //    http://www.uxsglobal.com/developers/gabi/latest/ch4.eheader.html
133 enum {
134   EM_NONE = 0,           // No machine
135   EM_M32 = 1,            // AT&T WE 32100
136   EM_SPARC = 2,          // SPARC
137   EM_386 = 3,            // Intel 386
138   EM_68K = 4,            // Motorola 68000
139   EM_88K = 5,            // Motorola 88000
140   EM_IAMCU = 6,          // Intel MCU
141   EM_860 = 7,            // Intel 80860
142   EM_MIPS = 8,           // MIPS R3000
143   EM_S370 = 9,           // IBM System/370
144   EM_MIPS_RS3_LE = 10,   // MIPS RS3000 Little-endian
145   EM_PARISC = 15,        // Hewlett-Packard PA-RISC
146   EM_VPP500 = 17,        // Fujitsu VPP500
147   EM_SPARC32PLUS = 18,   // Enhanced instruction set SPARC
148   EM_960 = 19,           // Intel 80960
149   EM_PPC = 20,           // PowerPC
150   EM_PPC64 = 21,         // PowerPC64
151   EM_S390 = 22,          // IBM System/390
152   EM_SPU = 23,           // IBM SPU/SPC
153   EM_V800 = 36,          // NEC V800
154   EM_FR20 = 37,          // Fujitsu FR20
155   EM_RH32 = 38,          // TRW RH-32
156   EM_RCE = 39,           // Motorola RCE
157   EM_ARM = 40,           // ARM
158   EM_ALPHA = 41,         // DEC Alpha
159   EM_SH = 42,            // Hitachi SH
160   EM_SPARCV9 = 43,       // SPARC V9
161   EM_TRICORE = 44,       // Siemens TriCore
162   EM_ARC = 45,           // Argonaut RISC Core
163   EM_H8_300 = 46,        // Hitachi H8/300
164   EM_H8_300H = 47,       // Hitachi H8/300H
165   EM_H8S = 48,           // Hitachi H8S
166   EM_H8_500 = 49,        // Hitachi H8/500
167   EM_IA_64 = 50,         // Intel IA-64 processor architecture
168   EM_MIPS_X = 51,        // Stanford MIPS-X
169   EM_COLDFIRE = 52,      // Motorola ColdFire
170   EM_68HC12 = 53,        // Motorola M68HC12
171   EM_MMA = 54,           // Fujitsu MMA Multimedia Accelerator
172   EM_PCP = 55,           // Siemens PCP
173   EM_NCPU = 56,          // Sony nCPU embedded RISC processor
174   EM_NDR1 = 57,          // Denso NDR1 microprocessor
175   EM_STARCORE = 58,      // Motorola Star*Core processor
176   EM_ME16 = 59,          // Toyota ME16 processor
177   EM_ST100 = 60,         // STMicroelectronics ST100 processor
178   EM_TINYJ = 61,         // Advanced Logic Corp. TinyJ embedded processor family
179   EM_X86_64 = 62,        // AMD x86-64 architecture
180   EM_PDSP = 63,          // Sony DSP Processor
181   EM_PDP10 = 64,         // Digital Equipment Corp. PDP-10
182   EM_PDP11 = 65,         // Digital Equipment Corp. PDP-11
183   EM_FX66 = 66,          // Siemens FX66 microcontroller
184   EM_ST9PLUS = 67,       // STMicroelectronics ST9+ 8/16 bit microcontroller
185   EM_ST7 = 68,           // STMicroelectronics ST7 8-bit microcontroller
186   EM_68HC16 = 69,        // Motorola MC68HC16 Microcontroller
187   EM_68HC11 = 70,        // Motorola MC68HC11 Microcontroller
188   EM_68HC08 = 71,        // Motorola MC68HC08 Microcontroller
189   EM_68HC05 = 72,        // Motorola MC68HC05 Microcontroller
190   EM_SVX = 73,           // Silicon Graphics SVx
191   EM_ST19 = 74,          // STMicroelectronics ST19 8-bit microcontroller
192   EM_VAX = 75,           // Digital VAX
193   EM_CRIS = 76,          // Axis Communications 32-bit embedded processor
194   EM_JAVELIN = 77,       // Infineon Technologies 32-bit embedded processor
195   EM_FIREPATH = 78,      // Element 14 64-bit DSP Processor
196   EM_ZSP = 79,           // LSI Logic 16-bit DSP Processor
197   EM_MMIX = 80,          // Donald Knuth's educational 64-bit processor
198   EM_HUANY = 81,         // Harvard University machine-independent object files
199   EM_PRISM = 82,         // SiTera Prism
200   EM_AVR = 83,           // Atmel AVR 8-bit microcontroller
201   EM_FR30 = 84,          // Fujitsu FR30
202   EM_D10V = 85,          // Mitsubishi D10V
203   EM_D30V = 86,          // Mitsubishi D30V
204   EM_V850 = 87,          // NEC v850
205   EM_M32R = 88,          // Mitsubishi M32R
206   EM_MN10300 = 89,       // Matsushita MN10300
207   EM_MN10200 = 90,       // Matsushita MN10200
208   EM_PJ = 91,            // picoJava
209   EM_OPENRISC = 92,      // OpenRISC 32-bit embedded processor
210   EM_ARC_COMPACT = 93,   // ARC International ARCompact processor (old
211                          // spelling/synonym: EM_ARC_A5)
212   EM_XTENSA = 94,        // Tensilica Xtensa Architecture
213   EM_VIDEOCORE = 95,     // Alphamosaic VideoCore processor
214   EM_TMM_GPP = 96,       // Thompson Multimedia General Purpose Processor
215   EM_NS32K = 97,         // National Semiconductor 32000 series
216   EM_TPC = 98,           // Tenor Network TPC processor
217   EM_SNP1K = 99,         // Trebia SNP 1000 processor
218   EM_ST200 = 100,        // STMicroelectronics (www.st.com) ST200
219   EM_IP2K = 101,         // Ubicom IP2xxx microcontroller family
220   EM_MAX = 102,          // MAX Processor
221   EM_CR = 103,           // National Semiconductor CompactRISC microprocessor
222   EM_F2MC16 = 104,       // Fujitsu F2MC16
223   EM_MSP430 = 105,       // Texas Instruments embedded microcontroller msp430
224   EM_BLACKFIN = 106,     // Analog Devices Blackfin (DSP) processor
225   EM_SE_C33 = 107,       // S1C33 Family of Seiko Epson processors
226   EM_SEP = 108,          // Sharp embedded microprocessor
227   EM_ARCA = 109,         // Arca RISC Microprocessor
228   EM_UNICORE = 110,      // Microprocessor series from PKU-Unity Ltd. and MPRC
229                          // of Peking University
230   EM_EXCESS = 111,       // eXcess: 16/32/64-bit configurable embedded CPU
231   EM_DXP = 112,          // Icera Semiconductor Inc. Deep Execution Processor
232   EM_ALTERA_NIOS2 = 113, // Altera Nios II soft-core processor
233   EM_CRX = 114,          // National Semiconductor CompactRISC CRX
234   EM_XGATE = 115,        // Motorola XGATE embedded processor
235   EM_C166 = 116,         // Infineon C16x/XC16x processor
236   EM_M16C = 117,         // Renesas M16C series microprocessors
237   EM_DSPIC30F = 118,     // Microchip Technology dsPIC30F Digital Signal
238                          // Controller
239   EM_CE = 119,           // Freescale Communication Engine RISC core
240   EM_M32C = 120,         // Renesas M32C series microprocessors
241   EM_TSK3000 = 131,      // Altium TSK3000 core
242   EM_RS08 = 132,         // Freescale RS08 embedded processor
243   EM_SHARC = 133,        // Analog Devices SHARC family of 32-bit DSP
244                          // processors
245   EM_ECOG2 = 134,        // Cyan Technology eCOG2 microprocessor
246   EM_SCORE7 = 135,       // Sunplus S+core7 RISC processor
247   EM_DSP24 = 136,        // New Japan Radio (NJR) 24-bit DSP Processor
248   EM_VIDEOCORE3 = 137,   // Broadcom VideoCore III processor
249   EM_LATTICEMICO32 = 138, // RISC processor for Lattice FPGA architecture
250   EM_SE_C17 = 139,        // Seiko Epson C17 family
251   EM_TI_C6000 = 140,      // The Texas Instruments TMS320C6000 DSP family
252   EM_TI_C2000 = 141,      // The Texas Instruments TMS320C2000 DSP family
253   EM_TI_C5500 = 142,      // The Texas Instruments TMS320C55x DSP family
254   EM_MMDSP_PLUS = 160,    // STMicroelectronics 64bit VLIW Data Signal Processor
255   EM_CYPRESS_M8C = 161,   // Cypress M8C microprocessor
256   EM_R32C = 162,          // Renesas R32C series microprocessors
257   EM_TRIMEDIA = 163,      // NXP Semiconductors TriMedia architecture family
258   EM_HEXAGON = 164,       // Qualcomm Hexagon processor
259   EM_8051 = 165,          // Intel 8051 and variants
260   EM_STXP7X = 166,        // STMicroelectronics STxP7x family of configurable
261                           // and extensible RISC processors
262   EM_NDS32 = 167,         // Andes Technology compact code size embedded RISC
263                           // processor family
264   EM_ECOG1 = 168,         // Cyan Technology eCOG1X family
265   EM_ECOG1X = 168,        // Cyan Technology eCOG1X family
266   EM_MAXQ30 = 169,        // Dallas Semiconductor MAXQ30 Core Micro-controllers
267   EM_XIMO16 = 170,        // New Japan Radio (NJR) 16-bit DSP Processor
268   EM_MANIK = 171,         // M2000 Reconfigurable RISC Microprocessor
269   EM_CRAYNV2 = 172,       // Cray Inc. NV2 vector architecture
270   EM_RX = 173,            // Renesas RX family
271   EM_METAG = 174,         // Imagination Technologies META processor
272                           // architecture
273   EM_MCST_ELBRUS = 175,   // MCST Elbrus general purpose hardware architecture
274   EM_ECOG16 = 176,        // Cyan Technology eCOG16 family
275   EM_CR16 = 177,          // National Semiconductor CompactRISC CR16 16-bit
276                           // microprocessor
277   EM_ETPU = 178,          // Freescale Extended Time Processing Unit
278   EM_SLE9X = 179,         // Infineon Technologies SLE9X core
279   EM_L10M = 180,          // Intel L10M
280   EM_K10M = 181,          // Intel K10M
281   EM_AARCH64 = 183,       // ARM AArch64
282   EM_AVR32 = 185,         // Atmel Corporation 32-bit microprocessor family
283   EM_STM8 = 186,          // STMicroeletronics STM8 8-bit microcontroller
284   EM_TILE64 = 187,        // Tilera TILE64 multicore architecture family
285   EM_TILEPRO = 188,       // Tilera TILEPro multicore architecture family
286   EM_MICROBLAZE = 189,    // Xilinx MicroBlaze 32-bit RISC soft processor core
287   EM_CUDA = 190,          // NVIDIA CUDA architecture
288   EM_TILEGX = 191,        // Tilera TILE-Gx multicore architecture family
289   EM_CLOUDSHIELD = 192,   // CloudShield architecture family
290   EM_COREA_1ST = 193,     // KIPO-KAIST Core-A 1st generation processor family
291   EM_COREA_2ND = 194,     // KIPO-KAIST Core-A 2nd generation processor family
292   EM_ARC_COMPACT2 = 195,  // Synopsys ARCompact V2
293   EM_OPEN8 = 196,         // Open8 8-bit RISC soft processor core
294   EM_RL78 = 197,          // Renesas RL78 family
295   EM_VIDEOCORE5 = 198,    // Broadcom VideoCore V processor
296   EM_78KOR = 199,         // Renesas 78KOR family
297   EM_56800EX = 200,       // Freescale 56800EX Digital Signal Controller (DSC)
298   EM_BA1 = 201,           // Beyond BA1 CPU architecture
299   EM_BA2 = 202,           // Beyond BA2 CPU architecture
300   EM_XCORE = 203,         // XMOS xCORE processor family
301   EM_MCHP_PIC = 204,      // Microchip 8-bit PIC(r) family
302   EM_INTEL205 = 205,      // Reserved by Intel
303   EM_INTEL206 = 206,      // Reserved by Intel
304   EM_INTEL207 = 207,      // Reserved by Intel
305   EM_INTEL208 = 208,      // Reserved by Intel
306   EM_INTEL209 = 209,      // Reserved by Intel
307   EM_KM32 = 210,          // KM211 KM32 32-bit processor
308   EM_KMX32 = 211,         // KM211 KMX32 32-bit processor
309   EM_KMX16 = 212,         // KM211 KMX16 16-bit processor
310   EM_KMX8 = 213,          // KM211 KMX8 8-bit processor
311   EM_KVARC = 214,         // KM211 KVARC processor
312   EM_CDP = 215,           // Paneve CDP architecture family
313   EM_COGE = 216,          // Cognitive Smart Memory Processor
314   EM_COOL = 217,          // iCelero CoolEngine
315   EM_NORC = 218,          // Nanoradio Optimized RISC
316   EM_CSR_KALIMBA = 219,   // CSR Kalimba architecture family
317   EM_AMDGPU = 224,        // AMD GPU architecture
318   EM_RISCV = 243,         // RISC-V
319   EM_LANAI = 244,         // Lanai 32-bit processor
320   EM_BPF = 247,           // Linux kernel bpf virtual machine
321   EM_VE = 251,            // NEC SX-Aurora VE
322   EM_CSKY = 252,          // C-SKY 32-bit processor
323 };
324 
325 // Object file classes.
326 enum {
327   ELFCLASSNONE = 0,
328   ELFCLASS32 = 1, // 32-bit object file
329   ELFCLASS64 = 2  // 64-bit object file
330 };
331 
332 // Object file byte orderings.
333 enum {
334   ELFDATANONE = 0, // Invalid data encoding.
335   ELFDATA2LSB = 1, // Little-endian object file
336   ELFDATA2MSB = 2  // Big-endian object file
337 };
338 
339 // OS ABI identification.
340 enum {
341   ELFOSABI_NONE = 0,           // UNIX System V ABI
342   ELFOSABI_HPUX = 1,           // HP-UX operating system
343   ELFOSABI_NETBSD = 2,         // NetBSD
344   ELFOSABI_GNU = 3,            // GNU/Linux
345   ELFOSABI_LINUX = 3,          // Historical alias for ELFOSABI_GNU.
346   ELFOSABI_HURD = 4,           // GNU/Hurd
347   ELFOSABI_SOLARIS = 6,        // Solaris
348   ELFOSABI_AIX = 7,            // AIX
349   ELFOSABI_IRIX = 8,           // IRIX
350   ELFOSABI_FREEBSD = 9,        // FreeBSD
351   ELFOSABI_TRU64 = 10,         // TRU64 UNIX
352   ELFOSABI_MODESTO = 11,       // Novell Modesto
353   ELFOSABI_OPENBSD = 12,       // OpenBSD
354   ELFOSABI_OPENVMS = 13,       // OpenVMS
355   ELFOSABI_NSK = 14,           // Hewlett-Packard Non-Stop Kernel
356   ELFOSABI_AROS = 15,          // AROS
357   ELFOSABI_FENIXOS = 16,       // FenixOS
358   ELFOSABI_CLOUDABI = 17,      // Nuxi CloudABI
359   ELFOSABI_FIRST_ARCH = 64,    // First architecture-specific OS ABI
360   ELFOSABI_AMDGPU_HSA = 64,    // AMD HSA runtime
361   ELFOSABI_AMDGPU_PAL = 65,    // AMD PAL runtime
362   ELFOSABI_AMDGPU_MESA3D = 66, // AMD GCN GPUs (GFX6+) for MESA runtime
363   ELFOSABI_ARM = 97,           // ARM
364   ELFOSABI_C6000_ELFABI = 64,  // Bare-metal TMS320C6000
365   ELFOSABI_C6000_LINUX = 65,   // Linux TMS320C6000
366   ELFOSABI_STANDALONE = 255,   // Standalone (embedded) application
367   ELFOSABI_LAST_ARCH = 255     // Last Architecture-specific OS ABI
368 };
369 
370 // AMDGPU OS ABI Version identification.
371 enum {
372   // ELFABIVERSION_AMDGPU_HSA_V1 does not exist because OS ABI identification
373   // was never defined for V1.
374   ELFABIVERSION_AMDGPU_HSA_V2 = 0,
375   ELFABIVERSION_AMDGPU_HSA_V3 = 1,
376   ELFABIVERSION_AMDGPU_HSA_V4 = 2
377 };
378 
379 #define ELF_RELOC(name, value) name = value,
380 
381 // X86_64 relocations.
382 enum {
383 #include "ELFRelocs/x86_64.def"
384 };
385 
386 // i386 relocations.
387 enum {
388 #include "ELFRelocs/i386.def"
389 };
390 
391 // ELF Relocation types for PPC32
392 enum {
393 #include "ELFRelocs/PowerPC.def"
394 };
395 
396 // Specific e_flags for PPC64
397 enum {
398   // e_flags bits specifying ABI:
399   // 1 for original ABI using function descriptors,
400   // 2 for revised ABI without function descriptors,
401   // 0 for unspecified or not using any features affected by the differences.
402   EF_PPC64_ABI = 3
403 };
404 
405 // Special values for the st_other field in the symbol table entry for PPC64.
406 enum {
407   STO_PPC64_LOCAL_BIT = 5,
408   STO_PPC64_LOCAL_MASK = (7 << STO_PPC64_LOCAL_BIT)
409 };
decodePPC64LocalEntryOffset(unsigned Other)410 static inline int64_t decodePPC64LocalEntryOffset(unsigned Other) {
411   unsigned Val = (Other & STO_PPC64_LOCAL_MASK) >> STO_PPC64_LOCAL_BIT;
412   return ((1 << Val) >> 2) << 2;
413 }
414 
415 // ELF Relocation types for PPC64
416 enum {
417 #include "ELFRelocs/PowerPC64.def"
418 };
419 
420 // ELF Relocation types for AArch64
421 enum {
422 #include "ELFRelocs/AArch64.def"
423 };
424 
425 // Special values for the st_other field in the symbol table entry for AArch64.
426 enum {
427   // Symbol may follow different calling convention than base PCS.
428   STO_AARCH64_VARIANT_PCS = 0x80
429 };
430 
431 // ARM Specific e_flags
432 enum : unsigned {
433   EF_ARM_SOFT_FLOAT = 0x00000200U,     // Legacy pre EABI_VER5
434   EF_ARM_ABI_FLOAT_SOFT = 0x00000200U, // EABI_VER5
435   EF_ARM_VFP_FLOAT = 0x00000400U,      // Legacy pre EABI_VER5
436   EF_ARM_ABI_FLOAT_HARD = 0x00000400U, // EABI_VER5
437   EF_ARM_EABI_UNKNOWN = 0x00000000U,
438   EF_ARM_EABI_VER1 = 0x01000000U,
439   EF_ARM_EABI_VER2 = 0x02000000U,
440   EF_ARM_EABI_VER3 = 0x03000000U,
441   EF_ARM_EABI_VER4 = 0x04000000U,
442   EF_ARM_EABI_VER5 = 0x05000000U,
443   EF_ARM_EABIMASK = 0xFF000000U
444 };
445 
446 // ELF Relocation types for ARM
447 enum {
448 #include "ELFRelocs/ARM.def"
449 };
450 
451 // ARC Specific e_flags
452 enum : unsigned {
453   EF_ARC_MACH_MSK = 0x000000ff,
454   EF_ARC_OSABI_MSK = 0x00000f00,
455   E_ARC_MACH_ARC600 = 0x00000002,
456   E_ARC_MACH_ARC601 = 0x00000004,
457   E_ARC_MACH_ARC700 = 0x00000003,
458   EF_ARC_CPU_ARCV2EM = 0x00000005,
459   EF_ARC_CPU_ARCV2HS = 0x00000006,
460   E_ARC_OSABI_ORIG = 0x00000000,
461   E_ARC_OSABI_V2 = 0x00000200,
462   E_ARC_OSABI_V3 = 0x00000300,
463   E_ARC_OSABI_V4 = 0x00000400,
464   EF_ARC_PIC = 0x00000100
465 };
466 
467 // ELF Relocation types for ARC
468 enum {
469 #include "ELFRelocs/ARC.def"
470 };
471 
472 // AVR specific e_flags
473 enum : unsigned {
474   EF_AVR_ARCH_AVR1 = 1,
475   EF_AVR_ARCH_AVR2 = 2,
476   EF_AVR_ARCH_AVR25 = 25,
477   EF_AVR_ARCH_AVR3 = 3,
478   EF_AVR_ARCH_AVR31 = 31,
479   EF_AVR_ARCH_AVR35 = 35,
480   EF_AVR_ARCH_AVR4 = 4,
481   EF_AVR_ARCH_AVR5 = 5,
482   EF_AVR_ARCH_AVR51 = 51,
483   EF_AVR_ARCH_AVR6 = 6,
484   EF_AVR_ARCH_AVRTINY = 100,
485   EF_AVR_ARCH_XMEGA1 = 101,
486   EF_AVR_ARCH_XMEGA2 = 102,
487   EF_AVR_ARCH_XMEGA3 = 103,
488   EF_AVR_ARCH_XMEGA4 = 104,
489   EF_AVR_ARCH_XMEGA5 = 105,
490   EF_AVR_ARCH_XMEGA6 = 106,
491   EF_AVR_ARCH_XMEGA7 = 107,
492 
493   EF_AVR_ARCH_MASK = 0x7f, // EF_AVR_ARCH_xxx selection mask
494 
495   EF_AVR_LINKRELAX_PREPARED = 0x80, // The file is prepared for linker
496                                     // relaxation to be applied
497 };
498 
499 // ELF Relocation types for AVR
500 enum {
501 #include "ELFRelocs/AVR.def"
502 };
503 
504 // Mips Specific e_flags
505 enum : unsigned {
506   EF_MIPS_NOREORDER = 0x00000001, // Don't reorder instructions
507   EF_MIPS_PIC = 0x00000002,       // Position independent code
508   EF_MIPS_CPIC = 0x00000004,      // Call object with Position independent code
509   EF_MIPS_ABI2 = 0x00000020,      // File uses N32 ABI
510   EF_MIPS_32BITMODE = 0x00000100, // Code compiled for a 64-bit machine
511                                   // in 32-bit mode
512   EF_MIPS_FP64 = 0x00000200,      // Code compiled for a 32-bit machine
513                                   // but uses 64-bit FP registers
514   EF_MIPS_NAN2008 = 0x00000400,   // Uses IEE 754-2008 NaN encoding
515 
516   // ABI flags
517   EF_MIPS_ABI_O32 = 0x00001000, // This file follows the first MIPS 32 bit ABI
518   EF_MIPS_ABI_O64 = 0x00002000, // O32 ABI extended for 64-bit architecture.
519   EF_MIPS_ABI_EABI32 = 0x00003000, // EABI in 32 bit mode.
520   EF_MIPS_ABI_EABI64 = 0x00004000, // EABI in 64 bit mode.
521   EF_MIPS_ABI = 0x0000f000,        // Mask for selecting EF_MIPS_ABI_ variant.
522 
523   // MIPS machine variant
524   EF_MIPS_MACH_NONE = 0x00000000,    // A standard MIPS implementation.
525   EF_MIPS_MACH_3900 = 0x00810000,    // Toshiba R3900
526   EF_MIPS_MACH_4010 = 0x00820000,    // LSI R4010
527   EF_MIPS_MACH_4100 = 0x00830000,    // NEC VR4100
528   EF_MIPS_MACH_4650 = 0x00850000,    // MIPS R4650
529   EF_MIPS_MACH_4120 = 0x00870000,    // NEC VR4120
530   EF_MIPS_MACH_4111 = 0x00880000,    // NEC VR4111/VR4181
531   EF_MIPS_MACH_SB1 = 0x008a0000,     // Broadcom SB-1
532   EF_MIPS_MACH_OCTEON = 0x008b0000,  // Cavium Networks Octeon
533   EF_MIPS_MACH_XLR = 0x008c0000,     // RMI Xlr
534   EF_MIPS_MACH_OCTEON2 = 0x008d0000, // Cavium Networks Octeon2
535   EF_MIPS_MACH_OCTEON3 = 0x008e0000, // Cavium Networks Octeon3
536   EF_MIPS_MACH_5400 = 0x00910000,    // NEC VR5400
537   EF_MIPS_MACH_5900 = 0x00920000,    // MIPS R5900
538   EF_MIPS_MACH_5500 = 0x00980000,    // NEC VR5500
539   EF_MIPS_MACH_9000 = 0x00990000,    // Unknown
540   EF_MIPS_MACH_LS2E = 0x00a00000,    // ST Microelectronics Loongson 2E
541   EF_MIPS_MACH_LS2F = 0x00a10000,    // ST Microelectronics Loongson 2F
542   EF_MIPS_MACH_LS3A = 0x00a20000,    // Loongson 3A
543   EF_MIPS_MACH = 0x00ff0000,         // EF_MIPS_MACH_xxx selection mask
544 
545   // ARCH_ASE
546   EF_MIPS_MICROMIPS = 0x02000000,     // microMIPS
547   EF_MIPS_ARCH_ASE_M16 = 0x04000000,  // Has Mips-16 ISA extensions
548   EF_MIPS_ARCH_ASE_MDMX = 0x08000000, // Has MDMX multimedia extensions
549   EF_MIPS_ARCH_ASE = 0x0f000000,      // Mask for EF_MIPS_ARCH_ASE_xxx flags
550 
551   // ARCH
552   EF_MIPS_ARCH_1 = 0x00000000,    // MIPS1 instruction set
553   EF_MIPS_ARCH_2 = 0x10000000,    // MIPS2 instruction set
554   EF_MIPS_ARCH_3 = 0x20000000,    // MIPS3 instruction set
555   EF_MIPS_ARCH_4 = 0x30000000,    // MIPS4 instruction set
556   EF_MIPS_ARCH_5 = 0x40000000,    // MIPS5 instruction set
557   EF_MIPS_ARCH_32 = 0x50000000,   // MIPS32 instruction set per linux not elf.h
558   EF_MIPS_ARCH_64 = 0x60000000,   // MIPS64 instruction set per linux not elf.h
559   EF_MIPS_ARCH_32R2 = 0x70000000, // mips32r2, mips32r3, mips32r5
560   EF_MIPS_ARCH_64R2 = 0x80000000, // mips64r2, mips64r3, mips64r5
561   EF_MIPS_ARCH_32R6 = 0x90000000, // mips32r6
562   EF_MIPS_ARCH_64R6 = 0xa0000000, // mips64r6
563   EF_MIPS_ARCH = 0xf0000000       // Mask for applying EF_MIPS_ARCH_ variant
564 };
565 
566 // ELF Relocation types for Mips
567 enum {
568 #include "ELFRelocs/Mips.def"
569 };
570 
571 // Special values for the st_other field in the symbol table entry for MIPS.
572 enum {
573   STO_MIPS_OPTIONAL = 0x04,  // Symbol whose definition is optional
574   STO_MIPS_PLT = 0x08,       // PLT entry related dynamic table record
575   STO_MIPS_PIC = 0x20,       // PIC func in an object mixes PIC/non-PIC
576   STO_MIPS_MICROMIPS = 0x80, // MIPS Specific ISA for MicroMips
577   STO_MIPS_MIPS16 = 0xf0     // MIPS Specific ISA for Mips16
578 };
579 
580 // .MIPS.options section descriptor kinds
581 enum {
582   ODK_NULL = 0,       // Undefined
583   ODK_REGINFO = 1,    // Register usage information
584   ODK_EXCEPTIONS = 2, // Exception processing options
585   ODK_PAD = 3,        // Section padding options
586   ODK_HWPATCH = 4,    // Hardware patches applied
587   ODK_FILL = 5,       // Linker fill value
588   ODK_TAGS = 6,       // Space for tool identification
589   ODK_HWAND = 7,      // Hardware AND patches applied
590   ODK_HWOR = 8,       // Hardware OR patches applied
591   ODK_GP_GROUP = 9,   // GP group to use for text/data sections
592   ODK_IDENT = 10,     // ID information
593   ODK_PAGESIZE = 11   // Page size information
594 };
595 
596 // Hexagon-specific e_flags
597 enum {
598   // Object processor version flags, bits[11:0]
599   EF_HEXAGON_MACH_V2 = 0x00000001,   // Hexagon V2
600   EF_HEXAGON_MACH_V3 = 0x00000002,   // Hexagon V3
601   EF_HEXAGON_MACH_V4 = 0x00000003,   // Hexagon V4
602   EF_HEXAGON_MACH_V5 = 0x00000004,   // Hexagon V5
603   EF_HEXAGON_MACH_V55 = 0x00000005,  // Hexagon V55
604   EF_HEXAGON_MACH_V60 = 0x00000060,  // Hexagon V60
605   EF_HEXAGON_MACH_V62 = 0x00000062,  // Hexagon V62
606   EF_HEXAGON_MACH_V65 = 0x00000065,  // Hexagon V65
607   EF_HEXAGON_MACH_V66 = 0x00000066,  // Hexagon V66
608   EF_HEXAGON_MACH_V67 = 0x00000067,  // Hexagon V67
609   EF_HEXAGON_MACH_V67T = 0x00008067, // Hexagon V67T
610   EF_HEXAGON_MACH_V68 = 0x00000068,  // Hexagon V68
611 
612   // Highest ISA version flags
613   EF_HEXAGON_ISA_MACH = 0x00000000, // Same as specified in bits[11:0]
614                                     // of e_flags
615   EF_HEXAGON_ISA_V2 = 0x00000010,   // Hexagon V2 ISA
616   EF_HEXAGON_ISA_V3 = 0x00000020,   // Hexagon V3 ISA
617   EF_HEXAGON_ISA_V4 = 0x00000030,   // Hexagon V4 ISA
618   EF_HEXAGON_ISA_V5 = 0x00000040,   // Hexagon V5 ISA
619   EF_HEXAGON_ISA_V55 = 0x00000050,  // Hexagon V55 ISA
620   EF_HEXAGON_ISA_V60 = 0x00000060,  // Hexagon V60 ISA
621   EF_HEXAGON_ISA_V62 = 0x00000062,  // Hexagon V62 ISA
622   EF_HEXAGON_ISA_V65 = 0x00000065,  // Hexagon V65 ISA
623   EF_HEXAGON_ISA_V66 = 0x00000066,  // Hexagon V66 ISA
624   EF_HEXAGON_ISA_V67 = 0x00000067,  // Hexagon V67 ISA
625   EF_HEXAGON_ISA_V68 = 0x00000068,  // Hexagon V68 ISA
626 };
627 
628 // Hexagon-specific section indexes for common small data
629 enum {
630   SHN_HEXAGON_SCOMMON = 0xff00,   // Other access sizes
631   SHN_HEXAGON_SCOMMON_1 = 0xff01, // Byte-sized access
632   SHN_HEXAGON_SCOMMON_2 = 0xff02, // Half-word-sized access
633   SHN_HEXAGON_SCOMMON_4 = 0xff03, // Word-sized access
634   SHN_HEXAGON_SCOMMON_8 = 0xff04  // Double-word-size access
635 };
636 
637 // ELF Relocation types for Hexagon
638 enum {
639 #include "ELFRelocs/Hexagon.def"
640 };
641 
642 // ELF Relocation type for Lanai.
643 enum {
644 #include "ELFRelocs/Lanai.def"
645 };
646 
647 // RISCV Specific e_flags
648 enum : unsigned {
649   EF_RISCV_RVC = 0x0001,
650   EF_RISCV_FLOAT_ABI = 0x0006,
651   EF_RISCV_FLOAT_ABI_SOFT = 0x0000,
652   EF_RISCV_FLOAT_ABI_SINGLE = 0x0002,
653   EF_RISCV_FLOAT_ABI_DOUBLE = 0x0004,
654   EF_RISCV_FLOAT_ABI_QUAD = 0x0006,
655   EF_RISCV_RVE = 0x0008
656 };
657 
658 // ELF Relocation types for RISC-V
659 enum {
660 #include "ELFRelocs/RISCV.def"
661 };
662 
663 // ELF Relocation types for S390/zSeries
664 enum {
665 #include "ELFRelocs/SystemZ.def"
666 };
667 
668 // ELF Relocation type for Sparc.
669 enum {
670 #include "ELFRelocs/Sparc.def"
671 };
672 
673 // AMDGPU specific e_flags.
674 enum : unsigned {
675   // Processor selection mask for EF_AMDGPU_MACH_* values.
676   EF_AMDGPU_MACH = 0x0ff,
677 
678   // Not specified processor.
679   EF_AMDGPU_MACH_NONE = 0x000,
680 
681   // R600-based processors.
682 
683   // Radeon HD 2000/3000 Series (R600).
684   EF_AMDGPU_MACH_R600_R600 = 0x001,
685   EF_AMDGPU_MACH_R600_R630 = 0x002,
686   EF_AMDGPU_MACH_R600_RS880 = 0x003,
687   EF_AMDGPU_MACH_R600_RV670 = 0x004,
688   // Radeon HD 4000 Series (R700).
689   EF_AMDGPU_MACH_R600_RV710 = 0x005,
690   EF_AMDGPU_MACH_R600_RV730 = 0x006,
691   EF_AMDGPU_MACH_R600_RV770 = 0x007,
692   // Radeon HD 5000 Series (Evergreen).
693   EF_AMDGPU_MACH_R600_CEDAR = 0x008,
694   EF_AMDGPU_MACH_R600_CYPRESS = 0x009,
695   EF_AMDGPU_MACH_R600_JUNIPER = 0x00a,
696   EF_AMDGPU_MACH_R600_REDWOOD = 0x00b,
697   EF_AMDGPU_MACH_R600_SUMO = 0x00c,
698   // Radeon HD 6000 Series (Northern Islands).
699   EF_AMDGPU_MACH_R600_BARTS = 0x00d,
700   EF_AMDGPU_MACH_R600_CAICOS = 0x00e,
701   EF_AMDGPU_MACH_R600_CAYMAN = 0x00f,
702   EF_AMDGPU_MACH_R600_TURKS = 0x010,
703 
704   // Reserved for R600-based processors.
705   EF_AMDGPU_MACH_R600_RESERVED_FIRST = 0x011,
706   EF_AMDGPU_MACH_R600_RESERVED_LAST = 0x01f,
707 
708   // First/last R600-based processors.
709   EF_AMDGPU_MACH_R600_FIRST = EF_AMDGPU_MACH_R600_R600,
710   EF_AMDGPU_MACH_R600_LAST = EF_AMDGPU_MACH_R600_TURKS,
711 
712   // AMDGCN-based processors.
713   EF_AMDGPU_MACH_AMDGCN_GFX600        = 0x020,
714   EF_AMDGPU_MACH_AMDGCN_GFX601        = 0x021,
715   EF_AMDGPU_MACH_AMDGCN_GFX700        = 0x022,
716   EF_AMDGPU_MACH_AMDGCN_GFX701        = 0x023,
717   EF_AMDGPU_MACH_AMDGCN_GFX702        = 0x024,
718   EF_AMDGPU_MACH_AMDGCN_GFX703        = 0x025,
719   EF_AMDGPU_MACH_AMDGCN_GFX704        = 0x026,
720   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X27 = 0x027,
721   EF_AMDGPU_MACH_AMDGCN_GFX801        = 0x028,
722   EF_AMDGPU_MACH_AMDGCN_GFX802        = 0x029,
723   EF_AMDGPU_MACH_AMDGCN_GFX803        = 0x02a,
724   EF_AMDGPU_MACH_AMDGCN_GFX810        = 0x02b,
725   EF_AMDGPU_MACH_AMDGCN_GFX900        = 0x02c,
726   EF_AMDGPU_MACH_AMDGCN_GFX902        = 0x02d,
727   EF_AMDGPU_MACH_AMDGCN_GFX904        = 0x02e,
728   EF_AMDGPU_MACH_AMDGCN_GFX906        = 0x02f,
729   EF_AMDGPU_MACH_AMDGCN_GFX908        = 0x030,
730   EF_AMDGPU_MACH_AMDGCN_GFX909        = 0x031,
731   EF_AMDGPU_MACH_AMDGCN_GFX90C        = 0x032,
732   EF_AMDGPU_MACH_AMDGCN_GFX1010       = 0x033,
733   EF_AMDGPU_MACH_AMDGCN_GFX1011       = 0x034,
734   EF_AMDGPU_MACH_AMDGCN_GFX1012       = 0x035,
735   EF_AMDGPU_MACH_AMDGCN_GFX1030       = 0x036,
736   EF_AMDGPU_MACH_AMDGCN_GFX1031       = 0x037,
737   EF_AMDGPU_MACH_AMDGCN_GFX1032       = 0x038,
738   EF_AMDGPU_MACH_AMDGCN_GFX1033       = 0x039,
739   EF_AMDGPU_MACH_AMDGCN_GFX602        = 0x03a,
740   EF_AMDGPU_MACH_AMDGCN_GFX705        = 0x03b,
741   EF_AMDGPU_MACH_AMDGCN_GFX805        = 0x03c,
742   EF_AMDGPU_MACH_AMDGCN_GFX1035       = 0x03d,
743   EF_AMDGPU_MACH_AMDGCN_GFX1034       = 0x03e,
744   EF_AMDGPU_MACH_AMDGCN_GFX90A        = 0x03f,
745   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
746   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X41 = 0x041,
747   EF_AMDGPU_MACH_AMDGCN_GFX1013       = 0x042,
748   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X43 = 0x043,
749   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X44 = 0x044,
750   EF_AMDGPU_MACH_AMDGCN_RESERVED_0X45 = 0x045,
751 
752   // First/last AMDGCN-based processors.
753   EF_AMDGPU_MACH_AMDGCN_FIRST = EF_AMDGPU_MACH_AMDGCN_GFX600,
754   EF_AMDGPU_MACH_AMDGCN_LAST = EF_AMDGPU_MACH_AMDGCN_RESERVED_0X45,
755 
756   // Indicates if the "xnack" target feature is enabled for all code contained
757   // in the object.
758   //
759   // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
760   EF_AMDGPU_FEATURE_XNACK_V2 = 0x01,
761   // Indicates if the trap handler is enabled for all code contained
762   // in the object.
763   //
764   // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V2.
765   EF_AMDGPU_FEATURE_TRAP_HANDLER_V2 = 0x02,
766 
767   // Indicates if the "xnack" target feature is enabled for all code contained
768   // in the object.
769   //
770   // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
771   EF_AMDGPU_FEATURE_XNACK_V3 = 0x100,
772   // Indicates if the "sramecc" target feature is enabled for all code
773   // contained in the object.
774   //
775   // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V3.
776   EF_AMDGPU_FEATURE_SRAMECC_V3 = 0x200,
777 
778   // XNACK selection mask for EF_AMDGPU_FEATURE_XNACK_* values.
779   //
780   // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
781   EF_AMDGPU_FEATURE_XNACK_V4 = 0x300,
782   // XNACK is not supported.
783   EF_AMDGPU_FEATURE_XNACK_UNSUPPORTED_V4 = 0x000,
784   // XNACK is any/default/unspecified.
785   EF_AMDGPU_FEATURE_XNACK_ANY_V4 = 0x100,
786   // XNACK is off.
787   EF_AMDGPU_FEATURE_XNACK_OFF_V4 = 0x200,
788   // XNACK is on.
789   EF_AMDGPU_FEATURE_XNACK_ON_V4 = 0x300,
790 
791   // SRAMECC selection mask for EF_AMDGPU_FEATURE_SRAMECC_* values.
792   //
793   // Only valid for ELFOSABI_AMDGPU_HSA and ELFABIVERSION_AMDGPU_HSA_V4.
794   EF_AMDGPU_FEATURE_SRAMECC_V4 = 0xc00,
795   // SRAMECC is not supported.
796   EF_AMDGPU_FEATURE_SRAMECC_UNSUPPORTED_V4 = 0x000,
797   // SRAMECC is any/default/unspecified.
798   EF_AMDGPU_FEATURE_SRAMECC_ANY_V4 = 0x400,
799   // SRAMECC is off.
800   EF_AMDGPU_FEATURE_SRAMECC_OFF_V4 = 0x800,
801   // SRAMECC is on.
802   EF_AMDGPU_FEATURE_SRAMECC_ON_V4 = 0xc00,
803 };
804 
805 // ELF Relocation types for AMDGPU
806 enum {
807 #include "ELFRelocs/AMDGPU.def"
808 };
809 
810 // ELF Relocation types for BPF
811 enum {
812 #include "ELFRelocs/BPF.def"
813 };
814 
815 // ELF Relocation types for M68k
816 enum {
817 #include "ELFRelocs/M68k.def"
818 };
819 
820 // MSP430 specific e_flags
821 enum : unsigned {
822   EF_MSP430_MACH_MSP430x11 = 11,
823   EF_MSP430_MACH_MSP430x11x1 = 110,
824   EF_MSP430_MACH_MSP430x12 = 12,
825   EF_MSP430_MACH_MSP430x13 = 13,
826   EF_MSP430_MACH_MSP430x14 = 14,
827   EF_MSP430_MACH_MSP430x15 = 15,
828   EF_MSP430_MACH_MSP430x16 = 16,
829   EF_MSP430_MACH_MSP430x20 = 20,
830   EF_MSP430_MACH_MSP430x22 = 22,
831   EF_MSP430_MACH_MSP430x23 = 23,
832   EF_MSP430_MACH_MSP430x24 = 24,
833   EF_MSP430_MACH_MSP430x26 = 26,
834   EF_MSP430_MACH_MSP430x31 = 31,
835   EF_MSP430_MACH_MSP430x32 = 32,
836   EF_MSP430_MACH_MSP430x33 = 33,
837   EF_MSP430_MACH_MSP430x41 = 41,
838   EF_MSP430_MACH_MSP430x42 = 42,
839   EF_MSP430_MACH_MSP430x43 = 43,
840   EF_MSP430_MACH_MSP430x44 = 44,
841   EF_MSP430_MACH_MSP430X = 45,
842   EF_MSP430_MACH_MSP430x46 = 46,
843   EF_MSP430_MACH_MSP430x47 = 47,
844   EF_MSP430_MACH_MSP430x54 = 54,
845 };
846 
847 // ELF Relocation types for MSP430
848 enum {
849 #include "ELFRelocs/MSP430.def"
850 };
851 
852 // ELF Relocation type for VE.
853 enum {
854 #include "ELFRelocs/VE.def"
855 };
856 
857 
858 // ELF Relocation types for CSKY
859 enum {
860 #include "ELFRelocs/CSKY.def"
861 };
862 
863 #undef ELF_RELOC
864 
865 // Section header.
866 struct Elf32_Shdr {
867   Elf32_Word sh_name;      // Section name (index into string table)
868   Elf32_Word sh_type;      // Section type (SHT_*)
869   Elf32_Word sh_flags;     // Section flags (SHF_*)
870   Elf32_Addr sh_addr;      // Address where section is to be loaded
871   Elf32_Off sh_offset;     // File offset of section data, in bytes
872   Elf32_Word sh_size;      // Size of section, in bytes
873   Elf32_Word sh_link;      // Section type-specific header table index link
874   Elf32_Word sh_info;      // Section type-specific extra information
875   Elf32_Word sh_addralign; // Section address alignment
876   Elf32_Word sh_entsize;   // Size of records contained within the section
877 };
878 
879 // Section header for ELF64 - same fields as ELF32, different types.
880 struct Elf64_Shdr {
881   Elf64_Word sh_name;
882   Elf64_Word sh_type;
883   Elf64_Xword sh_flags;
884   Elf64_Addr sh_addr;
885   Elf64_Off sh_offset;
886   Elf64_Xword sh_size;
887   Elf64_Word sh_link;
888   Elf64_Word sh_info;
889   Elf64_Xword sh_addralign;
890   Elf64_Xword sh_entsize;
891 };
892 
893 // Special section indices.
894 enum {
895   SHN_UNDEF = 0,          // Undefined, missing, irrelevant, or meaningless
896   SHN_LORESERVE = 0xff00, // Lowest reserved index
897   SHN_LOPROC = 0xff00,    // Lowest processor-specific index
898   SHN_HIPROC = 0xff1f,    // Highest processor-specific index
899   SHN_LOOS = 0xff20,      // Lowest operating system-specific index
900   SHN_HIOS = 0xff3f,      // Highest operating system-specific index
901   SHN_ABS = 0xfff1,       // Symbol has absolute value; does not need relocation
902   SHN_COMMON = 0xfff2,    // FORTRAN COMMON or C external global variables
903   SHN_XINDEX = 0xffff,    // Mark that the index is >= SHN_LORESERVE
904   SHN_HIRESERVE = 0xffff  // Highest reserved index
905 };
906 
907 // Section types.
908 enum : unsigned {
909   SHT_NULL = 0,           // No associated section (inactive entry).
910   SHT_PROGBITS = 1,       // Program-defined contents.
911   SHT_SYMTAB = 2,         // Symbol table.
912   SHT_STRTAB = 3,         // String table.
913   SHT_RELA = 4,           // Relocation entries; explicit addends.
914   SHT_HASH = 5,           // Symbol hash table.
915   SHT_DYNAMIC = 6,        // Information for dynamic linking.
916   SHT_NOTE = 7,           // Information about the file.
917   SHT_NOBITS = 8,         // Data occupies no space in the file.
918   SHT_REL = 9,            // Relocation entries; no explicit addends.
919   SHT_SHLIB = 10,         // Reserved.
920   SHT_DYNSYM = 11,        // Symbol table.
921   SHT_INIT_ARRAY = 14,    // Pointers to initialization functions.
922   SHT_FINI_ARRAY = 15,    // Pointers to termination functions.
923   SHT_PREINIT_ARRAY = 16, // Pointers to pre-init functions.
924   SHT_GROUP = 17,         // Section group.
925   SHT_SYMTAB_SHNDX = 18,  // Indices for SHN_XINDEX entries.
926   // Experimental support for SHT_RELR sections. For details, see proposal
927   // at https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg
928   SHT_RELR = 19,         // Relocation entries; only offsets.
929   SHT_LOOS = 0x60000000, // Lowest operating system-specific type.
930   // Android packed relocation section types.
931   // https://android.googlesource.com/platform/bionic/+/6f12bfece5dcc01325e0abba56a46b1bcf991c69/tools/relocation_packer/src/elf_file.cc#37
932   SHT_ANDROID_REL = 0x60000001,
933   SHT_ANDROID_RELA = 0x60000002,
934   SHT_LLVM_ODRTAB = 0x6fff4c00,         // LLVM ODR table.
935   SHT_LLVM_LINKER_OPTIONS = 0x6fff4c01, // LLVM Linker Options.
936   SHT_LLVM_ADDRSIG = 0x6fff4c03,        // List of address-significant symbols
937                                         // for safe ICF.
938   SHT_LLVM_DEPENDENT_LIBRARIES =
939       0x6fff4c04,                    // LLVM Dependent Library Specifiers.
940   SHT_LLVM_SYMPART = 0x6fff4c05,     // Symbol partition specification.
941   SHT_LLVM_PART_EHDR = 0x6fff4c06,   // ELF header for loadable partition.
942   SHT_LLVM_PART_PHDR = 0x6fff4c07,   // Phdrs for loadable partition.
943   SHT_LLVM_BB_ADDR_MAP = 0x6fff4c08, // LLVM Basic Block Address Map.
944   SHT_LLVM_CALL_GRAPH_PROFILE = 0x6fff4c09, // LLVM Call Graph Profile.
945   // Android's experimental support for SHT_RELR sections.
946   // https://android.googlesource.com/platform/bionic/+/b7feec74547f84559a1467aca02708ff61346d2a/libc/include/elf.h#512
947   SHT_ANDROID_RELR = 0x6fffff00,   // Relocation entries; only offsets.
948   SHT_GNU_ATTRIBUTES = 0x6ffffff5, // Object attributes.
949   SHT_GNU_HASH = 0x6ffffff6,       // GNU-style hash table.
950   SHT_GNU_verdef = 0x6ffffffd,     // GNU version definitions.
951   SHT_GNU_verneed = 0x6ffffffe,    // GNU version references.
952   SHT_GNU_versym = 0x6fffffff,     // GNU symbol versions table.
953   SHT_HIOS = 0x6fffffff,           // Highest operating system-specific type.
954   SHT_LOPROC = 0x70000000,         // Lowest processor arch-specific type.
955   // Fixme: All this is duplicated in MCSectionELF. Why??
956   // Exception Index table
957   SHT_ARM_EXIDX = 0x70000001U,
958   // BPABI DLL dynamic linking pre-emption map
959   SHT_ARM_PREEMPTMAP = 0x70000002U,
960   //  Object file compatibility attributes
961   SHT_ARM_ATTRIBUTES = 0x70000003U,
962   SHT_ARM_DEBUGOVERLAY = 0x70000004U,
963   SHT_ARM_OVERLAYSECTION = 0x70000005U,
964   SHT_HEX_ORDERED = 0x70000000,   // Link editor is to sort the entries in
965                                   // this section based on their sizes
966   SHT_X86_64_UNWIND = 0x70000001, // Unwind information
967 
968   SHT_MIPS_REGINFO = 0x70000006,  // Register usage information
969   SHT_MIPS_OPTIONS = 0x7000000d,  // General options
970   SHT_MIPS_DWARF = 0x7000001e,    // DWARF debugging section.
971   SHT_MIPS_ABIFLAGS = 0x7000002a, // ABI information.
972 
973   SHT_MSP430_ATTRIBUTES = 0x70000003U,
974 
975   SHT_RISCV_ATTRIBUTES = 0x70000003U,
976 
977   SHT_HIPROC = 0x7fffffff, // Highest processor arch-specific type.
978   SHT_LOUSER = 0x80000000, // Lowest type reserved for applications.
979   SHT_HIUSER = 0xffffffff  // Highest type reserved for applications.
980 };
981 
982 // Section flags.
983 enum : unsigned {
984   // Section data should be writable during execution.
985   SHF_WRITE = 0x1,
986 
987   // Section occupies memory during program execution.
988   SHF_ALLOC = 0x2,
989 
990   // Section contains executable machine instructions.
991   SHF_EXECINSTR = 0x4,
992 
993   // The data in this section may be merged.
994   SHF_MERGE = 0x10,
995 
996   // The data in this section is null-terminated strings.
997   SHF_STRINGS = 0x20,
998 
999   // A field in this section holds a section header table index.
1000   SHF_INFO_LINK = 0x40U,
1001 
1002   // Adds special ordering requirements for link editors.
1003   SHF_LINK_ORDER = 0x80U,
1004 
1005   // This section requires special OS-specific processing to avoid incorrect
1006   // behavior.
1007   SHF_OS_NONCONFORMING = 0x100U,
1008 
1009   // This section is a member of a section group.
1010   SHF_GROUP = 0x200U,
1011 
1012   // This section holds Thread-Local Storage.
1013   SHF_TLS = 0x400U,
1014 
1015   // Identifies a section containing compressed data.
1016   SHF_COMPRESSED = 0x800U,
1017 
1018   // This section should not be garbage collected by the linker.
1019   SHF_GNU_RETAIN = 0x200000,
1020 
1021   // This section is excluded from the final executable or shared library.
1022   SHF_EXCLUDE = 0x80000000U,
1023 
1024   // Start of target-specific flags.
1025 
1026   SHF_MASKOS = 0x0ff00000,
1027 
1028   // Bits indicating processor-specific flags.
1029   SHF_MASKPROC = 0xf0000000,
1030 
1031   /// All sections with the "d" flag are grouped together by the linker to form
1032   /// the data section and the dp register is set to the start of the section by
1033   /// the boot code.
1034   XCORE_SHF_DP_SECTION = 0x10000000,
1035 
1036   /// All sections with the "c" flag are grouped together by the linker to form
1037   /// the constant pool and the cp register is set to the start of the constant
1038   /// pool by the boot code.
1039   XCORE_SHF_CP_SECTION = 0x20000000,
1040 
1041   // If an object file section does not have this flag set, then it may not hold
1042   // more than 2GB and can be freely referred to in objects using smaller code
1043   // models. Otherwise, only objects using larger code models can refer to them.
1044   // For example, a medium code model object can refer to data in a section that
1045   // sets this flag besides being able to refer to data in a section that does
1046   // not set it; likewise, a small code model object can refer only to code in a
1047   // section that does not set this flag.
1048   SHF_X86_64_LARGE = 0x10000000,
1049 
1050   // All sections with the GPREL flag are grouped into a global data area
1051   // for faster accesses
1052   SHF_HEX_GPREL = 0x10000000,
1053 
1054   // Section contains text/data which may be replicated in other sections.
1055   // Linker must retain only one copy.
1056   SHF_MIPS_NODUPES = 0x01000000,
1057 
1058   // Linker must generate implicit hidden weak names.
1059   SHF_MIPS_NAMES = 0x02000000,
1060 
1061   // Section data local to process.
1062   SHF_MIPS_LOCAL = 0x04000000,
1063 
1064   // Do not strip this section.
1065   SHF_MIPS_NOSTRIP = 0x08000000,
1066 
1067   // Section must be part of global data area.
1068   SHF_MIPS_GPREL = 0x10000000,
1069 
1070   // This section should be merged.
1071   SHF_MIPS_MERGE = 0x20000000,
1072 
1073   // Address size to be inferred from section entry size.
1074   SHF_MIPS_ADDR = 0x40000000,
1075 
1076   // Section data is string data by default.
1077   SHF_MIPS_STRING = 0x80000000,
1078 
1079   // Make code section unreadable when in execute-only mode
1080   SHF_ARM_PURECODE = 0x20000000
1081 };
1082 
1083 // Section Group Flags
1084 enum : unsigned {
1085   GRP_COMDAT = 0x1,
1086   GRP_MASKOS = 0x0ff00000,
1087   GRP_MASKPROC = 0xf0000000
1088 };
1089 
1090 // Symbol table entries for ELF32.
1091 struct Elf32_Sym {
1092   Elf32_Word st_name;     // Symbol name (index into string table)
1093   Elf32_Addr st_value;    // Value or address associated with the symbol
1094   Elf32_Word st_size;     // Size of the symbol
1095   unsigned char st_info;  // Symbol's type and binding attributes
1096   unsigned char st_other; // Must be zero; reserved
1097   Elf32_Half st_shndx;    // Which section (header table index) it's defined in
1098 
1099   // These accessors and mutators correspond to the ELF32_ST_BIND,
1100   // ELF32_ST_TYPE, and ELF32_ST_INFO macros defined in the ELF specification:
getBindingElf32_Sym1101   unsigned char getBinding() const { return st_info >> 4; }
getTypeElf32_Sym1102   unsigned char getType() const { return st_info & 0x0f; }
setBindingElf32_Sym1103   void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
setTypeElf32_Sym1104   void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
setBindingAndTypeElf32_Sym1105   void setBindingAndType(unsigned char b, unsigned char t) {
1106     st_info = (b << 4) + (t & 0x0f);
1107   }
1108 };
1109 
1110 // Symbol table entries for ELF64.
1111 struct Elf64_Sym {
1112   Elf64_Word st_name;     // Symbol name (index into string table)
1113   unsigned char st_info;  // Symbol's type and binding attributes
1114   unsigned char st_other; // Must be zero; reserved
1115   Elf64_Half st_shndx;    // Which section (header tbl index) it's defined in
1116   Elf64_Addr st_value;    // Value or address associated with the symbol
1117   Elf64_Xword st_size;    // Size of the symbol
1118 
1119   // These accessors and mutators are identical to those defined for ELF32
1120   // symbol table entries.
getBindingElf64_Sym1121   unsigned char getBinding() const { return st_info >> 4; }
getTypeElf64_Sym1122   unsigned char getType() const { return st_info & 0x0f; }
setBindingElf64_Sym1123   void setBinding(unsigned char b) { setBindingAndType(b, getType()); }
setTypeElf64_Sym1124   void setType(unsigned char t) { setBindingAndType(getBinding(), t); }
setBindingAndTypeElf64_Sym1125   void setBindingAndType(unsigned char b, unsigned char t) {
1126     st_info = (b << 4) + (t & 0x0f);
1127   }
1128 };
1129 
1130 // The size (in bytes) of symbol table entries.
1131 enum {
1132   SYMENTRY_SIZE32 = 16, // 32-bit symbol entry size
1133   SYMENTRY_SIZE64 = 24  // 64-bit symbol entry size.
1134 };
1135 
1136 // Symbol bindings.
1137 enum {
1138   STB_LOCAL = 0,  // Local symbol, not visible outside obj file containing def
1139   STB_GLOBAL = 1, // Global symbol, visible to all object files being combined
1140   STB_WEAK = 2,   // Weak symbol, like global but lower-precedence
1141   STB_GNU_UNIQUE = 10,
1142   STB_LOOS = 10,   // Lowest operating system-specific binding type
1143   STB_HIOS = 12,   // Highest operating system-specific binding type
1144   STB_LOPROC = 13, // Lowest processor-specific binding type
1145   STB_HIPROC = 15  // Highest processor-specific binding type
1146 };
1147 
1148 // Symbol types.
1149 enum {
1150   STT_NOTYPE = 0,     // Symbol's type is not specified
1151   STT_OBJECT = 1,     // Symbol is a data object (variable, array, etc.)
1152   STT_FUNC = 2,       // Symbol is executable code (function, etc.)
1153   STT_SECTION = 3,    // Symbol refers to a section
1154   STT_FILE = 4,       // Local, absolute symbol that refers to a file
1155   STT_COMMON = 5,     // An uninitialized common block
1156   STT_TLS = 6,        // Thread local data object
1157   STT_GNU_IFUNC = 10, // GNU indirect function
1158   STT_LOOS = 10,      // Lowest operating system-specific symbol type
1159   STT_HIOS = 12,      // Highest operating system-specific symbol type
1160   STT_LOPROC = 13,    // Lowest processor-specific symbol type
1161   STT_HIPROC = 15,    // Highest processor-specific symbol type
1162 
1163   // AMDGPU symbol types
1164   STT_AMDGPU_HSA_KERNEL = 10
1165 };
1166 
1167 enum {
1168   STV_DEFAULT = 0,  // Visibility is specified by binding type
1169   STV_INTERNAL = 1, // Defined by processor supplements
1170   STV_HIDDEN = 2,   // Not visible to other components
1171   STV_PROTECTED = 3 // Visible in other components but not preemptable
1172 };
1173 
1174 // Symbol number.
1175 enum { STN_UNDEF = 0 };
1176 
1177 // Special relocation symbols used in the MIPS64 ELF relocation entries
1178 enum {
1179   RSS_UNDEF = 0, // None
1180   RSS_GP = 1,    // Value of gp
1181   RSS_GP0 = 2,   // Value of gp used to create object being relocated
1182   RSS_LOC = 3    // Address of location being relocated
1183 };
1184 
1185 // Relocation entry, without explicit addend.
1186 struct Elf32_Rel {
1187   Elf32_Addr r_offset; // Location (file byte offset, or program virtual addr)
1188   Elf32_Word r_info;   // Symbol table index and type of relocation to apply
1189 
1190   // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
1191   // and ELF32_R_INFO macros defined in the ELF specification:
getSymbolElf32_Rel1192   Elf32_Word getSymbol() const { return (r_info >> 8); }
getTypeElf32_Rel1193   unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
setSymbolElf32_Rel1194   void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
setTypeElf32_Rel1195   void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf32_Rel1196   void setSymbolAndType(Elf32_Word s, unsigned char t) {
1197     r_info = (s << 8) + t;
1198   }
1199 };
1200 
1201 // Relocation entry with explicit addend.
1202 struct Elf32_Rela {
1203   Elf32_Addr r_offset;  // Location (file byte offset, or program virtual addr)
1204   Elf32_Word r_info;    // Symbol table index and type of relocation to apply
1205   Elf32_Sword r_addend; // Compute value for relocatable field by adding this
1206 
1207   // These accessors and mutators correspond to the ELF32_R_SYM, ELF32_R_TYPE,
1208   // and ELF32_R_INFO macros defined in the ELF specification:
getSymbolElf32_Rela1209   Elf32_Word getSymbol() const { return (r_info >> 8); }
getTypeElf32_Rela1210   unsigned char getType() const { return (unsigned char)(r_info & 0x0ff); }
setSymbolElf32_Rela1211   void setSymbol(Elf32_Word s) { setSymbolAndType(s, getType()); }
setTypeElf32_Rela1212   void setType(unsigned char t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf32_Rela1213   void setSymbolAndType(Elf32_Word s, unsigned char t) {
1214     r_info = (s << 8) + t;
1215   }
1216 };
1217 
1218 // Relocation entry without explicit addend or info (relative relocations only).
1219 typedef Elf32_Word Elf32_Relr; // offset/bitmap for relative relocations
1220 
1221 // Relocation entry, without explicit addend.
1222 struct Elf64_Rel {
1223   Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
1224   Elf64_Xword r_info;  // Symbol table index and type of relocation to apply.
1225 
1226   // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
1227   // and ELF64_R_INFO macros defined in the ELF specification:
getSymbolElf64_Rel1228   Elf64_Word getSymbol() const { return (r_info >> 32); }
getTypeElf64_Rel1229   Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
setSymbolElf64_Rel1230   void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
setTypeElf64_Rel1231   void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf64_Rel1232   void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
1233     r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
1234   }
1235 };
1236 
1237 // Relocation entry with explicit addend.
1238 struct Elf64_Rela {
1239   Elf64_Addr r_offset; // Location (file byte offset, or program virtual addr).
1240   Elf64_Xword r_info;  // Symbol table index and type of relocation to apply.
1241   Elf64_Sxword r_addend; // Compute value for relocatable field by adding this.
1242 
1243   // These accessors and mutators correspond to the ELF64_R_SYM, ELF64_R_TYPE,
1244   // and ELF64_R_INFO macros defined in the ELF specification:
getSymbolElf64_Rela1245   Elf64_Word getSymbol() const { return (r_info >> 32); }
getTypeElf64_Rela1246   Elf64_Word getType() const { return (Elf64_Word)(r_info & 0xffffffffL); }
setSymbolElf64_Rela1247   void setSymbol(Elf64_Word s) { setSymbolAndType(s, getType()); }
setTypeElf64_Rela1248   void setType(Elf64_Word t) { setSymbolAndType(getSymbol(), t); }
setSymbolAndTypeElf64_Rela1249   void setSymbolAndType(Elf64_Word s, Elf64_Word t) {
1250     r_info = ((Elf64_Xword)s << 32) + (t & 0xffffffffL);
1251   }
1252 };
1253 
1254 // Relocation entry without explicit addend or info (relative relocations only).
1255 typedef Elf64_Xword Elf64_Relr; // offset/bitmap for relative relocations
1256 
1257 // Program header for ELF32.
1258 struct Elf32_Phdr {
1259   Elf32_Word p_type;   // Type of segment
1260   Elf32_Off p_offset;  // File offset where segment is located, in bytes
1261   Elf32_Addr p_vaddr;  // Virtual address of beginning of segment
1262   Elf32_Addr p_paddr;  // Physical address of beginning of segment (OS-specific)
1263   Elf32_Word p_filesz; // Num. of bytes in file image of segment (may be zero)
1264   Elf32_Word p_memsz;  // Num. of bytes in mem image of segment (may be zero)
1265   Elf32_Word p_flags;  // Segment flags
1266   Elf32_Word p_align;  // Segment alignment constraint
1267 };
1268 
1269 // Program header for ELF64.
1270 struct Elf64_Phdr {
1271   Elf64_Word p_type;    // Type of segment
1272   Elf64_Word p_flags;   // Segment flags
1273   Elf64_Off p_offset;   // File offset where segment is located, in bytes
1274   Elf64_Addr p_vaddr;   // Virtual address of beginning of segment
1275   Elf64_Addr p_paddr;   // Physical addr of beginning of segment (OS-specific)
1276   Elf64_Xword p_filesz; // Num. of bytes in file image of segment (may be zero)
1277   Elf64_Xword p_memsz;  // Num. of bytes in mem image of segment (may be zero)
1278   Elf64_Xword p_align;  // Segment alignment constraint
1279 };
1280 
1281 // Segment types.
1282 enum {
1283   PT_NULL = 0,            // Unused segment.
1284   PT_LOAD = 1,            // Loadable segment.
1285   PT_DYNAMIC = 2,         // Dynamic linking information.
1286   PT_INTERP = 3,          // Interpreter pathname.
1287   PT_NOTE = 4,            // Auxiliary information.
1288   PT_SHLIB = 5,           // Reserved.
1289   PT_PHDR = 6,            // The program header table itself.
1290   PT_TLS = 7,             // The thread-local storage template.
1291   PT_LOOS = 0x60000000,   // Lowest operating system-specific pt entry type.
1292   PT_HIOS = 0x6fffffff,   // Highest operating system-specific pt entry type.
1293   PT_LOPROC = 0x70000000, // Lowest processor-specific program hdr entry type.
1294   PT_HIPROC = 0x7fffffff, // Highest processor-specific program hdr entry type.
1295 
1296   // x86-64 program header types.
1297   // These all contain stack unwind tables.
1298   PT_GNU_EH_FRAME = 0x6474e550,
1299   PT_SUNW_EH_FRAME = 0x6474e550,
1300   PT_SUNW_UNWIND = 0x6464e550,
1301 
1302   PT_GNU_STACK = 0x6474e551,    // Indicates stack executability.
1303   PT_GNU_RELRO = 0x6474e552,    // Read-only after relocation.
1304   PT_GNU_PROPERTY = 0x6474e553, // .note.gnu.property notes sections.
1305 
1306   PT_OPENBSD_RANDOMIZE = 0x65a3dbe6, // Fill with random data.
1307   PT_OPENBSD_WXNEEDED = 0x65a3dbe7,  // Program does W^X violations.
1308   PT_OPENBSD_BOOTDATA = 0x65a41be6,  // Section for boot arguments.
1309 
1310   // ARM program header types.
1311   PT_ARM_ARCHEXT = 0x70000000, // Platform architecture compatibility info
1312   // These all contain stack unwind tables.
1313   PT_ARM_EXIDX = 0x70000001,
1314   PT_ARM_UNWIND = 0x70000001,
1315 
1316   // MIPS program header types.
1317   PT_MIPS_REGINFO = 0x70000000,  // Register usage information.
1318   PT_MIPS_RTPROC = 0x70000001,   // Runtime procedure table.
1319   PT_MIPS_OPTIONS = 0x70000002,  // Options segment.
1320   PT_MIPS_ABIFLAGS = 0x70000003, // Abiflags segment.
1321 };
1322 
1323 // Segment flag bits.
1324 enum : unsigned {
1325   PF_X = 1,                // Execute
1326   PF_W = 2,                // Write
1327   PF_R = 4,                // Read
1328   PF_MASKOS = 0x0ff00000,  // Bits for operating system-specific semantics.
1329   PF_MASKPROC = 0xf0000000 // Bits for processor-specific semantics.
1330 };
1331 
1332 // Dynamic table entry for ELF32.
1333 struct Elf32_Dyn {
1334   Elf32_Sword d_tag; // Type of dynamic table entry.
1335   union {
1336     Elf32_Word d_val; // Integer value of entry.
1337     Elf32_Addr d_ptr; // Pointer value of entry.
1338   } d_un;
1339 };
1340 
1341 // Dynamic table entry for ELF64.
1342 struct Elf64_Dyn {
1343   Elf64_Sxword d_tag; // Type of dynamic table entry.
1344   union {
1345     Elf64_Xword d_val; // Integer value of entry.
1346     Elf64_Addr d_ptr;  // Pointer value of entry.
1347   } d_un;
1348 };
1349 
1350 // Dynamic table entry tags.
1351 enum {
1352 #define DYNAMIC_TAG(name, value) DT_##name = value,
1353 #include "DynamicTags.def"
1354 #undef DYNAMIC_TAG
1355 };
1356 
1357 // DT_FLAGS values.
1358 enum {
1359   DF_ORIGIN = 0x01,    // The object may reference $ORIGIN.
1360   DF_SYMBOLIC = 0x02,  // Search the shared lib before searching the exe.
1361   DF_TEXTREL = 0x04,   // Relocations may modify a non-writable segment.
1362   DF_BIND_NOW = 0x08,  // Process all relocations on load.
1363   DF_STATIC_TLS = 0x10 // Reject attempts to load dynamically.
1364 };
1365 
1366 // State flags selectable in the `d_un.d_val' element of the DT_FLAGS_1 entry.
1367 enum {
1368   DF_1_NOW = 0x00000001,       // Set RTLD_NOW for this object.
1369   DF_1_GLOBAL = 0x00000002,    // Set RTLD_GLOBAL for this object.
1370   DF_1_GROUP = 0x00000004,     // Set RTLD_GROUP for this object.
1371   DF_1_NODELETE = 0x00000008,  // Set RTLD_NODELETE for this object.
1372   DF_1_LOADFLTR = 0x00000010,  // Trigger filtee loading at runtime.
1373   DF_1_INITFIRST = 0x00000020, // Set RTLD_INITFIRST for this object.
1374   DF_1_NOOPEN = 0x00000040,    // Set RTLD_NOOPEN for this object.
1375   DF_1_ORIGIN = 0x00000080,    // $ORIGIN must be handled.
1376   DF_1_DIRECT = 0x00000100,    // Direct binding enabled.
1377   DF_1_TRANS = 0x00000200,
1378   DF_1_INTERPOSE = 0x00000400,  // Object is used to interpose.
1379   DF_1_NODEFLIB = 0x00000800,   // Ignore default lib search path.
1380   DF_1_NODUMP = 0x00001000,     // Object can't be dldump'ed.
1381   DF_1_CONFALT = 0x00002000,    // Configuration alternative created.
1382   DF_1_ENDFILTEE = 0x00004000,  // Filtee terminates filters search.
1383   DF_1_DISPRELDNE = 0x00008000, // Disp reloc applied at build time.
1384   DF_1_DISPRELPND = 0x00010000, // Disp reloc applied at run-time.
1385   DF_1_NODIRECT = 0x00020000,   // Object has no-direct binding.
1386   DF_1_IGNMULDEF = 0x00040000,
1387   DF_1_NOKSYMS = 0x00080000,
1388   DF_1_NOHDR = 0x00100000,
1389   DF_1_EDITED = 0x00200000, // Object is modified after built.
1390   DF_1_NORELOC = 0x00400000,
1391   DF_1_SYMINTPOSE = 0x00800000, // Object has individual interposers.
1392   DF_1_GLOBAUDIT = 0x01000000,  // Global auditing required.
1393   DF_1_SINGLETON = 0x02000000,  // Singleton symbols are used.
1394   DF_1_PIE = 0x08000000,        // Object is a position-independent executable.
1395 };
1396 
1397 // DT_MIPS_FLAGS values.
1398 enum {
1399   RHF_NONE = 0x00000000,                   // No flags.
1400   RHF_QUICKSTART = 0x00000001,             // Uses shortcut pointers.
1401   RHF_NOTPOT = 0x00000002,                 // Hash size is not a power of two.
1402   RHS_NO_LIBRARY_REPLACEMENT = 0x00000004, // Ignore LD_LIBRARY_PATH.
1403   RHF_NO_MOVE = 0x00000008,                // DSO address may not be relocated.
1404   RHF_SGI_ONLY = 0x00000010,               // SGI specific features.
1405   RHF_GUARANTEE_INIT = 0x00000020,         // Guarantee that .init will finish
1406                                            // executing before any non-init
1407                                            // code in DSO is called.
1408   RHF_DELTA_C_PLUS_PLUS = 0x00000040,      // Contains Delta C++ code.
1409   RHF_GUARANTEE_START_INIT = 0x00000080,   // Guarantee that .init will start
1410                                            // executing before any non-init
1411                                            // code in DSO is called.
1412   RHF_PIXIE = 0x00000100,                  // Generated by pixie.
1413   RHF_DEFAULT_DELAY_LOAD = 0x00000200,     // Delay-load DSO by default.
1414   RHF_REQUICKSTART = 0x00000400,           // Object may be requickstarted
1415   RHF_REQUICKSTARTED = 0x00000800,         // Object has been requickstarted
1416   RHF_CORD = 0x00001000,                   // Generated by cord.
1417   RHF_NO_UNRES_UNDEF = 0x00002000,         // Object contains no unresolved
1418                                            // undef symbols.
1419   RHF_RLD_ORDER_SAFE = 0x00004000          // Symbol table is in a safe order.
1420 };
1421 
1422 // ElfXX_VerDef structure version (GNU versioning)
1423 enum { VER_DEF_NONE = 0, VER_DEF_CURRENT = 1 };
1424 
1425 // VerDef Flags (ElfXX_VerDef::vd_flags)
1426 enum { VER_FLG_BASE = 0x1, VER_FLG_WEAK = 0x2, VER_FLG_INFO = 0x4 };
1427 
1428 // Special constants for the version table. (SHT_GNU_versym/.gnu.version)
1429 enum {
1430   VER_NDX_LOCAL = 0,       // Unversioned local symbol
1431   VER_NDX_GLOBAL = 1,      // Unversioned global symbol
1432   VERSYM_VERSION = 0x7fff, // Version Index mask
1433   VERSYM_HIDDEN = 0x8000   // Hidden bit (non-default version)
1434 };
1435 
1436 // ElfXX_VerNeed structure version (GNU versioning)
1437 enum { VER_NEED_NONE = 0, VER_NEED_CURRENT = 1 };
1438 
1439 // SHT_NOTE section types.
1440 
1441 // Generic note types.
1442 enum : unsigned {
1443   NT_VERSION = 1,
1444   NT_ARCH = 2,
1445   NT_GNU_BUILD_ATTRIBUTE_OPEN = 0x100,
1446   NT_GNU_BUILD_ATTRIBUTE_FUNC = 0x101,
1447 };
1448 
1449 // Core note types.
1450 enum : unsigned {
1451   NT_PRSTATUS = 1,
1452   NT_FPREGSET = 2,
1453   NT_PRPSINFO = 3,
1454   NT_TASKSTRUCT = 4,
1455   NT_AUXV = 6,
1456   NT_PSTATUS = 10,
1457   NT_FPREGS = 12,
1458   NT_PSINFO = 13,
1459   NT_LWPSTATUS = 16,
1460   NT_LWPSINFO = 17,
1461   NT_WIN32PSTATUS = 18,
1462 
1463   NT_PPC_VMX = 0x100,
1464   NT_PPC_VSX = 0x102,
1465   NT_PPC_TAR = 0x103,
1466   NT_PPC_PPR = 0x104,
1467   NT_PPC_DSCR = 0x105,
1468   NT_PPC_EBB = 0x106,
1469   NT_PPC_PMU = 0x107,
1470   NT_PPC_TM_CGPR = 0x108,
1471   NT_PPC_TM_CFPR = 0x109,
1472   NT_PPC_TM_CVMX = 0x10a,
1473   NT_PPC_TM_CVSX = 0x10b,
1474   NT_PPC_TM_SPR = 0x10c,
1475   NT_PPC_TM_CTAR = 0x10d,
1476   NT_PPC_TM_CPPR = 0x10e,
1477   NT_PPC_TM_CDSCR = 0x10f,
1478 
1479   NT_386_TLS = 0x200,
1480   NT_386_IOPERM = 0x201,
1481   NT_X86_XSTATE = 0x202,
1482 
1483   NT_S390_HIGH_GPRS = 0x300,
1484   NT_S390_TIMER = 0x301,
1485   NT_S390_TODCMP = 0x302,
1486   NT_S390_TODPREG = 0x303,
1487   NT_S390_CTRS = 0x304,
1488   NT_S390_PREFIX = 0x305,
1489   NT_S390_LAST_BREAK = 0x306,
1490   NT_S390_SYSTEM_CALL = 0x307,
1491   NT_S390_TDB = 0x308,
1492   NT_S390_VXRS_LOW = 0x309,
1493   NT_S390_VXRS_HIGH = 0x30a,
1494   NT_S390_GS_CB = 0x30b,
1495   NT_S390_GS_BC = 0x30c,
1496 
1497   NT_ARM_VFP = 0x400,
1498   NT_ARM_TLS = 0x401,
1499   NT_ARM_HW_BREAK = 0x402,
1500   NT_ARM_HW_WATCH = 0x403,
1501   NT_ARM_SVE = 0x405,
1502   NT_ARM_PAC_MASK = 0x406,
1503 
1504   NT_FILE = 0x46494c45,
1505   NT_PRXFPREG = 0x46e62b7f,
1506   NT_SIGINFO = 0x53494749,
1507 };
1508 
1509 // LLVM-specific notes.
1510 enum {
1511   NT_LLVM_HWASAN_GLOBALS = 3,
1512 };
1513 
1514 // GNU note types.
1515 enum {
1516   NT_GNU_ABI_TAG = 1,
1517   NT_GNU_HWCAP = 2,
1518   NT_GNU_BUILD_ID = 3,
1519   NT_GNU_GOLD_VERSION = 4,
1520   NT_GNU_PROPERTY_TYPE_0 = 5,
1521 };
1522 
1523 // Property types used in GNU_PROPERTY_TYPE_0 notes.
1524 enum : unsigned {
1525   GNU_PROPERTY_STACK_SIZE = 1,
1526   GNU_PROPERTY_NO_COPY_ON_PROTECTED = 2,
1527   GNU_PROPERTY_AARCH64_FEATURE_1_AND = 0xc0000000,
1528   GNU_PROPERTY_X86_FEATURE_1_AND = 0xc0000002,
1529 
1530   GNU_PROPERTY_X86_UINT32_OR_LO = 0xc0008000,
1531   GNU_PROPERTY_X86_FEATURE_2_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 1,
1532   GNU_PROPERTY_X86_ISA_1_NEEDED = GNU_PROPERTY_X86_UINT32_OR_LO + 2,
1533 
1534   GNU_PROPERTY_X86_UINT32_OR_AND_LO = 0xc0010000,
1535   GNU_PROPERTY_X86_FEATURE_2_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1,
1536   GNU_PROPERTY_X86_ISA_1_USED = GNU_PROPERTY_X86_UINT32_OR_AND_LO + 2,
1537 };
1538 
1539 // aarch64 processor feature bits.
1540 enum : unsigned {
1541   GNU_PROPERTY_AARCH64_FEATURE_1_BTI = 1 << 0,
1542   GNU_PROPERTY_AARCH64_FEATURE_1_PAC = 1 << 1,
1543 };
1544 
1545 // x86 processor feature bits.
1546 enum : unsigned {
1547   GNU_PROPERTY_X86_FEATURE_1_IBT = 1 << 0,
1548   GNU_PROPERTY_X86_FEATURE_1_SHSTK = 1 << 1,
1549 
1550   GNU_PROPERTY_X86_FEATURE_2_X86 = 1 << 0,
1551   GNU_PROPERTY_X86_FEATURE_2_X87 = 1 << 1,
1552   GNU_PROPERTY_X86_FEATURE_2_MMX = 1 << 2,
1553   GNU_PROPERTY_X86_FEATURE_2_XMM = 1 << 3,
1554   GNU_PROPERTY_X86_FEATURE_2_YMM = 1 << 4,
1555   GNU_PROPERTY_X86_FEATURE_2_ZMM = 1 << 5,
1556   GNU_PROPERTY_X86_FEATURE_2_FXSR = 1 << 6,
1557   GNU_PROPERTY_X86_FEATURE_2_XSAVE = 1 << 7,
1558   GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT = 1 << 8,
1559   GNU_PROPERTY_X86_FEATURE_2_XSAVEC = 1 << 9,
1560 
1561   GNU_PROPERTY_X86_ISA_1_BASELINE = 1 << 0,
1562   GNU_PROPERTY_X86_ISA_1_V2 = 1 << 1,
1563   GNU_PROPERTY_X86_ISA_1_V3 = 1 << 2,
1564   GNU_PROPERTY_X86_ISA_1_V4 = 1 << 3,
1565 };
1566 
1567 // FreeBSD note types.
1568 enum {
1569   NT_FREEBSD_ABI_TAG = 1,
1570   NT_FREEBSD_NOINIT_TAG = 2,
1571   NT_FREEBSD_ARCH_TAG = 3,
1572   NT_FREEBSD_FEATURE_CTL = 4,
1573 };
1574 
1575 // NT_FREEBSD_FEATURE_CTL values (see FreeBSD's sys/sys/elf_common.h).
1576 enum {
1577   NT_FREEBSD_FCTL_ASLR_DISABLE = 0x00000001,
1578   NT_FREEBSD_FCTL_PROTMAX_DISABLE = 0x00000002,
1579   NT_FREEBSD_FCTL_STKGAP_DISABLE = 0x00000004,
1580   NT_FREEBSD_FCTL_WXNEEDED = 0x00000008,
1581   NT_FREEBSD_FCTL_LA48 = 0x00000010,
1582   NT_FREEBSD_FCTL_ASG_DISABLE = 0x00000020,
1583 };
1584 
1585 // FreeBSD core note types.
1586 enum {
1587   NT_FREEBSD_THRMISC = 7,
1588   NT_FREEBSD_PROCSTAT_PROC = 8,
1589   NT_FREEBSD_PROCSTAT_FILES = 9,
1590   NT_FREEBSD_PROCSTAT_VMMAP = 10,
1591   NT_FREEBSD_PROCSTAT_GROUPS = 11,
1592   NT_FREEBSD_PROCSTAT_UMASK = 12,
1593   NT_FREEBSD_PROCSTAT_RLIMIT = 13,
1594   NT_FREEBSD_PROCSTAT_OSREL = 14,
1595   NT_FREEBSD_PROCSTAT_PSSTRINGS = 15,
1596   NT_FREEBSD_PROCSTAT_AUXV = 16,
1597 };
1598 
1599 // AMDGPU-specific section indices.
1600 enum {
1601   SHN_AMDGPU_LDS = 0xff00, // Variable in LDS; symbol encoded like SHN_COMMON
1602 };
1603 
1604 // AMD vendor specific notes. (Code Object V2)
1605 enum {
1606   NT_AMD_HSA_CODE_OBJECT_VERSION = 1,
1607   NT_AMD_HSA_HSAIL = 2,
1608   NT_AMD_HSA_ISA_VERSION = 3,
1609   // Note types with values between 4 and 9 (inclusive) are reserved.
1610   NT_AMD_HSA_METADATA = 10,
1611   NT_AMD_HSA_ISA_NAME = 11,
1612   NT_AMD_PAL_METADATA = 12
1613 };
1614 
1615 // AMDGPU vendor specific notes. (Code Object V3)
1616 enum {
1617   // Note types with values between 0 and 31 (inclusive) are reserved.
1618   NT_AMDGPU_METADATA = 32
1619 };
1620 
1621 enum {
1622   GNU_ABI_TAG_LINUX = 0,
1623   GNU_ABI_TAG_HURD = 1,
1624   GNU_ABI_TAG_SOLARIS = 2,
1625   GNU_ABI_TAG_FREEBSD = 3,
1626   GNU_ABI_TAG_NETBSD = 4,
1627   GNU_ABI_TAG_SYLLABLE = 5,
1628   GNU_ABI_TAG_NACL = 6,
1629 };
1630 
1631 constexpr const char *ELF_NOTE_GNU = "GNU";
1632 
1633 // Android packed relocation group flags.
1634 enum {
1635   RELOCATION_GROUPED_BY_INFO_FLAG = 1,
1636   RELOCATION_GROUPED_BY_OFFSET_DELTA_FLAG = 2,
1637   RELOCATION_GROUPED_BY_ADDEND_FLAG = 4,
1638   RELOCATION_GROUP_HAS_ADDEND_FLAG = 8,
1639 };
1640 
1641 // Compressed section header for ELF32.
1642 struct Elf32_Chdr {
1643   Elf32_Word ch_type;
1644   Elf32_Word ch_size;
1645   Elf32_Word ch_addralign;
1646 };
1647 
1648 // Compressed section header for ELF64.
1649 struct Elf64_Chdr {
1650   Elf64_Word ch_type;
1651   Elf64_Word ch_reserved;
1652   Elf64_Xword ch_size;
1653   Elf64_Xword ch_addralign;
1654 };
1655 
1656 // Note header for ELF32.
1657 struct Elf32_Nhdr {
1658   Elf32_Word n_namesz;
1659   Elf32_Word n_descsz;
1660   Elf32_Word n_type;
1661 };
1662 
1663 // Note header for ELF64.
1664 struct Elf64_Nhdr {
1665   Elf64_Word n_namesz;
1666   Elf64_Word n_descsz;
1667   Elf64_Word n_type;
1668 };
1669 
1670 // Legal values for ch_type field of compressed section header.
1671 enum {
1672   ELFCOMPRESS_ZLIB = 1,            // ZLIB/DEFLATE algorithm.
1673   ELFCOMPRESS_LOOS = 0x60000000,   // Start of OS-specific.
1674   ELFCOMPRESS_HIOS = 0x6fffffff,   // End of OS-specific.
1675   ELFCOMPRESS_LOPROC = 0x70000000, // Start of processor-specific.
1676   ELFCOMPRESS_HIPROC = 0x7fffffff  // End of processor-specific.
1677 };
1678 
1679 /// Convert an architecture name into ELF's e_machine value.
1680 uint16_t convertArchNameToEMachine(StringRef Arch);
1681 
1682 /// Convert an ELF's e_machine value into an architecture name.
1683 StringRef convertEMachineToArchName(uint16_t EMachine);
1684 
1685 } // end namespace ELF
1686 } // end namespace llvm
1687 
1688 #endif // LLVM_BINARYFORMAT_ELF_H
1689