1;RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2
3;CHECK: MULADD_IEEE * {{T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}
4
5define amdgpu_ps void @test(<4 x float> inreg %reg0) {
6   %r0 = extractelement <4 x float> %reg0, i32 0
7   %r1 = extractelement <4 x float> %reg0, i32 1
8   %r2 = extractelement <4 x float> %reg0, i32 2
9   %r3 = fmul float %r0, %r1
10   %r4 = fadd float %r3, %r2
11   %vec = insertelement <4 x float> undef, float %r4, i32 0
12   call void @llvm.r600.store.swizzle(<4 x float> %vec, i32 0, i32 0)
13   ret void
14}
15
16declare float @fabs(float ) readnone
17declare void @llvm.r600.store.swizzle(<4 x float>, i32, i32)
18