1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s 3 4; Allocate 8 bytes, no need to align stack. 5define void @f0() { 6; CHECK-LABEL: f0: 7; CHECK: # %bb.0: 8; CHECK-NEXT: aghi %r15, -168 9; CHECK-NEXT: .cfi_def_cfa_offset 328 10; CHECK-NEXT: mvghi 160(%r15), 10 11; CHECK-NEXT: aghi %r15, 168 12; CHECK-NEXT: br %r14 13 %x = alloca i64 14 store volatile i64 10, i64* %x 15 ret void 16} 17 18; Allocate %len * 8, no need to align stack. 19define void @f1(i64 %len) { 20; CHECK-LABEL: f1: 21; CHECK: # %bb.0: 22; CHECK-NEXT: stmg %r11, %r15, 88(%r15) 23; CHECK-NEXT: .cfi_offset %r11, -72 24; CHECK-NEXT: .cfi_offset %r15, -40 25; CHECK-NEXT: aghi %r15, -160 26; CHECK-NEXT: .cfi_def_cfa_offset 320 27; CHECK-NEXT: lgr %r11, %r15 28; CHECK-NEXT: .cfi_def_cfa_register %r11 29; CHECK-NEXT: lgr %r1, %r15 30; CHECK-NEXT: sllg %r0, %r2, 3 31; CHECK-NEXT: sgr %r1, %r0 32; CHECK-NEXT: la %r2, 160(%r1) 33; CHECK-NEXT: lgr %r15, %r1 34; CHECK-NEXT: mvghi 0(%r2), 10 35; CHECK-NEXT: lmg %r11, %r15, 248(%r11) 36; CHECK-NEXT: br %r14 37 %x = alloca i64, i64 %len 38 store volatile i64 10, i64* %x 39 ret void 40} 41 42; Static alloca, align 128. 43define void @f2() { 44; CHECK-LABEL: f2: 45; CHECK: # %bb.0: 46; CHECK-NEXT: stmg %r11, %r15, 88(%r15) 47; CHECK-NEXT: .cfi_offset %r11, -72 48; CHECK-NEXT: .cfi_offset %r15, -40 49; CHECK-NEXT: aghi %r15, -160 50; CHECK-NEXT: .cfi_def_cfa_offset 320 51; CHECK-NEXT: lgr %r11, %r15 52; CHECK-NEXT: .cfi_def_cfa_register %r11 53; CHECK-NEXT: lgr %r1, %r15 54; CHECK-NEXT: aghi %r1, -128 55; CHECK-NEXT: la %r2, 280(%r1) 56; CHECK-NEXT: nill %r2, 65408 57; CHECK-NEXT: lgr %r15, %r1 58; CHECK-NEXT: mvghi 0(%r2), 10 59; CHECK-NEXT: lmg %r11, %r15, 248(%r11) 60; CHECK-NEXT: br %r14 61 %x = alloca i64, i64 1, align 128 62 store volatile i64 10, i64* %x, align 128 63 ret void 64} 65 66; Dynamic alloca, align 128. 67define void @f3(i64 %len) { 68; CHECK-LABEL: f3: 69; CHECK: # %bb.0: 70; CHECK-NEXT: stmg %r11, %r15, 88(%r15) 71; CHECK-NEXT: .cfi_offset %r11, -72 72; CHECK-NEXT: .cfi_offset %r15, -40 73; CHECK-NEXT: aghi %r15, -160 74; CHECK-NEXT: .cfi_def_cfa_offset 320 75; CHECK-NEXT: lgr %r11, %r15 76; CHECK-NEXT: .cfi_def_cfa_register %r11 77; CHECK-NEXT: lgr %r1, %r15 78; CHECK-NEXT: sllg %r0, %r2, 3 79; CHECK-NEXT: sgr %r1, %r0 80; CHECK-NEXT: lay %r15, -120(%r1) 81; CHECK-NEXT: la %r1, 160(%r1) 82; CHECK-NEXT: nill %r1, 65408 83; CHECK-NEXT: mvghi 0(%r1), 10 84; CHECK-NEXT: lmg %r11, %r15, 248(%r11) 85; CHECK-NEXT: br %r14 86 %x = alloca i64, i64 %len, align 128 87 store volatile i64 10, i64* %x, align 128 88 ret void 89} 90 91; Static alloca w/out alignment - part of frame. 92define void @f4() { 93; CHECK-LABEL: f4: 94; CHECK: # %bb.0: 95; CHECK-NEXT: aghi %r15, -168 96; CHECK-NEXT: .cfi_def_cfa_offset 328 97; CHECK-NEXT: mvhi 164(%r15), 10 98; CHECK-NEXT: aghi %r15, 168 99; CHECK-NEXT: br %r14 100 %x = alloca i32 101 store volatile i32 10, i32* %x 102 ret void 103} 104 105; Static alloca of one i32, aligned by 128. 106define void @f5() { 107; CHECK-LABEL: f5: 108; CHECK: # %bb.0: 109; CHECK-NEXT: stmg %r11, %r15, 88(%r15) 110; CHECK-NEXT: .cfi_offset %r11, -72 111; CHECK-NEXT: .cfi_offset %r15, -40 112; CHECK-NEXT: aghi %r15, -160 113; CHECK-NEXT: .cfi_def_cfa_offset 320 114; CHECK-NEXT: lgr %r11, %r15 115; CHECK-NEXT: .cfi_def_cfa_register %r11 116; CHECK-NEXT: lgr %r1, %r15 117; CHECK-NEXT: aghi %r1, -128 118; CHECK-NEXT: la %r2, 280(%r1) 119; CHECK-NEXT: nill %r2, 65408 120; CHECK-NEXT: lgr %r15, %r1 121; CHECK-NEXT: mvhi 0(%r2), 10 122; CHECK-NEXT: lmg %r11, %r15, 248(%r11) 123; CHECK-NEXT: br %r14 124 %x = alloca i32, i64 1, align 128 125 store volatile i32 10, i32* %x 126 ret void 127} 128