1 /* tc-cris.c -- Assembler code for the CRIS CPU core.
2 Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3
4 Contributed by Axis Communications AB, Lund, Sweden.
5 Originally written for GAS 1.38.1 by Mikael Asker.
6 Updates, BFDizing, GNUifying and ELF support by Hans-Peter Nilsson.
7
8 This file is part of GAS, the GNU Assembler.
9
10 GAS is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
14
15 GAS is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GAS; see the file COPYING. If not, write to the
22 Free Software Foundation, 59 Temple Place - Suite 330, Boston,
23 MA 02111-1307, USA. */
24
25 #include <stdio.h>
26 #include "as.h"
27 #include "safe-ctype.h"
28 #include "subsegs.h"
29 #include "opcode/cris.h"
30 #include "dwarf2dbg.h"
31
32 /* Conventions used here:
33 Generally speaking, pointers to binutils types such as "fragS" and
34 "expressionS" get parameter and variable names ending in "P", such as
35 "fragP", to harmonize with the rest of the binutils code. Other
36 pointers get a "p" suffix, such as "bufp". Any function or type-name
37 that could clash with a current or future binutils or GAS function get
38 a "cris_" prefix. */
39
40 #define SYNTAX_RELAX_REG_PREFIX "no_register_prefix"
41 #define SYNTAX_ENFORCE_REG_PREFIX "register_prefix"
42 #define SYNTAX_USER_SYM_LEADING_UNDERSCORE "leading_underscore"
43 #define SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE "no_leading_underscore"
44 #define REGISTER_PREFIX_CHAR '$'
45
46 /* True for expressions where getting X_add_symbol and X_add_number is
47 enough to get the "base" and "offset"; no need to make_expr_symbol.
48 It's not enough to check if X_op_symbol is NULL; that misses unary
49 operations like O_uminus. */
50 #define SIMPLE_EXPR(EXP) \
51 ((EXP)->X_op == O_constant || (EXP)->X_op == O_symbol)
52
53 /* Like in ":GOT", ":GOTOFF" etc. Other ports use '@', but that's in
54 line_separator_chars for CRIS, so we avoid it. */
55 #define PIC_SUFFIX_CHAR ':'
56
57 /* This might be CRIS_INSN_NONE if we're assembling a prefix-insn only.
58 Note that some prefix-insns might be assembled as CRIS_INSN_NORMAL. */
59 enum cris_insn_kind
60 {
61 CRIS_INSN_NORMAL, CRIS_INSN_NONE, CRIS_INSN_BRANCH, CRIS_INSN_MUL
62 };
63
64 /* An instruction will have one of these prefixes.
65 Although the same bit-pattern, we handle BDAP with an immediate
66 expression (eventually quick or [pc+]) different from when we only have
67 register expressions. */
68 enum prefix_kind
69 {
70 PREFIX_NONE, PREFIX_BDAP_IMM, PREFIX_BDAP, PREFIX_BIAP, PREFIX_DIP,
71 PREFIX_PUSH
72 };
73
74 /* The prefix for an instruction. */
75 struct cris_prefix
76 {
77 enum prefix_kind kind;
78 int base_reg_number;
79 unsigned int opcode;
80
81 /* There might be an expression to be evaluated, like I in [rN+I]. */
82 expressionS expr;
83
84 /* If there's an expression, we might need a relocation. Here's the
85 type of what relocation to start relaxaton with.
86 The relocation is assumed to start immediately after the prefix insn,
87 so we don't provide an offset. */
88 enum bfd_reloc_code_real reloc;
89 };
90
91 /* The description of the instruction being assembled. */
92 struct cris_instruction
93 {
94 /* If CRIS_INSN_NONE, then this insn is of zero length. */
95 enum cris_insn_kind insn_type;
96
97 /* If a special register was mentioned, this is its description, else
98 it is NULL. */
99 const struct cris_spec_reg *spec_reg;
100
101 unsigned int opcode;
102
103 /* An insn may have at most one expression; theoretically there could be
104 another in its prefix (but I don't see how that could happen). */
105 expressionS expr;
106
107 /* The expression might need a relocation. Here's one to start
108 relaxation with. */
109 enum bfd_reloc_code_real reloc;
110
111 /* The size in bytes of an immediate expression, or zero if
112 nonapplicable. */
113 int imm_oprnd_size;
114 };
115
116 static void cris_process_instruction PARAMS ((char *,
117 struct cris_instruction *,
118 struct cris_prefix *));
119 static int get_bwd_size_modifier PARAMS ((char **, int *));
120 static int get_bw_size_modifier PARAMS ((char **, int *));
121 static int get_gen_reg PARAMS ((char **, int *));
122 static int get_spec_reg PARAMS ((char **,
123 const struct cris_spec_reg **));
124 static int get_autoinc_prefix_or_indir_op PARAMS ((char **,
125 struct cris_prefix *,
126 int *, int *, int *,
127 expressionS *));
128 static int get_3op_or_dip_prefix_op PARAMS ((char **,
129 struct cris_prefix *));
130 static int cris_get_expression PARAMS ((char **, expressionS *));
131 static int get_flags PARAMS ((char **, int *));
132 static void gen_bdap PARAMS ((int, expressionS *));
133 static int branch_disp PARAMS ((int));
134 static void gen_cond_branch_32 PARAMS ((char *, char *, fragS *,
135 symbolS *, symbolS *, long int));
136 static void cris_number_to_imm PARAMS ((char *, long, int, fixS *, segT));
137 static void cris_create_short_jump PARAMS ((char *, addressT, addressT,
138 fragS *, symbolS *));
139 static void s_syntax PARAMS ((int));
140 static void s_cris_file PARAMS ((int));
141 static void s_cris_loc PARAMS ((int));
142
143 /* Get ":GOT", ":GOTOFF", ":PLT" etc. suffixes. */
144 static void cris_get_pic_suffix PARAMS ((char **,
145 bfd_reloc_code_real_type *,
146 expressionS *));
147 static unsigned int cris_get_pic_reloc_size
148 PARAMS ((bfd_reloc_code_real_type));
149
150 /* All the .syntax functions. */
151 static void cris_force_reg_prefix PARAMS ((void));
152 static void cris_relax_reg_prefix PARAMS ((void));
153 static void cris_sym_leading_underscore PARAMS ((void));
154 static void cris_sym_no_leading_underscore PARAMS ((void));
155 static char *cris_insn_first_word_frag PARAMS ((void));
156
157 /* Handle to the opcode hash table. */
158 static struct hash_control *op_hash = NULL;
159
160 /* If we target cris-axis-linux-gnu (as opposed to generic cris-axis-elf),
161 we default to no underscore and required register-prefixes. The
162 difference is in the default values. */
163 #ifdef TE_LINUX
164 #define DEFAULT_CRIS_AXIS_LINUX_GNU TRUE
165 #else
166 #define DEFAULT_CRIS_AXIS_LINUX_GNU FALSE
167 #endif
168
169 /* Whether we demand that registers have a `$' prefix. Default here. */
170 static bfd_boolean demand_register_prefix = DEFAULT_CRIS_AXIS_LINUX_GNU;
171
172 /* Whether global user symbols have a leading underscore. Default here. */
173 static bfd_boolean symbols_have_leading_underscore
174 = !DEFAULT_CRIS_AXIS_LINUX_GNU;
175
176 /* Whether or not we allow PIC, and expand to PIC-friendly constructs. */
177 static bfd_boolean pic = FALSE;
178
179 const pseudo_typeS md_pseudo_table[] =
180 {
181 {"dword", cons, 4},
182 {"syntax", s_syntax, 0},
183 {"file", s_cris_file, 0},
184 {"loc", s_cris_loc, 0},
185 {NULL, 0, 0}
186 };
187
188 static int warn_for_branch_expansion = 0;
189
190 /* Whether to emit error when a MULS/MULU could be located last on a
191 cache-line. */
192 static int err_for_dangerous_mul_placement = 1;
193
194 const char cris_comment_chars[] = ";";
195
196 /* This array holds the chars that only start a comment at the beginning of
197 a line. If the line seems to have the form '# 123 filename'
198 .line and .file directives will appear in the pre-processed output. */
199 /* Note that input_file.c hand-checks for '#' at the beginning of the
200 first line of the input file. This is because the compiler outputs
201 #NO_APP at the beginning of its output. */
202 /* Also note that slash-star will always start a comment. */
203 const char line_comment_chars[] = "#";
204 const char line_separator_chars[] = "@";
205
206 /* Now all floating point support is shut off. See md_atof. */
207 const char EXP_CHARS[] = "";
208 const char FLT_CHARS[] = "";
209
210 /* For CRIS, we encode the relax_substateTs (in e.g. fr_substate) as:
211 2 1 0
212 ---/ /--+-----------------+-----------------+-----------------+
213 | what state ? | how long ? |
214 ---/ /--+-----------------+-----------------+-----------------+
215
216 The "how long" bits are 00 = byte, 01 = word, 10 = dword (long).
217 This is a Un*x convention.
218 Not all lengths are legit for a given value of (what state).
219
220 Groups for CRIS address relaxing:
221
222 1. Bcc
223 length: byte, word, 10-byte expansion
224
225 2. BDAP
226 length: byte, word, dword
227
228 3. MULS/MULU
229 Not really a relaxation (no infrastructure to get delay-slots
230 right), just an alignment and placement checker for the v10
231 multiply/cache-bug. */
232
233 #define STATE_CONDITIONAL_BRANCH (1)
234 #define STATE_BASE_PLUS_DISP_PREFIX (2)
235 #define STATE_MUL (3)
236
237 #define STATE_LENGTH_MASK (3)
238 #define STATE_BYTE (0)
239 #define STATE_WORD (1)
240 #define STATE_DWORD (2)
241 /* Symbol undefined. */
242 #define STATE_UNDF (3)
243 #define STATE_MAX_LENGTH (3)
244
245 /* These displacements are relative to the address following the opcode
246 word of the instruction. The first letter is Byte, Word. The 2nd
247 letter is Forward, Backward. */
248
249 #define BRANCH_BF ( 254)
250 #define BRANCH_BB (-256)
251 #define BRANCH_WF (2 + 32767)
252 #define BRANCH_WB (2 + -32768)
253
254 #define BDAP_BF ( 127)
255 #define BDAP_BB (-128)
256 #define BDAP_WF ( 32767)
257 #define BDAP_WB (-32768)
258
259 #define ENCODE_RELAX(what, length) (((what) << 2) + (length))
260
261 const relax_typeS md_cris_relax_table[] =
262 {
263 /* Error sentinel (0, 0). */
264 {1, 1, 0, 0},
265
266 /* Unused (0, 1). */
267 {1, 1, 0, 0},
268
269 /* Unused (0, 2). */
270 {1, 1, 0, 0},
271
272 /* Unused (0, 3). */
273 {1, 1, 0, 0},
274
275 /* Bcc o (1, 0). */
276 {BRANCH_BF, BRANCH_BB, 0, ENCODE_RELAX (1, 1)},
277
278 /* Bcc [PC+] (1, 1). */
279 {BRANCH_WF, BRANCH_WB, 2, ENCODE_RELAX (1, 2)},
280
281 /* BEXT/BWF, BA, JUMP (external), JUMP (always), Bnot_cc, JUMP (default)
282 (1, 2). */
283 {0, 0, 10, 0},
284
285 /* Unused (1, 3). */
286 {1, 1, 0, 0},
287
288 /* BDAP o (2, 0). */
289 {BDAP_BF, BDAP_BB, 0, ENCODE_RELAX (2, 1)},
290
291 /* BDAP.[bw] [PC+] (2, 1). */
292 {BDAP_WF, BDAP_WB, 2, ENCODE_RELAX (2, 2)},
293
294 /* BDAP.d [PC+] (2, 2). */
295 {0, 0, 4, 0},
296
297 /* Unused (2, 3). */
298 {0, 0, 0, 0},
299
300 /* MULS/MULU (3, 0). Positions (3, 1..3) are unused. */
301 {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}, {0, 0, 0, 0}
302 };
303
304 #undef BRANCH_BF
305 #undef BRANCH_BB
306 #undef BRANCH_WF
307 #undef BRANCH_WB
308 #undef BDAP_BF
309 #undef BDAP_BB
310 #undef BDAP_WF
311 #undef BDAP_WB
312
313 /* Target-specific multicharacter options, not const-declared at usage
314 in 2.9.1 and CVS of 2000-02-16. */
315 struct option md_longopts[] =
316 {
317 #define OPTION_NO_US (OPTION_MD_BASE + 0)
318 {"no-underscore", no_argument, NULL, OPTION_NO_US},
319 #define OPTION_US (OPTION_MD_BASE + 1)
320 {"underscore", no_argument, NULL, OPTION_US},
321 #define OPTION_PIC (OPTION_MD_BASE + 2)
322 {"pic", no_argument, NULL, OPTION_PIC},
323 #define OPTION_MULBUG_ABORT_ON (OPTION_MD_BASE + 3)
324 {"mul-bug-abort", no_argument, NULL, OPTION_MULBUG_ABORT_ON},
325 #define OPTION_MULBUG_ABORT_OFF (OPTION_MD_BASE + 4)
326 {"no-mul-bug-abort", no_argument, NULL, OPTION_MULBUG_ABORT_OFF},
327 {NULL, no_argument, NULL, 0}
328 };
329
330 /* Not const-declared at usage in 2.9.1. */
331 size_t md_longopts_size = sizeof (md_longopts);
332 const char *md_shortopts = "hHN";
333
334 /* At first glance, this may seems wrong and should be 4 (ba + nop); but
335 since a short_jump must skip a *number* of long jumps, it must also be
336 a long jump. Here, we hope to make it a "ba [16bit_offs]" and a "nop"
337 for the delay slot and hope that the jump table at most needs
338 32767/4=8191 long-jumps. A branch is better than a jump, since it is
339 relative; we will not have a reloc to fix up somewhere.
340
341 Note that we can't add relocs, because relaxation uses these fixed
342 numbers, and md_create_short_jump is called after relaxation. */
343
344 const int md_short_jump_size = 6;
345 const int md_long_jump_size = 6;
346
347 /* Report output format. Small changes in output format (like elf
348 variants below) can happen until all options are parsed, but after
349 that, the output format must remain fixed. */
350
351 const char *
cris_target_format()352 cris_target_format ()
353 {
354 switch (OUTPUT_FLAVOR)
355 {
356 case bfd_target_aout_flavour:
357 return "a.out-cris";
358
359 case bfd_target_elf_flavour:
360 if (symbols_have_leading_underscore)
361 return "elf32-us-cris";
362 return "elf32-cris";
363
364 default:
365 abort ();
366 return NULL;
367 }
368 }
369
370 /* We need a port-specific relaxation function to cope with sym2 - sym1
371 relative expressions with both symbols in the same segment (but not
372 necessarily in the same frag as this insn), for example:
373 move.d [pc+sym2-(sym1-2)],r10
374 sym1:
375 The offset can be 8, 16 or 32 bits long. */
376
377 long
cris_relax_frag(seg,fragP,stretch)378 cris_relax_frag (seg, fragP, stretch)
379 segT seg ATTRIBUTE_UNUSED;
380 fragS *fragP;
381 long stretch ATTRIBUTE_UNUSED;
382 {
383 long growth;
384 offsetT aim = 0;
385 symbolS *symbolP;
386 const relax_typeS *this_type;
387 const relax_typeS *start_type;
388 relax_substateT next_state;
389 relax_substateT this_state;
390 const relax_typeS *table = TC_GENERIC_RELAX_TABLE;
391
392 /* We only have to cope with frags as prepared by
393 md_estimate_size_before_relax. The dword cases may get here
394 because of the different reasons that they aren't relaxable. */
395 switch (fragP->fr_subtype)
396 {
397 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
398 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
399 /* When we get to these states, the frag won't grow any more. */
400 return 0;
401
402 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
403 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
404 if (fragP->fr_symbol == NULL
405 || S_GET_SEGMENT (fragP->fr_symbol) != absolute_section)
406 as_fatal (_("internal inconsistency problem in %s: fr_symbol %lx"),
407 __FUNCTION__, (long) fragP->fr_symbol);
408 symbolP = fragP->fr_symbol;
409 if (symbol_resolved_p (symbolP))
410 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
411 __FUNCTION__);
412 aim = S_GET_VALUE (symbolP);
413 break;
414
415 case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
416 /* Nothing to do here. */
417 return 0;
418
419 default:
420 as_fatal (_("internal inconsistency problem in %s: fr_subtype %d"),
421 __FUNCTION__, fragP->fr_subtype);
422 }
423
424 /* The rest is stolen from relax_frag. There's no obvious way to
425 share the code, but fortunately no requirement to keep in sync as
426 long as fragP->fr_symbol does not have its segment changed. */
427
428 this_state = fragP->fr_subtype;
429 start_type = this_type = table + this_state;
430
431 if (aim < 0)
432 {
433 /* Look backwards. */
434 for (next_state = this_type->rlx_more; next_state;)
435 if (aim >= this_type->rlx_backward)
436 next_state = 0;
437 else
438 {
439 /* Grow to next state. */
440 this_state = next_state;
441 this_type = table + this_state;
442 next_state = this_type->rlx_more;
443 }
444 }
445 else
446 {
447 /* Look forwards. */
448 for (next_state = this_type->rlx_more; next_state;)
449 if (aim <= this_type->rlx_forward)
450 next_state = 0;
451 else
452 {
453 /* Grow to next state. */
454 this_state = next_state;
455 this_type = table + this_state;
456 next_state = this_type->rlx_more;
457 }
458 }
459
460 growth = this_type->rlx_length - start_type->rlx_length;
461 if (growth != 0)
462 fragP->fr_subtype = this_state;
463 return growth;
464 }
465
466 /* Prepare machine-dependent frags for relaxation.
467
468 Called just before relaxation starts. Any symbol that is now undefined
469 will not become defined.
470
471 Return the correct fr_subtype in the frag.
472
473 Return the initial "guess for fr_var" to caller. The guess for fr_var
474 is *actually* the growth beyond fr_fix. Whatever we do to grow fr_fix
475 or fr_var contributes to our returned value.
476
477 Although it may not be explicit in the frag, pretend
478 fr_var starts with a value. */
479
480 int
md_estimate_size_before_relax(fragP,segment_type)481 md_estimate_size_before_relax (fragP, segment_type)
482 fragS *fragP;
483 /* The segment is either N_DATA or N_TEXT. */
484 segT segment_type;
485 {
486 int old_fr_fix;
487
488 old_fr_fix = fragP->fr_fix;
489
490 switch (fragP->fr_subtype)
491 {
492 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_UNDF):
493 if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
494 /* The symbol lies in the same segment - a relaxable case. */
495 fragP->fr_subtype
496 = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE);
497 else
498 /* Unknown or not the same segment, so not relaxable. */
499 fragP->fr_subtype
500 = ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD);
501 fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
502 break;
503
504 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF):
505 /* Note that we can not do anything sane with relaxing
506 [rX + a_known_symbol_in_text], it will have to be a 32-bit
507 value.
508
509 We could play tricks with managing a constant pool and make
510 a_known_symbol_in_text a "bdap [pc + offset]" pointing there
511 (like the GOT for ELF shared libraries), but that's no use, it
512 would in general be no shorter or faster code, only more
513 complicated. */
514
515 if (S_GET_SEGMENT (fragP->fr_symbol) != absolute_section)
516 {
517 /* Go for dword if not absolute or same segment. */
518 fragP->fr_subtype
519 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD);
520 fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
521 }
522 else if (!symbol_resolved_p (fragP->fr_symbol))
523 {
524 /* The symbol will eventually be completely resolved as an
525 absolute expression, but right now it depends on the result
526 of relaxation and we don't know anything else about the
527 value. We start relaxation with the assumption that it'll
528 fit in a byte. */
529 fragP->fr_subtype
530 = ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE);
531 fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
532 }
533 else
534 {
535 /* Absolute expression. */
536 long int value;
537 value = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
538
539 if (value >= -128 && value <= 127)
540 {
541 /* Byte displacement. */
542 (fragP->fr_opcode)[0] = value;
543 }
544 else
545 {
546 /* Word or dword displacement. */
547 int pow2_of_size = 1;
548 char *writep;
549
550 if (value < -32768 || value > 32767)
551 {
552 /* Outside word range, make it a dword. */
553 pow2_of_size = 2;
554 }
555
556 /* Modify the byte-offset BDAP into a word or dword offset
557 BDAP. Or really, a BDAP rX,8bit into a
558 BDAP.[wd] rX,[PC+] followed by a word or dword. */
559 (fragP->fr_opcode)[0] = BDAP_PC_LOW + pow2_of_size * 16;
560
561 /* Keep the register number in the highest four bits. */
562 (fragP->fr_opcode)[1] &= 0xF0;
563 (fragP->fr_opcode)[1] |= BDAP_INCR_HIGH;
564
565 /* It grew by two or four bytes. */
566 fragP->fr_fix += 1 << pow2_of_size;
567 writep = fragP->fr_literal + old_fr_fix;
568 md_number_to_chars (writep, value, 1 << pow2_of_size);
569 }
570 frag_wane (fragP);
571 }
572 break;
573
574 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
575 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
576 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
577 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
578 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
579 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
580 /* When relaxing a section for the second time, we don't need to
581 do anything except making sure that fr_var is set right. */
582 fragP->fr_var = md_cris_relax_table[fragP->fr_subtype].rlx_length;
583 break;
584
585 case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
586 /* Nothing to do here. */
587 break;
588
589 default:
590 BAD_CASE (fragP->fr_subtype);
591 }
592
593 return fragP->fr_var + (fragP->fr_fix - old_fr_fix);
594 }
595
596 /* Perform post-processing of machine-dependent frags after relaxation.
597 Called after relaxation is finished.
598 In: Address of frag.
599 fr_type == rs_machine_dependent.
600 fr_subtype is what the address relaxed to.
601
602 Out: Any fixS:s and constants are set up.
603
604 The caller will turn the frag into a ".space 0". */
605
606 void
md_convert_frag(abfd,sec,fragP)607 md_convert_frag (abfd, sec, fragP)
608 bfd *abfd ATTRIBUTE_UNUSED;
609 segT sec ATTRIBUTE_UNUSED;
610 fragS *fragP;
611 {
612 /* Pointer to first byte in variable-sized part of the frag. */
613 char *var_partp;
614
615 /* Pointer to first opcode byte in frag. */
616 char *opcodep;
617
618 /* Used to check integrity of the relaxation.
619 One of 2 = long, 1 = word, or 0 = byte. */
620 int length_code;
621
622 /* Size in bytes of variable-sized part of frag. */
623 int var_part_size = 0;
624
625 /* This is part of *fragP. It contains all information about addresses
626 and offsets to varying parts. */
627 symbolS *symbolP;
628 unsigned long var_part_offset;
629
630 /* Where, in file space, is _var of *fragP? */
631 unsigned long address_of_var_part = 0;
632
633 /* Where, in file space, does addr point? */
634 unsigned long target_address;
635
636 know (fragP->fr_type == rs_machine_dependent);
637
638 length_code = fragP->fr_subtype & STATE_LENGTH_MASK;
639 know (length_code >= 0 && length_code < STATE_MAX_LENGTH);
640
641 var_part_offset = fragP->fr_fix;
642 var_partp = fragP->fr_literal + var_part_offset;
643 opcodep = fragP->fr_opcode;
644
645 symbolP = fragP->fr_symbol;
646 target_address = (symbolP ? S_GET_VALUE (symbolP) : 0) + fragP->fr_offset;
647 address_of_var_part = fragP->fr_address + var_part_offset;
648
649 switch (fragP->fr_subtype)
650 {
651 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_BYTE):
652 opcodep[0] = branch_disp ((target_address - address_of_var_part));
653 var_part_size = 0;
654 break;
655
656 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_WORD):
657 /* We had a quick immediate branch, now turn it into a word one i.e. a
658 PC autoincrement. */
659 opcodep[0] = BRANCH_PC_LOW;
660 opcodep[1] &= 0xF0;
661 opcodep[1] |= BRANCH_INCR_HIGH;
662 md_number_to_chars (var_partp,
663 (long) (target_address - (address_of_var_part + 2)),
664 2);
665 var_part_size = 2;
666 break;
667
668 case ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, STATE_DWORD):
669 gen_cond_branch_32 (fragP->fr_opcode, var_partp, fragP,
670 fragP->fr_symbol, (symbolS *) NULL,
671 fragP->fr_offset);
672 /* Ten bytes added: a branch, nop and a jump. */
673 var_part_size = 2 + 2 + 4 + 2;
674 break;
675
676 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_BYTE):
677 if (symbolP == NULL)
678 as_fatal (_("internal inconsistency in %s: bdapq no symbol"),
679 __FUNCTION__);
680 opcodep[0] = S_GET_VALUE (symbolP);
681 var_part_size = 0;
682 break;
683
684 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_WORD):
685 /* We had a BDAP 8-bit "quick immediate", now turn it into a 16-bit
686 one that uses PC autoincrement. */
687 opcodep[0] = BDAP_PC_LOW + (1 << 4);
688 opcodep[1] &= 0xF0;
689 opcodep[1] |= BDAP_INCR_HIGH;
690 if (symbolP == NULL)
691 as_fatal (_("internal inconsistency in %s: bdap.w with no symbol"),
692 __FUNCTION__);
693 md_number_to_chars (var_partp, S_GET_VALUE (symbolP), 2);
694 var_part_size = 2;
695 break;
696
697 case ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_DWORD):
698 /* We had a BDAP 16-bit "word", change the offset to a dword. */
699 opcodep[0] = BDAP_PC_LOW + (2 << 4);
700 opcodep[1] &= 0xF0;
701 opcodep[1] |= BDAP_INCR_HIGH;
702 if (fragP->fr_symbol == NULL)
703 md_number_to_chars (var_partp, fragP->fr_offset, 4);
704 else
705 fix_new (fragP, var_partp - fragP->fr_literal, 4, fragP->fr_symbol,
706 fragP->fr_offset, 0, BFD_RELOC_32);
707 var_part_size = 4;
708 break;
709
710 case ENCODE_RELAX (STATE_MUL, STATE_BYTE):
711 /* This is the only time we check position and aligmnent of the
712 placement-tracking frag. */
713 if (sec->alignment_power < 2)
714 as_bad_where (fragP->fr_file, fragP->fr_line,
715 _("section alignment must be >= 4 bytes to check MULS/MULU safeness"));
716 else
717 {
718 /* If the address after the MULS/MULU has alignment which is
719 that of the section and may be that of a cache-size of the
720 buggy versions, then the MULS/MULU can be placed badly. */
721 if ((address_of_var_part
722 & ((1 << sec->alignment_power) - 1) & 31) == 0)
723 as_bad_where (fragP->fr_file, fragP->fr_line,
724 _("dangerous MULS/MULU location; give it higher alignment"));
725 }
726 break;
727
728 default:
729 BAD_CASE (fragP->fr_subtype);
730 break;
731 }
732
733 fragP->fr_fix += var_part_size;
734 }
735
736 /* Generate a short jump around a secondary jump table.
737 Used by md_create_long_jump.
738
739 This used to be md_create_short_jump, but is now called from
740 md_create_long_jump instead, when sufficient.
741 since the sizes of the jumps are the same. It used to be brittle,
742 making possibilities for creating bad code. */
743
744 static void
cris_create_short_jump(storep,from_addr,to_addr,fragP,to_symbol)745 cris_create_short_jump (storep, from_addr, to_addr, fragP, to_symbol)
746 char *storep;
747 addressT from_addr;
748 addressT to_addr;
749 fragS *fragP ATTRIBUTE_UNUSED;
750 symbolS *to_symbol ATTRIBUTE_UNUSED;
751 {
752 long int distance;
753
754 distance = to_addr - from_addr;
755
756 if (-254 <= distance && distance <= 256)
757 {
758 /* Create a "short" short jump: "BA distance - 2". */
759 storep[0] = branch_disp (distance - 2);
760 storep[1] = BA_QUICK_HIGH;
761
762 /* A nop for the delay slot. */
763 md_number_to_chars (storep + 2, NOP_OPCODE, 2);
764
765 /* The extra word should be filled with something sane too. Make it
766 a nop to keep disassembly sane. */
767 md_number_to_chars (storep + 4, NOP_OPCODE, 2);
768 }
769 else
770 {
771 /* Make it a "long" short jump: "BA (PC+)". */
772 md_number_to_chars (storep, BA_PC_INCR_OPCODE, 2);
773
774 /* ".WORD distance - 4". */
775 md_number_to_chars (storep + 2, (long) (distance - 4), 2);
776
777 /* A nop for the delay slot. */
778 md_number_to_chars (storep + 4, NOP_OPCODE, 2);
779 }
780 }
781
782 /* Generate a long jump in a secondary jump table.
783
784 storep Where to store the jump instruction.
785 from_addr Address of the jump instruction.
786 to_addr Destination address of the jump.
787 fragP Which frag the destination address operand
788 lies in.
789 to_symbol Destination symbol. */
790
791 void
md_create_long_jump(storep,from_addr,to_addr,fragP,to_symbol)792 md_create_long_jump (storep, from_addr, to_addr, fragP, to_symbol)
793 char *storep;
794 addressT from_addr;
795 addressT to_addr;
796 fragS *fragP;
797 symbolS *to_symbol;
798 {
799 long int distance;
800
801 distance = to_addr - from_addr;
802
803 if (-32763 <= distance && distance <= 32772)
804 {
805 /* Then make it a "short" long jump. */
806 cris_create_short_jump (storep, from_addr, to_addr, fragP,
807 to_symbol);
808 }
809 else
810 {
811 /* We have a "long" long jump: "JUMP [PC+]".
812 Make it an "ADD [PC+],PC" if we're supposed to emit PIC code. */
813 md_number_to_chars (storep,
814 pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2);
815
816 /* Follow with a ".DWORD to_addr", PC-relative for PIC. */
817 fix_new (fragP, storep + 2 - fragP->fr_literal, 4, to_symbol,
818 0, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32);
819 }
820 }
821
822 /* Allocate space for the first piece of an insn, and mark it as the
823 start of the insn for debug-format use. */
824
825 static char *
cris_insn_first_word_frag()826 cris_insn_first_word_frag ()
827 {
828 char *insnp = frag_more (2);
829
830 /* We need to mark the start of the insn by passing dwarf2_emit_insn
831 the offset from the current fragment position. This must be done
832 after the first fragment is created but before any other fragments
833 (fixed or varying) are created. Note that the offset only
834 corresponds to the "size" of the insn for a fixed-size,
835 non-expanded insn. */
836 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
837 dwarf2_emit_insn (2);
838
839 return insnp;
840 }
841
842 /* Port-specific assembler initialization. */
843
844 void
md_begin()845 md_begin ()
846 {
847 const char *hashret = NULL;
848 int i = 0;
849
850 /* Set up a hash table for the instructions. */
851 op_hash = hash_new ();
852 if (op_hash == NULL)
853 as_fatal (_("Virtual memory exhausted"));
854
855 while (cris_opcodes[i].name != NULL)
856 {
857 const char *name = cris_opcodes[i].name;
858 hashret = hash_insert (op_hash, name, (PTR) &cris_opcodes[i]);
859
860 if (hashret != NULL && *hashret != '\0')
861 as_fatal (_("Can't hash `%s': %s\n"), cris_opcodes[i].name,
862 *hashret == 0 ? _("(unknown reason)") : hashret);
863 do
864 {
865 if (cris_opcodes[i].match & cris_opcodes[i].lose)
866 as_fatal (_("Buggy opcode: `%s' \"%s\"\n"), cris_opcodes[i].name,
867 cris_opcodes[i].args);
868
869 ++i;
870 }
871 while (cris_opcodes[i].name != NULL
872 && strcmp (cris_opcodes[i].name, name) == 0);
873 }
874 }
875
876 /* Assemble a source line. */
877
878 void
md_assemble(str)879 md_assemble (str)
880 char *str;
881 {
882 struct cris_instruction output_instruction;
883 struct cris_prefix prefix;
884 char *opcodep;
885 char *p;
886
887 know (str);
888
889 /* Do the low-level grunt - assemble to bits and split up into a prefix
890 and ordinary insn. */
891 cris_process_instruction (str, &output_instruction, &prefix);
892
893 /* Handle any prefixes to the instruction. */
894 switch (prefix.kind)
895 {
896 case PREFIX_NONE:
897 break;
898
899 /* When the expression is unknown for a BDAP, it can need 0, 2 or 4
900 extra bytes, so we handle it separately. */
901 case PREFIX_BDAP_IMM:
902 /* We only do it if the relocation is unspecified, i.e. not a PIC
903 relocation. */
904 if (prefix.reloc == BFD_RELOC_NONE)
905 {
906 gen_bdap (prefix.base_reg_number, &prefix.expr);
907 break;
908 }
909 /* Fall through. */
910 case PREFIX_BDAP:
911 case PREFIX_BIAP:
912 case PREFIX_DIP:
913 opcodep = cris_insn_first_word_frag ();
914
915 /* Output the prefix opcode. */
916 md_number_to_chars (opcodep, (long) prefix.opcode, 2);
917
918 /* Having a specified reloc only happens for DIP and for BDAP with
919 PIC operands, but it is ok to drop through here for the other
920 prefixes as they can have no relocs specified. */
921 if (prefix.reloc != BFD_RELOC_NONE)
922 {
923 unsigned int relocsize
924 = (prefix.kind == PREFIX_DIP
925 ? 4 : cris_get_pic_reloc_size (prefix.reloc));
926
927 p = frag_more (relocsize);
928 fix_new_exp (frag_now, (p - frag_now->fr_literal), relocsize,
929 &prefix.expr, 0, prefix.reloc);
930 }
931 break;
932
933 case PREFIX_PUSH:
934 opcodep = cris_insn_first_word_frag ();
935
936 /* Output the prefix opcode. Being a "push", we add the negative
937 size of the register to "sp". */
938 if (output_instruction.spec_reg != NULL)
939 {
940 /* Special register. */
941 opcodep[0] = -output_instruction.spec_reg->reg_size;
942 }
943 else
944 {
945 /* General register. */
946 opcodep[0] = -4;
947 }
948 opcodep[1] = (REG_SP << 4) + (BDAP_QUICK_OPCODE >> 8);
949 break;
950
951 default:
952 BAD_CASE (prefix.kind);
953 }
954
955 /* If we only had a prefix insn, we're done. */
956 if (output_instruction.insn_type == CRIS_INSN_NONE)
957 return;
958
959 /* Done with the prefix. Continue with the main instruction. */
960 if (prefix.kind == PREFIX_NONE)
961 opcodep = cris_insn_first_word_frag ();
962 else
963 opcodep = frag_more (2);
964
965 /* Output the instruction opcode. */
966 md_number_to_chars (opcodep, (long) (output_instruction.opcode), 2);
967
968 /* Output the symbol-dependent instruction stuff. */
969 if (output_instruction.insn_type == CRIS_INSN_BRANCH)
970 {
971 segT to_seg = absolute_section;
972 int is_undefined = 0;
973 int length_code;
974
975 if (output_instruction.expr.X_op != O_constant)
976 {
977 to_seg = S_GET_SEGMENT (output_instruction.expr.X_add_symbol);
978
979 if (to_seg == undefined_section)
980 is_undefined = 1;
981 }
982
983 if (to_seg == now_seg || is_undefined)
984 {
985 /* Handle complex expressions. */
986 valueT addvalue
987 = (SIMPLE_EXPR (&output_instruction.expr)
988 ? output_instruction.expr.X_add_number
989 : 0);
990 symbolS *sym
991 = (SIMPLE_EXPR (&output_instruction.expr)
992 ? output_instruction.expr.X_add_symbol
993 : make_expr_symbol (&output_instruction.expr));
994
995 /* If is_undefined, then the expression may BECOME now_seg. */
996 length_code = is_undefined ? STATE_UNDF : STATE_BYTE;
997
998 /* Make room for max ten bytes of variable length. */
999 frag_var (rs_machine_dependent, 10, 0,
1000 ENCODE_RELAX (STATE_CONDITIONAL_BRANCH, length_code),
1001 sym, addvalue, opcodep);
1002 }
1003 else
1004 {
1005 /* We have: to_seg != now_seg && to_seg != undefined_section.
1006 This means it is a branch to a known symbol in another
1007 section, perhaps an absolute address. Emit a 32-bit branch. */
1008 char *cond_jump = frag_more (10);
1009
1010 gen_cond_branch_32 (opcodep, cond_jump, frag_now,
1011 output_instruction.expr.X_add_symbol,
1012 (symbolS *) NULL,
1013 output_instruction.expr.X_add_number);
1014 }
1015 }
1016 else if (output_instruction.insn_type == CRIS_INSN_MUL
1017 && err_for_dangerous_mul_placement)
1018 /* Create a frag which which we track the location of the mul insn
1019 (in the last two bytes before the mul-frag). */
1020 frag_variant (rs_machine_dependent, 0, 0,
1021 ENCODE_RELAX (STATE_MUL, STATE_BYTE),
1022 NULL, 0, opcodep);
1023 else
1024 {
1025 if (output_instruction.imm_oprnd_size > 0)
1026 {
1027 /* The instruction has an immediate operand. */
1028 enum bfd_reloc_code_real reloc = BFD_RELOC_NONE;
1029
1030 switch (output_instruction.imm_oprnd_size)
1031 {
1032 /* Any byte-size immediate constants are treated as
1033 word-size. FIXME: Thus overflow check does not work
1034 correctly. */
1035
1036 case 2:
1037 /* Note that size-check for the explicit reloc has already
1038 been done when we get here. */
1039 if (output_instruction.reloc != BFD_RELOC_NONE)
1040 reloc = output_instruction.reloc;
1041 else
1042 reloc = BFD_RELOC_16;
1043 break;
1044
1045 case 4:
1046 /* Allow a relocation specified in the operand. */
1047 if (output_instruction.reloc != BFD_RELOC_NONE)
1048 reloc = output_instruction.reloc;
1049 else
1050 reloc = BFD_RELOC_32;
1051 break;
1052
1053 default:
1054 BAD_CASE (output_instruction.imm_oprnd_size);
1055 }
1056
1057 p = frag_more (output_instruction.imm_oprnd_size);
1058 fix_new_exp (frag_now, (p - frag_now->fr_literal),
1059 output_instruction.imm_oprnd_size,
1060 &output_instruction.expr, 0, reloc);
1061 }
1062 else if (output_instruction.reloc != BFD_RELOC_NONE)
1063 {
1064 /* An immediate operand that has a relocation and needs to be
1065 processed further. */
1066
1067 /* It is important to use fix_new_exp here and everywhere else
1068 (and not fix_new), as fix_new_exp can handle "difference
1069 expressions" - where the expression contains a difference of
1070 two symbols in the same segment. */
1071 fix_new_exp (frag_now, (opcodep - frag_now->fr_literal), 2,
1072 &output_instruction.expr, 0,
1073 output_instruction.reloc);
1074 }
1075 }
1076 }
1077
1078 /* Low level text-to-bits assembly. */
1079
1080 static void
cris_process_instruction(insn_text,out_insnp,prefixp)1081 cris_process_instruction (insn_text, out_insnp, prefixp)
1082 char *insn_text;
1083 struct cris_instruction *out_insnp;
1084 struct cris_prefix *prefixp;
1085 {
1086 char *s;
1087 char modified_char = 0;
1088 const char *args;
1089 struct cris_opcode *instruction;
1090 char *operands;
1091 int match = 0;
1092 int mode;
1093 int regno;
1094 int size_bits;
1095
1096 /* Reset these fields to a harmless state in case we need to return in
1097 error. */
1098 prefixp->kind = PREFIX_NONE;
1099 prefixp->reloc = BFD_RELOC_NONE;
1100 out_insnp->insn_type = CRIS_INSN_NORMAL;
1101 out_insnp->imm_oprnd_size = 0;
1102
1103 /* Find the end of the opcode mnemonic. We assume (true in 2.9.1)
1104 that the caller has translated the opcode to lower-case, up to the
1105 first non-letter. */
1106 for (operands = insn_text; ISLOWER (*operands); ++operands)
1107 ;
1108
1109 /* Terminate the opcode after letters, but save the character there if
1110 it was of significance. */
1111 switch (*operands)
1112 {
1113 case '\0':
1114 break;
1115
1116 case '.':
1117 /* Put back the modified character later. */
1118 modified_char = *operands;
1119 /* Fall through. */
1120
1121 case ' ':
1122 /* Consume the character after the mnemonic
1123 and replace it with '\0'. */
1124 *operands++ = '\0';
1125 break;
1126
1127 default:
1128 as_bad (_("Unknown opcode: `%s'"), insn_text);
1129 return;
1130 }
1131
1132 /* Find the instruction. */
1133 instruction = (struct cris_opcode *) hash_find (op_hash, insn_text);
1134 if (instruction == NULL)
1135 {
1136 as_bad (_("Unknown opcode: `%s'"), insn_text);
1137 return;
1138 }
1139
1140 /* Put back the modified character. */
1141 switch (modified_char)
1142 {
1143 case 0:
1144 break;
1145
1146 default:
1147 *--operands = modified_char;
1148 }
1149
1150 /* Try to match an opcode table slot. */
1151 for (s = operands;;)
1152 {
1153 int imm_expr_found;
1154
1155 /* Initialize *prefixp, perhaps after being modified for a
1156 "near match". */
1157 prefixp->kind = PREFIX_NONE;
1158 prefixp->reloc = BFD_RELOC_NONE;
1159
1160 /* Initialize *out_insnp. */
1161 memset (out_insnp, 0, sizeof (*out_insnp));
1162 out_insnp->opcode = instruction->match;
1163 out_insnp->reloc = BFD_RELOC_NONE;
1164 out_insnp->insn_type = CRIS_INSN_NORMAL;
1165 out_insnp->imm_oprnd_size = 0;
1166
1167 imm_expr_found = 0;
1168
1169 /* Build the opcode, checking as we go to make sure that the
1170 operands match. */
1171 for (args = instruction->args;; ++args)
1172 {
1173 switch (*args)
1174 {
1175 case '\0':
1176 /* If we've come to the end of arguments, we're done. */
1177 if (*s == '\0')
1178 match = 1;
1179 break;
1180
1181 case '!':
1182 /* Non-matcher character for disassembly.
1183 Ignore it here. */
1184 continue;
1185
1186 case ',':
1187 case ' ':
1188 /* These must match exactly. */
1189 if (*s++ == *args)
1190 continue;
1191 break;
1192
1193 case 'B':
1194 /* This is not really an operand, but causes a "BDAP
1195 -size,SP" prefix to be output, for PUSH instructions. */
1196 prefixp->kind = PREFIX_PUSH;
1197 continue;
1198
1199 case 'b':
1200 /* This letter marks an operand that should not be matched
1201 in the assembler. It is a branch with 16-bit
1202 displacement. The assembler will create them from the
1203 8-bit flavor when necessary. The assembler does not
1204 support the [rN+] operand, as the [r15+] that is
1205 generated for 16-bit displacements. */
1206 break;
1207
1208 case 'c':
1209 /* A 5-bit unsigned immediate in bits <4:0>. */
1210 if (! cris_get_expression (&s, &out_insnp->expr))
1211 break;
1212 else
1213 {
1214 if (out_insnp->expr.X_op == O_constant
1215 && (out_insnp->expr.X_add_number < 0
1216 || out_insnp->expr.X_add_number > 31))
1217 as_bad (_("Immediate value not in 5 bit unsigned range: %ld"),
1218 out_insnp->expr.X_add_number);
1219
1220 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_5;
1221 continue;
1222 }
1223
1224 case 'C':
1225 /* A 4-bit unsigned immediate in bits <3:0>. */
1226 if (! cris_get_expression (&s, &out_insnp->expr))
1227 break;
1228 else
1229 {
1230 if (out_insnp->expr.X_op == O_constant
1231 && (out_insnp->expr.X_add_number < 0
1232 || out_insnp->expr.X_add_number > 15))
1233 as_bad (_("Immediate value not in 4 bit unsigned range: %ld"),
1234 out_insnp->expr.X_add_number);
1235
1236 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_4;
1237 continue;
1238 }
1239
1240 case 'D':
1241 /* General register in bits <15:12> and <3:0>. */
1242 if (! get_gen_reg (&s, ®no))
1243 break;
1244 else
1245 {
1246 out_insnp->opcode |= regno /* << 0 */;
1247 out_insnp->opcode |= regno << 12;
1248 continue;
1249 }
1250
1251 case 'f':
1252 /* Flags from the condition code register. */
1253 {
1254 int flags = 0;
1255
1256 if (! get_flags (&s, &flags))
1257 break;
1258
1259 out_insnp->opcode |= ((flags & 0xf0) << 8) | (flags & 0xf);
1260 continue;
1261 }
1262
1263 case 'i':
1264 /* A 6-bit signed immediate in bits <5:0>. */
1265 if (! cris_get_expression (&s, &out_insnp->expr))
1266 break;
1267 else
1268 {
1269 if (out_insnp->expr.X_op == O_constant
1270 && (out_insnp->expr.X_add_number < -32
1271 || out_insnp->expr.X_add_number > 31))
1272 as_bad (_("Immediate value not in 6 bit range: %ld"),
1273 out_insnp->expr.X_add_number);
1274 out_insnp->reloc = BFD_RELOC_CRIS_SIGNED_6;
1275 continue;
1276 }
1277
1278 case 'I':
1279 /* A 6-bit unsigned immediate in bits <5:0>. */
1280 if (! cris_get_expression (&s, &out_insnp->expr))
1281 break;
1282 else
1283 {
1284 if (out_insnp->expr.X_op == O_constant
1285 && (out_insnp->expr.X_add_number < 0
1286 || out_insnp->expr.X_add_number > 63))
1287 as_bad (_("Immediate value not in 6 bit unsigned range: %ld"),
1288 out_insnp->expr.X_add_number);
1289 out_insnp->reloc = BFD_RELOC_CRIS_UNSIGNED_6;
1290 continue;
1291 }
1292
1293 case 'M':
1294 /* A size modifier, B, W or D, to be put in a bit position
1295 suitable for CLEAR instructions (i.e. reflecting a zero
1296 register). */
1297 if (! get_bwd_size_modifier (&s, &size_bits))
1298 break;
1299 else
1300 {
1301 switch (size_bits)
1302 {
1303 case 0:
1304 out_insnp->opcode |= 0 << 12;
1305 break;
1306
1307 case 1:
1308 out_insnp->opcode |= 4 << 12;
1309 break;
1310
1311 case 2:
1312 out_insnp->opcode |= 8 << 12;
1313 break;
1314 }
1315 continue;
1316 }
1317
1318 case 'm':
1319 /* A size modifier, B, W or D, to be put in bits <5:4>. */
1320 if (! get_bwd_size_modifier (&s, &size_bits))
1321 break;
1322 else
1323 {
1324 out_insnp->opcode |= size_bits << 4;
1325 continue;
1326 }
1327
1328 case 'o':
1329 /* A branch expression. */
1330 if (! cris_get_expression (&s, &out_insnp->expr))
1331 break;
1332 else
1333 {
1334 out_insnp->insn_type = CRIS_INSN_BRANCH;
1335 continue;
1336 }
1337
1338 case 'O':
1339 /* A BDAP expression for any size, "expr,r". */
1340 if (! cris_get_expression (&s, &prefixp->expr))
1341 break;
1342 else
1343 {
1344 if (*s != ',')
1345 break;
1346
1347 s++;
1348
1349 if (!get_gen_reg (&s, &prefixp->base_reg_number))
1350 break;
1351
1352 /* Since 'O' is used with an explicit bdap, we have no
1353 "real" instruction. */
1354 prefixp->kind = PREFIX_BDAP_IMM;
1355 prefixp->opcode
1356 = BDAP_QUICK_OPCODE | (prefixp->base_reg_number << 12);
1357
1358 out_insnp->insn_type = CRIS_INSN_NONE;
1359 continue;
1360 }
1361
1362 case 'P':
1363 /* Special register in bits <15:12>. */
1364 if (! get_spec_reg (&s, &out_insnp->spec_reg))
1365 break;
1366 else
1367 {
1368 /* Use of some special register names come with a
1369 specific warning. Note that we have no ".cpu type"
1370 pseudo yet, so some of this is just unused
1371 framework. */
1372 if (out_insnp->spec_reg->warning)
1373 as_warn (out_insnp->spec_reg->warning);
1374 else if (out_insnp->spec_reg->applicable_version
1375 == cris_ver_warning)
1376 /* Others have a generic warning. */
1377 as_warn (_("Unimplemented register `%s' specified"),
1378 out_insnp->spec_reg->name);
1379
1380 out_insnp->opcode
1381 |= out_insnp->spec_reg->number << 12;
1382 continue;
1383 }
1384
1385 case 'p':
1386 /* This character is used in the disassembler to
1387 recognize a prefix instruction to fold into the
1388 addressing mode for the next instruction. It is
1389 ignored here. */
1390 continue;
1391
1392 case 'R':
1393 /* General register in bits <15:12>. */
1394 if (! get_gen_reg (&s, ®no))
1395 break;
1396 else
1397 {
1398 out_insnp->opcode |= regno << 12;
1399 continue;
1400 }
1401
1402 case 'r':
1403 /* General register in bits <3:0>. */
1404 if (! get_gen_reg (&s, ®no))
1405 break;
1406 else
1407 {
1408 out_insnp->opcode |= regno /* << 0 */;
1409 continue;
1410 }
1411
1412 case 'S':
1413 /* Source operand in bit <10> and a prefix; a 3-operand
1414 prefix. */
1415 if (! get_3op_or_dip_prefix_op (&s, prefixp))
1416 break;
1417 else
1418 continue;
1419
1420 case 's':
1421 /* Source operand in bits <10>, <3:0> and optionally a
1422 prefix; i.e. an indirect operand or an side-effect
1423 prefix. */
1424 if (! get_autoinc_prefix_or_indir_op (&s, prefixp, &mode,
1425 ®no,
1426 &imm_expr_found,
1427 &out_insnp->expr))
1428 break;
1429 else
1430 {
1431 if (prefixp->kind != PREFIX_NONE)
1432 {
1433 /* A prefix, so it has the autoincrement bit
1434 set. */
1435 out_insnp->opcode |= (AUTOINCR_BIT << 8);
1436 }
1437 else
1438 {
1439 /* No prefix. The "mode" variable contains bits like
1440 whether or not this is autoincrement mode. */
1441 out_insnp->opcode |= (mode << 10);
1442
1443 /* If there was a PIC reloc specifier, then it was
1444 attached to the prefix. Note that we can't check
1445 that the reloc size matches, since we don't have
1446 all the operands yet in all cases. */
1447 if (prefixp->reloc != BFD_RELOC_NONE)
1448 out_insnp->reloc = prefixp->reloc;
1449 }
1450
1451 out_insnp->opcode |= regno /* << 0 */ ;
1452 continue;
1453 }
1454
1455 case 'x':
1456 /* Rs.m in bits <15:12> and <5:4>. */
1457 if (! get_gen_reg (&s, ®no)
1458 || ! get_bwd_size_modifier (&s, &size_bits))
1459 break;
1460 else
1461 {
1462 out_insnp->opcode |= (regno << 12) | (size_bits << 4);
1463 continue;
1464 }
1465
1466 case 'y':
1467 /* Source operand in bits <10>, <3:0> and optionally a
1468 prefix; i.e. an indirect operand or an side-effect
1469 prefix.
1470
1471 The difference to 's' is that this does not allow an
1472 "immediate" expression. */
1473 if (! get_autoinc_prefix_or_indir_op (&s, prefixp,
1474 &mode, ®no,
1475 &imm_expr_found,
1476 &out_insnp->expr)
1477 || imm_expr_found)
1478 break;
1479 else
1480 {
1481 if (prefixp->kind != PREFIX_NONE)
1482 {
1483 /* A prefix, and those matched here always have
1484 side-effects (see 's' case). */
1485 out_insnp->opcode |= (AUTOINCR_BIT << 8);
1486 }
1487 else
1488 {
1489 /* No prefix. The "mode" variable contains bits
1490 like whether or not this is autoincrement
1491 mode. */
1492 out_insnp->opcode |= (mode << 10);
1493 }
1494
1495 out_insnp->opcode |= regno /* << 0 */;
1496 continue;
1497 }
1498
1499 case 'z':
1500 /* Size modifier (B or W) in bit <4>. */
1501 if (! get_bw_size_modifier (&s, &size_bits))
1502 break;
1503 else
1504 {
1505 out_insnp->opcode |= size_bits << 4;
1506 continue;
1507 }
1508
1509 default:
1510 BAD_CASE (*args);
1511 }
1512
1513 /* We get here when we fail a match above or we found a
1514 complete match. Break out of this loop. */
1515 break;
1516 }
1517
1518 /* Was it a match or a miss? */
1519 if (match == 0)
1520 {
1521 /* If it's just that the args don't match, maybe the next
1522 item in the table is the same opcode but with
1523 matching operands. */
1524 if (instruction[1].name != NULL
1525 && ! strcmp (instruction->name, instruction[1].name))
1526 {
1527 /* Yep. Restart and try that one instead. */
1528 ++instruction;
1529 s = operands;
1530 continue;
1531 }
1532 else
1533 {
1534 /* We've come to the end of instructions with this
1535 opcode, so it must be an error. */
1536 as_bad (_("Illegal operands"));
1537 return;
1538 }
1539 }
1540 else
1541 {
1542 /* We have a match. Check if there's anything more to do. */
1543 if (imm_expr_found)
1544 {
1545 /* There was an immediate mode operand, so we must check
1546 that it has an appropriate size. */
1547 switch (instruction->imm_oprnd_size)
1548 {
1549 default:
1550 case SIZE_NONE:
1551 /* Shouldn't happen; this one does not have immediate
1552 operands with different sizes. */
1553 BAD_CASE (instruction->imm_oprnd_size);
1554 break;
1555
1556 case SIZE_FIX_32:
1557 out_insnp->imm_oprnd_size = 4;
1558 break;
1559
1560 case SIZE_SPEC_REG:
1561 switch (out_insnp->spec_reg->reg_size)
1562 {
1563 case 1:
1564 if (out_insnp->expr.X_op == O_constant
1565 && (out_insnp->expr.X_add_number < -128
1566 || out_insnp->expr.X_add_number > 255))
1567 as_bad (_("Immediate value not in 8 bit range: %ld"),
1568 out_insnp->expr.X_add_number);
1569 /* Fall through. */
1570 case 2:
1571 /* FIXME: We need an indicator in the instruction
1572 table to pass on, to indicate if we need to check
1573 overflow for a signed or unsigned number. */
1574 if (out_insnp->expr.X_op == O_constant
1575 && (out_insnp->expr.X_add_number < -32768
1576 || out_insnp->expr.X_add_number > 65535))
1577 as_bad (_("Immediate value not in 16 bit range: %ld"),
1578 out_insnp->expr.X_add_number);
1579 out_insnp->imm_oprnd_size = 2;
1580 break;
1581
1582 case 4:
1583 out_insnp->imm_oprnd_size = 4;
1584 break;
1585
1586 default:
1587 BAD_CASE (out_insnp->spec_reg->reg_size);
1588 }
1589 break;
1590
1591 case SIZE_FIELD:
1592 switch (size_bits)
1593 {
1594 case 0:
1595 if (out_insnp->expr.X_op == O_constant
1596 && (out_insnp->expr.X_add_number < -128
1597 || out_insnp->expr.X_add_number > 255))
1598 as_bad (_("Immediate value not in 8 bit range: %ld"),
1599 out_insnp->expr.X_add_number);
1600 /* Fall through. */
1601 case 1:
1602 if (out_insnp->expr.X_op == O_constant
1603 && (out_insnp->expr.X_add_number < -32768
1604 || out_insnp->expr.X_add_number > 65535))
1605 as_bad (_("Immediate value not in 16 bit range: %ld"),
1606 out_insnp->expr.X_add_number);
1607 out_insnp->imm_oprnd_size = 2;
1608 break;
1609
1610 case 2:
1611 out_insnp->imm_oprnd_size = 4;
1612 break;
1613
1614 default:
1615 BAD_CASE (out_insnp->spec_reg->reg_size);
1616 }
1617 }
1618
1619 /* If there was a relocation specified for the immediate
1620 expression (i.e. it had a PIC modifier) check that the
1621 size of the PIC relocation matches the size specified by
1622 the opcode. */
1623 if (out_insnp->reloc != BFD_RELOC_NONE
1624 && (cris_get_pic_reloc_size (out_insnp->reloc)
1625 != (unsigned int) out_insnp->imm_oprnd_size))
1626 as_bad (_("PIC relocation size does not match operand size"));
1627 }
1628 else if (instruction->op == cris_muls_op
1629 || instruction->op == cris_mulu_op)
1630 out_insnp->insn_type = CRIS_INSN_MUL;
1631 }
1632 break;
1633 }
1634 }
1635
1636 /* Get a B, W, or D size modifier from the string pointed out by *cPP,
1637 which must point to a '.' in front of the modifier. On successful
1638 return, *cPP is advanced to the character following the size
1639 modifier, and is undefined otherwise.
1640
1641 cPP Pointer to pointer to string starting
1642 with the size modifier.
1643
1644 size_bitsp Pointer to variable to contain the size bits on
1645 successful return.
1646
1647 Return 1 iff a correct size modifier is found, else 0. */
1648
1649 static int
get_bwd_size_modifier(cPP,size_bitsp)1650 get_bwd_size_modifier (cPP, size_bitsp)
1651 char **cPP;
1652 int *size_bitsp;
1653 {
1654 if (**cPP != '.')
1655 return 0;
1656 else
1657 {
1658 /* Consume the '.'. */
1659 (*cPP)++;
1660
1661 switch (**cPP)
1662 {
1663 case 'B':
1664 case 'b':
1665 *size_bitsp = 0;
1666 break;
1667
1668 case 'W':
1669 case 'w':
1670 *size_bitsp = 1;
1671 break;
1672
1673 case 'D':
1674 case 'd':
1675 *size_bitsp = 2;
1676 break;
1677
1678 default:
1679 return 0;
1680 }
1681
1682 /* Consume the size letter. */
1683 (*cPP)++;
1684 return 1;
1685 }
1686 }
1687
1688 /* Get a B or W size modifier from the string pointed out by *cPP,
1689 which must point to a '.' in front of the modifier. On successful
1690 return, *cPP is advanced to the character following the size
1691 modifier, and is undefined otherwise.
1692
1693 cPP Pointer to pointer to string starting
1694 with the size modifier.
1695
1696 size_bitsp Pointer to variable to contain the size bits on
1697 successful return.
1698
1699 Return 1 iff a correct size modifier is found, else 0. */
1700
1701 static int
get_bw_size_modifier(cPP,size_bitsp)1702 get_bw_size_modifier (cPP, size_bitsp)
1703 char **cPP;
1704 int *size_bitsp;
1705 {
1706 if (**cPP != '.')
1707 return 0;
1708 else
1709 {
1710 /* Consume the '.'. */
1711 (*cPP)++;
1712
1713 switch (**cPP)
1714 {
1715 case 'B':
1716 case 'b':
1717 *size_bitsp = 0;
1718 break;
1719
1720 case 'W':
1721 case 'w':
1722 *size_bitsp = 1;
1723 break;
1724
1725 default:
1726 return 0;
1727 }
1728
1729 /* Consume the size letter. */
1730 (*cPP)++;
1731 return 1;
1732 }
1733 }
1734
1735 /* Get a general register from the string pointed out by *cPP. The
1736 variable *cPP is advanced to the character following the general
1737 register name on a successful return, and has its initial position
1738 otherwise.
1739
1740 cPP Pointer to pointer to string, beginning with a general
1741 register name.
1742
1743 regnop Pointer to int containing the register number.
1744
1745 Return 1 iff a correct general register designator is found,
1746 else 0. */
1747
1748 static int
get_gen_reg(cPP,regnop)1749 get_gen_reg (cPP, regnop)
1750 char **cPP;
1751 int *regnop;
1752 {
1753 char *oldp;
1754 oldp = *cPP;
1755
1756 /* Handle a sometimes-mandatory dollar sign as register prefix. */
1757 if (**cPP == REGISTER_PREFIX_CHAR)
1758 (*cPP)++;
1759 else if (demand_register_prefix)
1760 return 0;
1761
1762 switch (**cPP)
1763 {
1764 case 'P':
1765 case 'p':
1766 /* "P" as in "PC"? Consume the "P". */
1767 (*cPP)++;
1768
1769 if ((**cPP == 'C' || **cPP == 'c')
1770 && ! ISALNUM ((*cPP)[1]))
1771 {
1772 /* It's "PC": consume the "c" and we're done. */
1773 (*cPP)++;
1774 *regnop = REG_PC;
1775 return 1;
1776 }
1777 break;
1778
1779 case 'R':
1780 case 'r':
1781 /* Hopefully r[0-9] or r1[0-5]. Consume 'R' or 'r'. */
1782 (*cPP)++;
1783
1784 if (ISDIGIT (**cPP))
1785 {
1786 /* It's r[0-9]. Consume and check the next digit. */
1787 *regnop = **cPP - '0';
1788 (*cPP)++;
1789
1790 if (! ISALNUM (**cPP))
1791 {
1792 /* No more digits, we're done. */
1793 return 1;
1794 }
1795 else
1796 {
1797 /* One more digit. Consume and add. */
1798 *regnop = *regnop * 10 + (**cPP - '0');
1799
1800 /* We need to check for a valid register number; Rn,
1801 0 <= n <= MAX_REG. */
1802 if (*regnop <= MAX_REG)
1803 {
1804 /* Consume second digit. */
1805 (*cPP)++;
1806 return 1;
1807 }
1808 }
1809 }
1810 break;
1811
1812 case 'S':
1813 case 's':
1814 /* "S" as in "SP"? Consume the "S". */
1815 (*cPP)++;
1816 if (**cPP == 'P' || **cPP == 'p')
1817 {
1818 /* It's "SP": consume the "p" and we're done. */
1819 (*cPP)++;
1820 *regnop = REG_SP;
1821 return 1;
1822 }
1823 break;
1824
1825 default:
1826 /* Just here to silence compilation warnings. */
1827 ;
1828 }
1829
1830 /* We get here if we fail. Restore the pointer. */
1831 *cPP = oldp;
1832 return 0;
1833 }
1834
1835 /* Get a special register from the string pointed out by *cPP. The
1836 variable *cPP is advanced to the character following the special
1837 register name if one is found, and retains its original position
1838 otherwise.
1839
1840 cPP Pointer to pointer to string starting with a special register
1841 name.
1842
1843 sregpp Pointer to Pointer to struct spec_reg, where a pointer to the
1844 register description will be stored.
1845
1846 Return 1 iff a correct special register name is found. */
1847
1848 static int
get_spec_reg(cPP,sregpp)1849 get_spec_reg (cPP, sregpp)
1850 char **cPP;
1851 const struct cris_spec_reg **sregpp;
1852 {
1853 char *s1;
1854 const char *s2;
1855 char *name_begin = *cPP;
1856
1857 const struct cris_spec_reg *sregp;
1858
1859 /* Handle a sometimes-mandatory dollar sign as register prefix. */
1860 if (*name_begin == REGISTER_PREFIX_CHAR)
1861 name_begin++;
1862 else if (demand_register_prefix)
1863 return 0;
1864
1865 /* Loop over all special registers. */
1866 for (sregp = cris_spec_regs; sregp->name != NULL; sregp++)
1867 {
1868 /* Start over from beginning of the supposed name. */
1869 s1 = name_begin;
1870 s2 = sregp->name;
1871
1872 while (*s2 != '\0' && TOLOWER (*s1) == *s2)
1873 {
1874 s1++;
1875 s2++;
1876 }
1877
1878 /* For a match, we must have consumed the name in the table, and we
1879 must be outside what could be part of a name. Assume here that a
1880 test for alphanumerics is sufficient for a name test. */
1881 if (*s2 == 0 && ! ISALNUM (*s1))
1882 {
1883 /* We have a match. Update the pointer and be done. */
1884 *cPP = s1;
1885 *sregpp = sregp;
1886 return 1;
1887 }
1888 }
1889
1890 /* If we got here, we did not find any name. */
1891 return 0;
1892 }
1893
1894 /* Get an unprefixed or side-effect-prefix operand from the string pointed
1895 out by *cPP. The pointer *cPP is advanced to the character following
1896 the indirect operand if we have success, else it contains an undefined
1897 value.
1898
1899 cPP Pointer to pointer to string beginning with the first
1900 character of the supposed operand.
1901
1902 prefixp Pointer to structure containing an optional instruction
1903 prefix.
1904
1905 is_autoincp Pointer to int indicating the indirect or autoincrement
1906 bits.
1907
1908 src_regnop Pointer to int containing the source register number in
1909 the instruction.
1910
1911 imm_foundp Pointer to an int indicating if an immediate expression
1912 is found.
1913
1914 imm_exprP Pointer to a structure containing an immediate
1915 expression, if success and if *imm_foundp is nonzero.
1916
1917 Return 1 iff a correct indirect operand is found. */
1918
1919 static int
get_autoinc_prefix_or_indir_op(cPP,prefixp,is_autoincp,src_regnop,imm_foundp,imm_exprP)1920 get_autoinc_prefix_or_indir_op (cPP, prefixp, is_autoincp, src_regnop,
1921 imm_foundp, imm_exprP)
1922 char **cPP;
1923 struct cris_prefix *prefixp;
1924 int *is_autoincp;
1925 int *src_regnop;
1926 int *imm_foundp;
1927 expressionS *imm_exprP;
1928 {
1929 /* Assume there was no immediate mode expression. */
1930 *imm_foundp = 0;
1931
1932 if (**cPP == '[')
1933 {
1934 /* So this operand is one of:
1935 Indirect: [rN]
1936 Autoincrement: [rN+]
1937 Indexed with assign: [rN=rM+rO.S]
1938 Offset with assign: [rN=rM+I], [rN=rM+[rO].s], [rN=rM+[rO+].s]
1939
1940 Either way, consume the '['. */
1941 (*cPP)++;
1942
1943 /* Get the rN register. */
1944 if (! get_gen_reg (cPP, src_regnop))
1945 /* If there was no register, then this cannot match. */
1946 return 0;
1947 else
1948 {
1949 /* We got the register, now check the next character. */
1950 switch (**cPP)
1951 {
1952 case ']':
1953 /* Indirect mode. We're done here. */
1954 prefixp->kind = PREFIX_NONE;
1955 *is_autoincp = 0;
1956 break;
1957
1958 case '+':
1959 /* This must be an auto-increment mode, if there's a
1960 match. */
1961 prefixp->kind = PREFIX_NONE;
1962 *is_autoincp = 1;
1963
1964 /* We consume this character and break out to check the
1965 closing ']'. */
1966 (*cPP)++;
1967 break;
1968
1969 case '=':
1970 /* This must be indexed with assign, or offset with assign
1971 to match. */
1972 (*cPP)++;
1973
1974 /* Either way, the next thing must be a register. */
1975 if (! get_gen_reg (cPP, &prefixp->base_reg_number))
1976 /* No register, no match. */
1977 return 0;
1978 else
1979 {
1980 /* We've consumed "[rN=rM", so we must be looking at
1981 "+rO.s]" or "+I]", or "-I]", or "+[rO].s]" or
1982 "+[rO+].s]". */
1983 if (**cPP == '+')
1984 {
1985 int index_reg_number;
1986 (*cPP)++;
1987
1988 if (**cPP == '[')
1989 {
1990 int size_bits;
1991 /* This must be [rx=ry+[rz].s] or
1992 [rx=ry+[rz+].s] or no match. We must be
1993 looking at rz after consuming the '['. */
1994 (*cPP)++;
1995
1996 if (!get_gen_reg (cPP, &index_reg_number))
1997 return 0;
1998
1999 prefixp->kind = PREFIX_BDAP;
2000 prefixp->opcode
2001 = (BDAP_INDIR_OPCODE
2002 + (prefixp->base_reg_number << 12)
2003 + index_reg_number);
2004
2005 if (**cPP == '+')
2006 {
2007 /* We've seen "[rx=ry+[rz+" here, so now we
2008 know that there must be "].s]" left to
2009 check. */
2010 (*cPP)++;
2011 prefixp->opcode |= AUTOINCR_BIT << 8;
2012 }
2013
2014 /* If it wasn't autoincrement, we don't need to
2015 add anything. */
2016
2017 /* Check the next-to-last ']'. */
2018 if (**cPP != ']')
2019 return 0;
2020
2021 (*cPP)++;
2022
2023 /* Check the ".s" modifier. */
2024 if (! get_bwd_size_modifier (cPP, &size_bits))
2025 return 0;
2026
2027 prefixp->opcode |= size_bits << 4;
2028
2029 /* Now we got [rx=ry+[rz+].s or [rx=ry+[rz].s.
2030 We break out to check the final ']'. */
2031 break;
2032 }
2033 /* It wasn't an indirection. Check if it's a
2034 register. */
2035 else if (get_gen_reg (cPP, &index_reg_number))
2036 {
2037 int size_bits;
2038
2039 /* Indexed with assign mode: "[rN+rM.S]". */
2040 prefixp->kind = PREFIX_BIAP;
2041 prefixp->opcode
2042 = (BIAP_OPCODE + (index_reg_number << 12)
2043 + prefixp->base_reg_number /* << 0 */);
2044
2045 if (! get_bwd_size_modifier (cPP, &size_bits))
2046 /* Size missing, this isn't a match. */
2047 return 0;
2048 else
2049 {
2050 /* Size found, break out to check the
2051 final ']'. */
2052 prefixp->opcode |= size_bits << 4;
2053 break;
2054 }
2055 }
2056 /* Not a register. Then this must be "[rN+I]". */
2057 else if (cris_get_expression (cPP, &prefixp->expr))
2058 {
2059 /* We've got offset with assign mode. Fill
2060 in the blanks and break out to match the
2061 final ']'. */
2062 prefixp->kind = PREFIX_BDAP_IMM;
2063
2064 /* We tentatively put an opcode corresponding to
2065 a 32-bit operand here, although it may be
2066 relaxed when there's no PIC specifier for the
2067 operand. */
2068 prefixp->opcode
2069 = (BDAP_INDIR_OPCODE
2070 | (prefixp->base_reg_number << 12)
2071 | (AUTOINCR_BIT << 8)
2072 | (2 << 4)
2073 | REG_PC /* << 0 */);
2074
2075 /* This can have a PIC suffix, specifying reloc
2076 type to use. */
2077 if (pic && **cPP == PIC_SUFFIX_CHAR)
2078 {
2079 unsigned int relocsize;
2080
2081 cris_get_pic_suffix (cPP, &prefixp->reloc,
2082 &prefixp->expr);
2083
2084 /* Tweak the size of the immediate operand
2085 in the prefix opcode if it isn't what we
2086 set. */
2087 relocsize
2088 = cris_get_pic_reloc_size (prefixp->reloc);
2089 if (relocsize != 4)
2090 prefixp->opcode
2091 = ((prefixp->opcode & ~(3 << 4))
2092 | ((relocsize >> 1) << 4));
2093 }
2094 break;
2095 }
2096 else
2097 /* Neither register nor expression found, so
2098 this can't be a match. */
2099 return 0;
2100 }
2101 /* Not "[rN+" but perhaps "[rN-"? */
2102 else if (**cPP == '-')
2103 {
2104 /* We must have an offset with assign mode. */
2105 if (! cris_get_expression (cPP, &prefixp->expr))
2106 /* No expression, no match. */
2107 return 0;
2108 else
2109 {
2110 /* We've got offset with assign mode. Fill
2111 in the blanks and break out to match the
2112 final ']'.
2113
2114 Note that we don't allow a PIC suffix for an
2115 operand with a minus sign. */
2116 prefixp->kind = PREFIX_BDAP_IMM;
2117 break;
2118 }
2119 }
2120 else
2121 /* Neither '+' nor '-' after "[rN=rM". Lose. */
2122 return 0;
2123 }
2124 default:
2125 /* Neither ']' nor '+' nor '=' after "[rN". Lose. */
2126 return 0;
2127 }
2128 }
2129
2130 /* When we get here, we have a match and will just check the closing
2131 ']'. We can still fail though. */
2132 if (**cPP != ']')
2133 return 0;
2134 else
2135 {
2136 /* Don't forget to consume the final ']'.
2137 Then return in glory. */
2138 (*cPP)++;
2139 return 1;
2140 }
2141 }
2142 /* No indirection. Perhaps a constant? */
2143 else if (cris_get_expression (cPP, imm_exprP))
2144 {
2145 /* Expression found, this is immediate mode. */
2146 prefixp->kind = PREFIX_NONE;
2147 *is_autoincp = 1;
2148 *src_regnop = REG_PC;
2149 *imm_foundp = 1;
2150
2151 /* This can have a PIC suffix, specifying reloc type to use. The
2152 caller must check that the reloc size matches the operand size. */
2153 if (pic && **cPP == PIC_SUFFIX_CHAR)
2154 cris_get_pic_suffix (cPP, &prefixp->reloc, imm_exprP);
2155
2156 return 1;
2157 }
2158
2159 /* No luck today. */
2160 return 0;
2161 }
2162
2163 /* This function gets an indirect operand in a three-address operand
2164 combination from the string pointed out by *cPP. The pointer *cPP is
2165 advanced to the character following the indirect operand on success, or
2166 has an unspecified value on failure.
2167
2168 cPP Pointer to pointer to string beginning
2169 with the operand
2170
2171 prefixp Pointer to structure containing an
2172 instruction prefix
2173
2174 Returns 1 iff a correct indirect operand is found. */
2175
2176 static int
get_3op_or_dip_prefix_op(cPP,prefixp)2177 get_3op_or_dip_prefix_op (cPP, prefixp)
2178 char **cPP;
2179 struct cris_prefix *prefixp;
2180 {
2181 int reg_number;
2182
2183 if (**cPP != '[')
2184 /* We must have a '[' or it's a clean failure. */
2185 return 0;
2186
2187 /* Eat the first '['. */
2188 (*cPP)++;
2189
2190 if (**cPP == '[')
2191 {
2192 /* A second '[', so this must be double-indirect mode. */
2193 (*cPP)++;
2194 prefixp->kind = PREFIX_DIP;
2195 prefixp->opcode = DIP_OPCODE;
2196
2197 /* Get the register or fail entirely. */
2198 if (! get_gen_reg (cPP, ®_number))
2199 return 0;
2200 else
2201 {
2202 prefixp->opcode |= reg_number /* << 0 */ ;
2203 if (**cPP == '+')
2204 {
2205 /* Since we found a '+', this must be double-indirect
2206 autoincrement mode. */
2207 (*cPP)++;
2208 prefixp->opcode |= AUTOINCR_BIT << 8;
2209 }
2210
2211 /* There's nothing particular to do, if this was a
2212 double-indirect *without* autoincrement. */
2213 }
2214
2215 /* Check the first ']'. The second one is checked at the end. */
2216 if (**cPP != ']')
2217 return 0;
2218
2219 /* Eat the first ']', so we'll be looking at a second ']'. */
2220 (*cPP)++;
2221 }
2222 /* No second '['. Then we should have a register here, making
2223 it "[rN". */
2224 else if (get_gen_reg (cPP, &prefixp->base_reg_number))
2225 {
2226 /* This must be indexed or offset mode: "[rN+I]" or
2227 "[rN+rM.S]" or "[rN+[rM].S]" or "[rN+[rM+].S]". */
2228 if (**cPP == '+')
2229 {
2230 int index_reg_number;
2231
2232 (*cPP)++;
2233
2234 if (**cPP == '[')
2235 {
2236 /* This is "[rx+["... Expect a register next. */
2237 int size_bits;
2238 (*cPP)++;
2239
2240 if (!get_gen_reg (cPP, &index_reg_number))
2241 return 0;
2242
2243 prefixp->kind = PREFIX_BDAP;
2244 prefixp->opcode
2245 = (BDAP_INDIR_OPCODE
2246 + (prefixp->base_reg_number << 12)
2247 + index_reg_number);
2248
2249 /* We've seen "[rx+[ry", so check if this is
2250 autoincrement. */
2251 if (**cPP == '+')
2252 {
2253 /* Yep, now at "[rx+[ry+". */
2254 (*cPP)++;
2255 prefixp->opcode |= AUTOINCR_BIT << 8;
2256 }
2257 /* If it wasn't autoincrement, we don't need to
2258 add anything. */
2259
2260 /* Check a first closing ']': "[rx+[ry]" or
2261 "[rx+[ry+]". */
2262 if (**cPP != ']')
2263 return 0;
2264 (*cPP)++;
2265
2266 /* Now expect a size modifier ".S". */
2267 if (! get_bwd_size_modifier (cPP, &size_bits))
2268 return 0;
2269
2270 prefixp->opcode |= size_bits << 4;
2271
2272 /* Ok, all interesting stuff has been seen:
2273 "[rx+[ry+].S" or "[rx+[ry].S". We only need to
2274 expect a final ']', which we'll do in a common
2275 closing session. */
2276 }
2277 /* Seen "[rN+", but not a '[', so check if we have a
2278 register. */
2279 else if (get_gen_reg (cPP, &index_reg_number))
2280 {
2281 /* This is indexed mode: "[rN+rM.S]" or
2282 "[rN+rM.S+]". */
2283 int size_bits;
2284 prefixp->kind = PREFIX_BIAP;
2285 prefixp->opcode
2286 = (BIAP_OPCODE
2287 | prefixp->base_reg_number /* << 0 */
2288 | (index_reg_number << 12));
2289
2290 /* Consume the ".S". */
2291 if (! get_bwd_size_modifier (cPP, &size_bits))
2292 /* Missing size, so fail. */
2293 return 0;
2294 else
2295 /* Size found. Add that piece and drop down to
2296 the common checking of the closing ']'. */
2297 prefixp->opcode |= size_bits << 4;
2298 }
2299 /* Seen "[rN+", but not a '[' or a register, so then
2300 it must be a constant "I". */
2301 else if (cris_get_expression (cPP, &prefixp->expr))
2302 {
2303 /* Expression found, so fill in the bits of offset
2304 mode and drop down to check the closing ']'. */
2305 prefixp->kind = PREFIX_BDAP_IMM;
2306
2307 /* We tentatively put an opcode corresponding to a 32-bit
2308 operand here, although it may be relaxed when there's no
2309 PIC specifier for the operand. */
2310 prefixp->opcode
2311 = (BDAP_INDIR_OPCODE
2312 | (prefixp->base_reg_number << 12)
2313 | (AUTOINCR_BIT << 8)
2314 | (2 << 4)
2315 | REG_PC /* << 0 */);
2316
2317 /* This can have a PIC suffix, specifying reloc type to use. */
2318 if (pic && **cPP == PIC_SUFFIX_CHAR)
2319 {
2320 unsigned int relocsize;
2321
2322 cris_get_pic_suffix (cPP, &prefixp->reloc, &prefixp->expr);
2323
2324 /* Tweak the size of the immediate operand in the prefix
2325 opcode if it isn't what we set. */
2326 relocsize = cris_get_pic_reloc_size (prefixp->reloc);
2327 if (relocsize != 4)
2328 prefixp->opcode
2329 = ((prefixp->opcode & ~(3 << 4))
2330 | ((relocsize >> 1) << 4));
2331 }
2332 }
2333 else
2334 /* Nothing valid here: lose. */
2335 return 0;
2336 }
2337 /* Seen "[rN" but no '+', so check if it's a '-'. */
2338 else if (**cPP == '-')
2339 {
2340 /* Yep, we must have offset mode. */
2341 if (! cris_get_expression (cPP, &prefixp->expr))
2342 /* No expression, so we lose. */
2343 return 0;
2344 else
2345 {
2346 /* Expression found to make this offset mode, so
2347 fill those bits and drop down to check the
2348 closing ']'.
2349
2350 Note that we don't allow a PIC suffix for
2351 an operand with a minus sign like this. */
2352 prefixp->kind = PREFIX_BDAP_IMM;
2353 }
2354 }
2355 else
2356 {
2357 /* We've seen "[rN", but not '+' or '-'; rather a ']'.
2358 Hmm. Normally this is a simple indirect mode that we
2359 shouldn't match, but if we expect ']', then we have a
2360 zero offset, so it can be a three-address-operand,
2361 like "[rN],rO,rP", thus offset mode.
2362
2363 Don't eat the ']', that will be done in the closing
2364 ceremony. */
2365 prefixp->expr.X_op = O_constant;
2366 prefixp->expr.X_add_number = 0;
2367 prefixp->expr.X_add_symbol = NULL;
2368 prefixp->expr.X_op_symbol = NULL;
2369 prefixp->kind = PREFIX_BDAP_IMM;
2370 }
2371 }
2372 /* A '[', but no second '[', and no register. Check if we
2373 have an expression, making this "[I]" for a double-indirect
2374 prefix. */
2375 else if (cris_get_expression (cPP, &prefixp->expr))
2376 {
2377 /* Expression found, the so called absolute mode for a
2378 double-indirect prefix on PC. */
2379 prefixp->kind = PREFIX_DIP;
2380 prefixp->opcode = DIP_OPCODE | (AUTOINCR_BIT << 8) | REG_PC;
2381 prefixp->reloc = BFD_RELOC_32;
2382 }
2383 else
2384 /* Neither '[' nor register nor expression. We lose. */
2385 return 0;
2386
2387 /* We get here as a closing ceremony to a successful match. We just
2388 need to check the closing ']'. */
2389 if (**cPP != ']')
2390 /* Oops. Close but no air-polluter. */
2391 return 0;
2392
2393 /* Don't forget to consume that ']', before returning in glory. */
2394 (*cPP)++;
2395 return 1;
2396 }
2397
2398 /* Get an expression from the string pointed out by *cPP.
2399 The pointer *cPP is advanced to the character following the expression
2400 on a success, or retains its original value otherwise.
2401
2402 cPP Pointer to pointer to string beginning with the expression.
2403
2404 exprP Pointer to structure containing the expression.
2405
2406 Return 1 iff a correct expression is found. */
2407
2408 static int
cris_get_expression(cPP,exprP)2409 cris_get_expression (cPP, exprP)
2410 char **cPP;
2411 expressionS *exprP;
2412 {
2413 char *saved_input_line_pointer;
2414 segT exp;
2415
2416 /* The "expression" function expects to find an expression at the
2417 global variable input_line_pointer, so we have to save it to give
2418 the impression that we don't fiddle with global variables. */
2419 saved_input_line_pointer = input_line_pointer;
2420 input_line_pointer = *cPP;
2421
2422 exp = expression (exprP);
2423 if (exprP->X_op == O_illegal || exprP->X_op == O_absent)
2424 {
2425 input_line_pointer = saved_input_line_pointer;
2426 return 0;
2427 }
2428
2429 /* Everything seems to be fine, just restore the global
2430 input_line_pointer and say we're successful. */
2431 *cPP = input_line_pointer;
2432 input_line_pointer = saved_input_line_pointer;
2433 return 1;
2434 }
2435
2436 /* Get a sequence of flag characters from *spp. The pointer *cPP is
2437 advanced to the character following the expression. The flag
2438 characters are consecutive, no commas or spaces.
2439
2440 cPP Pointer to pointer to string beginning with the expression.
2441
2442 flagp Pointer to int to return the flags expression.
2443
2444 Return 1 iff a correct flags expression is found. */
2445
2446 static int
get_flags(cPP,flagsp)2447 get_flags (cPP, flagsp)
2448 char **cPP;
2449 int *flagsp;
2450 {
2451 for (;;)
2452 {
2453 switch (**cPP)
2454 {
2455 case 'd':
2456 case 'D':
2457 case 'm':
2458 case 'M':
2459 *flagsp |= 0x80;
2460 break;
2461
2462 case 'e':
2463 case 'E':
2464 case 'b':
2465 case 'B':
2466 *flagsp |= 0x40;
2467 break;
2468
2469 case 'i':
2470 case 'I':
2471 *flagsp |= 0x20;
2472 break;
2473
2474 case 'x':
2475 case 'X':
2476 *flagsp |= 0x10;
2477 break;
2478
2479 case 'n':
2480 case 'N':
2481 *flagsp |= 0x8;
2482 break;
2483
2484 case 'z':
2485 case 'Z':
2486 *flagsp |= 0x4;
2487 break;
2488
2489 case 'v':
2490 case 'V':
2491 *flagsp |= 0x2;
2492 break;
2493
2494 case 'c':
2495 case 'C':
2496 *flagsp |= 1;
2497 break;
2498
2499 default:
2500 /* We consider this successful if we stop at a comma or
2501 whitespace. Anything else, and we consider it a failure. */
2502 if (**cPP != ','
2503 && **cPP != 0
2504 && ! ISSPACE (**cPP))
2505 return 0;
2506 else
2507 return 1;
2508 }
2509
2510 /* Don't forget to consume each flag character. */
2511 (*cPP)++;
2512 }
2513 }
2514
2515 /* Generate code and fixes for a BDAP prefix.
2516
2517 base_regno Int containing the base register number.
2518
2519 exprP Pointer to structure containing the offset expression. */
2520
2521 static void
gen_bdap(base_regno,exprP)2522 gen_bdap (base_regno, exprP)
2523 int base_regno;
2524 expressionS *exprP;
2525 {
2526 unsigned int opcode;
2527 char *opcodep;
2528
2529 /* Put out the prefix opcode; assume quick immediate mode at first. */
2530 opcode = BDAP_QUICK_OPCODE | (base_regno << 12);
2531 opcodep = cris_insn_first_word_frag ();
2532 md_number_to_chars (opcodep, opcode, 2);
2533
2534 if (exprP->X_op == O_constant)
2535 {
2536 /* We have an absolute expression that we know the size of right
2537 now. */
2538 long int value;
2539 int size;
2540
2541 value = exprP->X_add_number;
2542 if (value < -32768 || value > 32767)
2543 /* Outside range for a "word", make it a dword. */
2544 size = 2;
2545 else
2546 /* Assume "word" size. */
2547 size = 1;
2548
2549 /* If this is a signed-byte value, we can fit it into the prefix
2550 insn itself. */
2551 if (value >= -128 && value <= 127)
2552 opcodep[0] = value;
2553 else
2554 {
2555 /* This is a word or dword displacement, which will be put in a
2556 word or dword after the prefix. */
2557 char *p;
2558
2559 opcodep[0] = BDAP_PC_LOW + (size << 4);
2560 opcodep[1] &= 0xF0;
2561 opcodep[1] |= BDAP_INCR_HIGH;
2562 p = frag_more (1 << size);
2563 md_number_to_chars (p, value, 1 << size);
2564 }
2565 }
2566 else
2567 {
2568 /* Handle complex expressions. */
2569 valueT addvalue
2570 = SIMPLE_EXPR (exprP) ? exprP->X_add_number : 0;
2571 symbolS *sym
2572 = (SIMPLE_EXPR (exprP)
2573 ? exprP->X_add_symbol : make_expr_symbol (exprP));
2574
2575 /* The expression is not defined yet but may become absolute. We
2576 make it a relocation to be relaxed. */
2577 frag_var (rs_machine_dependent, 4, 0,
2578 ENCODE_RELAX (STATE_BASE_PLUS_DISP_PREFIX, STATE_UNDF),
2579 sym, addvalue, opcodep);
2580 }
2581 }
2582
2583 /* Encode a branch displacement in the range -256..254 into the form used
2584 by CRIS conditional branch instructions.
2585
2586 offset The displacement value in bytes. */
2587
2588 static int
branch_disp(offset)2589 branch_disp (offset)
2590 int offset;
2591 {
2592 int disp;
2593
2594 disp = offset & 0xFE;
2595
2596 if (offset < 0)
2597 disp |= 1;
2598
2599 return disp;
2600 }
2601
2602 /* Generate code and fixes for a 32-bit conditional branch instruction
2603 created by "extending" an existing 8-bit branch instruction.
2604
2605 opcodep Pointer to the word containing the original 8-bit branch
2606 instruction.
2607
2608 writep Pointer to "extension area" following the first instruction
2609 word.
2610
2611 fragP Pointer to the frag containing the instruction.
2612
2613 add_symP, Parts of the destination address expression.
2614 sub_symP,
2615 add_num. */
2616
2617 static void
gen_cond_branch_32(opcodep,writep,fragP,add_symP,sub_symP,add_num)2618 gen_cond_branch_32 (opcodep, writep, fragP, add_symP, sub_symP, add_num)
2619 char *opcodep;
2620 char *writep;
2621 fragS *fragP;
2622 symbolS *add_symP;
2623 symbolS *sub_symP;
2624 long int add_num;
2625 {
2626 if (warn_for_branch_expansion)
2627 as_warn_where (fragP->fr_file, fragP->fr_line,
2628 _("32-bit conditional branch generated"));
2629
2630 /* Here, writep points to what will be opcodep + 2. First, we change
2631 the actual branch in opcodep[0] and opcodep[1], so that in the
2632 final insn, it will look like:
2633 opcodep+10: Bcc .-6
2634
2635 This means we don't have to worry about changing the opcode or
2636 messing with the delay-slot instruction. So, we move it to last in
2637 the "extended" branch, and just change the displacement. Admittedly,
2638 it's not the optimal extended construct, but we should get this
2639 rarely enough that it shouldn't matter. */
2640
2641 writep[8] = branch_disp (-2 - 6);
2642 writep[9] = opcodep[1];
2643
2644 /* Then, we change the branch to an unconditional branch over the
2645 extended part, to the new location of the Bcc:
2646 opcodep: BA .+10
2647 opcodep+2: NOP
2648
2649 Note that these two writes are to currently different locations,
2650 merged later. */
2651
2652 md_number_to_chars (opcodep, BA_QUICK_OPCODE + 8, 2);
2653 md_number_to_chars (writep, NOP_OPCODE, 2);
2654
2655 /* Then the extended thing, the 32-bit jump insn.
2656 opcodep+4: JUMP [PC+]
2657 or, in the PIC case,
2658 opcodep+4: ADD [PC+],PC. */
2659
2660 md_number_to_chars (writep + 2,
2661 pic ? ADD_PC_INCR_OPCODE : JUMP_PC_INCR_OPCODE, 2);
2662
2663 /* We have to fill in the actual value too.
2664 opcodep+6: .DWORD
2665 This is most probably an expression, but we can cope with an absolute
2666 value too. FIXME: Testcase needed with and without pic. */
2667
2668 if (add_symP == NULL && sub_symP == NULL)
2669 {
2670 /* An absolute address. */
2671 if (pic)
2672 fix_new (fragP, writep + 4 - fragP->fr_literal, 4,
2673 section_symbol (absolute_section),
2674 add_num, 1, BFD_RELOC_32_PCREL);
2675 else
2676 md_number_to_chars (writep + 4, add_num, 4);
2677 }
2678 else
2679 {
2680 if (sub_symP != NULL)
2681 as_bad_where (fragP->fr_file, fragP->fr_line,
2682 _("Complex expression not supported"));
2683
2684 /* Not absolute, we have to make it a frag for later evaluation. */
2685 fix_new (fragP, writep + 4 - fragP->fr_literal, 4, add_symP,
2686 add_num, pic ? 1 : 0, pic ? BFD_RELOC_32_PCREL : BFD_RELOC_32);
2687 }
2688 }
2689
2690 /* Get the size of an immediate-reloc in bytes. Only valid for PIC
2691 relocs. */
2692
2693 static unsigned int
cris_get_pic_reloc_size(reloc)2694 cris_get_pic_reloc_size (reloc)
2695 bfd_reloc_code_real_type reloc;
2696 {
2697 return reloc == BFD_RELOC_CRIS_16_GOTPLT || reloc == BFD_RELOC_CRIS_16_GOT
2698 ? 2 : 4;
2699 }
2700
2701 /* Store a reloc type at *RELOCP corresponding to the PIC suffix at *CPP.
2702 Adjust *EXPRP with any addend found after the PIC suffix. */
2703
2704 static void
cris_get_pic_suffix(cPP,relocp,exprP)2705 cris_get_pic_suffix (cPP, relocp, exprP)
2706 char **cPP;
2707 bfd_reloc_code_real_type *relocp;
2708 expressionS *exprP;
2709 {
2710 char *s = *cPP;
2711 unsigned int i;
2712 expressionS const_expr;
2713
2714 const struct pic_suffixes_struct
2715 {
2716 const char *const suffix;
2717 unsigned int len;
2718 bfd_reloc_code_real_type reloc;
2719 } pic_suffixes[] =
2720 {
2721 #undef PICMAP
2722 #define PICMAP(s, r) {s, sizeof (s) - 1, r}
2723 /* Keep this in order with longest unambiguous prefix first. */
2724 PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT),
2725 PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT),
2726 PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL),
2727 PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL),
2728 PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL),
2729 PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT),
2730 PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT)
2731 };
2732
2733 /* We've already seen the ':', so consume it. */
2734 s++;
2735
2736 for (i = 0; i < sizeof (pic_suffixes)/sizeof (pic_suffixes[0]); i++)
2737 {
2738 if (strncmp (s, pic_suffixes[i].suffix, pic_suffixes[i].len) == 0
2739 && ! is_part_of_name (s[pic_suffixes[i].len]))
2740 {
2741 /* We have a match. Consume the suffix and set the relocation
2742 type. */
2743 s += pic_suffixes[i].len;
2744
2745 /* There can be a constant term appended. If so, we will add it
2746 to *EXPRP. */
2747 if (*s == '+' || *s == '-')
2748 {
2749 if (! cris_get_expression (&s, &const_expr))
2750 /* There was some kind of syntax error. Bail out. */
2751 break;
2752
2753 /* Allow complex expressions as the constant part. It still
2754 has to be an assembly-time constant or there will be an
2755 error emitting the reloc. This makes the PIC qualifiers
2756 idempotent; foo:GOTOFF+32 == foo+32:GOTOFF. The former we
2757 recognize here; the latter is parsed in the incoming
2758 expression. */
2759 exprP->X_add_symbol = make_expr_symbol (exprP);
2760 exprP->X_op = O_add;
2761 exprP->X_add_number = 0;
2762 exprP->X_op_symbol = make_expr_symbol (&const_expr);
2763 }
2764
2765 *relocp = pic_suffixes[i].reloc;
2766 *cPP = s;
2767 return;
2768 }
2769 }
2770
2771 /* No match. Don't consume anything; fall back and there will be a
2772 syntax error. */
2773 }
2774
2775 /* This *could* be:
2776
2777 Turn a string in input_line_pointer into a floating point constant
2778 of type TYPE, and store the appropriate bytes in *LITP. The number
2779 of LITTLENUMS emitted is stored in *SIZEP.
2780
2781 type A character from FLTCHARS that describes what kind of
2782 floating-point number is wanted.
2783
2784 litp A pointer to an array that the result should be stored in.
2785
2786 sizep A pointer to an integer where the size of the result is stored.
2787
2788 But we don't support floating point constants in assembly code *at all*,
2789 since it's suboptimal and just opens up bug opportunities. GCC emits
2790 the bit patterns as hex. All we could do here is to emit what GCC
2791 would have done in the first place. *Nobody* writes floating-point
2792 code as assembly code, but if they do, they should be able enough to
2793 find out the correct bit patterns and use them. */
2794
2795 char *
md_atof(type,litp,sizep)2796 md_atof (type, litp, sizep)
2797 char type ATTRIBUTE_UNUSED;
2798 char *litp ATTRIBUTE_UNUSED;
2799 int *sizep ATTRIBUTE_UNUSED;
2800 {
2801 /* FIXME: Is this function mentioned in the internals.texi manual? If
2802 not, add it. */
2803 return _("Bad call to md_atof () - floating point formats are not supported");
2804 }
2805
2806 /* Turn a number as a fixS * into a series of bytes that represents the
2807 number on the target machine. The purpose of this procedure is the
2808 same as that of md_number_to_chars but this procedure is supposed to
2809 handle general bit field fixes and machine-dependent fixups.
2810
2811 bufp Pointer to an array where the result should be stored.
2812
2813 val The value to store.
2814
2815 n The number of bytes in "val" that should be stored.
2816
2817 fixP The fix to be applied to the bit field starting at bufp.
2818
2819 seg The segment containing this number. */
2820
2821 static void
cris_number_to_imm(bufp,val,n,fixP,seg)2822 cris_number_to_imm (bufp, val, n, fixP, seg)
2823 char *bufp;
2824 long val;
2825 int n;
2826 fixS *fixP;
2827 segT seg;
2828 {
2829 segT sym_seg;
2830
2831 know (n <= 4);
2832 know (fixP);
2833
2834 /* We put the relative "vma" for the other segment for inter-segment
2835 relocations in the object data to stay binary "compatible" (with an
2836 uninteresting old version) for the relocation.
2837 Maybe delete some day. */
2838 if (fixP->fx_addsy
2839 && (sym_seg = S_GET_SEGMENT (fixP->fx_addsy)) != seg)
2840 val += sym_seg->vma;
2841
2842 if (fixP->fx_addsy != NULL || fixP->fx_pcrel)
2843 switch (fixP->fx_r_type)
2844 {
2845 /* These must be fully resolved when getting here. */
2846 case BFD_RELOC_32_PCREL:
2847 case BFD_RELOC_16_PCREL:
2848 case BFD_RELOC_8_PCREL:
2849 as_bad_where (fixP->fx_frag->fr_file, fixP->fx_frag->fr_line,
2850 _("PC-relative relocation must be trivially resolved"));
2851 default:
2852 ;
2853 }
2854
2855 switch (fixP->fx_r_type)
2856 {
2857 /* Ditto here, we put the addend into the object code as
2858 well as the reloc addend. Keep it that way for now, to simplify
2859 regression tests on the object file contents. FIXME: Seems
2860 uninteresting now that we have a test suite. */
2861
2862 case BFD_RELOC_CRIS_16_GOT:
2863 case BFD_RELOC_CRIS_32_GOT:
2864 case BFD_RELOC_CRIS_32_GOTREL:
2865 case BFD_RELOC_CRIS_16_GOTPLT:
2866 case BFD_RELOC_CRIS_32_GOTPLT:
2867 case BFD_RELOC_CRIS_32_PLT_GOTREL:
2868 case BFD_RELOC_CRIS_32_PLT_PCREL:
2869 /* We don't want to put in any kind of non-zero bits in the data
2870 being relocated for these. */
2871 break;
2872
2873 case BFD_RELOC_32:
2874 case BFD_RELOC_32_PCREL:
2875 /* No use having warnings here, since most hosts have a 32-bit type
2876 for "long" (which will probably change soon, now that I wrote
2877 this). */
2878 bufp[3] = (val >> 24) & 0xFF;
2879 bufp[2] = (val >> 16) & 0xFF;
2880 bufp[1] = (val >> 8) & 0xFF;
2881 bufp[0] = val & 0xFF;
2882 break;
2883
2884 /* FIXME: The 16 and 8-bit cases should have a way to check
2885 whether a signed or unsigned (or any signedness) number is
2886 accepted.
2887 FIXME: Does the as_bad calls find the line number by themselves,
2888 or should we change them into as_bad_where? */
2889
2890 case BFD_RELOC_16:
2891 case BFD_RELOC_16_PCREL:
2892 if (val > 0xffff || val < -32768)
2893 as_bad (_("Value not in 16 bit range: %ld"), val);
2894 if (! fixP->fx_addsy)
2895 {
2896 bufp[1] = (val >> 8) & 0xFF;
2897 bufp[0] = val & 0xFF;
2898 }
2899 break;
2900
2901 case BFD_RELOC_8:
2902 case BFD_RELOC_8_PCREL:
2903 if (val > 255 || val < -128)
2904 as_bad (_("Value not in 8 bit range: %ld"), val);
2905 if (! fixP->fx_addsy)
2906 bufp[0] = val & 0xFF;
2907 break;
2908
2909 case BFD_RELOC_CRIS_UNSIGNED_4:
2910 if (val > 15 || val < 0)
2911 as_bad (_("Value not in 4 bit unsigned range: %ld"), val);
2912 if (! fixP->fx_addsy)
2913 bufp[0] |= val & 0x0F;
2914 break;
2915
2916 case BFD_RELOC_CRIS_UNSIGNED_5:
2917 if (val > 31 || val < 0)
2918 as_bad (_("Value not in 5 bit unsigned range: %ld"), val);
2919 if (! fixP->fx_addsy)
2920 bufp[0] |= val & 0x1F;
2921 break;
2922
2923 case BFD_RELOC_CRIS_SIGNED_6:
2924 if (val > 31 || val < -32)
2925 as_bad (_("Value not in 6 bit range: %ld"), val);
2926 if (! fixP->fx_addsy)
2927 bufp[0] |= val & 0x3F;
2928 break;
2929
2930 case BFD_RELOC_CRIS_UNSIGNED_6:
2931 if (val > 63 || val < 0)
2932 as_bad (_("Value not in 6 bit unsigned range: %ld"), val);
2933 if (! fixP->fx_addsy)
2934 bufp[0] |= val & 0x3F;
2935 break;
2936
2937 case BFD_RELOC_CRIS_BDISP8:
2938 if (! fixP->fx_addsy)
2939 bufp[0] = branch_disp (val);
2940 break;
2941
2942 case BFD_RELOC_NONE:
2943 /* May actually happen automatically. For example at broken
2944 words, if the word turns out not to be broken.
2945 FIXME: When? Which testcase? */
2946 if (! fixP->fx_addsy)
2947 md_number_to_chars (bufp, val, n);
2948 break;
2949
2950 case BFD_RELOC_VTABLE_INHERIT:
2951 /* This borrowed from tc-ppc.c on a whim. */
2952 if (fixP->fx_addsy
2953 && !S_IS_DEFINED (fixP->fx_addsy)
2954 && !S_IS_WEAK (fixP->fx_addsy))
2955 S_SET_WEAK (fixP->fx_addsy);
2956 /* Fall through. */
2957
2958 case BFD_RELOC_VTABLE_ENTRY:
2959 fixP->fx_done = 0;
2960 break;
2961
2962 default:
2963 BAD_CASE (fixP->fx_r_type);
2964 }
2965 }
2966
2967 /* Processes machine-dependent command line options. Called once for
2968 each option on the command line that the machine-independent part of
2969 GAS does not understand. */
2970
2971 int
md_parse_option(arg,argp)2972 md_parse_option (arg, argp)
2973 int arg;
2974 char *argp ATTRIBUTE_UNUSED;
2975 {
2976 switch (arg)
2977 {
2978 case 'H':
2979 case 'h':
2980 printf (_("Please use --help to see usage and options for this assembler.\n"));
2981 md_show_usage (stdout);
2982 exit (EXIT_SUCCESS);
2983
2984 case 'N':
2985 warn_for_branch_expansion = 1;
2986 return 1;
2987
2988 case OPTION_NO_US:
2989 demand_register_prefix = TRUE;
2990
2991 if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
2992 as_bad (_("--no-underscore is invalid with a.out format"));
2993 else
2994 symbols_have_leading_underscore = FALSE;
2995 return 1;
2996
2997 case OPTION_US:
2998 demand_register_prefix = FALSE;
2999 symbols_have_leading_underscore = TRUE;
3000 return 1;
3001
3002 case OPTION_PIC:
3003 pic = TRUE;
3004 return 1;
3005
3006 case OPTION_MULBUG_ABORT_OFF:
3007 err_for_dangerous_mul_placement = 0;
3008 return 1;
3009
3010 case OPTION_MULBUG_ABORT_ON:
3011 err_for_dangerous_mul_placement = 1;
3012 return 1;
3013
3014 default:
3015 return 0;
3016 }
3017 }
3018
3019 /* Round up a section size to the appropriate boundary. */
3020 valueT
md_section_align(segment,size)3021 md_section_align (segment, size)
3022 segT segment;
3023 valueT size;
3024 {
3025 /* Round all sects to multiple of 4, except the bss section, which
3026 we'll round to word-size.
3027
3028 FIXME: Check if this really matters. All sections should be
3029 rounded up, and all sections should (optionally) be assumed to be
3030 dword-aligned, it's just that there is actual usage of linking to a
3031 multiple of two. */
3032 if (OUTPUT_FLAVOR == bfd_target_aout_flavour)
3033 {
3034 if (segment == bss_section)
3035 return (size + 1) & ~1;
3036 return (size + 3) & ~3;
3037 }
3038 else
3039 {
3040 /* FIXME: Is this wanted? It matches the testsuite, but that's not
3041 really a valid reason. */
3042 if (segment == text_section)
3043 return (size + 3) & ~3;
3044 }
3045
3046 return size;
3047 }
3048
3049 /* Generate a machine-dependent relocation. */
3050 arelent *
tc_gen_reloc(section,fixP)3051 tc_gen_reloc (section, fixP)
3052 asection *section ATTRIBUTE_UNUSED;
3053 fixS *fixP;
3054 {
3055 arelent *relP;
3056 bfd_reloc_code_real_type code;
3057
3058 switch (fixP->fx_r_type)
3059 {
3060 case BFD_RELOC_CRIS_16_GOT:
3061 case BFD_RELOC_CRIS_32_GOT:
3062 case BFD_RELOC_CRIS_16_GOTPLT:
3063 case BFD_RELOC_CRIS_32_GOTPLT:
3064 case BFD_RELOC_CRIS_32_GOTREL:
3065 case BFD_RELOC_CRIS_32_PLT_GOTREL:
3066 case BFD_RELOC_CRIS_32_PLT_PCREL:
3067 case BFD_RELOC_32:
3068 case BFD_RELOC_16:
3069 case BFD_RELOC_8:
3070 case BFD_RELOC_VTABLE_INHERIT:
3071 case BFD_RELOC_VTABLE_ENTRY:
3072 code = fixP->fx_r_type;
3073 break;
3074 default:
3075 as_bad_where (fixP->fx_file, fixP->fx_line,
3076 _("Semantics error. This type of operand can not be relocated, it must be an assembly-time constant"));
3077 return 0;
3078 }
3079
3080 relP = (arelent *) xmalloc (sizeof (arelent));
3081 assert (relP != 0);
3082 relP->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
3083 *relP->sym_ptr_ptr = symbol_get_bfdsym (fixP->fx_addsy);
3084 relP->address = fixP->fx_frag->fr_address + fixP->fx_where;
3085
3086 if (fixP->fx_pcrel)
3087 relP->addend = 0;
3088 else
3089 relP->addend = fixP->fx_offset;
3090
3091 /* This is the standard place for KLUDGEs to work around bugs in
3092 bfd_install_relocation (first such note in the documentation
3093 appears with binutils-2.8).
3094
3095 That function bfd_install_relocation does the wrong thing with
3096 putting stuff into the addend of a reloc (it should stay out) for a
3097 weak symbol. The really bad thing is that it adds the
3098 "segment-relative offset" of the symbol into the reloc. In this
3099 case, the reloc should instead be relative to the symbol with no
3100 other offset than the assembly code shows; and since the symbol is
3101 weak, any local definition should be ignored until link time (or
3102 thereafter).
3103 To wit: weaksym+42 should be weaksym+42 in the reloc,
3104 not weaksym+(offset_from_segment_of_local_weaksym_definition)
3105
3106 To "work around" this, we subtract the segment-relative offset of
3107 "known" weak symbols. This evens out the extra offset.
3108
3109 That happens for a.out but not for ELF, since for ELF,
3110 bfd_install_relocation uses the "special function" field of the
3111 howto, and does not execute the code that needs to be undone. */
3112
3113 if (OUTPUT_FLAVOR == bfd_target_aout_flavour
3114 && fixP->fx_addsy && S_IS_WEAK (fixP->fx_addsy)
3115 && ! bfd_is_und_section (S_GET_SEGMENT (fixP->fx_addsy)))
3116 {
3117 relP->addend -= S_GET_VALUE (fixP->fx_addsy);
3118 }
3119
3120 relP->howto = bfd_reloc_type_lookup (stdoutput, code);
3121 if (! relP->howto)
3122 {
3123 const char *name;
3124
3125 name = S_GET_NAME (fixP->fx_addsy);
3126 if (name == NULL)
3127 name = _("<unknown>");
3128 as_fatal (_("Cannot generate relocation type for symbol %s, code %s"),
3129 name, bfd_get_reloc_code_name (code));
3130 }
3131
3132 return relP;
3133 }
3134
3135 /* Machine-dependent usage-output. */
3136
3137 void
md_show_usage(stream)3138 md_show_usage (stream)
3139 FILE *stream;
3140 {
3141 /* The messages are formatted to line up with the generic options. */
3142 fprintf (stream, _("CRIS-specific options:\n"));
3143 fprintf (stream, "%s",
3144 _(" -h, -H Don't execute, print this help text. Deprecated.\n"));
3145 fprintf (stream, "%s",
3146 _(" -N Warn when branches are expanded to jumps.\n"));
3147 fprintf (stream, "%s",
3148 _(" --underscore User symbols are normally prepended with underscore.\n"));
3149 fprintf (stream, "%s",
3150 _(" Registers will not need any prefix.\n"));
3151 fprintf (stream, "%s",
3152 _(" --no-underscore User symbols do not have any prefix.\n"));
3153 fprintf (stream, "%s",
3154 _(" Registers will require a `$'-prefix.\n"));
3155 fprintf (stream, "%s",
3156 _(" --pic Enable generation of position-independent code.\n"));
3157 }
3158
3159 /* Apply a fixS (fixup of an instruction or data that we didn't have
3160 enough info to complete immediately) to the data in a frag. */
3161
3162 void
md_apply_fix3(fixP,valP,seg)3163 md_apply_fix3 (fixP, valP, seg)
3164 fixS *fixP;
3165 valueT *valP;
3166 segT seg;
3167 {
3168 /* This assignment truncates upper bits if valueT is 64 bits (as with
3169 --enable-64-bit-bfd), which is fine here, though we cast to avoid
3170 any compiler warnings. */
3171 long val = (long) *valP;
3172 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
3173
3174 if (fixP->fx_addsy == 0 && !fixP->fx_pcrel)
3175 fixP->fx_done = 1;
3176
3177 if (fixP->fx_bit_fixP || fixP->fx_im_disp != 0)
3178 {
3179 as_bad_where (fixP->fx_file, fixP->fx_line, _("Invalid relocation"));
3180 fixP->fx_done = 1;
3181 }
3182 else
3183 {
3184 /* We can't actually support subtracting a symbol. */
3185 if (fixP->fx_subsy != (symbolS *) NULL)
3186 as_bad_where (fixP->fx_file, fixP->fx_line,
3187 _("expression too complex"));
3188
3189 cris_number_to_imm (buf, val, fixP->fx_size, fixP, seg);
3190 }
3191 }
3192
3193 /* All relocations are relative to the location just after the fixup;
3194 the address of the fixup plus its size. */
3195
3196 long
md_pcrel_from(fixP)3197 md_pcrel_from (fixP)
3198 fixS *fixP;
3199 {
3200 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
3201
3202 /* FIXME: We get here only at the end of assembly, when X in ".-X" is
3203 still unknown. Since we don't have pc-relative relocations in a.out,
3204 this is invalid. What to do if anything for a.out, is to add
3205 pc-relative relocations everywhere including the elinux program
3206 loader. For ELF, allow straight-forward PC-relative relocations,
3207 which are always relative to the location after the relocation. */
3208 if (OUTPUT_FLAVOR != bfd_target_elf_flavour
3209 || (fixP->fx_r_type != BFD_RELOC_8_PCREL
3210 && fixP->fx_r_type != BFD_RELOC_16_PCREL
3211 && fixP->fx_r_type != BFD_RELOC_32_PCREL))
3212 as_bad_where (fixP->fx_file, fixP->fx_line,
3213 _("Invalid pc-relative relocation"));
3214 return fixP->fx_size + addr;
3215 }
3216
3217 /* We have no need to give defaults for symbol-values. */
3218 symbolS *
md_undefined_symbol(name)3219 md_undefined_symbol (name)
3220 char *name ATTRIBUTE_UNUSED;
3221 {
3222 return 0;
3223 }
3224
3225 /* If this function returns non-zero, it prevents the relocation
3226 against symbol(s) in the FIXP from being replaced with relocations
3227 against section symbols, and guarantees that a relocation will be
3228 emitted even when the value can be resolved locally. */
3229 int
md_cris_force_relocation(fixp)3230 md_cris_force_relocation (fixp)
3231 struct fix *fixp;
3232 {
3233 switch (fixp->fx_r_type)
3234 {
3235 case BFD_RELOC_CRIS_16_GOT:
3236 case BFD_RELOC_CRIS_32_GOT:
3237 case BFD_RELOC_CRIS_16_GOTPLT:
3238 case BFD_RELOC_CRIS_32_GOTPLT:
3239 case BFD_RELOC_CRIS_32_GOTREL:
3240 case BFD_RELOC_CRIS_32_PLT_GOTREL:
3241 case BFD_RELOC_CRIS_32_PLT_PCREL:
3242 return 1;
3243 default:
3244 ;
3245 }
3246
3247 return generic_force_reloc (fixp);
3248 }
3249
3250 /* Check and emit error if broken-word handling has failed to fix up a
3251 case-table. This is called from write.c, after doing everything it
3252 knows about how to handle broken words. */
3253
3254 void
tc_cris_check_adjusted_broken_word(new_offset,brokwP)3255 tc_cris_check_adjusted_broken_word (new_offset, brokwP)
3256 offsetT new_offset;
3257 struct broken_word *brokwP;
3258 {
3259 if (new_offset > 32767 || new_offset < -32768)
3260 /* We really want a genuine error, not a warning, so make it one. */
3261 as_bad_where (brokwP->frag->fr_file, brokwP->frag->fr_line,
3262 _("Adjusted signed .word (%ld) overflows: `switch'-statement too large."),
3263 (long) new_offset);
3264 }
3265
3266 /* Make a leading REGISTER_PREFIX_CHAR mandatory for all registers. */
3267
cris_force_reg_prefix()3268 static void cris_force_reg_prefix ()
3269 {
3270 demand_register_prefix = TRUE;
3271 }
3272
3273 /* Do not demand a leading REGISTER_PREFIX_CHAR for all registers. */
3274
cris_relax_reg_prefix()3275 static void cris_relax_reg_prefix ()
3276 {
3277 demand_register_prefix = FALSE;
3278 }
3279
3280 /* Adjust for having a leading '_' on all user symbols. */
3281
cris_sym_leading_underscore()3282 static void cris_sym_leading_underscore ()
3283 {
3284 /* We can't really do anything more than assert that what the program
3285 thinks symbol starts with agrees with the command-line options, since
3286 the bfd is already created. */
3287
3288 if (!symbols_have_leading_underscore)
3289 as_bad (_(".syntax %s requires command-line option `--underscore'"),
3290 SYNTAX_USER_SYM_LEADING_UNDERSCORE);
3291 }
3292
3293 /* Adjust for not having any particular prefix on user symbols. */
3294
cris_sym_no_leading_underscore()3295 static void cris_sym_no_leading_underscore ()
3296 {
3297 if (symbols_have_leading_underscore)
3298 as_bad (_(".syntax %s requires command-line option `--no-underscore'"),
3299 SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE);
3300 }
3301
3302 /* Handle the .syntax pseudo, which takes an argument that decides what
3303 syntax the assembly code has. */
3304
3305 static void
s_syntax(ignore)3306 s_syntax (ignore)
3307 int ignore ATTRIBUTE_UNUSED;
3308 {
3309 static const struct syntaxes
3310 {
3311 const char *operand;
3312 void (*fn) PARAMS ((void));
3313 } syntax_table[] =
3314 {{SYNTAX_ENFORCE_REG_PREFIX, cris_force_reg_prefix},
3315 {SYNTAX_RELAX_REG_PREFIX, cris_relax_reg_prefix},
3316 {SYNTAX_USER_SYM_LEADING_UNDERSCORE, cris_sym_leading_underscore},
3317 {SYNTAX_USER_SYM_NO_LEADING_UNDERSCORE, cris_sym_no_leading_underscore}};
3318
3319 const struct syntaxes *sp;
3320
3321 for (sp = syntax_table;
3322 sp < syntax_table + sizeof (syntax_table) / sizeof (syntax_table[0]);
3323 sp++)
3324 {
3325 if (strncmp (input_line_pointer, sp->operand,
3326 strlen (sp->operand)) == 0)
3327 {
3328 (sp->fn) ();
3329
3330 input_line_pointer += strlen (sp->operand);
3331 demand_empty_rest_of_line ();
3332 return;
3333 }
3334 }
3335
3336 as_bad (_("Unknown .syntax operand"));
3337 }
3338
3339 /* Wrapper for dwarf2_directive_file to emit error if this is seen when
3340 not emitting ELF. */
3341
3342 static void
s_cris_file(dummy)3343 s_cris_file (dummy)
3344 int dummy;
3345 {
3346 if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
3347 as_bad (_("Pseudodirective .file is only valid when generating ELF"));
3348 else
3349 dwarf2_directive_file (dummy);
3350 }
3351
3352 /* Wrapper for dwarf2_directive_loc to emit error if this is seen when not
3353 emitting ELF. */
3354
3355 static void
s_cris_loc(dummy)3356 s_cris_loc (dummy)
3357 int dummy;
3358 {
3359 if (OUTPUT_FLAVOR != bfd_target_elf_flavour)
3360 as_bad (_("Pseudodirective .loc is only valid when generating ELF"));
3361 else
3362 dwarf2_directive_loc (dummy);
3363 }
3364
3365 /*
3366 * Local variables:
3367 * eval: (c-set-style "gnu")
3368 * indent-tabs-mode: t
3369 * End:
3370 */
3371